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source: vbox/trunk/src/VBox/Additions/x11/x11include/xorg-server-1.3.0.0/xf86int10.h@ 49762

Last change on this file since 49762 was 25078, checked in by vboxsync, 15 years ago

Additions/x11/x11include: exported and set eol-style on new headers
  • Property svn:eol-style set to native
File size: 6.1 KB
Line 
1
2/*
3 * XFree86 int10 module
4 * execute BIOS int 10h calls in x86 real mode environment
5 * Copyright 1999 Egbert Eich
6 */
7
8#ifndef _XF86INT10_H
9#define _XF86INT10_H
10
11#include <X11/Xmd.h>
12#include <X11/Xdefs.h>
13#include "xf86Pci.h"
14
15#define SEG_ADDR(x) (((x) >> 4) & 0x00F000)
16#define SEG_OFF(x) ((x) & 0x0FFFF)
17
18#define SET_BIOS_SCRATCH 0x1
19#define RESTORE_BIOS_SCRATCH 0x2
20
21/* int10 info structure */
22typedef struct {
23 int entityIndex;
24 int scrnIndex;
25 pointer cpuRegs;
26 CARD16 BIOSseg;
27 CARD16 inb40time;
28 char * BIOSScratch;
29 int Flags;
30 pointer private;
31 struct _int10Mem* mem;
32 int num;
33 int ax;
34 int bx;
35 int cx;
36 int dx;
37 int si;
38 int di;
39 int es;
40 int bp;
41 int flags;
42 int stackseg;
43 PCITAG Tag;
44 IOADDRESS ioBase;
45} xf86Int10InfoRec, *xf86Int10InfoPtr;
46
47typedef struct _int10Mem {
48 CARD8(*rb)(xf86Int10InfoPtr, int);
49 CARD16(*rw)(xf86Int10InfoPtr, int);
50 CARD32(*rl)(xf86Int10InfoPtr, int);
51 void(*wb)(xf86Int10InfoPtr, int, CARD8);
52 void(*ww)(xf86Int10InfoPtr, int, CARD16);
53 void(*wl)(xf86Int10InfoPtr, int, CARD32);
54} int10MemRec, *int10MemPtr;
55
56typedef struct {
57 CARD8 save_msr;
58 CARD8 save_pos102;
59 CARD8 save_vse;
60 CARD8 save_46e8;
61} legacyVGARec, *legacyVGAPtr;
62
63typedef struct {
64 BusType bus;
65 union {
66 struct {
67 int bus;
68 int dev;
69 int func;
70 } pci;
71 int legacy;
72 } location;
73} xf86int10BiosLocation, *xf86int10BiosLocationPtr;
74
75/* OS dependent functions */
76xf86Int10InfoPtr xf86InitInt10(int entityIndex);
77xf86Int10InfoPtr xf86ExtendedInitInt10(int entityIndex, int Flags);
78void xf86FreeInt10(xf86Int10InfoPtr pInt);
79void *xf86Int10AllocPages(xf86Int10InfoPtr pInt, int num, int *off);
80void xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, int num);
81pointer xf86int10Addr(xf86Int10InfoPtr pInt, CARD32 addr);
82
83/* x86 executor related functions */
84void xf86ExecX86int10(xf86Int10InfoPtr pInt);
85
86#ifdef _INT10_PRIVATE
87
88#define I_S_DEFAULT_INT_VECT 0xFF065
89#define SYS_SIZE 0x100000
90#define SYS_BIOS 0xF0000
91#if 1
92#define BIOS_SIZE 0x10000
93#else /* a bug in DGUX requires this - let's try it */
94#define BIOS_SIZE (0x10000 - 1)
95#endif
96#define LOW_PAGE_SIZE 0x600
97#define V_RAM 0xA0000
98#define VRAM_SIZE 0x20000
99#define V_BIOS_SIZE 0x10000
100#define V_BIOS 0xC0000
101#define BIOS_SCRATCH_OFF 0x449
102#define BIOS_SCRATCH_END 0x466
103#define BIOS_SCRATCH_LEN (BIOS_SCRATCH_END - BIOS_SCRATCH_OFF + 1)
104#define HIGH_MEM V_BIOS
105#define HIGH_MEM_SIZE (SYS_BIOS - HIGH_MEM)
106#define SEG_ADR(type, seg, reg) type((seg << 4) + (X86_##reg))
107#define SEG_EADR(type, seg, reg) type((seg << 4) + (X86_E##reg))
108
109#define X86_TF_MASK 0x00000100
110#define X86_IF_MASK 0x00000200
111#define X86_IOPL_MASK 0x00003000
112#define X86_NT_MASK 0x00004000
113#define X86_VM_MASK 0x00020000
114#define X86_AC_MASK 0x00040000
115#define X86_VIF_MASK 0x00080000 /* virtual interrupt flag */
116#define X86_VIP_MASK 0x00100000 /* virtual interrupt pending */
117#define X86_ID_MASK 0x00200000
118
119#define MEM_RB(name, addr) (*name->mem->rb)(name, addr)
120#define MEM_RW(name, addr) (*name->mem->rw)(name, addr)
121#define MEM_RL(name, addr) (*name->mem->rl)(name, addr)
122#define MEM_WB(name, addr, val) (*name->mem->wb)(name, addr, val)
123#define MEM_WW(name, addr, val) (*name->mem->ww)(name, addr, val)
124#define MEM_WL(name, addr, val) (*name->mem->wl)(name, addr, val)
125
126/* OS dependent functions */
127Bool MapCurrentInt10(xf86Int10InfoPtr pInt);
128/* x86 executor related functions */
129Bool xf86Int10ExecSetup(xf86Int10InfoPtr pInt);
130
131/* int.c */
132extern xf86Int10InfoPtr Int10Current;
133int int_handler(xf86Int10InfoPtr pInt);
134
135/* helper_exec.c */
136int setup_int(xf86Int10InfoPtr pInt);
137void finish_int(xf86Int10InfoPtr, int sig);
138CARD32 getIntVect(xf86Int10InfoPtr pInt, int num);
139void pushw(xf86Int10InfoPtr pInt, CARD16 val);
140int run_bios_int(int num, xf86Int10InfoPtr pInt);
141void dump_code(xf86Int10InfoPtr pInt);
142void dump_registers(xf86Int10InfoPtr pInt);
143void stack_trace(xf86Int10InfoPtr pInt);
144xf86Int10InfoPtr getInt10Rec(int entityIndex);
145CARD8 bios_checksum(const CARD8 *start, int size);
146void LockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga);
147void UnlockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga);
148#if defined (_PC)
149void xf86Int10SaveRestoreBIOSVars(xf86Int10InfoPtr pInt, Bool save);
150#endif
151int port_rep_inb(xf86Int10InfoPtr pInt,
152 CARD16 port, CARD32 base, int d_f, CARD32 count);
153int port_rep_inw(xf86Int10InfoPtr pInt,
154 CARD16 port, CARD32 base, int d_f, CARD32 count);
155int port_rep_inl(xf86Int10InfoPtr pInt,
156 CARD16 port, CARD32 base, int d_f, CARD32 count);
157int port_rep_outb(xf86Int10InfoPtr pInt,
158 CARD16 port, CARD32 base, int d_f, CARD32 count);
159int port_rep_outw(xf86Int10InfoPtr pInt,
160 CARD16 port, CARD32 base, int d_f, CARD32 count);
161int port_rep_outl(xf86Int10InfoPtr pInt,
162 CARD16 port, CARD32 base, int d_f, CARD32 count);
163
164CARD8 x_inb(CARD16 port);
165CARD16 x_inw(CARD16 port);
166void x_outb(CARD16 port, CARD8 val);
167void x_outw(CARD16 port, CARD16 val);
168CARD32 x_inl(CARD16 port);
169void x_outl(CARD16 port, CARD32 val);
170
171CARD8 Mem_rb(CARD32 addr);
172CARD16 Mem_rw(CARD32 addr);
173CARD32 Mem_rl(CARD32 addr);
174void Mem_wb(CARD32 addr, CARD8 val);
175void Mem_ww(CARD32 addr, CARD16 val);
176void Mem_wl(CARD32 addr, CARD32 val);
177
178/* helper_mem.c */
179void setup_int_vect(xf86Int10InfoPtr pInt);
180int setup_system_bios(void *base_addr);
181void reset_int_vect(xf86Int10InfoPtr pInt);
182void set_return_trap(xf86Int10InfoPtr pInt);
183void * xf86HandleInt10Options(ScrnInfoPtr pScrn, int entityIndex);
184Bool int10skip(const void* options);
185Bool int10_check_bios(int scrnIndex, int codeSeg,
186 const unsigned char* vbiosMem);
187Bool initPrimary(const void* options);
188void xf86int10ParseBiosLocation(const void* options,
189 xf86int10BiosLocationPtr bios);
190BusType xf86int10GetBiosLocationType(const xf86Int10InfoPtr pInt,
191 const xf86int10BiosLocationPtr bios);
192Bool xf86int10GetBiosSegment(xf86Int10InfoPtr pInt,
193 const xf86int10BiosLocationPtr bios, void * base);
194#ifdef DEBUG
195void dprint(unsigned long start, unsigned long size);
196#endif
197
198/* pci.c */
199int mapPciRom(int pciEntity, unsigned char *address);
200
201#endif /* _INT10_PRIVATE */
202#endif /* _XF86INT10_H */
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