| 1 | /*
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| 2 | * Copyright IBM Corporation 1987,1988,1989
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| 3 | *
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| 4 | * All Rights Reserved
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| 5 | *
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| 6 | * Permission to use, copy, modify, and distribute this software and its
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| 7 | * documentation for any purpose and without fee is hereby granted,
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| 8 | * provided that the above copyright notice appear in all copies and that
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| 9 | * both that copyright notice and this permission notice appear in
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| 10 | * supporting documentation, and that the name of IBM not be
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| 11 | * used in advertising or publicity pertaining to distribution of the
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| 12 | * software without specific, written prior permission.
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| 13 | *
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| 14 | * IBM DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
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| 15 | * ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
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| 16 | * IBM BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
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| 17 | * ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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| 18 | * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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| 19 | * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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| 20 | * SOFTWARE.
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| 21 | *
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| 22 | */
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| 23 |
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| 24 | #define SET_BYTE_REGISTER( ioport, value ) outb( ioport, value )
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| 25 | #define SET_INDEX_REGISTER( ioport, value ) SET_BYTE_REGISTER( ioport, value )
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| 26 | #define SET_DATA_REGISTER( ioport, value ) SET_BYTE_REGISTER( ioport, value )
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| 27 | /* GJA -- deleted RTIO and ATRIO case here, so that a PCIO #define became
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| 28 | * superfluous.
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| 29 | */
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| 30 | #define SET_INDEXED_REGISTER(RegGroup, Index, Value) \
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| 31 | (SET_BYTE_REGISTER(RegGroup, Index), \
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| 32 | SET_BYTE_REGISTER((RegGroup) + 1, Value))
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| 33 |
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| 34 | /* There is a jumper on the ega to change this to 0x200 instead !! */
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| 35 | #ifdef HAVE_XORG_CONFIG_H
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| 36 | #include <xorg-config.h>
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| 37 | #endif
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| 38 |
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| 39 | #if 0 /* This is now a stack variable, as needed */
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| 40 | #define REGBASE 0x300
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| 41 | #endif
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| 42 |
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| 43 | #define AttributeIndexRegister REGBASE + 0xC0
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| 44 | #define AttributeDataWriteRegister REGBASE + 0xC0
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| 45 | #define AttributeDataReadRegister REGBASE + 0xC1
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| 46 | #define AttributeRegister AttributeIndexRegister
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| 47 | #define AttributeModeIndex 0x30
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| 48 | #define OverScanColorIndex 0x31
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| 49 | #define ColorPlaneEnableIndex 0x32
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| 50 | #define HorizPelPanIndex 0x33
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| 51 | #define ColorSelectIndex 0x34
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| 52 | #ifndef PC98_EGC
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| 53 | #define SetVideoAttributeIndex( index ) \
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| 54 | SET_INDEX_REGISTER( AttributeIndexRegister, index )
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| 55 | #define SetVideoAttribute( index, value ) \
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| 56 | SetVideoAttributeIndex( index ) ; \
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| 57 | SET_BYTE_REGISTER( AttributeDataWriteRegister, value )
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| 58 | #endif
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| 59 |
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| 60 | /* Graphics Registers 03CE & 03CF */
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| 61 | #define GraphicsIndexRegister REGBASE + 0xCE
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| 62 | #define GraphicsDataRegister REGBASE + 0xCF
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| 63 | #define GraphicsRegister GraphicsIndexRegister
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| 64 | #define Set_ResetIndex 0x00
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| 65 | #define Enb_Set_ResetIndex 0x01
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| 66 | #define Color_CompareIndex 0x02
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| 67 | #define Data_RotateIndex 0x03
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| 68 | #define Read_Map_SelectIndex 0x04
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| 69 | #define Graphics_ModeIndex 0x05
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| 70 | #define MiscellaneousIndex 0x06
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| 71 | #define Color_Dont_CareIndex 0x07
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| 72 | #define Bit_MaskIndex 0x08
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| 73 | #ifndef PC98_EGC
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| 74 | #define SetVideoGraphicsIndex( index ) \
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| 75 | SET_INDEX_REGISTER( GraphicsIndexRegister, index )
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| 76 | #define SetVideoGraphicsData( value ) \
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| 77 | SET_INDEX_REGISTER( GraphicsDataRegister, value )
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| 78 | #define SetVideoGraphics( index, value ) \
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| 79 | SET_INDEXED_REGISTER( GraphicsRegister, index, value )
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| 80 | #endif
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| 81 |
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| 82 | /* Sequencer Registers 03C4 & 03C5 */
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| 83 | #define SequencerIndexRegister REGBASE + 0xC4
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| 84 | #define SequencerDataRegister REGBASE + 0xC5
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| 85 | #define SequencerRegister SequencerIndexRegister
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| 86 | #define Seq_ResetIndex 00
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| 87 | #define Clock_ModeIndex 01
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| 88 | #define Mask_MapIndex 02
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| 89 | #define Char_Map_SelectIndex 03
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| 90 | #define Memory_ModeIndex 04
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| 91 | #ifndef PC98_EGC
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| 92 | #define SetVideoSequencerIndex( index ) \
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| 93 | SET_INDEX_REGISTER( SequencerIndexRegister, index )
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| 94 | #define SetVideoSequencer( index, value ) \
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| 95 | SET_INDEXED_REGISTER( SequencerRegister, index, value )
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| 96 | #endif
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| 97 |
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| 98 | /* BIT CONSTANTS FOR THE VGA/EGA HARDWARE */
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| 99 | /* for the Graphics' Data_Rotate Register */
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| 100 | #define VGA_ROTATE_FUNC_SHIFT 3
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| 101 | #define VGA_COPY_MODE ( 0 << VGA_ROTATE_FUNC_SHIFT ) /* 0x00 */
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| 102 | #define VGA_AND_MODE ( 1 << VGA_ROTATE_FUNC_SHIFT ) /* 0x08 */
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| 103 | #define VGA_OR_MODE ( 2 << VGA_ROTATE_FUNC_SHIFT ) /* 0x10 */
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| 104 | #define VGA_XOR_MODE ( 3 << VGA_ROTATE_FUNC_SHIFT ) /* 0x18 */
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| 105 | /* for the Graphics' Graphics_Mode Register */
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| 106 | #define VGA_READ_MODE_SHIFT 3
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| 107 | #define VGA_WRITE_MODE_0 0
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| 108 | #define VGA_WRITE_MODE_1 1
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| 109 | #define VGA_WRITE_MODE_2 2
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| 110 | #define VGA_WRITE_MODE_3 3
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| 111 | #define VGA_READ_MODE_0 ( 0 << VGA_READ_MODE_SHIFT )
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| 112 | #define VGA_READ_MODE_1 ( 1 << VGA_READ_MODE_SHIFT )
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| 113 |
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| 114 | #ifdef PC98_EGC
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| 115 | /* I/O port address define for extended EGC */
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| 116 | #define EGC_PLANE 0x4a0 /* EGC active plane select */
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| 117 | #define EGC_READ 0x4a2 /* EGC FGC,EGC,Read Plane */
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| 118 | #define EGC_MODE 0x4a4 /* EGC Mode register & ROP */
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| 119 | #define EGC_FGC 0x4a6 /* EGC Forground color */
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| 120 | #define EGC_MASK 0x4a8 /* EGC Mask register */
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| 121 | #define EGC_BGC 0x4aa /* EGC Background color */
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| 122 | #define EGC_ADD 0x4ac /* EGC Dest/Source address */
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| 123 | #define EGC_LENGTH 0x4ae /* EGC Bit length */
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| 124 |
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| 125 | #define PALETTE_ADD 0xa8 /* Palette address */
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| 126 | #define PALETTE_GRE 0xaa /* Palette Green */
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| 127 | #define PALETTE_RED 0xac /* Palette Red */
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| 128 | #define PALETTE_BLU 0xae /* Palette Blue */
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| 129 |
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| 130 | #define EGC_AND_MODE 0x2c8c /* (S&P&D)|(~S&D) */
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| 131 | #define EGC_AND_INV_MODE 0x2c2c /* (S&P&~D)|(~S&D) */
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| 132 | #define EGC_OR_MODE 0x2cec /* S&(P|D)|(~S&D) */
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| 133 | #define EGC_OR_INV_MODE 0x2cbc /* S&(P|~D)|(~S&D) */
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| 134 | #define EGC_XOR_MODE 0x2c6c /* (S&(P&~D|~P&D))|(~S&D) */
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| 135 | #define EGC_XOR_INV_MODE 0x2c9c /* (S&(P&D)|(~P&~D))|(~S&D) */
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| 136 | #define EGC_COPY_MODE 0x2cac /* (S&P)|(~S&D) */
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| 137 | #endif
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