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| 2 | #include <xf86RamDac.h>
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| 3 |
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| 4 | unsigned long TIramdacCalculateMNPForClock(unsigned long RefClock,
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| 5 | unsigned long ReqClock, char IsPixClock, unsigned long MinClock,
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| 6 | unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
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| 7 | unsigned long *rP);
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| 8 | RamDacHelperRecPtr TIramdacProbe(ScrnInfoPtr pScrn, RamDacSupportedInfoRecPtr ramdacs);
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| 9 | void TIramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
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| 10 | void TIramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
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| 11 | void TIramdac3026SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
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| 12 | void TIramdac3030SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
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| 13 | unsigned long TIramdac3030CalculateMNPForClock(unsigned long RefClock,
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| 14 | unsigned long ReqClock, char IsPixClock, unsigned long MinClock,
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| 15 | unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
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| 16 | unsigned long *rP);
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| 17 | void TIramdacHWCursorInit(xf86CursorInfoPtr infoPtr);
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| 18 | void TIramdacLoadPalette( ScrnInfoPtr pScrn, int numColors, int *indices,
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| 19 | LOCO *colors, VisualPtr pVisual);
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| 20 |
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| 21 | typedef void TIramdacLoadPaletteProc(ScrnInfoPtr, int, int *, LOCO *,
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| 22 | VisualPtr);
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| 23 | TIramdacLoadPaletteProc *TIramdacLoadPaletteWeak(void);
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| 24 |
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| 25 | #define TI3030_RAMDAC (VENDOR_TI << 16) | 0x00
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| 26 | #define TI3026_RAMDAC (VENDOR_TI << 16) | 0x01
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| 27 |
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| 28 | /*
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| 29 | * TI Ramdac registers
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| 30 | */
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| 31 |
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| 32 | #define TIDAC_rev 0x01
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| 33 | #define TIDAC_ind_curs_ctrl 0x06
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| 34 | #define TIDAC_byte_router_ctrl 0x07
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| 35 | #define TIDAC_latch_ctrl 0x0f
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| 36 | #define TIDAC_true_color_ctrl 0x18
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| 37 | #define TIDAC_multiplex_ctrl 0x19
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| 38 | #define TIDAC_clock_select 0x1a
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| 39 | #define TIDAC_palette_page 0x1c
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| 40 | #define TIDAC_general_ctrl 0x1d
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| 41 | #define TIDAC_misc_ctrl 0x1e
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| 42 | #define TIDAC_pll_addr 0x2c
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| 43 | #define TIDAC_pll_pixel_data 0x2d
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| 44 | #define TIDAC_pll_memory_data 0x2e
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| 45 | #define TIDAC_pll_loop_data 0x2f
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| 46 | #define TIDAC_key_over_low 0x30
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| 47 | #define TIDAC_key_over_high 0x31
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| 48 | #define TIDAC_key_red_low 0x32
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| 49 | #define TIDAC_key_red_high 0x33
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| 50 | #define TIDAC_key_green_low 0x34
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| 51 | #define TIDAC_key_green_high 0x35
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| 52 | #define TIDAC_key_blue_low 0x36
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| 53 | #define TIDAC_key_blue_high 0x37
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| 54 | #define TIDAC_key_ctrl 0x38
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| 55 | #define TIDAC_clock_ctrl 0x39
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| 56 | #define TIDAC_sense_test 0x3a
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| 57 | #define TIDAC_test_mode_data 0x3b
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| 58 | #define TIDAC_crc_remain_lsb 0x3c
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| 59 | #define TIDAC_crc_remain_msb 0x3d
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| 60 | #define TIDAC_crc_bit_select 0x3e
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| 61 | #define TIDAC_id 0x3f
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| 62 |
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| 63 | /* These are pll values that are accessed via TIDAC_pll_pixel_data */
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| 64 | #define TIDAC_PIXEL_N 0x80
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| 65 | #define TIDAC_PIXEL_M 0x81
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| 66 | #define TIDAC_PIXEL_P 0x82
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| 67 | #define TIDAC_PIXEL_VALID 0x83
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| 68 |
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| 69 | /* These are pll values that are accessed via TIDAC_pll_loop_data */
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| 70 | #define TIDAC_LOOP_N 0x90
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| 71 | #define TIDAC_LOOP_M 0x91
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| 72 | #define TIDAC_LOOP_P 0x92
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| 73 | #define TIDAC_LOOP_VALID 0x93
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| 74 |
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| 75 | /* Direct mapping addresses */
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| 76 | #define TIDAC_INDEX 0xa0
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| 77 | #define TIDAC_PALETTE_DATA 0xa1
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| 78 | #define TIDAC_READ_MASK 0xa2
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| 79 | #define TIDAC_READ_ADDR 0xa3
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| 80 | #define TIDAC_CURS_WRITE_ADDR 0xa4
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| 81 | #define TIDAC_CURS_COLOR 0xa5
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| 82 | #define TIDAC_CURS_READ_ADDR 0xa7
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| 83 | #define TIDAC_CURS_CTL 0xa9
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| 84 | #define TIDAC_INDEXED_DATA 0xaa
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| 85 | #define TIDAC_CURS_RAM_DATA 0xab
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| 86 | #define TIDAC_CURS_XLOW 0xac
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| 87 | #define TIDAC_CURS_XHIGH 0xad
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| 88 | #define TIDAC_CURS_YLOW 0xae
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| 89 | #define TIDAC_CURS_YHIGH 0xaf
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| 90 |
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| 91 | #define TIDAC_sw_reset 0xff
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| 92 |
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| 93 | /* Constants */
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| 94 | #define TIDAC_TVP_3026_ID 0x26
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| 95 | #define TIDAC_TVP_3030_ID 0x30
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