VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevHDA.h@ 87567

Last change on this file since 87567 was 87567, checked in by vboxsync, 4 years ago

Audio/HDA: More timing-related fixes for Windows guests. This is a risky change and needs more testing / verification on other guests. Only got limited testing for Win10 AU / Win10 20H2 and Ubuntu 20.10 guests so far. ticketoem2ref:36

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 9.3 KB
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1/* $Id: DevHDA.h 87567 2021-02-03 14:25:29Z vboxsync $ */
2/** @file
3 * DevHDA.h - VBox Intel HD Audio Controller.
4 */
5
6/*
7 * Copyright (C) 2016-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VBOX_INCLUDED_SRC_Audio_DevHDA_h
19#define VBOX_INCLUDED_SRC_Audio_DevHDA_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <iprt/path.h>
25
26#include <VBox/vmm/pdmdev.h>
27
28#include "AudioMixer.h"
29
30#include "HDACodec.h"
31#include "HDAStream.h"
32#include "HDAStreamMap.h"
33#include "HDAStreamPeriod.h"
34
35#ifdef DEBUG_andy
36/** Enables strict mode, which checks for stuff which isn't supposed to happen.
37 * Be prepared for assertions coming in! */
38# define HDA_STRICT
39#endif
40
41/**
42 * HDA mixer sink definition (ring-3).
43 *
44 * Its purpose is to know which audio mixer sink is bound to which SDn
45 * (SDI/SDO) device stream.
46 *
47 * This is needed in order to handle interleaved streams (that is, multiple
48 * channels in one stream) or non-interleaved streams (each channel has a
49 * dedicated stream).
50 *
51 * This is only known to the actual device emulation level.
52 */
53typedef struct HDAMIXERSINK
54{
55 R3PTRTYPE(PHDASTREAM) pStreamShared;
56 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
57 /** Pointer to the actual audio mixer sink. */
58 R3PTRTYPE(PAUDMIXSINK) pMixSink;
59} HDAMIXERSINK;
60/** Pointer to an HDA mixer sink definition (ring-3). */
61typedef HDAMIXERSINK *PHDAMIXERSINK;
62
63/**
64 * Mapping a stream tag to an HDA stream (ring-3).
65 */
66typedef struct HDATAG
67{
68 /** Own stream tag. */
69 uint8_t uTag;
70 uint8_t Padding[7];
71 /** Pointer to associated stream. */
72 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
73} HDATAG;
74/** Pointer to a HDA stream tag mapping. */
75typedef HDATAG *PHDATAG;
76
77/**
78 * Shared ICH Intel HD audio controller state.
79 */
80typedef struct HDASTATE
81{
82 /** Critical section protecting the HDA state. */
83 PDMCRITSECT CritSect;
84 /** The HDA's register set. */
85 uint32_t au32Regs[HDA_NUM_REGS];
86 /** Internal stream states. */
87 HDASTREAM aStreams[HDA_MAX_STREAMS];
88 /** CORB buffer base address. */
89 uint64_t u64CORBBase;
90 /** RIRB buffer base address. */
91 uint64_t u64RIRBBase;
92 /** DMA base address.
93 * Made out of DPLBASE + DPUBASE (3.3.32 + 3.3.33). */
94 uint64_t u64DPBase;
95 /** Size in bytes of CORB buffer (#au32CorbBuf). */
96 uint32_t cbCorbBuf;
97 /** Size in bytes of RIRB buffer (#au64RirbBuf). */
98 uint32_t cbRirbBuf;
99 /** Response Interrupt Count (RINTCNT). */
100 uint16_t u16RespIntCnt;
101 /** Position adjustment (in audio frames).
102 *
103 * This is not an official feature of the HDA specs, but used by
104 * certain OS drivers (e.g. snd_hda_intel) to work around certain
105 * quirks by "real" HDA hardware implementations.
106 *
107 * The position adjustment specifies how many audio frames
108 * a stream is ahead from its actual reading/writing position when
109 * starting a stream.
110 */
111 uint16_t cPosAdjustFrames;
112 /** Whether the position adjustment is enabled or not. */
113 bool fPosAdjustEnabled;
114 /** DMA position buffer enable bit. */
115 bool fDMAPosition;
116 /** Current IRQ level. */
117 uint8_t u8IRQL;
118#ifdef VBOX_STRICT
119 /** Wall clock (WALCLK) stale count.
120 * This indicates the number of set wall clock values which did not actually
121 * move the counter forward (stale). */
122 uint8_t u8WalClkStaleCnt;
123#else
124 uint8_t bPadding1;
125#endif
126 /** The device timer Hz rate. Defaults to HDA_TIMER_HZ_DEFAULT. */
127 uint16_t uTimerHz;
128 /** Buffer size (in ms) of the internal input FIFO buffer.
129 * The actual buffer size in bytes will depend on the actual stream configuration. */
130 uint16_t cbCircBufInMs;
131 /** Buffer size (in ms) of the internal output FIFO buffer.
132 * The actual buffer size in bytes will depend on the actual stream configuration. */
133 uint16_t cbCircBufOutMs;
134 /** Padding for alignment. */
135 uint16_t u16Padding3;
136 /** Last updated wall clock (WALCLK) counter. */
137 uint64_t u64WalClk;
138 /** The CORB buffer. */
139 uint32_t au32CorbBuf[HDA_CORB_SIZE];
140 /** Pointer to RIRB buffer. */
141 uint64_t au64RirbBuf[HDA_RIRB_SIZE];
142
143 /** PCI Region \#0: 16KB of MMIO stuff. */
144 IOMMMIOHANDLE hMmio;
145
146#ifdef VBOX_WITH_STATISTICS
147 STAMPROFILE StatIn;
148 STAMPROFILE StatOut;
149 STAMCOUNTER StatBytesRead;
150 STAMCOUNTER StatBytesWritten;
151
152 /** @name Register statistics.
153 * The array members run parallel to g_aHdaRegMap.
154 * @{ */
155 STAMCOUNTER aStatRegReads[HDA_NUM_REGS];
156 STAMCOUNTER aStatRegReadsToR3[HDA_NUM_REGS];
157 STAMCOUNTER aStatRegWrites[HDA_NUM_REGS];
158 STAMCOUNTER aStatRegWritesToR3[HDA_NUM_REGS];
159 STAMCOUNTER StatRegMultiReadsRZ;
160 STAMCOUNTER StatRegMultiReadsR3;
161 STAMCOUNTER StatRegMultiWritesRZ;
162 STAMCOUNTER StatRegMultiWritesR3;
163 STAMCOUNTER StatRegSubWriteRZ;
164 STAMCOUNTER StatRegSubWriteR3;
165 STAMCOUNTER StatRegUnknownReads;
166 STAMCOUNTER StatRegUnknownWrites;
167 STAMCOUNTER StatRegWritesBlockedByReset;
168 STAMCOUNTER StatRegWritesBlockedByRun;
169 /** @} */
170#endif
171
172#ifdef DEBUG
173 /** Debug stuff.
174 * @todo Make STAM values out some of this? */
175 struct
176 {
177# if 0 /* unused */
178 /** Timestamp (in ns) of the last timer callback (hdaTimer).
179 * Used to calculate the time actually elapsed between two timer callbacks. */
180 uint64_t tsTimerLastCalledNs;
181# endif
182 /** IRQ debugging information. */
183 struct
184 {
185 /** Timestamp (in ns) of last processed (asserted / deasserted) IRQ. */
186 uint64_t tsProcessedLastNs;
187 /** Timestamp (in ns) of last asserted IRQ. */
188 uint64_t tsAssertedNs;
189# if 0 /* unused */
190 /** How many IRQs have been asserted already. */
191 uint64_t cAsserted;
192 /** Accumulated elapsed time (in ns) of all IRQ being asserted. */
193 uint64_t tsAssertedTotalNs;
194 /** Timestamp (in ns) of last deasserted IRQ. */
195 uint64_t tsDeassertedNs;
196 /** How many IRQs have been deasserted already. */
197 uint64_t cDeasserted;
198 /** Accumulated elapsed time (in ns) of all IRQ being deasserted. */
199 uint64_t tsDeassertedTotalNs;
200# endif
201 } IRQ;
202 } Dbg;
203#endif
204 /** This is for checking that the build was correctly configured in all contexts.
205 * This is set to HDASTATE_ALIGNMENT_CHECK_MAGIC. */
206 uint64_t uAlignmentCheckMagic;
207} HDASTATE;
208/** Pointer to a shared HDA device state. */
209typedef HDASTATE *PHDASTATE;
210
211/** Value for HDASTATE:uAlignmentCheckMagic. */
212#define HDASTATE_ALIGNMENT_CHECK_MAGIC UINT64_C(0x1298afb75893e059)
213
214
215/**
216 * Ring-3 ICH Intel HD audio controller state.
217 */
218typedef struct HDASTATER3
219{
220 /** Internal stream states. */
221 HDASTREAMR3 aStreams[HDA_MAX_STREAMS];
222 /** Mapping table between stream tags and stream states. */
223 HDATAG aTags[HDA_MAX_TAGS];
224 /** Number of active (running) SDn streams. */
225 uint8_t cStreamsActive;
226 uint8_t abPadding0[7];
227 /** R3 Pointer to the device instance. */
228 PPDMDEVINSR3 pDevIns;
229 /** The base interface for LUN\#0. */
230 PDMIBASE IBase;
231 /** Pointer to HDA codec to use. */
232 R3PTRTYPE(PHDACODEC) pCodec;
233 /** List of associated LUN drivers (HDADRIVER). */
234 RTLISTANCHORR3 lstDrv;
235 /** The device' software mixer. */
236 R3PTRTYPE(PAUDIOMIXER) pMixer;
237 /** HDA sink for (front) output. */
238 HDAMIXERSINK SinkFront;
239#ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
240 /** HDA sink for center / LFE output. */
241 HDAMIXERSINK SinkCenterLFE;
242 /** HDA sink for rear output. */
243 HDAMIXERSINK SinkRear;
244#endif
245 /** HDA mixer sink for line input. */
246 HDAMIXERSINK SinkLineIn;
247#ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
248 /** Audio mixer sink for microphone input. */
249 HDAMIXERSINK SinkMicIn;
250#endif
251 /** Debug stuff. */
252 struct
253 {
254 /** Whether debugging is enabled or not. */
255 bool fEnabled;
256 /** Path where to dump the debug output to.
257 * Defaults to VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH. */
258 R3PTRTYPE(char *) pszOutPath;
259 } Dbg;
260} HDASTATER3;
261/** Pointer to a ring-3 HDA device state. */
262typedef HDASTATER3 *PHDASTATER3;
263
264
265#endif /* !VBOX_INCLUDED_SRC_Audio_DevHDA_h */
266
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