VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevHda.h@ 88799

Last change on this file since 88799 was 88503, checked in by vboxsync, 4 years ago

DevHda: Just use the ring-3 task (hCorbDmaTask) when ring-0 needs to do CORB DMA stuff. The codec is not yet suitable from ring-0, nor does it see sufficient action to warrant putting it in ring-0, and this approach should unload the EMT a tiny bit more. bugref:9890

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File size: 10.0 KB
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1/* $Id: DevHda.h 88503 2021-04-14 11:43:28Z vboxsync $ */
2/** @file
3 * Intel HD Audio Controller Emulation - Structures.
4 */
5
6/*
7 * Copyright (C) 2016-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VBOX_INCLUDED_SRC_Audio_DevHda_h
19#define VBOX_INCLUDED_SRC_Audio_DevHda_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <iprt/path.h>
25
26#include <VBox/vmm/pdmdev.h>
27
28#include "AudioMixer.h"
29
30#include "DevHdaCodec.h"
31#include "DevHdaStream.h"
32#include "DevHdaStreamMap.h"
33
34#ifdef DEBUG_andy
35/** Enables strict mode, which checks for stuff which isn't supposed to happen.
36 * Be prepared for assertions coming in! */
37//# define HDA_STRICT
38#endif
39
40/**
41 * HDA mixer sink definition (ring-3).
42 *
43 * Its purpose is to know which audio mixer sink is bound to which SDn
44 * (SDI/SDO) device stream.
45 *
46 * This is needed in order to handle interleaved streams (that is, multiple
47 * channels in one stream) or non-interleaved streams (each channel has a
48 * dedicated stream).
49 *
50 * This is only known to the actual device emulation level.
51 */
52typedef struct HDAMIXERSINK
53{
54 R3PTRTYPE(PHDASTREAM) pStreamShared;
55 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
56 /** Pointer to the actual audio mixer sink. */
57 R3PTRTYPE(PAUDMIXSINK) pMixSink;
58} HDAMIXERSINK;
59/** Pointer to an HDA mixer sink definition (ring-3). */
60typedef HDAMIXERSINK *PHDAMIXERSINK;
61
62/**
63 * Mapping a stream tag to an HDA stream (ring-3).
64 */
65typedef struct HDATAG
66{
67 /** Own stream tag. */
68 uint8_t uTag;
69 uint8_t Padding[7];
70 /** Pointer to associated stream. */
71 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
72} HDATAG;
73/** Pointer to a HDA stream tag mapping. */
74typedef HDATAG *PHDATAG;
75
76/**
77 * Shared ICH Intel HD audio controller state.
78 */
79typedef struct HDASTATE
80{
81 /** Critical section protecting the HDA state. */
82 PDMCRITSECT CritSect;
83 /** Internal stream states (aligned on 64 byte boundrary). */
84 HDASTREAM aStreams[HDA_MAX_STREAMS];
85 /** The HDA's register set. */
86 uint32_t au32Regs[HDA_NUM_REGS];
87 /** CORB buffer base address. */
88 uint64_t u64CORBBase;
89 /** RIRB buffer base address. */
90 uint64_t u64RIRBBase;
91 /** DMA base address.
92 * Made out of DPLBASE + DPUBASE (3.3.32 + 3.3.33). */
93 uint64_t u64DPBase;
94 /** Size in bytes of CORB buffer (#au32CorbBuf). */
95 uint32_t cbCorbBuf;
96 /** Size in bytes of RIRB buffer (#au64RirbBuf). */
97 uint32_t cbRirbBuf;
98 /** Response Interrupt Count (RINTCNT). */
99 uint16_t u16RespIntCnt;
100 /** Position adjustment (in audio frames).
101 *
102 * This is not an official feature of the HDA specs, but used by
103 * certain OS drivers (e.g. snd_hda_intel) to work around certain
104 * quirks by "real" HDA hardware implementations.
105 *
106 * The position adjustment specifies how many audio frames
107 * a stream is ahead from its actual reading/writing position when
108 * starting a stream.
109 */
110 uint16_t cPosAdjustFrames;
111 /** Whether the position adjustment is enabled or not. */
112 bool fPosAdjustEnabled;
113 /** Whether data transfer heuristics are enabled or not.
114 * This tries to determine the approx. data rate a guest audio driver expects. */
115 bool fTransferHeuristicsEnabled;
116 /** DMA position buffer enable bit. */
117 bool fDMAPosition;
118 /** Current IRQ level. */
119 uint8_t u8IRQL;
120 /** The device timer Hz rate. Defaults to HDA_TIMER_HZ_DEFAULT. */
121 uint16_t uTimerHz;
122 /** Number of milliseconds to delay kicking off the AIO when a stream starts.
123 * @sa InitialDelayMs config value. */
124 uint16_t msInitialDelay;
125 /** Buffer size (in ms) of the internal input FIFO buffer.
126 * The actual buffer size in bytes will depend on the actual stream configuration. */
127 uint16_t cbCircBufInMs;
128 /** Buffer size (in ms) of the internal output FIFO buffer.
129 * The actual buffer size in bytes will depend on the actual stream configuration. */
130 uint16_t cbCircBufOutMs;
131 /** The start time of the wall clock (WALCLK), measured on the virtual sync clock. */
132 uint64_t tsWalClkStart;
133 /** CORB DMA task handle.
134 * We use this when there is stuff we cannot handle in ring-0. */
135 PDMTASKHANDLE hCorbDmaTask;
136 /** The CORB buffer. */
137 uint32_t au32CorbBuf[HDA_CORB_SIZE];
138 /** Pointer to RIRB buffer. */
139 uint64_t au64RirbBuf[HDA_RIRB_SIZE];
140
141 /** PCI Region \#0: 16KB of MMIO stuff. */
142 IOMMMIOHANDLE hMmio;
143
144 /** Shared R0/R3 HDA codec to use. */
145 HDACODEC Codec;
146
147#ifdef VBOX_WITH_STATISTICS
148 STAMPROFILE StatIn;
149 STAMPROFILE StatOut;
150 STAMCOUNTER StatBytesRead;
151 STAMCOUNTER StatBytesWritten;
152
153 /** @name Register statistics.
154 * The array members run parallel to g_aHdaRegMap.
155 * @{ */
156 STAMCOUNTER aStatRegReads[HDA_NUM_REGS];
157 STAMCOUNTER aStatRegReadsToR3[HDA_NUM_REGS];
158 STAMCOUNTER aStatRegWrites[HDA_NUM_REGS];
159 STAMCOUNTER aStatRegWritesToR3[HDA_NUM_REGS];
160 STAMCOUNTER StatRegMultiReadsRZ;
161 STAMCOUNTER StatRegMultiReadsR3;
162 STAMCOUNTER StatRegMultiWritesRZ;
163 STAMCOUNTER StatRegMultiWritesR3;
164 STAMCOUNTER StatRegSubWriteRZ;
165 STAMCOUNTER StatRegSubWriteR3;
166 STAMCOUNTER StatRegUnknownReads;
167 STAMCOUNTER StatRegUnknownWrites;
168 STAMCOUNTER StatRegWritesBlockedByReset;
169 STAMCOUNTER StatRegWritesBlockedByRun;
170 /** @} */
171#endif
172
173#ifdef DEBUG
174 /** Debug stuff.
175 * @todo Make STAM values out some of this? */
176 struct
177 {
178# if 0 /* unused */
179 /** Timestamp (in ns) of the last timer callback (hdaTimer).
180 * Used to calculate the time actually elapsed between two timer callbacks. */
181 uint64_t tsTimerLastCalledNs;
182# endif
183 /** IRQ debugging information. */
184 struct
185 {
186 /** Timestamp (in ns) of last processed (asserted / deasserted) IRQ. */
187 uint64_t tsProcessedLastNs;
188 /** Timestamp (in ns) of last asserted IRQ. */
189 uint64_t tsAssertedNs;
190# if 0 /* unused */
191 /** How many IRQs have been asserted already. */
192 uint64_t cAsserted;
193 /** Accumulated elapsed time (in ns) of all IRQ being asserted. */
194 uint64_t tsAssertedTotalNs;
195 /** Timestamp (in ns) of last deasserted IRQ. */
196 uint64_t tsDeassertedNs;
197 /** How many IRQs have been deasserted already. */
198 uint64_t cDeasserted;
199 /** Accumulated elapsed time (in ns) of all IRQ being deasserted. */
200 uint64_t tsDeassertedTotalNs;
201# endif
202 } IRQ;
203 } Dbg;
204#endif
205 /** This is for checking that the build was correctly configured in all contexts.
206 * This is set to HDASTATE_ALIGNMENT_CHECK_MAGIC. */
207 uint64_t uAlignmentCheckMagic;
208} HDASTATE;
209AssertCompileMemberAlignment(HDASTATE, aStreams, 64);
210/** Pointer to a shared HDA device state. */
211typedef HDASTATE *PHDASTATE;
212
213/** Value for HDASTATE:uAlignmentCheckMagic. */
214#define HDASTATE_ALIGNMENT_CHECK_MAGIC UINT64_C(0x1298afb75893e059)
215
216/**
217 * Ring-0 ICH Intel HD audio controller state.
218 */
219typedef struct HDASTATER0
220{
221# if 0 /* Codec is not yet kosher enough for ring-0. @bugref{9890c64} */
222 /** Pointer to HDA codec to use. */
223 HDACODECR0 Codec;
224# else
225 uint32_t u32Dummy;
226# endif
227} HDASTATER0;
228/** Pointer to a ring-0 HDA device state. */
229typedef HDASTATER0 *PHDASTATER0;
230
231/**
232 * Ring-3 ICH Intel HD audio controller state.
233 */
234typedef struct HDASTATER3
235{
236 /** Internal stream states. */
237 HDASTREAMR3 aStreams[HDA_MAX_STREAMS];
238 /** Mapping table between stream tags and stream states. */
239 HDATAG aTags[HDA_MAX_TAGS];
240 /** R3 Pointer to the device instance. */
241 PPDMDEVINSR3 pDevIns;
242 /** The base interface for LUN\#0. */
243 PDMIBASE IBase;
244 /** Pointer to HDA codec to use. */
245 R3PTRTYPE(PHDACODECR3) pCodec;
246 /** List of associated LUN drivers (HDADRIVER). */
247 RTLISTANCHORR3 lstDrv;
248 /** The device' software mixer. */
249 R3PTRTYPE(PAUDIOMIXER) pMixer;
250 /** HDA sink for (front) output. */
251 HDAMIXERSINK SinkFront;
252#ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
253 /** HDA sink for center / LFE output. */
254 HDAMIXERSINK SinkCenterLFE;
255 /** HDA sink for rear output. */
256 HDAMIXERSINK SinkRear;
257#endif
258 /** HDA mixer sink for line input. */
259 HDAMIXERSINK SinkLineIn;
260#ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
261 /** Audio mixer sink for microphone input. */
262 HDAMIXERSINK SinkMicIn;
263#endif
264 /** Debug stuff. */
265 struct
266 {
267 /** Whether debugging is enabled or not. */
268 bool fEnabled;
269 /** Path where to dump the debug output to.
270 * Can be NULL, in which the system's temporary directory will be used then. */
271 R3PTRTYPE(char *) pszOutPath;
272 } Dbg;
273} HDASTATER3;
274/** Pointer to a ring-3 HDA device state. */
275typedef HDASTATER3 *PHDASTATER3;
276
277
278/** Pointer to the context specific HDA state (HDASTATER3 or HDASTATER0). */
279typedef CTX_SUFF(PHDASTATE) PHDASTATECC;
280
281#endif /* !VBOX_INCLUDED_SRC_Audio_DevHda_h */
282
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