1 | /* $Id: DevHda.h 88503 2021-04-14 11:43:28Z vboxsync $ */
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2 | /** @file
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3 | * Intel HD Audio Controller Emulation - Structures.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2016-2020 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 | #ifndef VBOX_INCLUDED_SRC_Audio_DevHda_h
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19 | #define VBOX_INCLUDED_SRC_Audio_DevHda_h
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20 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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21 | # pragma once
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22 | #endif
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23 |
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24 | #include <iprt/path.h>
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25 |
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26 | #include <VBox/vmm/pdmdev.h>
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27 |
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28 | #include "AudioMixer.h"
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29 |
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30 | #include "DevHdaCodec.h"
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31 | #include "DevHdaStream.h"
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32 | #include "DevHdaStreamMap.h"
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33 |
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34 | #ifdef DEBUG_andy
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35 | /** Enables strict mode, which checks for stuff which isn't supposed to happen.
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36 | * Be prepared for assertions coming in! */
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37 | //# define HDA_STRICT
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38 | #endif
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39 |
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40 | /**
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41 | * HDA mixer sink definition (ring-3).
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42 | *
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43 | * Its purpose is to know which audio mixer sink is bound to which SDn
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44 | * (SDI/SDO) device stream.
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45 | *
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46 | * This is needed in order to handle interleaved streams (that is, multiple
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47 | * channels in one stream) or non-interleaved streams (each channel has a
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48 | * dedicated stream).
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49 | *
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50 | * This is only known to the actual device emulation level.
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51 | */
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52 | typedef struct HDAMIXERSINK
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53 | {
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54 | R3PTRTYPE(PHDASTREAM) pStreamShared;
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55 | R3PTRTYPE(PHDASTREAMR3) pStreamR3;
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56 | /** Pointer to the actual audio mixer sink. */
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57 | R3PTRTYPE(PAUDMIXSINK) pMixSink;
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58 | } HDAMIXERSINK;
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59 | /** Pointer to an HDA mixer sink definition (ring-3). */
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60 | typedef HDAMIXERSINK *PHDAMIXERSINK;
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61 |
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62 | /**
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63 | * Mapping a stream tag to an HDA stream (ring-3).
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64 | */
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65 | typedef struct HDATAG
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66 | {
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67 | /** Own stream tag. */
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68 | uint8_t uTag;
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69 | uint8_t Padding[7];
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70 | /** Pointer to associated stream. */
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71 | R3PTRTYPE(PHDASTREAMR3) pStreamR3;
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72 | } HDATAG;
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73 | /** Pointer to a HDA stream tag mapping. */
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74 | typedef HDATAG *PHDATAG;
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75 |
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76 | /**
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77 | * Shared ICH Intel HD audio controller state.
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78 | */
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79 | typedef struct HDASTATE
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80 | {
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81 | /** Critical section protecting the HDA state. */
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82 | PDMCRITSECT CritSect;
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83 | /** Internal stream states (aligned on 64 byte boundrary). */
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84 | HDASTREAM aStreams[HDA_MAX_STREAMS];
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85 | /** The HDA's register set. */
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86 | uint32_t au32Regs[HDA_NUM_REGS];
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87 | /** CORB buffer base address. */
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88 | uint64_t u64CORBBase;
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89 | /** RIRB buffer base address. */
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90 | uint64_t u64RIRBBase;
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91 | /** DMA base address.
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92 | * Made out of DPLBASE + DPUBASE (3.3.32 + 3.3.33). */
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93 | uint64_t u64DPBase;
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94 | /** Size in bytes of CORB buffer (#au32CorbBuf). */
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95 | uint32_t cbCorbBuf;
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96 | /** Size in bytes of RIRB buffer (#au64RirbBuf). */
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97 | uint32_t cbRirbBuf;
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98 | /** Response Interrupt Count (RINTCNT). */
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99 | uint16_t u16RespIntCnt;
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100 | /** Position adjustment (in audio frames).
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101 | *
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102 | * This is not an official feature of the HDA specs, but used by
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103 | * certain OS drivers (e.g. snd_hda_intel) to work around certain
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104 | * quirks by "real" HDA hardware implementations.
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105 | *
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106 | * The position adjustment specifies how many audio frames
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107 | * a stream is ahead from its actual reading/writing position when
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108 | * starting a stream.
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109 | */
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110 | uint16_t cPosAdjustFrames;
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111 | /** Whether the position adjustment is enabled or not. */
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112 | bool fPosAdjustEnabled;
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113 | /** Whether data transfer heuristics are enabled or not.
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114 | * This tries to determine the approx. data rate a guest audio driver expects. */
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115 | bool fTransferHeuristicsEnabled;
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116 | /** DMA position buffer enable bit. */
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117 | bool fDMAPosition;
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118 | /** Current IRQ level. */
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119 | uint8_t u8IRQL;
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120 | /** The device timer Hz rate. Defaults to HDA_TIMER_HZ_DEFAULT. */
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121 | uint16_t uTimerHz;
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122 | /** Number of milliseconds to delay kicking off the AIO when a stream starts.
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123 | * @sa InitialDelayMs config value. */
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124 | uint16_t msInitialDelay;
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125 | /** Buffer size (in ms) of the internal input FIFO buffer.
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126 | * The actual buffer size in bytes will depend on the actual stream configuration. */
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127 | uint16_t cbCircBufInMs;
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128 | /** Buffer size (in ms) of the internal output FIFO buffer.
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129 | * The actual buffer size in bytes will depend on the actual stream configuration. */
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130 | uint16_t cbCircBufOutMs;
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131 | /** The start time of the wall clock (WALCLK), measured on the virtual sync clock. */
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132 | uint64_t tsWalClkStart;
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133 | /** CORB DMA task handle.
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134 | * We use this when there is stuff we cannot handle in ring-0. */
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135 | PDMTASKHANDLE hCorbDmaTask;
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136 | /** The CORB buffer. */
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137 | uint32_t au32CorbBuf[HDA_CORB_SIZE];
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138 | /** Pointer to RIRB buffer. */
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139 | uint64_t au64RirbBuf[HDA_RIRB_SIZE];
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140 |
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141 | /** PCI Region \#0: 16KB of MMIO stuff. */
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142 | IOMMMIOHANDLE hMmio;
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143 |
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144 | /** Shared R0/R3 HDA codec to use. */
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145 | HDACODEC Codec;
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146 |
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147 | #ifdef VBOX_WITH_STATISTICS
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148 | STAMPROFILE StatIn;
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149 | STAMPROFILE StatOut;
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150 | STAMCOUNTER StatBytesRead;
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151 | STAMCOUNTER StatBytesWritten;
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152 |
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153 | /** @name Register statistics.
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154 | * The array members run parallel to g_aHdaRegMap.
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155 | * @{ */
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156 | STAMCOUNTER aStatRegReads[HDA_NUM_REGS];
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157 | STAMCOUNTER aStatRegReadsToR3[HDA_NUM_REGS];
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158 | STAMCOUNTER aStatRegWrites[HDA_NUM_REGS];
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159 | STAMCOUNTER aStatRegWritesToR3[HDA_NUM_REGS];
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160 | STAMCOUNTER StatRegMultiReadsRZ;
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161 | STAMCOUNTER StatRegMultiReadsR3;
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162 | STAMCOUNTER StatRegMultiWritesRZ;
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163 | STAMCOUNTER StatRegMultiWritesR3;
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164 | STAMCOUNTER StatRegSubWriteRZ;
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165 | STAMCOUNTER StatRegSubWriteR3;
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166 | STAMCOUNTER StatRegUnknownReads;
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167 | STAMCOUNTER StatRegUnknownWrites;
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168 | STAMCOUNTER StatRegWritesBlockedByReset;
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169 | STAMCOUNTER StatRegWritesBlockedByRun;
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170 | /** @} */
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171 | #endif
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172 |
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173 | #ifdef DEBUG
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174 | /** Debug stuff.
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175 | * @todo Make STAM values out some of this? */
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176 | struct
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177 | {
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178 | # if 0 /* unused */
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179 | /** Timestamp (in ns) of the last timer callback (hdaTimer).
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180 | * Used to calculate the time actually elapsed between two timer callbacks. */
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181 | uint64_t tsTimerLastCalledNs;
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182 | # endif
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183 | /** IRQ debugging information. */
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184 | struct
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185 | {
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186 | /** Timestamp (in ns) of last processed (asserted / deasserted) IRQ. */
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187 | uint64_t tsProcessedLastNs;
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188 | /** Timestamp (in ns) of last asserted IRQ. */
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189 | uint64_t tsAssertedNs;
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190 | # if 0 /* unused */
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191 | /** How many IRQs have been asserted already. */
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192 | uint64_t cAsserted;
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193 | /** Accumulated elapsed time (in ns) of all IRQ being asserted. */
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194 | uint64_t tsAssertedTotalNs;
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195 | /** Timestamp (in ns) of last deasserted IRQ. */
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196 | uint64_t tsDeassertedNs;
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197 | /** How many IRQs have been deasserted already. */
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198 | uint64_t cDeasserted;
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199 | /** Accumulated elapsed time (in ns) of all IRQ being deasserted. */
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200 | uint64_t tsDeassertedTotalNs;
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201 | # endif
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202 | } IRQ;
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203 | } Dbg;
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204 | #endif
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205 | /** This is for checking that the build was correctly configured in all contexts.
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206 | * This is set to HDASTATE_ALIGNMENT_CHECK_MAGIC. */
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207 | uint64_t uAlignmentCheckMagic;
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208 | } HDASTATE;
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209 | AssertCompileMemberAlignment(HDASTATE, aStreams, 64);
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210 | /** Pointer to a shared HDA device state. */
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211 | typedef HDASTATE *PHDASTATE;
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212 |
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213 | /** Value for HDASTATE:uAlignmentCheckMagic. */
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214 | #define HDASTATE_ALIGNMENT_CHECK_MAGIC UINT64_C(0x1298afb75893e059)
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215 |
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216 | /**
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217 | * Ring-0 ICH Intel HD audio controller state.
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218 | */
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219 | typedef struct HDASTATER0
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220 | {
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221 | # if 0 /* Codec is not yet kosher enough for ring-0. @bugref{9890c64} */
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222 | /** Pointer to HDA codec to use. */
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223 | HDACODECR0 Codec;
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224 | # else
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225 | uint32_t u32Dummy;
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226 | # endif
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227 | } HDASTATER0;
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228 | /** Pointer to a ring-0 HDA device state. */
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229 | typedef HDASTATER0 *PHDASTATER0;
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230 |
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231 | /**
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232 | * Ring-3 ICH Intel HD audio controller state.
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233 | */
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234 | typedef struct HDASTATER3
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235 | {
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236 | /** Internal stream states. */
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237 | HDASTREAMR3 aStreams[HDA_MAX_STREAMS];
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238 | /** Mapping table between stream tags and stream states. */
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239 | HDATAG aTags[HDA_MAX_TAGS];
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240 | /** R3 Pointer to the device instance. */
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241 | PPDMDEVINSR3 pDevIns;
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242 | /** The base interface for LUN\#0. */
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243 | PDMIBASE IBase;
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244 | /** Pointer to HDA codec to use. */
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245 | R3PTRTYPE(PHDACODECR3) pCodec;
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246 | /** List of associated LUN drivers (HDADRIVER). */
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247 | RTLISTANCHORR3 lstDrv;
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248 | /** The device' software mixer. */
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249 | R3PTRTYPE(PAUDIOMIXER) pMixer;
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250 | /** HDA sink for (front) output. */
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251 | HDAMIXERSINK SinkFront;
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252 | #ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
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253 | /** HDA sink for center / LFE output. */
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254 | HDAMIXERSINK SinkCenterLFE;
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255 | /** HDA sink for rear output. */
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256 | HDAMIXERSINK SinkRear;
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257 | #endif
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258 | /** HDA mixer sink for line input. */
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259 | HDAMIXERSINK SinkLineIn;
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260 | #ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
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261 | /** Audio mixer sink for microphone input. */
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262 | HDAMIXERSINK SinkMicIn;
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263 | #endif
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264 | /** Debug stuff. */
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265 | struct
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266 | {
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267 | /** Whether debugging is enabled or not. */
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268 | bool fEnabled;
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269 | /** Path where to dump the debug output to.
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270 | * Can be NULL, in which the system's temporary directory will be used then. */
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271 | R3PTRTYPE(char *) pszOutPath;
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272 | } Dbg;
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273 | } HDASTATER3;
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274 | /** Pointer to a ring-3 HDA device state. */
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275 | typedef HDASTATER3 *PHDASTATER3;
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276 |
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277 |
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278 | /** Pointer to the context specific HDA state (HDASTATER3 or HDASTATER0). */
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279 | typedef CTX_SUFF(PHDASTATE) PHDASTATECC;
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280 |
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281 | #endif /* !VBOX_INCLUDED_SRC_Audio_DevHda_h */
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282 |
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