VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevHda.h@ 89864

Last change on this file since 89864 was 89861, checked in by vboxsync, 4 years ago

DevHda: Do LPIB updates more often. Experimental code for doing DMA work on LPIB read (disabled). bugref:9890

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1/* $Id: DevHda.h 89861 2021-06-23 14:23:42Z vboxsync $ */
2/** @file
3 * Intel HD Audio Controller Emulation - Structures.
4 */
5
6/*
7 * Copyright (C) 2016-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VBOX_INCLUDED_SRC_Audio_DevHda_h
19#define VBOX_INCLUDED_SRC_Audio_DevHda_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <iprt/path.h>
25
26#include <VBox/vmm/pdmdev.h>
27
28#include "AudioMixer.h"
29
30#include "DevHdaCodec.h"
31#include "DevHdaStream.h"
32
33#ifdef DEBUG_andy
34/** Enables strict mode, which checks for stuff which isn't supposed to happen.
35 * Be prepared for assertions coming in! */
36//# define HDA_STRICT
37#endif
38
39/**
40 * HDA mixer sink definition (ring-3).
41 *
42 * Its purpose is to know which audio mixer sink is bound to which SDn
43 * (SDI/SDO) device stream.
44 *
45 * This is needed in order to handle interleaved streams (that is, multiple
46 * channels in one stream) or non-interleaved streams (each channel has a
47 * dedicated stream).
48 *
49 * This is only known to the actual device emulation level.
50 */
51typedef struct HDAMIXERSINK
52{
53 R3PTRTYPE(PHDASTREAM) pStreamShared;
54 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
55 /** Pointer to the actual audio mixer sink. */
56 R3PTRTYPE(PAUDMIXSINK) pMixSink;
57} HDAMIXERSINK;
58/** Pointer to an HDA mixer sink definition (ring-3). */
59typedef HDAMIXERSINK *PHDAMIXERSINK;
60
61/**
62 * Mapping a stream tag to an HDA stream (ring-3).
63 */
64typedef struct HDATAG
65{
66 /** Own stream tag. */
67 uint8_t uTag;
68 uint8_t Padding[7];
69 /** Pointer to associated stream. */
70 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
71} HDATAG;
72/** Pointer to a HDA stream tag mapping. */
73typedef HDATAG *PHDATAG;
74
75/**
76 * Shared ICH Intel HD audio controller state.
77 */
78typedef struct HDASTATE
79{
80 /** Critical section protecting the HDA state. */
81 PDMCRITSECT CritSect;
82 /** Internal stream states (aligned on 64 byte boundrary). */
83 HDASTREAM aStreams[HDA_MAX_STREAMS];
84 /** The HDA's register set. */
85 uint32_t au32Regs[HDA_NUM_REGS];
86 /** CORB buffer base address. */
87 uint64_t u64CORBBase;
88 /** RIRB buffer base address. */
89 uint64_t u64RIRBBase;
90 /** DMA base address.
91 * Made out of DPLBASE + DPUBASE (3.3.32 + 3.3.33). */
92 uint64_t u64DPBase;
93 /** Size in bytes of CORB buffer (#au32CorbBuf). */
94 uint32_t cbCorbBuf;
95 /** Size in bytes of RIRB buffer (#au64RirbBuf). */
96 uint32_t cbRirbBuf;
97 /** Response Interrupt Count (RINTCNT). */
98 uint16_t u16RespIntCnt;
99 /** Position adjustment (in audio frames).
100 *
101 * This is not an official feature of the HDA specs, but used by
102 * certain OS drivers (e.g. snd_hda_intel) to work around certain
103 * quirks by "real" HDA hardware implementations.
104 *
105 * The position adjustment specifies how many audio frames
106 * a stream is ahead from its actual reading/writing position when
107 * starting a stream.
108 */
109 uint16_t cPosAdjustFrames;
110 /** Whether the position adjustment is enabled or not. */
111 bool fPosAdjustEnabled;
112 /** Whether data transfer heuristics are enabled or not.
113 * This tries to determine the approx. data rate a guest audio driver expects. */
114 bool fTransferHeuristicsEnabled;
115 /** DMA position buffer enable bit. */
116 bool fDMAPosition;
117 /** Current IRQ level. */
118 uint8_t u8IRQL;
119 /** The device timer Hz rate. Defaults to HDA_TIMER_HZ_DEFAULT. */
120 uint16_t uTimerHz;
121 /** Number of milliseconds to delay kicking off the AIO when a stream starts.
122 * @sa InitialDelayMs config value. */
123 uint16_t msInitialDelay;
124 /** Config: Internal input DMA buffer size override, specified in milliseconds.
125 * Zero means default size according to buffer and stream config.
126 * @sa BufSizeInMs config value. */
127 uint16_t cMsCircBufIn;
128 /** Config: Internal output DMA buffer size override, specified in milliseconds.
129 * Zero means default size according to buffer and stream config.
130 * @sa BufSizeOutMs config value. */
131 uint16_t cMsCircBufOut;
132 /** The start time of the wall clock (WALCLK), measured on the virtual sync clock. */
133 uint64_t tsWalClkStart;
134 /** CORB DMA task handle.
135 * We use this when there is stuff we cannot handle in ring-0. */
136 PDMTASKHANDLE hCorbDmaTask;
137 /** The CORB buffer. */
138 uint32_t au32CorbBuf[HDA_CORB_SIZE];
139 /** Pointer to RIRB buffer. */
140 uint64_t au64RirbBuf[HDA_RIRB_SIZE];
141
142 /** PCI Region \#0: 16KB of MMIO stuff. */
143 IOMMMIOHANDLE hMmio;
144
145 /** Shared R0/R3 HDA codec to use. */
146 HDACODEC Codec;
147
148#ifdef VBOX_HDA_WITH_ON_REG_ACCESS_DMA
149 STAMCOUNTER StatAccessDmaOutput;
150 STAMCOUNTER StatAccessDmaOutputToR3;
151#endif
152#ifdef VBOX_WITH_STATISTICS
153 STAMPROFILE StatIn;
154 STAMPROFILE StatOut;
155 STAMCOUNTER StatBytesRead;
156 STAMCOUNTER StatBytesWritten;
157
158 /** @name Register statistics.
159 * The array members run parallel to g_aHdaRegMap.
160 * @{ */
161 STAMCOUNTER aStatRegReads[HDA_NUM_REGS];
162 STAMCOUNTER aStatRegReadsToR3[HDA_NUM_REGS];
163 STAMCOUNTER aStatRegWrites[HDA_NUM_REGS];
164 STAMCOUNTER aStatRegWritesToR3[HDA_NUM_REGS];
165 STAMCOUNTER StatRegMultiReadsRZ;
166 STAMCOUNTER StatRegMultiReadsR3;
167 STAMCOUNTER StatRegMultiWritesRZ;
168 STAMCOUNTER StatRegMultiWritesR3;
169 STAMCOUNTER StatRegSubWriteRZ;
170 STAMCOUNTER StatRegSubWriteR3;
171 STAMCOUNTER StatRegUnknownReads;
172 STAMCOUNTER StatRegUnknownWrites;
173 STAMCOUNTER StatRegWritesBlockedByReset;
174 STAMCOUNTER StatRegWritesBlockedByRun;
175 /** @} */
176#endif
177
178#ifdef DEBUG
179 /** Debug stuff.
180 * @todo Make STAM values out some of this? */
181 struct
182 {
183# if 0 /* unused */
184 /** Timestamp (in ns) of the last timer callback (hdaTimer).
185 * Used to calculate the time actually elapsed between two timer callbacks. */
186 uint64_t tsTimerLastCalledNs;
187# endif
188 /** IRQ debugging information. */
189 struct
190 {
191 /** Timestamp (in ns) of last processed (asserted / deasserted) IRQ. */
192 uint64_t tsProcessedLastNs;
193 /** Timestamp (in ns) of last asserted IRQ. */
194 uint64_t tsAssertedNs;
195# if 0 /* unused */
196 /** How many IRQs have been asserted already. */
197 uint64_t cAsserted;
198 /** Accumulated elapsed time (in ns) of all IRQ being asserted. */
199 uint64_t tsAssertedTotalNs;
200 /** Timestamp (in ns) of last deasserted IRQ. */
201 uint64_t tsDeassertedNs;
202 /** How many IRQs have been deasserted already. */
203 uint64_t cDeasserted;
204 /** Accumulated elapsed time (in ns) of all IRQ being deasserted. */
205 uint64_t tsDeassertedTotalNs;
206# endif
207 } IRQ;
208 } Dbg;
209#endif
210 /** This is for checking that the build was correctly configured in all contexts.
211 * This is set to HDASTATE_ALIGNMENT_CHECK_MAGIC. */
212 uint64_t uAlignmentCheckMagic;
213} HDASTATE;
214AssertCompileMemberAlignment(HDASTATE, aStreams, 64);
215/** Pointer to a shared HDA device state. */
216typedef HDASTATE *PHDASTATE;
217
218/** Value for HDASTATE:uAlignmentCheckMagic. */
219#define HDASTATE_ALIGNMENT_CHECK_MAGIC UINT64_C(0x1298afb75893e059)
220
221/**
222 * Ring-0 ICH Intel HD audio controller state.
223 */
224typedef struct HDASTATER0
225{
226# if 0 /* Codec is not yet kosher enough for ring-0. @bugref{9890c64} */
227 /** Pointer to HDA codec to use. */
228 HDACODECR0 Codec;
229# else
230 uint32_t u32Dummy;
231# endif
232} HDASTATER0;
233/** Pointer to a ring-0 HDA device state. */
234typedef HDASTATER0 *PHDASTATER0;
235
236/**
237 * Ring-3 ICH Intel HD audio controller state.
238 */
239typedef struct HDASTATER3
240{
241 /** Internal stream states. */
242 HDASTREAMR3 aStreams[HDA_MAX_STREAMS];
243 /** Mapping table between stream tags and stream states. */
244 HDATAG aTags[HDA_MAX_TAGS];
245 /** R3 Pointer to the device instance. */
246 PPDMDEVINSR3 pDevIns;
247 /** The base interface for LUN\#0. */
248 PDMIBASE IBase;
249 /** Pointer to HDA codec to use. */
250 R3PTRTYPE(PHDACODECR3) pCodec;
251 /** List of associated LUN drivers (HDADRIVER). */
252 RTLISTANCHORR3 lstDrv;
253 /** The device' software mixer. */
254 R3PTRTYPE(PAUDIOMIXER) pMixer;
255 /** HDA sink for (front) output. */
256 HDAMIXERSINK SinkFront;
257#ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
258 /** HDA sink for center / LFE output. */
259 HDAMIXERSINK SinkCenterLFE;
260 /** HDA sink for rear output. */
261 HDAMIXERSINK SinkRear;
262#endif
263 /** HDA mixer sink for line input. */
264 HDAMIXERSINK SinkLineIn;
265#ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
266 /** Audio mixer sink for microphone input. */
267 HDAMIXERSINK SinkMicIn;
268#endif
269 /** Debug stuff. */
270 struct
271 {
272 /** Whether debugging is enabled or not. */
273 bool fEnabled;
274 /** Path where to dump the debug output to.
275 * Can be NULL, in which the system's temporary directory will be used then. */
276 R3PTRTYPE(char *) pszOutPath;
277 } Dbg;
278} HDASTATER3;
279/** Pointer to a ring-3 HDA device state. */
280typedef HDASTATER3 *PHDASTATER3;
281
282
283/** Pointer to the context specific HDA state (HDASTATER3 or HDASTATER0). */
284typedef CTX_SUFF(PHDASTATE) PHDASTATECC;
285
286#endif /* !VBOX_INCLUDED_SRC_Audio_DevHda_h */
287
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