DevIchAc97.cpp@ 81328

Last change on this file since 81328 was 81031, checked in by vboxsync, 5 years ago
PDM,Devices: Moving the PDMPCIDEV structures into the PDMDEVINS allocation. Preps for extending the config space to 4KB. bugref:9218
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1	/* $Id: DevIchAc97.cpp 81031 2019-09-26 19:26:33Z vboxsync $ */
2	/** @file
3	* DevIchAc97 - VBox ICH AC97 Audio Controller.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_AC97
23	#include <VBox/log.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <VBox/vmm/pdmaudioifs.h>
26
27	#include <iprt/assert.h>
28	#ifdef IN_RING3
29	# ifdef DEBUG
30	# include <iprt/file.h>
31	# endif
32	# include <iprt/mem.h>
33	# include <iprt/semaphore.h>
34	# include <iprt/string.h>
35	# include <iprt/uuid.h>
36	#endif
37
38	#include "VBoxDD.h"
39
40	#include "AudioMixBuffer.h"
41	#include "AudioMixer.h"
42	#include "DrvAudio.h"
43
44
45	/*********************************************************************************************************************************
46	* Defined Constants And Macros *
47	*********************************************************************************************************************************/
48
49	/** Current saved state version. */
50	#define AC97_SSM_VERSION 1
51
52	/** Default timer frequency (in Hz). */
53	#define AC97_TIMER_HZ_DEFAULT 100
54
55	/** Maximum number of streams we support. */
56	#define AC97_MAX_STREAMS 3
57
58	/** Maximum FIFO size (in bytes). */
59	#define AC97_FIFO_MAX 256
60
61	#define AC97_SR_FIFOE RT_BIT(4) /*< rwc, FIFO error. /
62	#define AC97_SR_BCIS RT_BIT(3) /*< rwc, Buffer completion interrupt status. /
63	#define AC97_SR_LVBCI RT_BIT(2) /*< rwc, Last valid buffer completion interrupt. /
64	#define AC97_SR_CELV RT_BIT(1) /*< ro, Current equals last valid. /
65	#define AC97_SR_DCH RT_BIT(0) /*< ro, Controller halted. /
66	#define AC97_SR_VALID_MASK (RT_BIT(5) - 1)
67	#define AC97_SR_WCLEAR_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
68	#define AC97_SR_RO_MASK (AC97_SR_DCH \| AC97_SR_CELV)
69	#define AC97_SR_INT_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
70
71	#define AC97_CR_IOCE RT_BIT(4) /*< rw, Interrupt On Completion Enable. /
72	#define AC97_CR_FEIE RT_BIT(3) /*< rw FIFO Error Interrupt Enable. /
73	#define AC97_CR_LVBIE RT_BIT(2) /*< rw Last Valid Buffer Interrupt Enable. /
74	#define AC97_CR_RR RT_BIT(1) /*< rw Reset Registers. /
75	#define AC97_CR_RPBM RT_BIT(0) /*< rw Run/Pause Bus Master. /
76	#define AC97_CR_VALID_MASK (RT_BIT(5) - 1)
77	#define AC97_CR_DONT_CLEAR_MASK (AC97_CR_IOCE \| AC97_CR_FEIE \| AC97_CR_LVBIE)
78
79	#define AC97_GC_WR 4 /*< rw Warm reset. /
80	#define AC97_GC_CR 2 /*< rw Cold reset. /
81	#define AC97_GC_VALID_MASK (RT_BIT(6) - 1)
82
83	#define AC97_GS_MD3 RT_BIT(17) /*< rw /
84	#define AC97_GS_AD3 RT_BIT(16) /*< rw /
85	#define AC97_GS_RCS RT_BIT(15) /*< rwc /
86	#define AC97_GS_B3S12 RT_BIT(14) /*< ro /
87	#define AC97_GS_B2S12 RT_BIT(13) /*< ro /
88	#define AC97_GS_B1S12 RT_BIT(12) /*< ro /
89	#define AC97_GS_S1R1 RT_BIT(11) /*< rwc /
90	#define AC97_GS_S0R1 RT_BIT(10) /*< rwc /
91	#define AC97_GS_S1CR RT_BIT(9) /*< ro /
92	#define AC97_GS_S0CR RT_BIT(8) /*< ro /
93	#define AC97_GS_MINT RT_BIT(7) /*< ro /
94	#define AC97_GS_POINT RT_BIT(6) /*< ro /
95	#define AC97_GS_PIINT RT_BIT(5) /*< ro /
96	#define AC97_GS_RSRVD (RT_BIT(4) \| RT_BIT(3))
97	#define AC97_GS_MOINT RT_BIT(2) /*< ro /
98	#define AC97_GS_MIINT RT_BIT(1) /*< ro /
99	#define AC97_GS_GSCI RT_BIT(0) /*< rwc /
100	#define AC97_GS_RO_MASK ( AC97_GS_B3S12 \
101	\| AC97_GS_B2S12 \
102	\| AC97_GS_B1S12 \
103	\| AC97_GS_S1CR \
104	\| AC97_GS_S0CR \
105	\| AC97_GS_MINT \
106	\| AC97_GS_POINT \
107	\| AC97_GS_PIINT \
108	\| AC97_GS_RSRVD \
109	\| AC97_GS_MOINT \
110	\| AC97_GS_MIINT)
111	#define AC97_GS_VALID_MASK (RT_BIT(18) - 1)
112	#define AC97_GS_WCLEAR_MASK (AC97_GS_RCS \| AC97_GS_S1R1 \| AC97_GS_S0R1 \| AC97_GS_GSCI)
113
114	/** @name Buffer Descriptor (BD).
115	* @{ */
116	#define AC97_BD_IOC RT_BIT(31) /*< Interrupt on Completion. /
117	#define AC97_BD_BUP RT_BIT(30) /*< Buffer Underrun Policy. /
118
119	#define AC97_BD_LEN_MASK 0xFFFF /*< Mask for the BDL buffer length. /
120
121	#define AC97_MAX_BDLE 32 /*< Maximum number of BDLEs. /
122	/** @} */
123
124	/** @name Extended Audio ID Register (EAID).
125	* @{ */
126	#define AC97_EAID_VRA RT_BIT(0) /*< Variable Rate Audio. /
127	#define AC97_EAID_VRM RT_BIT(3) /*< Variable Rate Mic Audio. /
128	#define AC97_EAID_REV0 RT_BIT(10) /*< AC'97 revision compliance. /
129	#define AC97_EAID_REV1 RT_BIT(11) /*< AC'97 revision compliance. /
130	/** @} */
131
132	/** @name Extended Audio Control and Status Register (EACS).
133	* @{ */
134	#define AC97_EACS_VRA RT_BIT(0) /*< Variable Rate Audio (4.2.1.1). /
135	#define AC97_EACS_VRM RT_BIT(3) /*< Variable Rate Mic Audio (4.2.1.1). /
136	/** @} */
137
138	/** @name Baseline Audio Register Set (BARS).
139	* @{ */
140	#define AC97_BARS_VOL_MASK 0x1f /*< Volume mask for the Baseline Audio Register Set (5.7.2). /
141	#define AC97_BARS_GAIN_MASK 0x0f /*< Gain mask for the Baseline Audio Register Set. /
142	#define AC97_BARS_VOL_MUTE_SHIFT 15 /*< Mute bit shift for the Baseline Audio Register Set (5.7.2). /
143	/** @} */
144
145	/* AC'97 uses 1.5dB steps, we use 0.375dB steps: 1 AC'97 step equals 4 PDM steps. */
146	#define AC97_DB_FACTOR 4
147
148	#define AC97_REC_MASK 7
149	enum
150	{
151	AC97_REC_MIC = 0,
152	AC97_REC_CD,
153	AC97_REC_VIDEO,
154	AC97_REC_AUX,
155	AC97_REC_LINE_IN,
156	AC97_REC_STEREO_MIX,
157	AC97_REC_MONO_MIX,
158	AC97_REC_PHONE
159	};
160
161	enum
162	{
163	AC97_Reset = 0x00,
164	AC97_Master_Volume_Mute = 0x02,
165	AC97_Headphone_Volume_Mute = 0x04, /** Also known as AUX, see table 16, section 5.7. */
166	AC97_Master_Volume_Mono_Mute = 0x06,
167	AC97_Master_Tone_RL = 0x08,
168	AC97_PC_BEEP_Volume_Mute = 0x0A,
169	AC97_Phone_Volume_Mute = 0x0C,
170	AC97_Mic_Volume_Mute = 0x0E,
171	AC97_Line_In_Volume_Mute = 0x10,
172	AC97_CD_Volume_Mute = 0x12,
173	AC97_Video_Volume_Mute = 0x14,
174	AC97_Aux_Volume_Mute = 0x16,
175	AC97_PCM_Out_Volume_Mute = 0x18,
176	AC97_Record_Select = 0x1A,
177	AC97_Record_Gain_Mute = 0x1C,
178	AC97_Record_Gain_Mic_Mute = 0x1E,
179	AC97_General_Purpose = 0x20,
180	AC97_3D_Control = 0x22,
181	AC97_AC_97_RESERVED = 0x24,
182	AC97_Powerdown_Ctrl_Stat = 0x26,
183	AC97_Extended_Audio_ID = 0x28,
184	AC97_Extended_Audio_Ctrl_Stat = 0x2A,
185	AC97_PCM_Front_DAC_Rate = 0x2C,
186	AC97_PCM_Surround_DAC_Rate = 0x2E,
187	AC97_PCM_LFE_DAC_Rate = 0x30,
188	AC97_PCM_LR_ADC_Rate = 0x32,
189	AC97_MIC_ADC_Rate = 0x34,
190	AC97_6Ch_Vol_C_LFE_Mute = 0x36,
191	AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
192	AC97_Vendor_Reserved = 0x58,
193	AC97_AD_Misc = 0x76,
194	AC97_Vendor_ID1 = 0x7c,
195	AC97_Vendor_ID2 = 0x7e
196	};
197
198	/* Codec models. */
199	typedef enum
200	{
201	AC97_CODEC_STAC9700 = 0, /*< SigmaTel STAC9700 /
202	AC97_CODEC_AD1980, /*< Analog Devices AD1980 /
203	AC97_CODEC_AD1981B /*< Analog Devices AD1981B /
204	} AC97CODEC;
205
206	/* Analog Devices miscellaneous regiter bits used in AD1980. */
207	#define AC97_AD_MISC_LOSEL RT_BIT(5) /*< Surround (rear) goes to line out outputs. /
208	#define AC97_AD_MISC_HPSEL RT_BIT(10) /*< PCM (front) goes to headphone outputs. /
209
210	#define ICHAC97STATE_2_DEVINS(a_pAC97) ((a_pAC97)->CTX_SUFF(pDevIns))
211
212	enum
213	{
214	BUP_SET = RT_BIT(0),
215	BUP_LAST = RT_BIT(1)
216	};
217
218	/** Emits registers for a specific (Native Audio Bus Master BAR) NABMBAR.
219	* @todo This totally messes with grepping for identifiers and tagging. */
220	#define AC97_NABMBAR_REGS(prefix, off) \
221	enum { \
222	prefix ## _BDBAR = off, /* Buffer Descriptor Base Address */ \
223	prefix ## _CIV = off + 4, /* Current Index Value */ \
224	prefix ## _LVI = off + 5, /* Last Valid Index */ \
225	prefix ## _SR = off + 6, /* Status Register */ \
226	prefix ## _PICB = off + 8, /* Position in Current Buffer */ \
227	prefix ## _PIV = off + 10, /* Prefetched Index Value */ \
228	prefix ## _CR = off + 11 /* Control Register */ \
229	}
230
231	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
232	/**
233	* Enumeration of AC'97 source indices.
234	*
235	* Note: The order of this indices is fixed (also applies for saved states) for the moment.
236	* So make sure you know what you're done when altering this.
237	*/
238	typedef enum
239	{
240	AC97SOUNDSOURCE_PI_INDEX = 0, /*< PCM in /
241	AC97SOUNDSOURCE_PO_INDEX, /*< PCM out /
242	AC97SOUNDSOURCE_MC_INDEX, /*< Mic in /
243	AC97SOUNDSOURCE_END_INDEX
244	} AC97SOUNDSOURCE;
245
246	AC97_NABMBAR_REGS(PI, AC97SOUNDSOURCE_PI_INDEX * 16);
247	AC97_NABMBAR_REGS(PO, AC97SOUNDSOURCE_PO_INDEX * 16);
248	AC97_NABMBAR_REGS(MC, AC97SOUNDSOURCE_MC_INDEX * 16);
249	#endif
250
251	enum
252	{
253	/** NABMBAR: Global Control Register. */
254	AC97_GLOB_CNT = 0x2c,
255	/** NABMBAR Global Status. */
256	AC97_GLOB_STA = 0x30,
257	/** Codec Access Semaphore Register. */
258	AC97_CAS = 0x34
259	};
260
261	#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
262
263
264	/*********************************************************************************************************************************
265	* Structures and Typedefs *
266	*********************************************************************************************************************************/
267
268	/**
269	* Buffer Descriptor List Entry (BDLE).
270	*/
271	typedef struct AC97BDLE
272	{
273	/** Location of data buffer (bits 31:1). */
274	uint32_t addr;
275	/** Flags (bits 31 + 30) and length (bits 15:0) of data buffer (in audio samples). */
276	uint32_t ctl_len;
277	} AC97BDLE;
278	AssertCompileSize(AC97BDLE, 8);
279	/** Pointer to BDLE. */
280	typedef AC97BDLE *PAC97BDLE;
281
282	/**
283	* Bus master register set for an audio stream.
284	*/
285	typedef struct AC97BMREGS
286	{
287	uint32_t bdbar; /** rw 0, Buffer Descriptor List: BAR (Base Address Register). */
288	uint8_t civ; /** ro 0, Current index value. */
289	uint8_t lvi; /** rw 0, Last valid index. */
290	uint16_t sr; /** rw 1, Status register. */
291	uint16_t picb; /** ro 0, Position in current buffer (in samples). */
292	uint8_t piv; /** ro 0, Prefetched index value. */
293	uint8_t cr; /** rw 0, Control register. */
294	int32_t bd_valid; /** Whether current BDLE is initialized or not. */
295	AC97BDLE bd; /** Current Buffer Descriptor List Entry (BDLE). */
296	} AC97BMREGS;
297	AssertCompileSizeAlignment(AC97BMREGS, 8);
298	/** Pointer to the BM registers of an audio stream. */
299	typedef AC97BMREGS *PAC97BMREGS;
300
301	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
302	/**
303	* Structure keeping the AC'97 stream's state for asynchronous I/O.
304	*/
305	typedef struct AC97STREAMSTATEAIO
306	{
307	/** Thread handle for the actual I/O thread. */
308	RTTHREAD Thread;
309	/** Event for letting the thread know there is some data to process. */
310	RTSEMEVENT Event;
311	/** Critical section for synchronizing access. */
312	RTCRITSECT CritSect;
313	/** Started indicator. */
314	volatile bool fStarted;
315	/** Shutdown indicator. */
316	volatile bool fShutdown;
317	/** Whether the thread should do any data processing or not. */
318	volatile bool fEnabled;
319	uint32_t Padding1;
320	} AC97STREAMSTATEAIO, *PAC97STREAMSTATEAIO;
321	#endif
322
323	/** The ICH AC'97 (Intel) controller. */
324	typedef struct AC97STATE *PAC97STATE;
325
326	/**
327	* Structure for keeping the internal state of an AC'97 stream.
328	*/
329	typedef struct AC97STREAMSTATE
330	{
331	/** Criticial section for this stream. */
332	RTCRITSECT CritSect;
333	/** Circular buffer (FIFO) for holding DMA'ed data. */
334	R3PTRTYPE(PRTCIRCBUF) pCircBuf;
335	#if HC_ARCH_BITS == 32
336	uint32_t Padding;
337	#endif
338	/** The stream's current configuration. */
339	PDMAUDIOSTREAMCFG Cfg; //+104
340	uint32_t Padding2;
341	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
342	/** Asynchronous I/O state members. */
343	AC97STREAMSTATEAIO AIO;
344	#endif
345	/** Timestamp of the last DMA data transfer. */
346	uint64_t tsTransferLast;
347	/** Timestamp of the next DMA data transfer.
348	* Next for determining the next scheduling window.
349	* Can be 0 if no next transfer is scheduled. */
350	uint64_t tsTransferNext;
351	/** Transfer chunk size (in bytes) of a transfer period. */
352	uint32_t cbTransferChunk;
353	/** The stream's timer Hz rate.
354	* This value can can be different from the device's default Hz rate,
355	* depending on the rate the stream expects (e.g. for 5.1 speaker setups).
356	* Set in R3StreamInit(). */
357	uint16_t uTimerHz;
358	uint8_t Padding3[2];
359	/** (Virtual) clock ticks per transfer. */
360	uint64_t cTransferTicks;
361	/** Timestamp (in ns) of last stream update. */
362	uint64_t tsLastUpdateNs;
363	} AC97STREAMSTATE;
364	AssertCompileSizeAlignment(AC97STREAMSTATE, 8);
365	/** Pointer to internal state of an AC'97 stream. */
366	typedef AC97STREAMSTATE *PAC97STREAMSTATE;
367
368	/**
369	* Structure containing AC'97 stream debug stuff, configurable at runtime.
370	*/
371	typedef struct AC97STREAMDBGINFORT
372	{
373	/** Whether debugging is enabled or not. */
374	bool fEnabled;
375	uint8_t Padding[7];
376	/** File for dumping stream reads / writes.
377	* For input streams, this dumps data being written to the device FIFO,
378	* whereas for output streams this dumps data being read from the device FIFO. */
379	R3PTRTYPE(PPDMAUDIOFILE) pFileStream;
380	/** File for dumping DMA reads / writes.
381	* For input streams, this dumps data being written to the device DMA,
382	* whereas for output streams this dumps data being read from the device DMA. */
383	R3PTRTYPE(PPDMAUDIOFILE) pFileDMA;
384	} AC97STREAMDBGINFORT, *PAC97STREAMDBGINFORT;
385
386	/**
387	* Structure containing AC'97 stream debug information.
388	*/
389	typedef struct AC97STREAMDBGINFO
390	{
391	/** Runtime debug info. */
392	AC97STREAMDBGINFORT Runtime;
393	} AC97STREAMDBGINFO ,*PAC97STREAMDBGINFO;
394
395	/**
396	* Structure for an AC'97 stream.
397	*/
398	typedef struct AC97STREAM
399	{
400	/** Stream number (SDn). */
401	uint8_t u8SD;
402	uint8_t abPadding0[7];
403	/** Bus master registers of this stream. */
404	AC97BMREGS Regs;
405	/** Internal state of this stream. */
406	AC97STREAMSTATE State;
407	/** Pointer to parent (AC'97 state). */
408	R3PTRTYPE(PAC97STATE) pAC97State;
409	#if HC_ARCH_BITS == 32
410	uint32_t Padding1;
411	#endif
412	/** Debug information. */
413	AC97STREAMDBGINFO Dbg;
414	} AC97STREAM, *PAC97STREAM;
415	AssertCompileSizeAlignment(AC97STREAM, 8);
416	/** Pointer to an AC'97 stream (registers + state). */
417	typedef AC97STREAM *PAC97STREAM;
418
419	typedef struct AC97STATE *PAC97STATE;
420	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
421	/**
422	* Structure for the async I/O thread context.
423	*/
424	typedef struct AC97STREAMTHREADCTX
425	{
426	PAC97STATE pThis;
427	PAC97STREAM pStream;
428	} AC97STREAMTHREADCTX, *PAC97STREAMTHREADCTX;
429	#endif
430
431	/**
432	* Structure defining a (host backend) driver stream.
433	* Each driver has its own instances of audio mixer streams, which then
434	* can go into the same (or even different) audio mixer sinks.
435	*/
436	typedef struct AC97DRIVERSTREAM
437	{
438	/** Associated mixer stream handle. */
439	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
440	} AC97DRIVERSTREAM, *PAC97DRIVERSTREAM;
441
442	/**
443	* Struct for maintaining a host backend driver.
444	*/
445	typedef struct AC97DRIVER
446	{
447	/** Node for storing this driver in our device driver list of AC97STATE. */
448	RTLISTNODER3 Node;
449	/** Pointer to AC97 controller (state). */
450	R3PTRTYPE(PAC97STATE) pAC97State;
451	/** Driver flags. */
452	PDMAUDIODRVFLAGS fFlags;
453	uint32_t PaddingFlags;
454	/** LUN # to which this driver has been assigned. */
455	uint8_t uLUN;
456	/** Whether this driver is in an attached state or not. */
457	bool fAttached;
458	uint8_t Padding[4];
459	/** Pointer to the description string passed to PDMDevHlpDriverAttach(). */
460	R3PTRTYPE(char *) pszDesc;
461	/** Pointer to attached driver base interface. */
462	R3PTRTYPE(PPDMIBASE) pDrvBase;
463	/** Audio connector interface to the underlying host backend. */
464	R3PTRTYPE(PPDMIAUDIOCONNECTOR) pConnector;
465	/** Driver stream for line input. */
466	AC97DRIVERSTREAM LineIn;
467	/** Driver stream for mic input. */
468	AC97DRIVERSTREAM MicIn;
469	/** Driver stream for output. */
470	AC97DRIVERSTREAM Out;
471	} AC97DRIVER, *PAC97DRIVER;
472
473	typedef struct AC97STATEDBGINFO
474	{
475	/** Whether debugging is enabled or not. */
476	bool fEnabled;
477	/** Path where to dump the debug output to.
478	* Defaults to VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH. */
479	char szOutPath[RTPATH_MAX + 1];
480	} AC97STATEDBGINFO, *PAC97STATEDBGINFO;
481
482	/**
483	* Structure for maintaining an AC'97 device state.
484	*/
485	typedef struct AC97STATE
486	{
487	/** Critical section protecting the AC'97 state. */
488	PDMCRITSECT CritSect;
489	/** R3 pointer to the device instance. */
490	PPDMDEVINSR3 pDevInsR3;
491	/** R0 pointer to the device instance. */
492	PPDMDEVINSR0 pDevInsR0;
493	/** RC pointer to the device instance. */
494	PPDMDEVINSRC pDevInsRC;
495	/** Set if R0/RC is enabled. */
496	bool fRZEnabled;
497	bool afPadding0[3];
498	/** Global Control (Bus Master Control Register). */
499	uint32_t glob_cnt;
500	/** Global Status (Bus Master Control Register). */
501	uint32_t glob_sta;
502	/** Codec Access Semaphore Register (Bus Master Control Register). */
503	uint32_t cas;
504	uint32_t last_samp;
505	uint8_t mixer_data[256];
506	/** Array of AC'97 streams. */
507	AC97STREAM aStreams[AC97_MAX_STREAMS];
508	/** The device timer Hz rate. Defaults to AC97_TIMER_HZ_DEFAULT_DEFAULT. */
509	uint16_t uTimerHz;
510	/** The timer for pumping data thru the attached LUN drivers - RCPtr. */
511	PTMTIMERRC pTimerRC[AC97_MAX_STREAMS];
512	/** The timer for pumping data thru the attached LUN drivers - R3Ptr. */
513	PTMTIMERR3 pTimerR3[AC97_MAX_STREAMS];
514	/** The timer for pumping data thru the attached LUN drivers - R0Ptr. */
515	PTMTIMERR0 pTimerR0[AC97_MAX_STREAMS];
516	#ifdef VBOX_WITH_STATISTICS
517	STAMPROFILE StatTimer;
518	STAMPROFILE StatIn;
519	STAMPROFILE StatOut;
520	STAMCOUNTER StatBytesRead;
521	STAMCOUNTER StatBytesWritten;
522	#endif
523	/** List of associated LUN drivers (AC97DRIVER). */
524	RTLISTANCHORR3 lstDrv;
525	/** The device's software mixer. */
526	R3PTRTYPE(PAUDIOMIXER) pMixer;
527	/** Audio sink for PCM output. */
528	R3PTRTYPE(PAUDMIXSINK) pSinkOut;
529	/** Audio sink for line input. */
530	R3PTRTYPE(PAUDMIXSINK) pSinkLineIn;
531	/** Audio sink for microphone input. */
532	R3PTRTYPE(PAUDMIXSINK) pSinkMicIn;
533	uint8_t silence[128];
534	int32_t bup_flag;
535	/** Base port of the I/O space region. */
536	RTIOPORT IOPortBase[2];
537	/** Codec model. */
538	uint32_t uCodecModel;
539	#if HC_ARCH_BITS == 64
540	uint32_t uPadding2;
541	#endif
542	/** The base interface for LUN\#0. */
543	PDMIBASE IBase;
544	AC97STATEDBGINFO Dbg;
545	} AC97STATE;
546	AssertCompileMemberAlignment(AC97STATE, aStreams, 8);
547	/** Pointer to a AC'97 state. */
548	typedef AC97STATE *PAC97STATE;
549
550	/**
551	* Acquires the AC'97 lock.
552	*/
553	#define DEVAC97_LOCK(a_pThis) \
554	do { \
555	int rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, VERR_IGNORED); \
556	AssertRC(rcLock); \
557	} while (0)
558
559	/**
560	* Acquires the AC'97 lock or returns.
561	*/
562	# define DEVAC97_LOCK_RETURN(a_pThis, a_rcBusy) \
563	do { \
564	int rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, a_rcBusy); \
565	if (rcLock != VINF_SUCCESS) \
566	{ \
567	AssertRC(rcLock); \
568	return rcLock; \
569	} \
570	} while (0)
571
572	/**
573	* Acquires the AC'97 lock or returns.
574	*/
575	# define DEVAC97_LOCK_RETURN_VOID(a_pThis) \
576	do { \
577	int rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, VERR_IGNORED); \
578	if (rcLock != VINF_SUCCESS) \
579	{ \
580	AssertRC(rcLock); \
581	return; \
582	} \
583	} while (0)
584
585	#ifdef IN_RC
586	/** Retrieves an attribute from a specific audio stream in RC. */
587	# define DEVAC97_CTX_SUFF_SD(a_Var, a_SD) a_Var##RC[a_SD]
588	#elif defined(IN_RING0)
589	/** Retrieves an attribute from a specific audio stream in R0. */
590	# define DEVAC97_CTX_SUFF_SD(a_Var, a_SD) a_Var##R0[a_SD]
591	#else
592	/** Retrieves an attribute from a specific audio stream in R3. */
593	# define DEVAC97_CTX_SUFF_SD(a_Var, a_SD) a_Var##R3[a_SD]
594	#endif
595
596	/**
597	* Releases the AC'97 lock.
598	*/
599	#define DEVAC97_UNLOCK(a_pThis) \
600	do { PDMCritSectLeave(&(a_pThis)->CritSect); } while (0)
601
602	/**
603	* Acquires the TM lock and AC'97 lock, returns on failure.
604	*/
605	#define DEVAC97_LOCK_BOTH_RETURN_VOID(a_pThis, a_SD) \
606	do { \
607	int rcLock = TMTimerLock((a_pThis)->DEVAC97_CTX_SUFF_SD(pTimer, a_SD), VERR_IGNORED); \
608	if (rcLock != VINF_SUCCESS) \
609	{ \
610	AssertRC(rcLock); \
611	return; \
612	} \
613	rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, VERR_IGNORED); \
614	if (rcLock != VINF_SUCCESS) \
615	{ \
616	AssertRC(rcLock); \
617	TMTimerUnlock((a_pThis)->DEVAC97_CTX_SUFF_SD(pTimer, a_SD)); \
618	return; \
619	} \
620	} while (0)
621
622	/**
623	* Acquires the TM lock and AC'97 lock, returns on failure.
624	*/
625	#define DEVAC97_LOCK_BOTH_RETURN(a_pThis, a_SD, a_rcBusy) \
626	do { \
627	int rcLock = TMTimerLock((a_pThis)->DEVAC97_CTX_SUFF_SD(pTimer, a_SD), (a_rcBusy)); \
628	if (rcLock != VINF_SUCCESS) \
629	return rcLock; \
630	rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, (a_rcBusy)); \
631	if (rcLock != VINF_SUCCESS) \
632	{ \
633	AssertRC(rcLock); \
634	TMTimerUnlock((a_pThis)->DEVAC97_CTX_SUFF_SD(pTimer, a_SD)); \
635	return rcLock; \
636	} \
637	} while (0)
638
639	/**
640	* Releases the AC'97 lock and TM lock.
641	*/
642	#define DEVAC97_UNLOCK_BOTH(a_pThis, a_SD) \
643	do { \
644	PDMCritSectLeave(&(a_pThis)->CritSect); \
645	TMTimerUnlock((a_pThis)->DEVAC97_CTX_SUFF_SD(pTimer, a_SD)); \
646	} while (0)
647
648	#ifdef VBOX_WITH_STATISTICS
649	AssertCompileMemberAlignment(AC97STATE, StatTimer, 8);
650	AssertCompileMemberAlignment(AC97STATE, StatBytesRead, 8);
651	AssertCompileMemberAlignment(AC97STATE, StatBytesWritten, 8);
652	#endif
653
654	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
655
656
657	/*********************************************************************************************************************************
658	* Internal Functions *
659	*********************************************************************************************************************************/
660	#ifdef IN_RING3
661	static int ichac97R3StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm);
662	static void ichac97R3StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream);
663	static int ichac97R3StreamOpen(PAC97STATE pThis, PAC97STREAM pStream, bool fForce);
664	static int ichac97R3StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream, bool fForce);
665	static int ichac97R3StreamClose(PAC97STATE pThis, PAC97STREAM pStream);
666	static void ichac97R3StreamReset(PAC97STATE pThis, PAC97STREAM pStream);
667	static void ichac97R3StreamLock(PAC97STREAM pStream);
668	static void ichac97R3StreamUnlock(PAC97STREAM pStream);
669	static uint32_t ichac97R3StreamGetUsed(PAC97STREAM pStream);
670	static uint32_t ichac97R3StreamGetFree(PAC97STREAM pStream);
671	static int ichac97R3StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax);
672	static void ichac97R3StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer);
673
674	static DECLCALLBACK(void) ichac97R3Reset(PPDMDEVINS pDevIns);
675
676	static DECLCALLBACK(void) ichac97R3Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
677
678	static int ichac97R3MixerAddDrv(PAC97STATE pThis, PAC97DRIVER pDrv);
679	static int ichac97R3MixerAddDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg, PAC97DRIVER pDrv);
680	static int ichac97R3MixerAddDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg);
681	static void ichac97R3MixerRemoveDrv(PAC97STATE pThis, PAC97DRIVER pDrv);
682	static void ichac97R3MixerRemoveDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink, PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc, PAC97DRIVER pDrv);
683	static void ichac97R3MixerRemoveDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc);
684
685	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
686	static DECLCALLBACK(int) ichac97R3StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser);
687	static int ichac97R3StreamAsyncIOCreate(PAC97STATE pThis, PAC97STREAM pStream);
688	static int ichac97R3StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAM pStream);
689	static int ichac97R3StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream);
690	static void ichac97R3StreamAsyncIOLock(PAC97STREAM pStream);
691	static void ichac97R3StreamAsyncIOUnlock(PAC97STREAM pStream);
692	/static void ichac97R3StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable); Unused /
693	# endif
694
695	DECLINLINE(PDMAUDIODIR) ichac97GetDirFromSD(uint8_t uSD);
696
697	# ifdef LOG_ENABLED
698	static void ichac97R3BDLEDumpAll(PAC97STATE pThis, uint64_t u64BDLBase, uint16_t cBDLE);
699	# endif
700	#endif /* IN_RING3 */
701	bool ichac97TimerSet(PAC97STATE pThis, PAC97STREAM pStream, uint64_t tsExpire, bool fForce);
702
703	static void ichac97WarmReset(PAC97STATE pThis)
704	{
705	NOREF(pThis);
706	}
707
708	static void ichac97ColdReset(PAC97STATE pThis)
709	{
710	NOREF(pThis);
711	}
712
713	#ifdef IN_RING3
714
715	/**
716	* Retrieves the audio mixer sink of a corresponding AC'97 stream index.
717	*
718	* @returns Pointer to audio mixer sink if found, or NULL if not found / invalid.
719	* @param pThis AC'97 state.
720	* @param uIndex Stream index to get audio mixer sink for.
721	*/
722	DECLINLINE(PAUDMIXSINK) ichac97R3IndexToSink(PAC97STATE pThis, uint8_t uIndex)
723	{
724	AssertPtrReturn(pThis, NULL);
725
726	switch (uIndex)
727	{
728	case AC97SOUNDSOURCE_PI_INDEX: return pThis->pSinkLineIn;
729	case AC97SOUNDSOURCE_PO_INDEX: return pThis->pSinkOut;
730	case AC97SOUNDSOURCE_MC_INDEX: return pThis->pSinkMicIn;
731	default: break;
732	}
733
734	AssertMsgFailed(("Wrong index %RU8\n", uIndex));
735	return NULL;
736	}
737
738	/**
739	* Fetches the current BDLE (Buffer Descriptor List Entry) of an AC'97 audio stream.
740	*
741	* @returns IPRT status code.
742	* @param pThis AC'97 state.
743	* @param pStream AC'97 stream to fetch BDLE for.
744	*
745	* @remark Uses CIV as BDLE index.
746	*/
747	static void ichac97R3StreamFetchBDLE(PAC97STATE pThis, PAC97STREAM pStream)
748	{
749	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
750	PAC97BMREGS pRegs = &pStream->Regs;
751
752	AC97BDLE BDLE;
753	PDMDevHlpPhysRead(pDevIns, pRegs->bdbar + pRegs->civ * sizeof(AC97BDLE), &BDLE, sizeof(AC97BDLE));
754	pRegs->bd_valid = 1;
755	# ifndef RT_LITTLE_ENDIAN
756	# error "Please adapt the code (audio buffers are little endian)!"
757	# else
758	pRegs->bd.addr = RT_H2LE_U32(BDLE.addr & ~3);
759	pRegs->bd.ctl_len = RT_H2LE_U32(BDLE.ctl_len);
760	# endif
761	pRegs->picb = pRegs->bd.ctl_len & AC97_BD_LEN_MASK;
762	LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes), bup=%RTbool, ioc=%RTbool\n",
763	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16,
764	pRegs->bd.ctl_len & AC97_BD_LEN_MASK,
765	(pRegs->bd.ctl_len & AC97_BD_LEN_MASK) << 1, /** @todo r=andy Assumes 16bit samples. */
766	RT_BOOL(pRegs->bd.ctl_len & AC97_BD_BUP),
767	RT_BOOL(pRegs->bd.ctl_len & AC97_BD_IOC)));
768	}
769
770	#endif /* IN_RING3 */
771
772	/**
773	* Updates the status register (SR) of an AC'97 audio stream.
774	*
775	* @param pThis AC'97 state.
776	* @param pStream AC'97 stream to update SR for.
777	* @param new_sr New value for status register (SR).
778	*/
779	static void ichac97StreamUpdateSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
780	{
781	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
782	PAC97BMREGS pRegs = &pStream->Regs;
783
784	bool fSignal = false;
785	int iIRQL = 0;
786
787	uint32_t new_mask = new_sr & AC97_SR_INT_MASK;
788	uint32_t old_mask = pRegs->sr & AC97_SR_INT_MASK;
789
790	if (new_mask ^ old_mask)
791	{
792	/** @todo Is IRQ deasserted when only one of status bits is cleared? */
793	if (!new_mask)
794	{
795	fSignal = true;
796	iIRQL = 0;
797	}
798	else if ((new_mask & AC97_SR_LVBCI) && (pRegs->cr & AC97_CR_LVBIE))
799	{
800	fSignal = true;
801	iIRQL = 1;
802	}
803	else if ((new_mask & AC97_SR_BCIS) && (pRegs->cr & AC97_CR_IOCE))
804	{
805	fSignal = true;
806	iIRQL = 1;
807	}
808	}
809
810	pRegs->sr = new_sr;
811
812	LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n",
813	pRegs->sr & AC97_SR_BCIS, pRegs->sr & AC97_SR_LVBCI, pRegs->sr, fSignal, iIRQL));
814
815	if (fSignal)
816	{
817	static uint32_t const s_aMasks[] = { AC97_GS_PIINT, AC97_GS_POINT, AC97_GS_MINT };
818	Assert(pStream->u8SD < AC97_MAX_STREAMS);
819	if (iIRQL)
820	pThis->glob_sta \|= s_aMasks[pStream->u8SD];
821	else
822	pThis->glob_sta &= ~s_aMasks[pStream->u8SD];
823
824	LogFlowFunc(("Setting IRQ level=%d\n", iIRQL));
825	PDMDevHlpPCISetIrq(pDevIns, 0, iIRQL);
826	}
827	}
828
829	/**
830	* Writes a new value to a stream's status register (SR).
831	*
832	* @param pThis AC'97 device state.
833	* @param pStream Stream to update SR for.
834	* @param u32Val New value to set the stream's SR to.
835	*/
836	static void ichac97StreamWriteSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t u32Val)
837	{
838	PAC97BMREGS pRegs = &pStream->Regs;
839
840	Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8SD, u32Val, pRegs->sr));
841
842	pRegs->sr \|= u32Val & ~(AC97_SR_RO_MASK \| AC97_SR_WCLEAR_MASK);
843	ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
844	}
845
846	#ifdef IN_RING3
847
848	/**
849	* Returns whether an AC'97 stream is enabled or not.
850	*
851	* @returns IPRT status code.
852	* @param pThis AC'97 device state.
853	* @param pStream Stream to return status for.
854	*/
855	static bool ichac97R3StreamIsEnabled(PAC97STATE pThis, PAC97STREAM pStream)
856	{
857	AssertPtrReturn(pThis, false);
858	AssertPtrReturn(pStream, false);
859
860	PAUDMIXSINK pSink = ichac97R3IndexToSink(pThis, pStream->u8SD);
861	bool fIsEnabled = RT_BOOL(AudioMixerSinkGetStatus(pSink) & AUDMIXSINK_STS_RUNNING);
862
863	LogFunc(("[SD%RU8] fIsEnabled=%RTbool\n", pStream->u8SD, fIsEnabled));
864	return fIsEnabled;
865	}
866
867	/**
868	* Enables or disables an AC'97 audio stream.
869	*
870	* @returns IPRT status code.
871	* @param pThis AC'97 state.
872	* @param pStream AC'97 stream to enable or disable.
873	* @param fEnable Whether to enable or disable the stream.
874	*
875	*/
876	static int ichac97R3StreamEnable(PAC97STATE pThis, PAC97STREAM pStream, bool fEnable)
877	{
878	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
879	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
880
881	ichac97R3StreamLock(pStream);
882
883	int rc = VINF_SUCCESS;
884
885	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
886	if (fEnable)
887	rc = ichac97R3StreamAsyncIOCreate(pThis, pStream);
888	if (RT_SUCCESS(rc))
889	ichac97R3StreamAsyncIOLock(pStream);
890	# endif
891
892	if (fEnable)
893	{
894	if (pStream->State.pCircBuf)
895	RTCircBufReset(pStream->State.pCircBuf);
896
897	rc = ichac97R3StreamOpen(pThis, pStream, false /* fForce */);
898
899	if (pStream->Dbg.Runtime.fEnabled)
900	{
901	if (!DrvAudioHlpFileIsOpen(pStream->Dbg.Runtime.pFileStream))
902	{
903	int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileStream, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
904	&pStream->State.Cfg.Props);
905	AssertRC(rc2);
906	}
907
908	if (!DrvAudioHlpFileIsOpen(pStream->Dbg.Runtime.pFileDMA))
909	{
910	int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileDMA, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
911	&pStream->State.Cfg.Props);
912	AssertRC(rc2);
913	}
914	}
915	}
916	else
917	rc = ichac97R3StreamClose(pThis, pStream);
918
919	if (RT_SUCCESS(rc))
920	{
921	/* First, enable or disable the stream and the stream's sink, if any. */
922	rc = AudioMixerSinkCtl(ichac97R3IndexToSink(pThis, pStream->u8SD),
923	fEnable ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE);
924	}
925
926	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
927	ichac97R3StreamAsyncIOUnlock(pStream);
928	# endif
929
930	/* Make sure to leave the lock before (eventually) starting the timer. */
931	ichac97R3StreamUnlock(pStream);
932
933	LogFunc(("[SD%RU8] fEnable=%RTbool, rc=%Rrc\n", pStream->u8SD, fEnable, rc));
934	return rc;
935	}
936
937	/**
938	* Resets an AC'97 stream.
939	*
940	* @param pThis AC'97 state.
941	* @param pStream AC'97 stream to reset.
942	*
943	*/
944	static void ichac97R3StreamReset(PAC97STATE pThis, PAC97STREAM pStream)
945	{
946	AssertPtrReturnVoid(pThis);
947	AssertPtrReturnVoid(pStream);
948
949	ichac97R3StreamLock(pStream);
950
951	LogFunc(("[SD%RU8]\n", pStream->u8SD));
952
953	if (pStream->State.pCircBuf)
954	RTCircBufReset(pStream->State.pCircBuf);
955
956	PAC97BMREGS pRegs = &pStream->Regs;
957
958	pRegs->bdbar = 0;
959	pRegs->civ = 0;
960	pRegs->lvi = 0;
961
962	pRegs->picb = 0;
963	pRegs->piv = 0;
964	pRegs->cr = pRegs->cr & AC97_CR_DONT_CLEAR_MASK;
965	pRegs->bd_valid = 0;
966
967	RT_ZERO(pThis->silence);
968
969	ichac97R3StreamUnlock(pStream);
970	}
971
972	/**
973	* Creates an AC'97 audio stream.
974	*
975	* @returns IPRT status code.
976	* @param pThis AC'97 state.
977	* @param pStream AC'97 stream to create.
978	* @param u8SD Stream descriptor number to assign.
979	*/
980	static int ichac97R3StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8SD)
981	{
982	RT_NOREF(pThis);
983	AssertPtrReturn(pStream, VERR_INVALID_PARAMETER);
984	/** @todo Validate u8Strm. */
985
986	LogFunc(("[SD%RU8] pStream=%p\n", u8SD, pStream));
987
988	AssertReturn(u8SD < AC97_MAX_STREAMS, VERR_INVALID_PARAMETER);
989	pStream->u8SD = u8SD;
990	pStream->pAC97State = pThis;
991
992	int rc = RTCritSectInit(&pStream->State.CritSect);
993
994	pStream->Dbg.Runtime.fEnabled = pThis->Dbg.fEnabled;
995
996	if (pStream->Dbg.Runtime.fEnabled)
997	{
998	char szFile[64];
999
1000	if (ichac97GetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
1001	RTStrPrintf(szFile, sizeof(szFile), "ac97StreamWriteSD%RU8", pStream->u8SD);
1002	else
1003	RTStrPrintf(szFile, sizeof(szFile), "ac97StreamReadSD%RU8", pStream->u8SD);
1004
1005	char szPath[RTPATH_MAX + 1];
1006	int rc2 = DrvAudioHlpFileNameGet(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
1007	0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAG_NONE);
1008	AssertRC(rc2);
1009	rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAG_NONE, &pStream->Dbg.Runtime.pFileStream);
1010	AssertRC(rc2);
1011
1012	if (ichac97GetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
1013	RTStrPrintf(szFile, sizeof(szFile), "ac97DMAWriteSD%RU8", pStream->u8SD);
1014	else
1015	RTStrPrintf(szFile, sizeof(szFile), "ac97DMAReadSD%RU8", pStream->u8SD);
1016
1017	rc2 = DrvAudioHlpFileNameGet(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
1018	0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAG_NONE);
1019	AssertRC(rc2);
1020
1021	rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAG_NONE, &pStream->Dbg.Runtime.pFileDMA);
1022	AssertRC(rc2);
1023
1024	/* Delete stale debugging files from a former run. */
1025	DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileStream);
1026	DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileDMA);
1027	}
1028
1029	return rc;
1030	}
1031
1032	/**
1033	* Destroys an AC'97 audio stream.
1034	*
1035	* @returns IPRT status code.
1036	* @param pThis AC'97 state.
1037	* @param pStream AC'97 stream to destroy.
1038	*/
1039	static void ichac97R3StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream)
1040	{
1041	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
1042
1043	ichac97R3StreamClose(pThis, pStream);
1044
1045	int rc2 = RTCritSectDelete(&pStream->State.CritSect);
1046	AssertRC(rc2);
1047
1048	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1049	rc2 = ichac97R3StreamAsyncIODestroy(pThis, pStream);
1050	AssertRC(rc2);
1051	# else
1052	RT_NOREF(pThis);
1053	# endif
1054
1055	if (pStream->Dbg.Runtime.fEnabled)
1056	{
1057	DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileStream);
1058	pStream->Dbg.Runtime.pFileStream = NULL;
1059
1060	DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileDMA);
1061	pStream->Dbg.Runtime.pFileDMA = NULL;
1062	}
1063
1064	if (pStream->State.pCircBuf)
1065	{
1066	RTCircBufDestroy(pStream->State.pCircBuf);
1067	pStream->State.pCircBuf = NULL;
1068	}
1069
1070	LogFlowFuncLeave();
1071	}
1072
1073	/**
1074	* Destroys all AC'97 audio streams of the device.
1075	*
1076	* @param pThis AC'97 state.
1077	*/
1078	static void ichac97R3StreamsDestroy(PAC97STATE pThis)
1079	{
1080	LogFlowFuncEnter();
1081
1082	/*
1083	* Destroy all AC'97 streams.
1084	*/
1085	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
1086	ichac97R3StreamDestroy(pThis, &pThis->aStreams[i]);
1087
1088	/*
1089	* Destroy all sinks.
1090	*/
1091
1092	PDMAUDIODESTSOURCE dstSrc;
1093	if (pThis->pSinkLineIn)
1094	{
1095	dstSrc.Source = PDMAUDIORECSOURCE_LINE;
1096	ichac97R3MixerRemoveDrvStreams(pThis, pThis->pSinkLineIn, PDMAUDIODIR_IN, dstSrc);
1097
1098	AudioMixerSinkDestroy(pThis->pSinkLineIn);
1099	pThis->pSinkLineIn = NULL;
1100	}
1101
1102	if (pThis->pSinkMicIn)
1103	{
1104	dstSrc.Source = PDMAUDIORECSOURCE_MIC;
1105	ichac97R3MixerRemoveDrvStreams(pThis, pThis->pSinkMicIn, PDMAUDIODIR_IN, dstSrc);
1106
1107	AudioMixerSinkDestroy(pThis->pSinkMicIn);
1108	pThis->pSinkMicIn = NULL;
1109	}
1110
1111	if (pThis->pSinkOut)
1112	{
1113	dstSrc.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
1114	ichac97R3MixerRemoveDrvStreams(pThis, pThis->pSinkOut, PDMAUDIODIR_OUT, dstSrc);
1115
1116	AudioMixerSinkDestroy(pThis->pSinkOut);
1117	pThis->pSinkOut = NULL;
1118	}
1119	}
1120
1121	/**
1122	* Writes audio data from a mixer sink into an AC'97 stream's DMA buffer.
1123	*
1124	* @returns IPRT status code.
1125	* @param pThis AC'97 state.
1126	* @param pDstStream AC'97 stream to write to.
1127	* @param pSrcMixSink Mixer sink to get audio data to write from.
1128	* @param cbToWrite Number of bytes to write.
1129	* @param pcbWritten Number of bytes written. Optional.
1130	*/
1131	static int ichac97R3StreamWrite(PAC97STATE pThis, PAC97STREAM pDstStream, PAUDMIXSINK pSrcMixSink, uint32_t cbToWrite,
1132	uint32_t *pcbWritten)
1133	{
1134	RT_NOREF(pThis);
1135	AssertPtrReturn(pDstStream, VERR_INVALID_POINTER);
1136	AssertPtrReturn(pSrcMixSink, VERR_INVALID_POINTER);
1137	AssertReturn(cbToWrite, VERR_INVALID_PARAMETER);
1138	/* pcbWritten is optional. */
1139
1140	PRTCIRCBUF pCircBuf = pDstStream->State.pCircBuf;
1141	AssertPtr(pCircBuf);
1142
1143	void *pvDst;
1144	size_t cbDst;
1145
1146	uint32_t cbRead = 0;
1147
1148	RTCircBufAcquireWriteBlock(pCircBuf, cbToWrite, &pvDst, &cbDst);
1149
1150	if (cbDst)
1151	{
1152	int rc2 = AudioMixerSinkRead(pSrcMixSink, AUDMIXOP_COPY, pvDst, (uint32_t)cbDst, &cbRead);
1153	AssertRC(rc2);
1154
1155	if (pDstStream->Dbg.Runtime.fEnabled)
1156	DrvAudioHlpFileWrite(pDstStream->Dbg.Runtime.pFileStream, pvDst, cbRead, 0 /* fFlags */);
1157	}
1158
1159	RTCircBufReleaseWriteBlock(pCircBuf, cbRead);
1160
1161	if (pcbWritten)
1162	*pcbWritten = cbRead;
1163
1164	return VINF_SUCCESS;
1165	}
1166
1167	/**
1168	* Reads audio data from an AC'97 stream's DMA buffer and writes into a specified mixer sink.
1169	*
1170	* @returns IPRT status code.
1171	* @param pThis AC'97 state.
1172	* @param pSrcStream AC'97 stream to read audio data from.
1173	* @param pDstMixSink Mixer sink to write audio data to.
1174	* @param cbToRead Number of bytes to read.
1175	* @param pcbRead Number of bytes read. Optional.
1176	*/
1177	static int ichac97R3StreamRead(PAC97STATE pThis, PAC97STREAM pSrcStream, PAUDMIXSINK pDstMixSink, uint32_t cbToRead,
1178	uint32_t *pcbRead)
1179	{
1180	RT_NOREF(pThis);
1181	AssertPtrReturn(pSrcStream, VERR_INVALID_POINTER);
1182	AssertPtrReturn(pDstMixSink, VERR_INVALID_POINTER);
1183	AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
1184	/* pcbRead is optional. */
1185
1186	PRTCIRCBUF pCircBuf = pSrcStream->State.pCircBuf;
1187	AssertPtr(pCircBuf);
1188
1189	void *pvSrc;
1190	size_t cbSrc;
1191
1192	int rc = VINF_SUCCESS;
1193
1194	uint32_t cbReadTotal = 0;
1195	uint32_t cbLeft = RT_MIN(cbToRead, (uint32_t)RTCircBufUsed(pCircBuf));
1196
1197	while (cbLeft)
1198	{
1199	uint32_t cbWritten = 0;
1200
1201	RTCircBufAcquireReadBlock(pCircBuf, cbLeft, &pvSrc, &cbSrc);
1202
1203	if (cbSrc)
1204	{
1205	if (pSrcStream->Dbg.Runtime.fEnabled)
1206	DrvAudioHlpFileWrite(pSrcStream->Dbg.Runtime.pFileStream, pvSrc, cbSrc, 0 /* fFlags */);
1207
1208	rc = AudioMixerSinkWrite(pDstMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
1209	AssertRC(rc);
1210
1211	Assert(cbSrc >= cbWritten);
1212	Log3Func(("[SD%RU8] %RU32/%zu bytes read\n", pSrcStream->u8SD, cbWritten, cbSrc));
1213	}
1214
1215	RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
1216
1217	if ( !cbWritten /* Nothing written? */
1218	\|\| RT_FAILURE(rc))
1219	break;
1220
1221	Assert(cbLeft >= cbWritten);
1222	cbLeft -= cbWritten;
1223
1224	cbReadTotal += cbWritten;
1225	}
1226
1227	if (pcbRead)
1228	*pcbRead = cbReadTotal;
1229
1230	return rc;
1231	}
1232
1233	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1234
1235	/**
1236	* Asynchronous I/O thread for an AC'97 stream.
1237	* This will do the heavy lifting work for us as soon as it's getting notified by another thread.
1238	*
1239	* @returns IPRT status code.
1240	* @param hThreadSelf Thread handle.
1241	* @param pvUser User argument. Must be of type PAC97STREAMTHREADCTX.
1242	*/
1243	static DECLCALLBACK(int) ichac97R3StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
1244	{
1245	PAC97STREAMTHREADCTX pCtx = (PAC97STREAMTHREADCTX)pvUser;
1246	AssertPtr(pCtx);
1247
1248	PAC97STATE pThis = pCtx->pThis;
1249	AssertPtr(pThis);
1250
1251	PAC97STREAM pStream = pCtx->pStream;
1252	AssertPtr(pStream);
1253
1254	PAC97STREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
1255
1256	ASMAtomicXchgBool(&pAIO->fStarted, true);
1257
1258	RTThreadUserSignal(hThreadSelf);
1259
1260	LogFunc(("[SD%RU8] Started\n", pStream->u8SD));
1261
1262	for (;;)
1263	{
1264	Log2Func(("[SD%RU8] Waiting ...\n", pStream->u8SD));
1265
1266	int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1267	if (RT_FAILURE(rc2))
1268	break;
1269
1270	if (ASMAtomicReadBool(&pAIO->fShutdown))
1271	break;
1272
1273	rc2 = RTCritSectEnter(&pAIO->CritSect);
1274	if (RT_SUCCESS(rc2))
1275	{
1276	if (!pAIO->fEnabled)
1277	{
1278	RTCritSectLeave(&pAIO->CritSect);
1279	continue;
1280	}
1281
1282	ichac97R3StreamUpdate(pThis, pStream, false /* fInTimer */);
1283
1284	int rc3 = RTCritSectLeave(&pAIO->CritSect);
1285	AssertRC(rc3);
1286	}
1287
1288	AssertRC(rc2);
1289	}
1290
1291	LogFunc(("[SD%RU8] Ended\n", pStream->u8SD));
1292
1293	ASMAtomicXchgBool(&pAIO->fStarted, false);
1294
1295	return VINF_SUCCESS;
1296	}
1297
1298	/**
1299	* Creates the async I/O thread for a specific AC'97 audio stream.
1300	*
1301	* @returns IPRT status code.
1302	* @param pThis AC'97 state.
1303	* @param pStream AC'97 audio stream to create the async I/O thread for.
1304	*/
1305	static int ichac97R3StreamAsyncIOCreate(PAC97STATE pThis, PAC97STREAM pStream)
1306	{
1307	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1308
1309	int rc;
1310
1311	if (!ASMAtomicReadBool(&pAIO->fStarted))
1312	{
1313	pAIO->fShutdown = false;
1314	pAIO->fEnabled = true; /* Enabled by default. */
1315
1316	rc = RTSemEventCreate(&pAIO->Event);
1317	if (RT_SUCCESS(rc))
1318	{
1319	rc = RTCritSectInit(&pAIO->CritSect);
1320	if (RT_SUCCESS(rc))
1321	{
1322	AC97STREAMTHREADCTX Ctx = { pThis, pStream };
1323
1324	char szThreadName[64];
1325	RTStrPrintf2(szThreadName, sizeof(szThreadName), "ac97AIO%RU8", pStream->u8SD);
1326
1327	rc = RTThreadCreate(&pAIO->Thread, ichac97R3StreamAsyncIOThread, &Ctx,
1328	0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
1329	if (RT_SUCCESS(rc))
1330	rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
1331	}
1332	}
1333	}
1334	else
1335	rc = VINF_SUCCESS;
1336
1337	LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
1338	return rc;
1339	}
1340
1341	/**
1342	* Destroys the async I/O thread of a specific AC'97 audio stream.
1343	*
1344	* @returns IPRT status code.
1345	* @param pThis AC'97 state.
1346	* @param pStream AC'97 audio stream to destroy the async I/O thread for.
1347	*/
1348	static int ichac97R3StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAM pStream)
1349	{
1350	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1351
1352	if (!ASMAtomicReadBool(&pAIO->fStarted))
1353	return VINF_SUCCESS;
1354
1355	ASMAtomicWriteBool(&pAIO->fShutdown, true);
1356
1357	int rc = ichac97R3StreamAsyncIONotify(pThis, pStream);
1358	AssertRC(rc);
1359
1360	int rcThread;
1361	rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
1362	LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
1363
1364	if (RT_SUCCESS(rc))
1365	{
1366	rc = RTCritSectDelete(&pAIO->CritSect);
1367	AssertRC(rc);
1368
1369	rc = RTSemEventDestroy(pAIO->Event);
1370	AssertRC(rc);
1371
1372	pAIO->fStarted = false;
1373	pAIO->fShutdown = false;
1374	pAIO->fEnabled = false;
1375	}
1376
1377	LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
1378	return rc;
1379	}
1380
1381	/**
1382	* Lets the stream's async I/O thread know that there is some data to process.
1383	*
1384	* @returns IPRT status code.
1385	* @param pThis AC'97 state.
1386	* @param pStream AC'97 stream to notify async I/O thread for.
1387	*/
1388	static int ichac97R3StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream)
1389	{
1390	RT_NOREF(pThis);
1391
1392	LogFunc(("[SD%RU8]\n", pStream->u8SD));
1393	return RTSemEventSignal(pStream->State.AIO.Event);
1394	}
1395
1396	/**
1397	* Locks the async I/O thread of a specific AC'97 audio stream.
1398	*
1399	* @param pStream AC'97 stream to lock async I/O thread for.
1400	*/
1401	static void ichac97R3StreamAsyncIOLock(PAC97STREAM pStream)
1402	{
1403	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1404
1405	if (!ASMAtomicReadBool(&pAIO->fStarted))
1406	return;
1407
1408	int rc2 = RTCritSectEnter(&pAIO->CritSect);
1409	AssertRC(rc2);
1410	}
1411
1412	/**
1413	* Unlocks the async I/O thread of a specific AC'97 audio stream.
1414	*
1415	* @param pStream AC'97 stream to unlock async I/O thread for.
1416	*/
1417	static void ichac97R3StreamAsyncIOUnlock(PAC97STREAM pStream)
1418	{
1419	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1420
1421	if (!ASMAtomicReadBool(&pAIO->fStarted))
1422	return;
1423
1424	int rc2 = RTCritSectLeave(&pAIO->CritSect);
1425	AssertRC(rc2);
1426	}
1427
1428	#if 0 /* Unused */
1429	/**
1430	* Enables (resumes) or disables (pauses) the async I/O thread.
1431	*
1432	* @param pStream AC'97 stream to enable/disable async I/O thread for.
1433	* @param fEnable Whether to enable or disable the I/O thread.
1434	*
1435	* @remarks Does not do locking.
1436	*/
1437	static void ichac97R3StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable)
1438	{
1439	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1440	ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
1441	}
1442	#endif
1443	# endif /* VBOX_WITH_AUDIO_AC97_ASYNC_IO */
1444
1445	# ifdef LOG_ENABLED
1446	static void ichac97R3BDLEDumpAll(PAC97STATE pThis, uint64_t u64BDLBase, uint16_t cBDLE)
1447	{
1448	LogFlowFunc(("BDLEs @ 0x%x (%RU16):\n", u64BDLBase, cBDLE));
1449	if (!u64BDLBase)
1450	return;
1451
1452	uint32_t cbBDLE = 0;
1453	for (uint16_t i = 0; i < cBDLE; i++)
1454	{
1455	AC97BDLE BDLE;
1456	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), u64BDLBase + i * sizeof(AC97BDLE), &BDLE, sizeof(AC97BDLE));
1457
1458	# ifndef RT_LITTLE_ENDIAN
1459	# error "Please adapt the code (audio buffers are little endian)!"
1460	# else
1461	BDLE.addr = RT_H2LE_U32(BDLE.addr & ~3);
1462	BDLE.ctl_len = RT_H2LE_U32(BDLE.ctl_len);
1463	#endif
1464	LogFunc(("\t#%03d BDLE(adr:0x%llx, size:%RU32 [%RU32 bytes], bup:%RTbool, ioc:%RTbool)\n",
1465	i, BDLE.addr,
1466	BDLE.ctl_len & AC97_BD_LEN_MASK,
1467	(BDLE.ctl_len & AC97_BD_LEN_MASK) << 1, /** @todo r=andy Assumes 16bit samples. */
1468	RT_BOOL(BDLE.ctl_len & AC97_BD_BUP),
1469	RT_BOOL(BDLE.ctl_len & AC97_BD_IOC)));
1470
1471	cbBDLE += (BDLE.ctl_len & AC97_BD_LEN_MASK) << 1; /** @todo r=andy Ditto. */
1472	}
1473
1474	LogFlowFunc(("Total: %RU32 bytes\n", cbBDLE));
1475	}
1476	# endif /* LOG_ENABLED */
1477
1478	/**
1479	* Updates an AC'97 stream by doing its required data transfers.
1480	* The host sink(s) set the overall pace.
1481	*
1482	* This routine is called by both, the synchronous and the asynchronous
1483	* (VBOX_WITH_AUDIO_AC97_ASYNC_IO), implementations.
1484	*
1485	* When running synchronously, the device DMA transfers and the mixer sink
1486	* processing is within the device timer.
1487	*
1488	* When running asynchronously, only the device DMA transfers are done in the
1489	* device timer, whereas the mixer sink processing then is done in the stream's
1490	* own async I/O thread. This thread also will call this function
1491	* (with fInTimer set to @c false).
1492	*
1493	* @param pThis AC'97 state.
1494	* @param pStream AC'97 stream to update.
1495	* @param fInTimer Whether to this function was called from the timer
1496	* context or an asynchronous I/O stream thread (if supported).
1497	*/
1498	static void ichac97R3StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer)
1499	{
1500	RT_NOREF(fInTimer);
1501
1502	PAUDMIXSINK pSink = ichac97R3IndexToSink(pThis, pStream->u8SD);
1503	AssertPtr(pSink);
1504
1505	if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
1506	return;
1507
1508	int rc2;
1509
1510	if (pStream->State.Cfg.enmDir == PDMAUDIODIR_OUT) /* Output (SDO). */
1511	{
1512	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1513	if (fInTimer)
1514	# endif
1515	{
1516	const uint32_t cbStreamFree = ichac97R3StreamGetFree(pStream);
1517	if (cbStreamFree)
1518	{
1519	Log3Func(("[SD%RU8] PICB=%zu (%RU64ms), cbFree=%zu (%RU64ms), cbTransferChunk=%zu (%RU64ms)\n",
1520	pStream->u8SD,
1521	(pStream->Regs.picb << 1), DrvAudioHlpBytesToMilli((pStream->Regs.picb << 1), &pStream->State.Cfg.Props),
1522	cbStreamFree, DrvAudioHlpBytesToMilli(cbStreamFree, &pStream->State.Cfg.Props),
1523	pStream->State.cbTransferChunk, DrvAudioHlpBytesToMilli(pStream->State.cbTransferChunk, &pStream->State.Cfg.Props)));
1524
1525	/* Do the DMA transfer. */
1526	rc2 = ichac97R3StreamTransfer(pThis, pStream, RT_MIN(pStream->State.cbTransferChunk, cbStreamFree));
1527	AssertRC(rc2);
1528
1529	pStream->State.tsLastUpdateNs = RTTimeNanoTS();
1530	}
1531	}
1532
1533	Log3Func(("[SD%RU8] fInTimer=%RTbool\n", pStream->u8SD, fInTimer));
1534
1535	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1536	rc2 = ichac97R3StreamAsyncIONotify(pThis, pStream);
1537	AssertRC(rc2);
1538	# endif
1539
1540	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1541	if (!fInTimer) /* In async I/O thread */
1542	{
1543	# endif
1544	const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
1545	const uint32_t cbStreamReadable = ichac97R3StreamGetUsed(pStream);
1546	const uint32_t cbToReadFromStream = RT_MIN(cbStreamReadable, cbSinkWritable);
1547
1548	Log3Func(("[SD%RU8] cbSinkWritable=%RU32, cbStreamReadable=%RU32\n", pStream->u8SD, cbSinkWritable, cbStreamReadable));
1549
1550	if (cbToReadFromStream)
1551	{
1552	/* Read (guest output) data and write it to the stream's sink. */
1553	rc2 = ichac97R3StreamRead(pThis, pStream, pSink, cbToReadFromStream, NULL /* pcbRead */);
1554	AssertRC(rc2);
1555	}
1556	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1557	}
1558	#endif
1559	/* When running synchronously, update the associated sink here.
1560	* Otherwise this will be done in the async I/O thread. */
1561	rc2 = AudioMixerSinkUpdate(pSink);
1562	AssertRC(rc2);
1563	}
1564	else /* Input (SDI). */
1565	{
1566	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1567	if (!fInTimer)
1568	{
1569	# endif
1570	rc2 = AudioMixerSinkUpdate(pSink);
1571	AssertRC(rc2);
1572
1573	/* Is the sink ready to be read (host input data) from? If so, by how much? */
1574	uint32_t cbSinkReadable = AudioMixerSinkGetReadable(pSink);
1575
1576	/* How much (guest input) data is available for writing at the moment for the AC'97 stream? */
1577	uint32_t cbStreamFree = ichac97R3StreamGetFree(pStream);
1578
1579	Log3Func(("[SD%RU8] cbSinkReadable=%RU32, cbStreamFree=%RU32\n", pStream->u8SD, cbSinkReadable, cbStreamFree));
1580
1581	/* Do not read more than the sink can provide at the moment.
1582	* The host sets the overall pace. */
1583	if (cbSinkReadable > cbStreamFree)
1584	cbSinkReadable = cbStreamFree;
1585
1586	if (cbSinkReadable)
1587	{
1588	/* Write (guest input) data to the stream which was read from stream's sink before. */
1589	rc2 = ichac97R3StreamWrite(pThis, pStream, pSink, cbSinkReadable, NULL /* pcbWritten */);
1590	AssertRC(rc2);
1591	}
1592	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1593	}
1594	else /* fInTimer */
1595	{
1596	# endif
1597
1598	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1599	const uint64_t tsNowNs = RTTimeNanoTS();
1600	if (tsNowNs - pStream->State.tsLastUpdateNs >= pStream->State.Cfg.Device.uSchedulingHintMs * RT_NS_1MS)
1601	{
1602	rc2 = ichac97R3StreamAsyncIONotify(pThis, pStream);
1603	AssertRC(rc2);
1604
1605	pStream->State.tsLastUpdateNs = tsNowNs;
1606	}
1607	# endif
1608
1609	const uint32_t cbStreamUsed = ichac97R3StreamGetUsed(pStream);
1610	if (cbStreamUsed)
1611	{
1612	/* When running synchronously, do the DMA data transfers here.
1613	* Otherwise this will be done in the stream's async I/O thread. */
1614	rc2 = ichac97R3StreamTransfer(pThis, pStream, cbStreamUsed);
1615	AssertRC(rc2);
1616	}
1617	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1618	}
1619	# endif
1620	}
1621	}
1622
1623	#endif /* IN_RING3 */
1624
1625	/**
1626	* Sets a AC'97 mixer control to a specific value.
1627	*
1628	* @returns IPRT status code.
1629	* @param pThis AC'97 state.
1630	* @param uMixerIdx Mixer control to set value for.
1631	* @param uVal Value to set.
1632	*/
1633	static void ichac97MixerSet(PAC97STATE pThis, uint8_t uMixerIdx, uint16_t uVal)
1634	{
1635	AssertMsgReturnVoid(uMixerIdx + 2U <= sizeof(pThis->mixer_data),
1636	("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1637
1638	LogRel2(("AC97: Setting mixer index #%RU8 to %RU16 (%RU8 %RU8)\n",
1639	uMixerIdx, uVal, RT_HI_U8(uVal), RT_LO_U8(uVal)));
1640
1641	pThis->mixer_data[uMixerIdx + 0] = RT_LO_U8(uVal);
1642	pThis->mixer_data[uMixerIdx + 1] = RT_HI_U8(uVal);
1643	}
1644
1645	/**
1646	* Gets a value from a specific AC'97 mixer control.
1647	*
1648	* @returns Retrieved mixer control value.
1649	* @param pThis AC'97 state.
1650	* @param uMixerIdx Mixer control to get value for.
1651	*/
1652	static uint16_t ichac97MixerGet(PAC97STATE pThis, uint32_t uMixerIdx)
1653	{
1654	AssertMsgReturn(uMixerIdx + 2U <= sizeof(pThis->mixer_data),
1655	("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)),
1656	UINT16_MAX);
1657	return RT_MAKE_U16(pThis->mixer_data[uMixerIdx + 0], pThis->mixer_data[uMixerIdx + 1]);
1658	}
1659
1660	#ifdef IN_RING3
1661
1662	/**
1663	* Retrieves a specific driver stream of a AC'97 driver.
1664	*
1665	* @returns Pointer to driver stream if found, or NULL if not found.
1666	* @param pThis AC'97 state.
1667	* @param pDrv Driver to retrieve driver stream for.
1668	* @param enmDir Stream direction to retrieve.
1669	* @param dstSrc Stream destination / source to retrieve.
1670	*/
1671	static PAC97DRIVERSTREAM ichac97R3MixerGetDrvStream(PAC97STATE pThis, PAC97DRIVER pDrv,
1672	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1673	{
1674	RT_NOREF(pThis);
1675
1676	PAC97DRIVERSTREAM pDrvStream = NULL;
1677
1678	if (enmDir == PDMAUDIODIR_IN)
1679	{
1680	LogFunc(("enmRecSource=%d\n", dstSrc.Source));
1681
1682	switch (dstSrc.Source)
1683	{
1684	case PDMAUDIORECSOURCE_LINE:
1685	pDrvStream = &pDrv->LineIn;
1686	break;
1687	case PDMAUDIORECSOURCE_MIC:
1688	pDrvStream = &pDrv->MicIn;
1689	break;
1690	default:
1691	AssertFailed();
1692	break;
1693	}
1694	}
1695	else if (enmDir == PDMAUDIODIR_OUT)
1696	{
1697	LogFunc(("enmPlaybackDest=%d\n", dstSrc.Dest));
1698
1699	switch (dstSrc.Dest)
1700	{
1701	case PDMAUDIOPLAYBACKDEST_FRONT:
1702	pDrvStream = &pDrv->Out;
1703	break;
1704	default:
1705	AssertFailed();
1706	break;
1707	}
1708	}
1709	else
1710	AssertFailed();
1711
1712	return pDrvStream;
1713	}
1714
1715	/**
1716	* Adds a driver stream to a specific mixer sink.
1717	*
1718	* @returns IPRT status code.
1719	* @param pThis AC'97 state.
1720	* @param pMixSink Mixer sink to add driver stream to.
1721	* @param pCfg Stream configuration to use.
1722	* @param pDrv Driver stream to add.
1723	*/
1724	static int ichac97R3MixerAddDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg, PAC97DRIVER pDrv)
1725	{
1726	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1727	AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1728	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
1729
1730	PPDMAUDIOSTREAMCFG pStreamCfg = DrvAudioHlpStreamCfgDup(pCfg);
1731	if (!pStreamCfg)
1732	return VERR_NO_MEMORY;
1733
1734	if (!RTStrPrintf(pStreamCfg->szName, sizeof(pStreamCfg->szName), "%s", pCfg->szName))
1735	{
1736	DrvAudioHlpStreamCfgFree(pStreamCfg);
1737	return VERR_BUFFER_OVERFLOW;
1738	}
1739
1740	LogFunc(("[LUN#%RU8] %s\n", pDrv->uLUN, pStreamCfg->szName));
1741
1742	int rc;
1743
1744	PAC97DRIVERSTREAM pDrvStream = ichac97R3MixerGetDrvStream(pThis, pDrv, pStreamCfg->enmDir, pStreamCfg->DestSource);
1745	if (pDrvStream)
1746	{
1747	AssertMsg(pDrvStream->pMixStrm == NULL, ("[LUN#%RU8] Driver stream already present when it must not\n", pDrv->uLUN));
1748
1749	PAUDMIXSTREAM pMixStrm;
1750	rc = AudioMixerSinkCreateStream(pMixSink, pDrv->pConnector, pStreamCfg, 0 /* fFlags */, &pMixStrm);
1751	LogFlowFunc(("LUN#%RU8: Created stream \"%s\" for sink, rc=%Rrc\n", pDrv->uLUN, pStreamCfg->szName, rc));
1752	if (RT_SUCCESS(rc))
1753	{
1754	rc = AudioMixerSinkAddStream(pMixSink, pMixStrm);
1755	LogFlowFunc(("LUN#%RU8: Added stream \"%s\" to sink, rc=%Rrc\n", pDrv->uLUN, pStreamCfg->szName, rc));
1756	if (RT_SUCCESS(rc))
1757	{
1758	/* If this is an input stream, always set the latest (added) stream
1759	* as the recording source.
1760	* @todo Make the recording source dynamic (CFGM?). */
1761	if (pStreamCfg->enmDir == PDMAUDIODIR_IN)
1762	{
1763	PDMAUDIOBACKENDCFG Cfg;
1764	rc = pDrv->pConnector->pfnGetConfig(pDrv->pConnector, &Cfg);
1765	if (RT_SUCCESS(rc))
1766	{
1767	if (Cfg.cMaxStreamsIn) /* At least one input source available? */
1768	{
1769	rc = AudioMixerSinkSetRecordingSource(pMixSink, pMixStrm);
1770	LogFlowFunc(("LUN#%RU8: Recording source for '%s' -> '%s', rc=%Rrc\n",
1771	pDrv->uLUN, pStreamCfg->szName, Cfg.szName, rc));
1772
1773	if (RT_SUCCESS(rc))
1774	LogRel2(("AC97: Set recording source for '%s' to '%s'\n", pStreamCfg->szName, Cfg.szName));
1775	}
1776	else
1777	LogRel(("AC97: Backend '%s' currently is not offering any recording source for '%s'\n",
1778	Cfg.szName, pStreamCfg->szName));
1779	}
1780	else if (RT_FAILURE(rc))
1781	LogFunc(("LUN#%RU8: Unable to retrieve backend configuratio for '%s', rc=%Rrc\n",
1782	pDrv->uLUN, pStreamCfg->szName, rc));
1783	}
1784	}
1785	}
1786
1787	if (RT_SUCCESS(rc))
1788	pDrvStream->pMixStrm = pMixStrm;
1789	}
1790	else
1791	rc = VERR_INVALID_PARAMETER;
1792
1793	DrvAudioHlpStreamCfgFree(pStreamCfg);
1794
1795	LogFlowFuncLeaveRC(rc);
1796	return rc;
1797	}
1798
1799	/**
1800	* Adds all current driver streams to a specific mixer sink.
1801	*
1802	* @returns IPRT status code.
1803	* @param pThis AC'97 state.
1804	* @param pMixSink Mixer sink to add stream to.
1805	* @param pCfg Stream configuration to use.
1806	*/
1807	static int ichac97R3MixerAddDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg)
1808	{
1809	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1810	AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1811	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
1812
1813	if (!DrvAudioHlpStreamCfgIsValid(pCfg))
1814	return VERR_INVALID_PARAMETER;
1815
1816	int rc = AudioMixerSinkSetFormat(pMixSink, &pCfg->Props);
1817	if (RT_FAILURE(rc))
1818	return rc;
1819
1820	PAC97DRIVER pDrv;
1821	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1822	{
1823	int rc2 = ichac97R3MixerAddDrvStream(pThis, pMixSink, pCfg, pDrv);
1824	if (RT_FAILURE(rc2))
1825	LogFunc(("Attaching stream failed with %Rrc\n", rc2));
1826
1827	/* Do not pass failure to rc here, as there might be drivers which aren't
1828	* configured / ready yet. */
1829	}
1830
1831	LogFlowFuncLeaveRC(rc);
1832	return rc;
1833	}
1834
1835	/**
1836	* Adds a specific AC'97 driver to the driver chain.
1837	*
1838	* @return IPRT status code.
1839	* @param pThis AC'97 state.
1840	* @param pDrv AC'97 driver to add.
1841	*/
1842	static int ichac97R3MixerAddDrv(PAC97STATE pThis, PAC97DRIVER pDrv)
1843	{
1844	int rc = VINF_SUCCESS;
1845
1846	if (DrvAudioHlpStreamCfgIsValid(&pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX].State.Cfg))
1847	{
1848	int rc2 = ichac97R3MixerAddDrvStream(pThis, pThis->pSinkLineIn,
1849	&pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX].State.Cfg, pDrv);
1850	if (RT_SUCCESS(rc))
1851	rc = rc2;
1852	}
1853
1854	if (DrvAudioHlpStreamCfgIsValid(&pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX].State.Cfg))
1855	{
1856	int rc2 = ichac97R3MixerAddDrvStream(pThis, pThis->pSinkOut,
1857	&pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX].State.Cfg, pDrv);
1858	if (RT_SUCCESS(rc))
1859	rc = rc2;
1860	}
1861
1862	if (DrvAudioHlpStreamCfgIsValid(&pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX].State.Cfg))
1863	{
1864	int rc2 = ichac97R3MixerAddDrvStream(pThis, pThis->pSinkMicIn,
1865	&pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX].State.Cfg, pDrv);
1866	if (RT_SUCCESS(rc))
1867	rc = rc2;
1868	}
1869
1870	return rc;
1871	}
1872
1873	/**
1874	* Removes a specific AC'97 driver from the driver chain and destroys its
1875	* associated streams.
1876	*
1877	* @param pThis AC'97 state.
1878	* @param pDrv AC'97 driver to remove.
1879	*/
1880	static void ichac97R3MixerRemoveDrv(PAC97STATE pThis, PAC97DRIVER pDrv)
1881	{
1882	AssertPtrReturnVoid(pThis);
1883	AssertPtrReturnVoid(pDrv);
1884
1885	if (pDrv->MicIn.pMixStrm)
1886	{
1887	if (AudioMixerSinkGetRecordingSource(pThis->pSinkMicIn) == pDrv->MicIn.pMixStrm)
1888	AudioMixerSinkSetRecordingSource(pThis->pSinkMicIn, NULL);
1889
1890	AudioMixerSinkRemoveStream(pThis->pSinkMicIn, pDrv->MicIn.pMixStrm);
1891	AudioMixerStreamDestroy(pDrv->MicIn.pMixStrm);
1892	pDrv->MicIn.pMixStrm = NULL;
1893	}
1894
1895	if (pDrv->LineIn.pMixStrm)
1896	{
1897	if (AudioMixerSinkGetRecordingSource(pThis->pSinkLineIn) == pDrv->LineIn.pMixStrm)
1898	AudioMixerSinkSetRecordingSource(pThis->pSinkLineIn, NULL);
1899
1900	AudioMixerSinkRemoveStream(pThis->pSinkLineIn, pDrv->LineIn.pMixStrm);
1901	AudioMixerStreamDestroy(pDrv->LineIn.pMixStrm);
1902	pDrv->LineIn.pMixStrm = NULL;
1903	}
1904
1905	if (pDrv->Out.pMixStrm)
1906	{
1907	AudioMixerSinkRemoveStream(pThis->pSinkOut, pDrv->Out.pMixStrm);
1908	AudioMixerStreamDestroy(pDrv->Out.pMixStrm);
1909	pDrv->Out.pMixStrm = NULL;
1910	}
1911
1912	RTListNodeRemove(&pDrv->Node);
1913	}
1914
1915	/**
1916	* Removes a driver stream from a specific mixer sink.
1917	*
1918	* @param pThis AC'97 state.
1919	* @param pMixSink Mixer sink to remove audio streams from.
1920	* @param enmDir Stream direction to remove.
1921	* @param dstSrc Stream destination / source to remove.
1922	* @param pDrv Driver stream to remove.
1923	*/
1924	static void ichac97R3MixerRemoveDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink,
1925	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc, PAC97DRIVER pDrv)
1926	{
1927	AssertPtrReturnVoid(pThis);
1928	AssertPtrReturnVoid(pMixSink);
1929
1930	PAC97DRIVERSTREAM pDrvStream = ichac97R3MixerGetDrvStream(pThis, pDrv, enmDir, dstSrc);
1931	if (pDrvStream)
1932	{
1933	if (pDrvStream->pMixStrm)
1934	{
1935	AudioMixerSinkRemoveStream(pMixSink, pDrvStream->pMixStrm);
1936
1937	AudioMixerStreamDestroy(pDrvStream->pMixStrm);
1938	pDrvStream->pMixStrm = NULL;
1939	}
1940	}
1941	}
1942
1943	/**
1944	* Removes all driver streams from a specific mixer sink.
1945	*
1946	* @param pThis AC'97 state.
1947	* @param pMixSink Mixer sink to remove audio streams from.
1948	* @param enmDir Stream direction to remove.
1949	* @param dstSrc Stream destination / source to remove.
1950	*/
1951	static void ichac97R3MixerRemoveDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink,
1952	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1953	{
1954	AssertPtrReturnVoid(pThis);
1955	AssertPtrReturnVoid(pMixSink);
1956
1957	PAC97DRIVER pDrv;
1958	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1959	{
1960	ichac97R3MixerRemoveDrvStream(pThis, pMixSink, enmDir, dstSrc, pDrv);
1961	}
1962	}
1963
1964	/**
1965	* Calculates and returns the ticks for a specified amount of bytes.
1966	*
1967	* @returns Calculated ticks
1968	* @param pThis AC'97 device state.
1969	* @param pStream AC'97 stream to calculate ticks for.
1970	* @param cbBytes Bytes to calculate ticks for.
1971	*/
1972	static uint64_t ichac97R3StreamTransferCalcNext(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbBytes)
1973	{
1974	if (!cbBytes)
1975	return 0;
1976
1977	const uint64_t usBytes = DrvAudioHlpBytesToMicro(cbBytes, &pStream->State.Cfg.Props);
1978	const uint64_t cTransferTicks = TMTimerFromMicro((pThis)->DEVAC97_CTX_SUFF_SD(pTimer, pStream->u8SD), usBytes);
1979
1980	Log3Func(("[SD%RU8] Timer %uHz, cbBytes=%RU32 -> usBytes=%RU64, cTransferTicks=%RU64\n",
1981	pStream->u8SD, pStream->State.uTimerHz, cbBytes, usBytes, cTransferTicks));
1982
1983	return cTransferTicks;
1984	}
1985
1986	/**
1987	* Updates the next transfer based on a specific amount of bytes.
1988	*
1989	* @param pThis AC'97 device state.
1990	* @param pStream AC'97 stream to update.
1991	* @param cbBytes Bytes to update next transfer for.
1992	*/
1993	static void ichac97R3StreamTransferUpdate(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbBytes)
1994	{
1995	if (!cbBytes)
1996	return;
1997
1998	/* Calculate the bytes we need to transfer to / from the stream's DMA per iteration.
1999	* This is bound to the device's Hz rate and thus to the (virtual) timing the device expects. */
2000	pStream->State.cbTransferChunk = cbBytes;
2001
2002	/* Update the transfer ticks. */
2003	pStream->State.cTransferTicks = ichac97R3StreamTransferCalcNext(pThis, pStream, pStream->State.cbTransferChunk);
2004	Assert(pStream->State.cTransferTicks); /* Paranoia. */
2005	}
2006
2007	/**
2008	* Opens an AC'97 stream with its current mixer settings.
2009	*
2010	* This will open an AC'97 stream with 2 (stereo) channels, 16-bit samples and
2011	* the last set sample rate in the AC'97 mixer for this stream.
2012	*
2013	* @returns IPRT status code.
2014	* @param pThis AC'97 device state.
2015	* @param pStream AC'97 stream to open.
2016	* @param fForce Whether to force re-opening the stream or not.
2017	* Otherwise re-opening only will happen if the PCM properties have changed.
2018	*/
2019	static int ichac97R3StreamOpen(PAC97STATE pThis, PAC97STREAM pStream, bool fForce)
2020	{
2021	int rc = VINF_SUCCESS;
2022
2023	PDMAUDIOSTREAMCFG Cfg;
2024	RT_ZERO(Cfg);
2025
2026	PAUDMIXSINK pMixSink = NULL;
2027
2028	Cfg.Props.cChannels = 2;
2029	Cfg.Props.cBytes = 2 /* 16-bit */;
2030	Cfg.Props.fSigned = true;
2031	Cfg.Props.cShift = PDMAUDIOPCMPROPS_MAKE_SHIFT_PARMS(Cfg.Props.cBytes, Cfg.Props.cChannels);
2032
2033	switch (pStream->u8SD)
2034	{
2035	case AC97SOUNDSOURCE_PI_INDEX:
2036	{
2037	Cfg.Props.uHz = ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate);
2038	Cfg.enmDir = PDMAUDIODIR_IN;
2039	Cfg.DestSource.Source = PDMAUDIORECSOURCE_LINE;
2040	Cfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
2041	RTStrCopy(Cfg.szName, sizeof(Cfg.szName), "Line-In");
2042
2043	pMixSink = pThis->pSinkLineIn;
2044	break;
2045	}
2046
2047	case AC97SOUNDSOURCE_MC_INDEX:
2048	{
2049	Cfg.Props.uHz = ichac97MixerGet(pThis, AC97_MIC_ADC_Rate);
2050	Cfg.enmDir = PDMAUDIODIR_IN;
2051	Cfg.DestSource.Source = PDMAUDIORECSOURCE_MIC;
2052	Cfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
2053	RTStrCopy(Cfg.szName, sizeof(Cfg.szName), "Mic-In");
2054
2055	pMixSink = pThis->pSinkMicIn;
2056	break;
2057	}
2058
2059	case AC97SOUNDSOURCE_PO_INDEX:
2060	{
2061	Cfg.Props.uHz = ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate);
2062	Cfg.enmDir = PDMAUDIODIR_OUT;
2063	Cfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
2064	Cfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
2065	RTStrCopy(Cfg.szName, sizeof(Cfg.szName), "Output");
2066
2067	pMixSink = pThis->pSinkOut;
2068	break;
2069	}
2070
2071	default:
2072	rc = VERR_NOT_SUPPORTED;
2073	break;
2074	}
2075
2076	if (RT_SUCCESS(rc))
2077	{
2078	/* Only (re-)create the stream (and driver chain) if we really have to.
2079	* Otherwise avoid this and just reuse it, as this costs performance. */
2080	if ( !DrvAudioHlpPCMPropsAreEqual(&Cfg.Props, &pStream->State.Cfg.Props)
2081	\|\| fForce)
2082	{
2083	LogRel2(("AC97: (Re-)Opening stream '%s' (%RU32Hz, %RU8 channels, %s%RU8)\n",
2084	Cfg.szName, Cfg.Props.uHz, Cfg.Props.cChannels, Cfg.Props.fSigned ? "S" : "U", Cfg.Props.cBytes * 8));
2085
2086	LogFlowFunc(("[SD%RU8] uHz=%RU32\n", pStream->u8SD, Cfg.Props.uHz));
2087
2088	if (Cfg.Props.uHz)
2089	{
2090	Assert(Cfg.enmDir != PDMAUDIODIR_UNKNOWN);
2091
2092	/*
2093	* Set the stream's timer Hz rate, based on the PCM properties Hz rate.
2094	*/
2095	if (pThis->uTimerHz == AC97_TIMER_HZ_DEFAULT) /* Make sure that we don't have any custom Hz rate set we want to enforce */
2096	{
2097	if (Cfg.Props.uHz > 44100) /* E.g. 48000 Hz. */
2098	pStream->State.uTimerHz = 200;
2099	else /* Just take the global Hz rate otherwise. */
2100	pStream->State.uTimerHz = pThis->uTimerHz;
2101	}
2102	else
2103	pStream->State.uTimerHz = pThis->uTimerHz;
2104
2105	/* Set scheduling hint (if available). */
2106	if (pStream->State.uTimerHz)
2107	Cfg.Device.uSchedulingHintMs = 1000 /* ms */ / pStream->State.uTimerHz;
2108
2109	if (pStream->State.pCircBuf)
2110	{
2111	RTCircBufDestroy(pStream->State.pCircBuf);
2112	pStream->State.pCircBuf = NULL;
2113	}
2114
2115	rc = RTCircBufCreate(&pStream->State.pCircBuf, DrvAudioHlpMilliToBytes(100 /* ms /, &Cfg.Props)); /* @todo Make this configurable. */
2116	if (RT_SUCCESS(rc))
2117	{
2118	ichac97R3MixerRemoveDrvStreams(pThis, pMixSink, Cfg.enmDir, Cfg.DestSource);
2119
2120	rc = ichac97R3MixerAddDrvStreams(pThis, pMixSink, &Cfg);
2121	if (RT_SUCCESS(rc))
2122	rc = DrvAudioHlpStreamCfgCopy(&pStream->State.Cfg, &Cfg);
2123	}
2124	}
2125	}
2126	else
2127	LogFlowFunc(("[SD%RU8] Skipping (re-)creation\n", pStream->u8SD));
2128	}
2129
2130	LogFlowFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
2131	return rc;
2132	}
2133
2134	/**
2135	* Closes an AC'97 stream.
2136	*
2137	* @returns IPRT status code.
2138	* @param pThis AC'97 state.
2139	* @param pStream AC'97 stream to close.
2140	*/
2141	static int ichac97R3StreamClose(PAC97STATE pThis, PAC97STREAM pStream)
2142	{
2143	RT_NOREF(pThis, pStream);
2144
2145	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
2146
2147	return VINF_SUCCESS;
2148	}
2149
2150	/**
2151	* Re-opens (that is, closes and opens again) an AC'97 stream on the backend
2152	* side with the current AC'97 mixer settings for this stream.
2153	*
2154	* @returns IPRT status code.
2155	* @param pThis AC'97 device state.
2156	* @param pStream AC'97 stream to re-open.
2157	* @param fForce Whether to force re-opening the stream or not.
2158	* Otherwise re-opening only will happen if the PCM properties have changed.
2159	*/
2160	static int ichac97R3StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream, bool fForce)
2161	{
2162	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
2163
2164	int rc = ichac97R3StreamClose(pThis, pStream);
2165	if (RT_SUCCESS(rc))
2166	rc = ichac97R3StreamOpen(pThis, pStream, fForce);
2167
2168	return rc;
2169	}
2170
2171	/**
2172	* Locks an AC'97 stream for serialized access.
2173	*
2174	* @returns IPRT status code.
2175	* @param pStream AC'97 stream to lock.
2176	*/
2177	static void ichac97R3StreamLock(PAC97STREAM pStream)
2178	{
2179	AssertPtrReturnVoid(pStream);
2180	int rc2 = RTCritSectEnter(&pStream->State.CritSect);
2181	AssertRC(rc2);
2182	}
2183
2184	/**
2185	* Unlocks a formerly locked AC'97 stream.
2186	*
2187	* @returns IPRT status code.
2188	* @param pStream AC'97 stream to unlock.
2189	*/
2190	static void ichac97R3StreamUnlock(PAC97STREAM pStream)
2191	{
2192	AssertPtrReturnVoid(pStream);
2193	int rc2 = RTCritSectLeave(&pStream->State.CritSect);
2194	AssertRC(rc2);
2195	}
2196
2197	/**
2198	* Retrieves the available size of (buffered) audio data (in bytes) of a given AC'97 stream.
2199	*
2200	* @returns Available data (in bytes).
2201	* @param pStream AC'97 stream to retrieve size for.
2202	*/
2203	static uint32_t ichac97R3StreamGetUsed(PAC97STREAM pStream)
2204	{
2205	AssertPtrReturn(pStream, 0);
2206
2207	if (!pStream->State.pCircBuf)
2208	return 0;
2209
2210	return (uint32_t)RTCircBufUsed(pStream->State.pCircBuf);
2211	}
2212
2213	/**
2214	* Retrieves the free size of audio data (in bytes) of a given AC'97 stream.
2215	*
2216	* @returns Free data (in bytes).
2217	* @param pStream AC'97 stream to retrieve size for.
2218	*/
2219	static uint32_t ichac97R3StreamGetFree(PAC97STREAM pStream)
2220	{
2221	AssertPtrReturn(pStream, 0);
2222
2223	if (!pStream->State.pCircBuf)
2224	return 0;
2225
2226	return (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
2227	}
2228
2229	/**
2230	* Sets the volume of a specific AC'97 mixer control.
2231	*
2232	* This currently only supports attenuation -- gain support is currently not implemented.
2233	*
2234	* @returns IPRT status code.
2235	* @param pThis AC'97 state.
2236	* @param index AC'97 mixer index to set volume for.
2237	* @param enmMixerCtl Corresponding audio mixer sink.
2238	* @param uVal Volume value to set.
2239	*/
2240	static int ichac97R3MixerSetVolume(PAC97STATE pThis, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
2241	{
2242	/*
2243	* From AC'97 SoundMax Codec AD1981A/AD1981B:
2244	* "Because AC '97 defines 6-bit volume registers, to maintain compatibility whenever the
2245	* D5 or D13 bits are set to 1, their respective lower five volume bits are automatically
2246	* set to 1 by the Codec logic. On readback, all lower 5 bits will read ones whenever
2247	* these bits are set to 1."
2248	*
2249	* Linux ALSA depends on this behavior to detect that only 5 bits are used for volume
2250	* control and the optional 6th bit is not used. Note that this logic only applies to the
2251	* master volume controls.
2252	*/
2253	if ((index == AC97_Master_Volume_Mute) \|\| (index == AC97_Headphone_Volume_Mute) \|\| (index == AC97_Master_Volume_Mono_Mute))
2254	{
2255	if (uVal & RT_BIT(5)) /* D5 bit set? */
2256	uVal \|= RT_BIT(4) \| RT_BIT(3) \| RT_BIT(2) \| RT_BIT(1) \| RT_BIT(0);
2257	if (uVal & RT_BIT(13)) /* D13 bit set? */
2258	uVal \|= RT_BIT(12) \| RT_BIT(11) \| RT_BIT(10) \| RT_BIT(9) \| RT_BIT(8);
2259	}
2260
2261	const bool fCtlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
2262	uint8_t uCtlAttLeft = (uVal >> 8) & AC97_BARS_VOL_MASK;
2263	uint8_t uCtlAttRight = uVal & AC97_BARS_VOL_MASK;
2264
2265	/* For the master and headphone volume, 0 corresponds to 0dB attenuation. For the other
2266	* volume controls, 0 means 12dB gain and 8 means unity gain.
2267	*/
2268	if (index != AC97_Master_Volume_Mute && index != AC97_Headphone_Volume_Mute)
2269	{
2270	# ifndef VBOX_WITH_AC97_GAIN_SUPPORT
2271	/* NB: Currently there is no gain support, only attenuation. */
2272	uCtlAttLeft = uCtlAttLeft < 8 ? 0 : uCtlAttLeft - 8;
2273	uCtlAttRight = uCtlAttRight < 8 ? 0 : uCtlAttRight - 8;
2274	# endif
2275	}
2276	Assert(uCtlAttLeft <= 255 / AC97_DB_FACTOR);
2277	Assert(uCtlAttRight <= 255 / AC97_DB_FACTOR);
2278
2279	LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
2280	LogFunc(("uCtlAttLeft=%RU8, uCtlAttRight=%RU8 ", uCtlAttLeft, uCtlAttRight));
2281
2282	/*
2283	* For AC'97 volume controls, each additional step means -1.5dB attenuation with
2284	* zero being maximum. In contrast, we're internally using 255 (PDMAUDIO_VOLUME_MAX)
2285	* steps, each -0.375dB, where 0 corresponds to -96dB and 255 corresponds to 0dB.
2286	*/
2287	uint8_t lVol = PDMAUDIO_VOLUME_MAX - uCtlAttLeft * AC97_DB_FACTOR;
2288	uint8_t rVol = PDMAUDIO_VOLUME_MAX - uCtlAttRight * AC97_DB_FACTOR;
2289
2290	Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCtlMuted, lVol, rVol));
2291
2292	int rc = VINF_SUCCESS;
2293
2294	if (pThis->pMixer) /* Device can be in reset state, so no mixer available. */
2295	{
2296	PDMAUDIOVOLUME Vol = { fCtlMuted, lVol, rVol };
2297	PAUDMIXSINK pSink = NULL;
2298
2299	switch (enmMixerCtl)
2300	{
2301	case PDMAUDIOMIXERCTL_VOLUME_MASTER:
2302	rc = AudioMixerSetMasterVolume(pThis->pMixer, &Vol);
2303	break;
2304
2305	case PDMAUDIOMIXERCTL_FRONT:
2306	pSink = pThis->pSinkOut;
2307	break;
2308
2309	case PDMAUDIOMIXERCTL_MIC_IN:
2310	case PDMAUDIOMIXERCTL_LINE_IN:
2311	/* These are recognized but do nothing. */
2312	break;
2313
2314	default:
2315	AssertFailed();
2316	rc = VERR_NOT_SUPPORTED;
2317	break;
2318	}
2319
2320	if (pSink)
2321	rc = AudioMixerSinkSetVolume(pSink, &Vol);
2322	}
2323
2324	ichac97MixerSet(pThis, index, uVal);
2325
2326	if (RT_FAILURE(rc))
2327	LogFlowFunc(("Failed with %Rrc\n", rc));
2328
2329	return rc;
2330	}
2331
2332	/**
2333	* Sets the gain of a specific AC'97 recording control.
2334	*
2335	* NB: gain support is currently not implemented in PDM audio.
2336	*
2337	* @returns IPRT status code.
2338	* @param pThis AC'97 state.
2339	* @param index AC'97 mixer index to set volume for.
2340	* @param enmMixerCtl Corresponding audio mixer sink.
2341	* @param uVal Volume value to set.
2342	*/
2343	static int ichac97R3MixerSetGain(PAC97STATE pThis, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
2344	{
2345	/*
2346	* For AC'97 recording controls, each additional step means +1.5dB gain with
2347	* zero being 0dB gain and 15 being +22.5dB gain.
2348	*/
2349	const bool fCtlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
2350	uint8_t uCtlGainLeft = (uVal >> 8) & AC97_BARS_GAIN_MASK;
2351	uint8_t uCtlGainRight = uVal & AC97_BARS_GAIN_MASK;
2352
2353	Assert(uCtlGainLeft <= 255 / AC97_DB_FACTOR);
2354	Assert(uCtlGainRight <= 255 / AC97_DB_FACTOR);
2355
2356	LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
2357	LogFunc(("uCtlGainLeft=%RU8, uCtlGainRight=%RU8 ", uCtlGainLeft, uCtlGainRight));
2358
2359	uint8_t lVol = PDMAUDIO_VOLUME_MAX + uCtlGainLeft * AC97_DB_FACTOR;
2360	uint8_t rVol = PDMAUDIO_VOLUME_MAX + uCtlGainRight * AC97_DB_FACTOR;
2361
2362	/* We do not currently support gain. Since AC'97 does not support attenuation
2363	* for the recording input, the best we can do is set the maximum volume.
2364	*/
2365	# ifndef VBOX_WITH_AC97_GAIN_SUPPORT
2366	/* NB: Currently there is no gain support, only attenuation. Since AC'97 does not
2367	* support attenuation for the recording inputs, the best we can do is set the
2368	* maximum volume.
2369	*/
2370	lVol = rVol = PDMAUDIO_VOLUME_MAX;
2371	# endif
2372
2373	Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCtlMuted, lVol, rVol));
2374
2375	int rc = VINF_SUCCESS;
2376
2377	if (pThis->pMixer) /* Device can be in reset state, so no mixer available. */
2378	{
2379	PDMAUDIOVOLUME Vol = { fCtlMuted, lVol, rVol };
2380	PAUDMIXSINK pSink = NULL;
2381
2382	switch (enmMixerCtl)
2383	{
2384	case PDMAUDIOMIXERCTL_MIC_IN:
2385	pSink = pThis->pSinkMicIn;
2386	break;
2387
2388	case PDMAUDIOMIXERCTL_LINE_IN:
2389	pSink = pThis->pSinkLineIn;
2390	break;
2391
2392	default:
2393	AssertFailed();
2394	rc = VERR_NOT_SUPPORTED;
2395	break;
2396	}
2397
2398	if (pSink) {
2399	rc = AudioMixerSinkSetVolume(pSink, &Vol);
2400	/* There is only one AC'97 recording gain control. If line in
2401	* is changed, also update the microphone. If the optional dedicated
2402	* microphone is changed, only change that.
2403	* NB: The codecs we support do not have the dedicated microphone control.
2404	*/
2405	if ((pSink == pThis->pSinkLineIn) && pThis->pSinkMicIn)
2406	rc = AudioMixerSinkSetVolume(pSink, &Vol);
2407	}
2408	}
2409
2410	ichac97MixerSet(pThis, index, uVal);
2411
2412	if (RT_FAILURE(rc))
2413	LogFlowFunc(("Failed with %Rrc\n", rc));
2414
2415	return rc;
2416	}
2417
2418	/**
2419	* Converts an AC'97 recording source index to a PDM audio recording source.
2420	*
2421	* @returns PDM audio recording source.
2422	* @param uIdx AC'97 index to convert.
2423	*/
2424	static PDMAUDIORECSOURCE ichac97R3IdxToRecSource(uint8_t uIdx)
2425	{
2426	switch (uIdx)
2427	{
2428	case AC97_REC_MIC: return PDMAUDIORECSOURCE_MIC;
2429	case AC97_REC_CD: return PDMAUDIORECSOURCE_CD;
2430	case AC97_REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO;
2431	case AC97_REC_AUX: return PDMAUDIORECSOURCE_AUX;
2432	case AC97_REC_LINE_IN: return PDMAUDIORECSOURCE_LINE;
2433	case AC97_REC_PHONE: return PDMAUDIORECSOURCE_PHONE;
2434	default:
2435	break;
2436	}
2437
2438	LogFlowFunc(("Unknown record source %d, using MIC\n", uIdx));
2439	return PDMAUDIORECSOURCE_MIC;
2440	}
2441
2442	/**
2443	* Converts a PDM audio recording source to an AC'97 recording source index.
2444	*
2445	* @returns AC'97 recording source index.
2446	* @param enmRecSrc PDM audio recording source to convert.
2447	*/
2448	static uint8_t ichac97R3RecSourceToIdx(PDMAUDIORECSOURCE enmRecSrc)
2449	{
2450	switch (enmRecSrc)
2451	{
2452	case PDMAUDIORECSOURCE_MIC: return AC97_REC_MIC;
2453	case PDMAUDIORECSOURCE_CD: return AC97_REC_CD;
2454	case PDMAUDIORECSOURCE_VIDEO: return AC97_REC_VIDEO;
2455	case PDMAUDIORECSOURCE_AUX: return AC97_REC_AUX;
2456	case PDMAUDIORECSOURCE_LINE: return AC97_REC_LINE_IN;
2457	case PDMAUDIORECSOURCE_PHONE: return AC97_REC_PHONE;
2458	default:
2459	break;
2460	}
2461
2462	LogFlowFunc(("Unknown audio recording source %d using MIC\n", enmRecSrc));
2463	return AC97_REC_MIC;
2464	}
2465
2466	/**
2467	* Returns the audio direction of a specified stream descriptor.
2468	*
2469	* @return Audio direction.
2470	*/
2471	DECLINLINE(PDMAUDIODIR) ichac97GetDirFromSD(uint8_t uSD)
2472	{
2473	switch (uSD)
2474	{
2475	case AC97SOUNDSOURCE_PI_INDEX: return PDMAUDIODIR_IN;
2476	case AC97SOUNDSOURCE_PO_INDEX: return PDMAUDIODIR_OUT;
2477	case AC97SOUNDSOURCE_MC_INDEX: return PDMAUDIODIR_IN;
2478	}
2479
2480	AssertFailed();
2481	return PDMAUDIODIR_UNKNOWN;
2482	}
2483
2484	#endif /* IN_RING3 */
2485
2486	#ifdef IN_RING3
2487
2488	/**
2489	* Performs an AC'97 mixer record select to switch to a different recording
2490	* source.
2491	*
2492	* @param pThis AC'97 state.
2493	* @param val AC'97 recording source index to set.
2494	*/
2495	static void ichac97R3MixerRecordSelect(PAC97STATE pThis, uint32_t val)
2496	{
2497	uint8_t rs = val & AC97_REC_MASK;
2498	uint8_t ls = (val >> 8) & AC97_REC_MASK;
2499
2500	const PDMAUDIORECSOURCE ars = ichac97R3IdxToRecSource(rs);
2501	const PDMAUDIORECSOURCE als = ichac97R3IdxToRecSource(ls);
2502
2503	rs = ichac97R3RecSourceToIdx(ars);
2504	ls = ichac97R3RecSourceToIdx(als);
2505
2506	LogRel(("AC97: Record select to left=%s, right=%s\n", DrvAudioHlpRecSrcToStr(ars), DrvAudioHlpRecSrcToStr(als)));
2507
2508	ichac97MixerSet(pThis, AC97_Record_Select, rs \| (ls << 8));
2509	}
2510
2511	/**
2512	* Resets the AC'97 mixer.
2513	*
2514	* @returns IPRT status code.
2515	* @param pThis AC'97 state.
2516	*/
2517	static int ichac97R3MixerReset(PAC97STATE pThis)
2518	{
2519	AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
2520
2521	LogFlowFuncEnter();
2522
2523	RT_ZERO(pThis->mixer_data);
2524
2525	/* Note: Make sure to reset all registers first before bailing out on error. */
2526
2527	ichac97MixerSet(pThis, AC97_Reset , 0x0000); /* 6940 */
2528	ichac97MixerSet(pThis, AC97_Master_Volume_Mono_Mute , 0x8000);
2529	ichac97MixerSet(pThis, AC97_PC_BEEP_Volume_Mute , 0x0000);
2530
2531	ichac97MixerSet(pThis, AC97_Phone_Volume_Mute , 0x8008);
2532	ichac97MixerSet(pThis, AC97_Mic_Volume_Mute , 0x8008);
2533	ichac97MixerSet(pThis, AC97_CD_Volume_Mute , 0x8808);
2534	ichac97MixerSet(pThis, AC97_Aux_Volume_Mute , 0x8808);
2535	ichac97MixerSet(pThis, AC97_Record_Gain_Mic_Mute , 0x8000);
2536	ichac97MixerSet(pThis, AC97_General_Purpose , 0x0000);
2537	ichac97MixerSet(pThis, AC97_3D_Control , 0x0000);
2538	ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f);
2539
2540	/* Configure Extended Audio ID (EAID) + Control & Status (EACS) registers. */
2541	const uint16_t fEAID = AC97_EAID_REV1 \| AC97_EACS_VRA \| AC97_EACS_VRM; /* Our hardware is AC'97 rev2.3 compliant. */
2542	const uint16_t fEACS = AC97_EACS_VRA \| AC97_EACS_VRM; /* Variable Rate PCM Audio (VRA) + Mic-In (VRM) capable. */
2543
2544	LogRel(("AC97: Mixer reset (EAID=0x%x, EACS=0x%x)\n", fEAID, fEACS));
2545
2546	ichac97MixerSet(pThis, AC97_Extended_Audio_ID, fEAID);
2547	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, fEACS);
2548	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80 /* 48000 Hz by default */);
2549	ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80 /* 48000 Hz by default */);
2550	ichac97MixerSet(pThis, AC97_PCM_LFE_DAC_Rate , 0xbb80 /* 48000 Hz by default */);
2551	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate , 0xbb80 /* 48000 Hz by default */);
2552	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80 /* 48000 Hz by default */);
2553
2554	if (pThis->uCodecModel == AC97_CODEC_AD1980)
2555	{
2556	/* Analog Devices 1980 (AD1980) */
2557	ichac97MixerSet(pThis, AC97_Reset , 0x0010); /* Headphones. */
2558	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
2559	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5370);
2560	ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000);
2561	}
2562	else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
2563	{
2564	/* Analog Devices 1981B (AD1981B) */
2565	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
2566	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5374);
2567	}
2568	else
2569	{
2570	/* Sigmatel 9700 (STAC9700) */
2571	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x8384);
2572	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x7600); /* 7608 */
2573	}
2574	ichac97R3MixerRecordSelect(pThis, 0);
2575
2576	/* The default value is 8000h, which corresponds to 0 dB attenuation with mute on. */
2577	ichac97R3MixerSetVolume(pThis, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, 0x8000);
2578
2579	/* The default value for stereo registers is 8808h, which corresponds to 0 dB gain with mute on.*/
2580	ichac97R3MixerSetVolume(pThis, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, 0x8808);
2581	ichac97R3MixerSetVolume(pThis, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8808);
2582	ichac97R3MixerSetVolume(pThis, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8008);
2583
2584	/* The default for record controls is 0 dB gain with mute on. */
2585	ichac97R3MixerSetGain(pThis, AC97_Record_Gain_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8000);
2586	ichac97R3MixerSetGain(pThis, AC97_Record_Gain_Mic_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8000);
2587
2588	return VINF_SUCCESS;
2589	}
2590
2591	# if 0 /* Unused */
2592	static void ichac97R3WriteBUP(PAC97STATE pThis, uint32_t cbElapsed)
2593	{
2594	LogFlowFunc(("cbElapsed=%RU32\n", cbElapsed));
2595
2596	if (!(pThis->bup_flag & BUP_SET))
2597	{
2598	if (pThis->bup_flag & BUP_LAST)
2599	{
2600	unsigned int i;
2601	uint32_t p = (uint32_t)pThis->silence;
2602	for (i = 0; i < sizeof(pThis->silence) / 4; i++) /** @todo r=andy Assumes 16-bit samples, stereo. */
2603	*p++ = pThis->last_samp;
2604	}
2605	else
2606	RT_ZERO(pThis->silence);
2607
2608	pThis->bup_flag \|= BUP_SET;
2609	}
2610
2611	while (cbElapsed)
2612	{
2613	uint32_t cbToWrite = RT_MIN(cbElapsed, (uint32_t)sizeof(pThis->silence));
2614	uint32_t cbWrittenToStream;
2615
2616	int rc2 = AudioMixerSinkWrite(pThis->pSinkOut, AUDMIXOP_COPY,
2617	pThis->silence, cbToWrite, &cbWrittenToStream);
2618	if (RT_SUCCESS(rc2))
2619	{
2620	if (cbWrittenToStream < cbToWrite) /* Lagging behind? */
2621	LogFlowFunc(("Warning: Only written %RU32 / %RU32 bytes, expect lags\n", cbWrittenToStream, cbToWrite));
2622	}
2623
2624	/* Always report all data as being written;
2625	* backends who were not able to catch up have to deal with it themselves. */
2626	Assert(cbElapsed >= cbToWrite);
2627	cbElapsed -= cbToWrite;
2628	}
2629	}
2630	# endif /* Unused */
2631
2632	/**
2633	* Timer callback which handles the audio data transfers on a periodic basis.
2634	*
2635	* @param pDevIns Device instance.
2636	* @param pTimer Timer which was used when calling this.
2637	* @param pvUser User argument as PAC97STATE.
2638	*/
2639	static DECLCALLBACK(void) ichac97R3Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2640	{
2641	RT_NOREF(pDevIns, pTimer);
2642
2643	PAC97STREAM pStream = (PAC97STREAM)pvUser;
2644	AssertPtr(pStream);
2645
2646	PAC97STATE pThis = pStream->pAC97State;
2647	AssertPtr(pThis);
2648
2649	STAM_PROFILE_START(&pThis->StatTimer, a);
2650
2651	DEVAC97_LOCK_BOTH_RETURN_VOID(pThis, pStream->u8SD);
2652
2653	ichac97R3StreamUpdate(pThis, pStream, true /* fInTimer */);
2654
2655	PAUDMIXSINK pSink = ichac97R3IndexToSink(pThis, pStream->u8SD);
2656
2657	bool fSinkActive = false;
2658	if (pSink)
2659	fSinkActive = AudioMixerSinkIsActive(pSink);
2660
2661	if (fSinkActive)
2662	{
2663	ichac97R3StreamTransferUpdate(pThis, pStream, pStream->Regs.picb << 1); /** @todo r=andy Assumes 16-bit samples. */
2664
2665	ichac97TimerSet(pThis,pStream,
2666	TMTimerGet((pThis)->DEVAC97_CTX_SUFF_SD(pTimer, pStream->u8SD)) + pStream->State.cTransferTicks,
2667	false /* fForce */);
2668	}
2669
2670	DEVAC97_UNLOCK_BOTH(pThis, pStream->u8SD);
2671
2672	STAM_PROFILE_STOP(&pThis->StatTimer, a);
2673	}
2674	#endif /* IN_RING3 */
2675
2676	/**
2677	* Sets the virtual device timer to a new expiration time.
2678	*
2679	* @returns Whether the new expiration time was set or not.
2680	* @param pThis AC'97 state.
2681	* @param pStream AC'97 stream to set timer for.
2682	* @param tsExpire New (virtual) expiration time to set.
2683	* @param fForce Whether to force setting the expiration time or not.
2684	*
2685	* @remark This function takes all active AC'97 streams and their
2686	* current timing into account. This is needed to make sure
2687	* that all streams can match their needed timing.
2688	*
2689	* To achieve this, the earliest (lowest) timestamp of all
2690	* active streams found will be used for the next scheduling slot.
2691	*
2692	* Forcing a new expiration time will override the above mechanism.
2693	*/
2694	bool ichac97TimerSet(PAC97STATE pThis, PAC97STREAM pStream, uint64_t tsExpire, bool fForce)
2695	{
2696	AssertPtrReturn(pThis, false);
2697	AssertPtrReturn(pStream, false);
2698
2699	RT_NOREF(fForce);
2700
2701	uint64_t tsExpireMin = tsExpire;
2702
2703	AssertPtr((pThis)->DEVAC97_CTX_SUFF_SD(pTimer, pStream->u8SD));
2704
2705	const uint64_t tsNow = TMTimerGet((pThis)->DEVAC97_CTX_SUFF_SD(pTimer, pStream->u8SD));
2706
2707	/* Make sure to not go backwards in time, as this will assert in TMTimerSet(). */
2708	if (tsExpireMin < tsNow)
2709	tsExpireMin = tsNow;
2710
2711	int rc = TMTimerSet((pThis)->DEVAC97_CTX_SUFF_SD(pTimer, pStream->u8SD), tsExpireMin);
2712	AssertRC(rc);
2713
2714	return RT_SUCCESS(rc);
2715	}
2716
2717	#ifdef IN_RING3
2718
2719	/**
2720	* Transfers data of an AC'97 stream according to its usage (input / output).
2721	*
2722	* For an SDO (output) stream this means reading DMA data from the device to
2723	* the AC'97 stream's internal FIFO buffer.
2724	*
2725	* For an SDI (input) stream this is reading audio data from the AC'97 stream's
2726	* internal FIFO buffer and writing it as DMA data to the device.
2727	*
2728	* @returns IPRT status code.
2729	* @param pThis AC'97 state.
2730	* @param pStream AC'97 stream to update.
2731	* @param cbToProcessMax Maximum of data (in bytes) to process.
2732	*/
2733	static int ichac97R3StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax)
2734	{
2735	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2736	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
2737
2738	if (!cbToProcessMax)
2739	return VINF_SUCCESS;
2740
2741	#ifdef VBOX_STRICT
2742	const unsigned cbFrame = DrvAudioHlpPCMPropsBytesPerFrame(&pStream->State.Cfg.Props);
2743	#endif
2744
2745	/* Make sure to only process an integer number of audio frames. */
2746	Assert(cbToProcessMax % cbFrame == 0);
2747
2748	ichac97R3StreamLock(pStream);
2749
2750	PAC97BMREGS pRegs = &pStream->Regs;
2751
2752	if (pRegs->sr & AC97_SR_DCH) /* Controller halted? */
2753	{
2754	if (pRegs->cr & AC97_CR_RPBM) /* Bus master operation starts. */
2755	{
2756	switch (pStream->u8SD)
2757	{
2758	case AC97SOUNDSOURCE_PO_INDEX:
2759	/ichac97R3WriteBUP(pThis, cbToProcess);/
2760	break;
2761
2762	default:
2763	break;
2764	}
2765	}
2766
2767	ichac97R3StreamUnlock(pStream);
2768	return VINF_SUCCESS;
2769	}
2770
2771	/* BCIS flag still set? Skip iteration. */
2772	if (pRegs->sr & AC97_SR_BCIS)
2773	{
2774	Log3Func(("[SD%RU8] BCIS set\n", pStream->u8SD));
2775
2776	ichac97R3StreamUnlock(pStream);
2777	return VINF_SUCCESS;
2778	}
2779
2780	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToProcessMax); /** @todo r=andy Assumes 16bit samples. */
2781	uint32_t cbProcessedTotal = 0;
2782
2783	PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
2784	AssertPtr(pCircBuf);
2785
2786	int rc = VINF_SUCCESS;
2787
2788	Log3Func(("[SD%RU8] cbToProcessMax=%RU32, cbLeft=%RU32\n", pStream->u8SD, cbToProcessMax, cbLeft));
2789
2790	while (cbLeft)
2791	{
2792	if (!pRegs->picb) /* Got a new buffer descriptor, that is, the position is 0? */
2793	{
2794	Log3Func(("Fresh buffer descriptor %RU8 is empty, addr=%#x, len=%#x, skipping\n",
2795	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len));
2796	if (pRegs->civ == pRegs->lvi)
2797	{
2798	pRegs->sr \|= AC97_SR_DCH; /** @todo r=andy Also set CELV? */
2799	pThis->bup_flag = 0;
2800
2801	rc = VINF_EOF;
2802	break;
2803	}
2804
2805	pRegs->sr &= ~AC97_SR_CELV;
2806	pRegs->civ = pRegs->piv;
2807	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2808
2809	ichac97R3StreamFetchBDLE(pThis, pStream);
2810	continue;
2811	}
2812
2813	uint32_t cbChunk = cbLeft;
2814
2815	switch (pStream->u8SD)
2816	{
2817	case AC97SOUNDSOURCE_PO_INDEX: /* Output */
2818	{
2819	void *pvDst;
2820	size_t cbDst;
2821
2822	RTCircBufAcquireWriteBlock(pCircBuf, cbChunk, &pvDst, &cbDst);
2823
2824	if (cbDst)
2825	{
2826	int rc2 = PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr, (uint8_t *)pvDst, cbDst);
2827	AssertRC(rc2);
2828
2829	if (pStream->Dbg.Runtime.fEnabled)
2830	DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileDMA, pvDst, cbDst, 0 /* fFlags */);
2831	}
2832
2833	RTCircBufReleaseWriteBlock(pCircBuf, cbDst);
2834
2835	cbChunk = (uint32_t)cbDst; /* Update the current chunk size to what really has been written. */
2836	break;
2837	}
2838
2839	case AC97SOUNDSOURCE_PI_INDEX: /* Input */
2840	case AC97SOUNDSOURCE_MC_INDEX: /* Input */
2841	{
2842	void *pvSrc;
2843	size_t cbSrc;
2844
2845	RTCircBufAcquireReadBlock(pCircBuf, cbChunk, &pvSrc, &cbSrc);
2846
2847	if (cbSrc)
2848	{
2849	/** @todo r=bird: Just curious, DevHDA uses PDMDevHlpPCIPhysWrite here. So,
2850	* is AC97 not subject to PCI busmaster enable/disable? */
2851	int rc2 = PDMDevHlpPhysWrite(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr, (uint8_t *)pvSrc, cbSrc);
2852	AssertRC(rc2);
2853
2854	if (pStream->Dbg.Runtime.fEnabled)
2855	DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileDMA, pvSrc, cbSrc, 0 /* fFlags */);
2856	}
2857
2858	RTCircBufReleaseReadBlock(pCircBuf, cbSrc);
2859
2860	cbChunk = (uint32_t)cbSrc; /* Update the current chunk size to what really has been read. */
2861	break;
2862	}
2863
2864	default:
2865	AssertMsgFailed(("Stream #%RU8 not supported\n", pStream->u8SD));
2866	rc = VERR_NOT_SUPPORTED;
2867	break;
2868	}
2869
2870	if (RT_FAILURE(rc))
2871	break;
2872
2873	if (cbChunk)
2874	{
2875	cbProcessedTotal += cbChunk;
2876	Assert(cbProcessedTotal <= cbToProcessMax);
2877	Assert(cbLeft >= cbChunk);
2878	cbLeft -= cbChunk;
2879	Assert((cbChunk & 1) == 0); /* Else the following shift won't work */
2880
2881	pRegs->picb -= (cbChunk >> 1); /** @todo r=andy Assumes 16bit samples. */
2882	pRegs->bd.addr += cbChunk;
2883	}
2884
2885	LogFlowFunc(("[SD%RU8] cbChunk=%RU32, cbLeft=%RU32, cbTotal=%RU32, rc=%Rrc\n",
2886	pStream->u8SD, cbChunk, cbLeft, cbProcessedTotal, rc));
2887
2888	if (!pRegs->picb)
2889	{
2890	uint32_t new_sr = pRegs->sr & ~AC97_SR_CELV;
2891
2892	if (pRegs->bd.ctl_len & AC97_BD_IOC)
2893	{
2894	new_sr \|= AC97_SR_BCIS;
2895	}
2896
2897	if (pRegs->civ == pRegs->lvi)
2898	{
2899	/* Did we run out of data? */
2900	LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi));
2901
2902	new_sr \|= AC97_SR_LVBCI \| AC97_SR_DCH \| AC97_SR_CELV;
2903	pThis->bup_flag = (pRegs->bd.ctl_len & AC97_BD_BUP) ? BUP_LAST : 0;
2904
2905	rc = VINF_EOF;
2906	}
2907	else
2908	{
2909	pRegs->civ = pRegs->piv;
2910	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2911	ichac97R3StreamFetchBDLE(pThis, pStream);
2912	}
2913
2914	ichac97StreamUpdateSR(pThis, pStream, new_sr);
2915	}
2916
2917	if (/* All data processed? */
2918	rc == VINF_EOF
2919	/* ... or an error occurred? */
2920	\|\| RT_FAILURE(rc))
2921	{
2922	break;
2923	}
2924	}
2925
2926	ichac97R3StreamUnlock(pStream);
2927
2928	LogFlowFuncLeaveRC(rc);
2929	return rc;
2930	}
2931
2932	#endif /* IN_RING3 */
2933
2934
2935	/**
2936	* Port I/O Handler for IN operations.
2937	*
2938	* @returns VINF_SUCCESS or VINF_EM_*.
2939	* @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
2940	*
2941	* @param pDevIns The device instance.
2942	* @param pvUser User argument.
2943	* @param uPort Port number used for the IN operation.
2944	* @param pu32Val Where to store the result. This is always a 32-bit
2945	* variable regardless of what @a cbVal might say.
2946	* @param cbVal Number of bytes read.
2947	*/
2948	PDMBOTHCBDECL(int) ichac97IOPortNABMRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32Val, unsigned cbVal)
2949	{
2950	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2951	RT_NOREF(pvUser);
2952
2953	DEVAC97_LOCK_RETURN(pThis, VINF_IOM_R3_IOPORT_READ);
2954
2955	/* Get the index of the NABMBAR port. */
2956	const uint32_t uPortIdx = uPort - pThis->IOPortBase[1];
2957
2958	PAC97STREAM pStream = NULL;
2959	PAC97BMREGS pRegs = NULL;
2960
2961	if (AC97_PORT2IDX(uPortIdx) < AC97_MAX_STREAMS)
2962	{
2963	pStream = &pThis->aStreams[AC97_PORT2IDX(uPortIdx)];
2964	AssertPtr(pStream);
2965	pRegs = &pStream->Regs;
2966	}
2967
2968	int rc = VINF_SUCCESS;
2969
2970	switch (cbVal)
2971	{
2972	case 1:
2973	{
2974	switch (uPortIdx)
2975	{
2976	case AC97_CAS:
2977	/* Codec Access Semaphore Register */
2978	Log3Func(("CAS %d\n", pThis->cas));
2979	*pu32Val = pThis->cas;
2980	pThis->cas = 1;
2981	break;
2982	case PI_CIV:
2983	case PO_CIV:
2984	case MC_CIV:
2985	/* Current Index Value Register */
2986	*pu32Val = pRegs->civ;
2987	Log3Func(("CIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2988	break;
2989	case PI_LVI:
2990	case PO_LVI:
2991	case MC_LVI:
2992	/* Last Valid Index Register */
2993	*pu32Val = pRegs->lvi;
2994	Log3Func(("LVI[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2995	break;
2996	case PI_PIV:
2997	case PO_PIV:
2998	case MC_PIV:
2999	/* Prefetched Index Value Register */
3000	*pu32Val = pRegs->piv;
3001	Log3Func(("PIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
3002	break;
3003	case PI_CR:
3004	case PO_CR:
3005	case MC_CR:
3006	/* Control Register */
3007	*pu32Val = pRegs->cr;
3008	Log3Func(("CR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
3009	break;
3010	case PI_SR:
3011	case PO_SR:
3012	case MC_SR:
3013	/* Status Register (lower part) */
3014	*pu32Val = RT_LO_U8(pRegs->sr);
3015	Log3Func(("SRb[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
3016	break;
3017	default:
3018	*pu32Val = UINT32_MAX;
3019	LogFunc(("U nabm readb %#x -> %#x\n", uPort, *pu32Val));
3020	break;
3021	}
3022	break;
3023	}
3024
3025	case 2:
3026	{
3027	switch (uPortIdx)
3028	{
3029	case PI_SR:
3030	case PO_SR:
3031	case MC_SR:
3032	/* Status Register */
3033	*pu32Val = pRegs->sr;
3034	Log3Func(("SR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
3035	break;
3036	case PI_PICB:
3037	case PO_PICB:
3038	case MC_PICB:
3039	/* Position in Current Buffer */
3040	*pu32Val = pRegs->picb;
3041	Log3Func(("PICB[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
3042	break;
3043	default:
3044	*pu32Val = UINT32_MAX;
3045	LogFunc(("U nabm readw %#x -> %#x\n", uPort, *pu32Val));
3046	break;
3047	}
3048	break;
3049	}
3050
3051	case 4:
3052	{
3053	switch (uPortIdx)
3054	{
3055	case PI_BDBAR:
3056	case PO_BDBAR:
3057	case MC_BDBAR:
3058	/* Buffer Descriptor Base Address Register */
3059	*pu32Val = pRegs->bdbar;
3060	Log3Func(("BMADDR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
3061	break;
3062	case PI_CIV:
3063	case PO_CIV:
3064	case MC_CIV:
3065	/* 32-bit access: Current Index Value Register +
3066	* Last Valid Index Register +
3067	* Status Register */
3068	pu32Val = pRegs->civ \| (pRegs->lvi << 8) \| (pRegs->sr << 16); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
3069	Log3Func(("CIV LVI SR[%d] -> %#x, %#x, %#x\n",
3070	AC97_PORT2IDX(uPortIdx), pRegs->civ, pRegs->lvi, pRegs->sr));
3071	break;
3072	case PI_PICB:
3073	case PO_PICB:
3074	case MC_PICB:
3075	/* 32-bit access: Position in Current Buffer Register +
3076	* Prefetched Index Value Register +
3077	* Control Register */
3078	pu32Val = pRegs->picb \| (pRegs->piv << 16) \| (pRegs->cr << 24); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
3079	Log3Func(("PICB PIV CR[%d] -> %#x %#x %#x %#x\n",
3080	AC97_PORT2IDX(uPortIdx), *pu32Val, pRegs->picb, pRegs->piv, pRegs->cr));
3081	break;
3082	case AC97_GLOB_CNT:
3083	/* Global Control */
3084	*pu32Val = pThis->glob_cnt;
3085	Log3Func(("glob_cnt -> %#x\n", *pu32Val));
3086	break;
3087	case AC97_GLOB_STA:
3088	/* Global Status */
3089	*pu32Val = pThis->glob_sta \| AC97_GS_S0CR;
3090	Log3Func(("glob_sta -> %#x\n", *pu32Val));
3091	break;
3092	default:
3093	*pu32Val = UINT32_MAX;
3094	LogFunc(("U nabm readl %#x -> %#x\n", uPort, *pu32Val));
3095	break;
3096	}
3097	break;
3098	}
3099
3100	default:
3101	{
3102	AssertFailed();
3103	rc = VERR_IOM_IOPORT_UNUSED;
3104	}
3105	}
3106
3107	DEVAC97_UNLOCK(pThis);
3108
3109	return rc;
3110	}
3111
3112	/**
3113	* Port I/O Handler for OUT operations.
3114	*
3115	* @returns VINF_SUCCESS or VINF_EM_*.
3116	*
3117	* @param pDevIns The device instance.
3118	* @param pvUser User argument.
3119	* @param uPort Port number used for the OUT operation.
3120	* @param u32Val The value to output.
3121	* @param cbVal The value size in bytes.
3122	*/
3123	PDMBOTHCBDECL(int) ichac97IOPortNABMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32Val, unsigned cbVal)
3124	{
3125	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3126	RT_NOREF(pvUser);
3127
3128	/* Get the index of the NABMBAR register. */
3129	const uint32_t uPortIdx = uPort - pThis->IOPortBase[1];
3130
3131	PAC97STREAM pStream = NULL;
3132	PAC97BMREGS pRegs = NULL;
3133
3134	if (AC97_PORT2IDX(uPortIdx) < AC97_MAX_STREAMS)
3135	{
3136	pStream = &pThis->aStreams[AC97_PORT2IDX(uPortIdx)];
3137	AssertPtr(pStream);
3138	pRegs = &pStream->Regs;
3139
3140	DEVAC97_LOCK_BOTH_RETURN(pThis, pStream->u8SD, VINF_IOM_R3_IOPORT_WRITE);
3141	}
3142
3143	int rc = VINF_SUCCESS;
3144	switch (cbVal)
3145	{
3146	case 1:
3147	{
3148	switch (uPortIdx)
3149	{
3150	/*
3151	* Last Valid Index.
3152	*/
3153	case PI_LVI:
3154	case PO_LVI:
3155	case MC_LVI:
3156	{
3157	AssertPtr(pStream);
3158	AssertPtr(pRegs);
3159	if ( (pRegs->cr & AC97_CR_RPBM)
3160	&& (pRegs->sr & AC97_SR_DCH))
3161	{
3162	#ifdef IN_RING3
3163	pRegs->sr &= ~(AC97_SR_DCH \| AC97_SR_CELV);
3164	pRegs->civ = pRegs->piv;
3165	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
3166	#else
3167	rc = VINF_IOM_R3_IOPORT_WRITE;
3168	#endif
3169	}
3170	pRegs->lvi = u32Val % AC97_MAX_BDLE;
3171	Log3Func(("[SD%RU8] LVI <- %#x\n", pStream->u8SD, u32Val));
3172	break;
3173	}
3174
3175	/*
3176	* Control Registers.
3177	*/
3178	case PI_CR:
3179	case PO_CR:
3180	case MC_CR:
3181	{
3182	AssertPtr(pStream);
3183	AssertPtr(pRegs);
3184	#ifdef IN_RING3
3185	Log3Func(("[SD%RU8] CR <- %#x (cr %#x)\n", pStream->u8SD, u32Val, pRegs->cr));
3186	if (u32Val & AC97_CR_RR) /* Busmaster reset. */
3187	{
3188	Log3Func(("[SD%RU8] Reset\n", pStream->u8SD));
3189
3190	/* Make sure that Run/Pause Bus Master bit (RPBM) is cleared (0). */
3191	Assert((pRegs->cr & AC97_CR_RPBM) == 0);
3192
3193	ichac97R3StreamEnable(pThis, pStream, false /* fEnable */);
3194	ichac97R3StreamReset(pThis, pStream);
3195
3196	ichac97StreamUpdateSR(pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */
3197	}
3198	else
3199	{
3200	pRegs->cr = u32Val & AC97_CR_VALID_MASK;
3201
3202	if (!(pRegs->cr & AC97_CR_RPBM))
3203	{
3204	Log3Func(("[SD%RU8] Disable\n", pStream->u8SD));
3205
3206	ichac97R3StreamEnable(pThis, pStream, false /* fEnable */);
3207
3208	pRegs->sr \|= AC97_SR_DCH;
3209	}
3210	else
3211	{
3212	Log3Func(("[SD%RU8] Enable\n", pStream->u8SD));
3213
3214	pRegs->civ = pRegs->piv;
3215	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
3216
3217	pRegs->sr &= ~AC97_SR_DCH;
3218
3219	/* Fetch the initial BDLE descriptor. */
3220	ichac97R3StreamFetchBDLE(pThis, pStream);
3221	# ifdef LOG_ENABLED
3222	ichac97R3BDLEDumpAll(pThis, pStream->Regs.bdbar, pStream->Regs.lvi + 1);
3223	# endif
3224	ichac97R3StreamEnable(pThis, pStream, true /* fEnable */);
3225
3226	/* Arm the timer for this stream. */
3227	int rc2 = ichac97TimerSet(pThis, pStream,
3228	TMTimerGet((pThis)->DEVAC97_CTX_SUFF_SD(pTimer, pStream->u8SD)) + pStream->State.cTransferTicks,
3229	false /* fForce */);
3230	AssertRC(rc2);
3231	}
3232	}
3233	#else /* !IN_RING3 */
3234	rc = VINF_IOM_R3_IOPORT_WRITE;
3235	#endif
3236	break;
3237	}
3238
3239	/*
3240	* Status Registers.
3241	*/
3242	case PI_SR:
3243	case PO_SR:
3244	case MC_SR:
3245	{
3246	ichac97StreamWriteSR(pThis, pStream, u32Val);
3247	break;
3248	}
3249
3250	default:
3251	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
3252	break;
3253	}
3254	break;
3255	}
3256
3257	case 2:
3258	{
3259	switch (uPortIdx)
3260	{
3261	case PI_SR:
3262	case PO_SR:
3263	case MC_SR:
3264	ichac97StreamWriteSR(pThis, pStream, u32Val);
3265	break;
3266	default:
3267	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
3268	break;
3269	}
3270	break;
3271	}
3272
3273	case 4:
3274	{
3275	switch (uPortIdx)
3276	{
3277	case PI_BDBAR:
3278	case PO_BDBAR:
3279	case MC_BDBAR:
3280	AssertPtr(pStream);
3281	AssertPtr(pRegs);
3282	/* Buffer Descriptor list Base Address Register */
3283	pRegs->bdbar = u32Val & ~3;
3284	Log3Func(("[SD%RU8] BDBAR <- %#x (bdbar %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->bdbar));
3285	break;
3286	case AC97_GLOB_CNT:
3287	/* Global Control */
3288	if (u32Val & AC97_GC_WR)
3289	ichac97WarmReset(pThis);
3290	if (u32Val & AC97_GC_CR)
3291	ichac97ColdReset(pThis);
3292	if (!(u32Val & (AC97_GC_WR \| AC97_GC_CR)))
3293	pThis->glob_cnt = u32Val & AC97_GC_VALID_MASK;
3294	Log3Func(("glob_cnt <- %#x (glob_cnt %#x)\n", u32Val, pThis->glob_cnt));
3295	break;
3296	case AC97_GLOB_STA:
3297	/* Global Status */
3298	pThis->glob_sta &= ~(u32Val & AC97_GS_WCLEAR_MASK);
3299	pThis->glob_sta \|= (u32Val & ~(AC97_GS_WCLEAR_MASK \| AC97_GS_RO_MASK)) & AC97_GS_VALID_MASK;
3300	Log3Func(("glob_sta <- %#x (glob_sta %#x)\n", u32Val, pThis->glob_sta));
3301	break;
3302	default:
3303	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
3304	break;
3305	}
3306	break;
3307	}
3308
3309	default:
3310	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
3311	break;
3312	}
3313
3314	if (pStream)
3315	DEVAC97_UNLOCK_BOTH(pThis, pStream->u8SD);
3316
3317	return rc;
3318	}
3319
3320	/**
3321	* Port I/O Handler for IN operations.
3322	*
3323	* @returns VINF_SUCCESS or VINF_EM_*.
3324	* @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
3325	*
3326	* @param pDevIns The device instance.
3327	* @param pvUser User argument.
3328	* @param uPort Port number used for the IN operation.
3329	* @param pu32Val Where to store the result. This is always a 32-bit
3330	* variable regardless of what @a cbVal might say.
3331	* @param cbVal Number of bytes read.
3332	*/
3333	PDMBOTHCBDECL(int) ichac97IOPortNAMRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32Val, unsigned cbVal)
3334	{
3335	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3336	RT_NOREF(pvUser);
3337
3338	DEVAC97_LOCK_RETURN(pThis, VINF_IOM_R3_IOPORT_READ);
3339
3340	int rc = VINF_SUCCESS;
3341
3342	uint32_t index = uPort - pThis->IOPortBase[0];
3343	Assert(index < 256);
3344
3345	switch (cbVal)
3346	{
3347	case 1:
3348	{
3349	LogRel2(("AC97: Warning: Unimplemented read (%u byte) port=%#x, idx=%RU32\n", cbVal, uPort, index));
3350	pThis->cas = 0;
3351	*pu32Val = UINT32_MAX;
3352	break;
3353	}
3354
3355	case 2:
3356	{
3357	pThis->cas = 0;
3358	*pu32Val = ichac97MixerGet(pThis, index);
3359	break;
3360	}
3361
3362	case 4:
3363	{
3364	LogRel2(("AC97: Warning: Unimplemented read (%u byte) port=%#x, idx=%RU32\n", cbVal, uPort, index));
3365	pThis->cas = 0;
3366	*pu32Val = UINT32_MAX;
3367	break;
3368	}
3369
3370	default:
3371	{
3372	AssertFailed();
3373	rc = VERR_IOM_IOPORT_UNUSED;
3374	}
3375	}
3376
3377	DEVAC97_UNLOCK(pThis);
3378
3379	return rc;
3380	}
3381
3382	/**
3383	* Port I/O Handler for OUT operations.
3384	*
3385	* @returns VINF_SUCCESS or VINF_EM_*.
3386	*
3387	* @param pDevIns The device instance.
3388	* @param pvUser User argument.
3389	* @param uPort Port number used for the OUT operation.
3390	* @param u32Val The value to output.
3391	* @param cbVal The value size in bytes.
3392	* @remarks Caller enters the device critical section.
3393	*/
3394	PDMBOTHCBDECL(int) ichac97IOPortNAMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32Val, unsigned cbVal)
3395	{
3396	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3397	RT_NOREF(pvUser);
3398
3399	DEVAC97_LOCK_RETURN(pThis, VINF_IOM_R3_IOPORT_WRITE);
3400
3401	uint32_t uPortIdx = uPort - pThis->IOPortBase[0];
3402
3403	int rc = VINF_SUCCESS;
3404	switch (cbVal)
3405	{
3406	case 1:
3407	{
3408	LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
3409	pThis->cas = 0;
3410	break;
3411	}
3412
3413	case 2:
3414	{
3415	pThis->cas = 0;
3416	switch (uPortIdx)
3417	{
3418	case AC97_Reset:
3419	#ifdef IN_RING3
3420	ichac97R3Reset(pThis->CTX_SUFF(pDevIns));
3421	#else
3422	rc = VINF_IOM_R3_IOPORT_WRITE;
3423	#endif
3424	break;
3425	case AC97_Powerdown_Ctrl_Stat:
3426	u32Val &= ~0xf;
3427	u32Val \|= ichac97MixerGet(pThis, uPortIdx) & 0xf;
3428	ichac97MixerSet(pThis, uPortIdx, u32Val);
3429	break;
3430	case AC97_Master_Volume_Mute:
3431	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3432	{
3433	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_LOSEL)
3434	break; /* Register controls surround (rear), do nothing. */
3435	}
3436	#ifdef IN_RING3
3437	ichac97R3MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
3438	#else
3439	rc = VINF_IOM_R3_IOPORT_WRITE;
3440	#endif
3441	break;
3442	case AC97_Headphone_Volume_Mute:
3443	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3444	{
3445	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
3446	{
3447	/* Register controls PCM (front) outputs. */
3448	#ifdef IN_RING3
3449	ichac97R3MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
3450	#else
3451	rc = VINF_IOM_R3_IOPORT_WRITE;
3452	#endif
3453	}
3454	}
3455	break;
3456	case AC97_PCM_Out_Volume_Mute:
3457	#ifdef IN_RING3
3458	ichac97R3MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_FRONT, u32Val);
3459	#else
3460	rc = VINF_IOM_R3_IOPORT_WRITE;
3461	#endif
3462	break;
3463	case AC97_Line_In_Volume_Mute:
3464	#ifdef IN_RING3
3465	ichac97R3MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
3466	#else
3467	rc = VINF_IOM_R3_IOPORT_WRITE;
3468	#endif
3469	break;
3470	case AC97_Record_Select:
3471	#ifdef IN_RING3
3472	ichac97R3MixerRecordSelect(pThis, u32Val);
3473	#else
3474	rc = VINF_IOM_R3_IOPORT_WRITE;
3475	#endif
3476	break;
3477	case AC97_Record_Gain_Mute:
3478	#ifdef IN_RING3
3479	/* Newer Ubuntu guests rely on that when controlling gain and muting
3480	* the recording (capturing) levels. */
3481	ichac97R3MixerSetGain(pThis, uPortIdx, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
3482	#else
3483	rc = VINF_IOM_R3_IOPORT_WRITE;
3484	#endif
3485	break;
3486	case AC97_Record_Gain_Mic_Mute:
3487	#ifdef IN_RING3
3488	/* Ditto; see note above. */
3489	ichac97R3MixerSetGain(pThis, uPortIdx, PDMAUDIOMIXERCTL_MIC_IN, u32Val);
3490	#else
3491	rc = VINF_IOM_R3_IOPORT_WRITE;
3492	#endif
3493	break;
3494	case AC97_Vendor_ID1:
3495	case AC97_Vendor_ID2:
3496	LogFunc(("Attempt to write vendor ID to %#x\n", u32Val));
3497	break;
3498	case AC97_Extended_Audio_ID:
3499	LogFunc(("Attempt to write extended audio ID to %#x\n", u32Val));
3500	break;
3501	case AC97_Extended_Audio_Ctrl_Stat:
3502	#ifdef IN_RING3
3503	/*
3504	* Handle VRA bits.
3505	*/
3506	if (!(u32Val & AC97_EACS_VRA)) /* Check if VRA bit is not set. */
3507	{
3508	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 0xbb80); /* Set default (48000 Hz). */
3509	ichac97R3StreamReOpen(pThis, &pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX], true /* fForce */);
3510
3511	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate, 0xbb80); /* Set default (48000 Hz). */
3512	ichac97R3StreamReOpen(pThis, &pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX], true /* fForce */);
3513	}
3514	else
3515	LogRel2(("AC97: Variable rate audio (VRA) is not supported\n"));
3516
3517	/*
3518	* Handle VRM bits.
3519	*/
3520	if (!(u32Val & AC97_EACS_VRM)) /* Check if VRM bit is not set. */
3521	{
3522	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 0xbb80); /* Set default (48000 Hz). */
3523	ichac97R3StreamReOpen(pThis, &pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX], true /* fForce */);
3524	}
3525	else
3526	LogRel2(("AC97: Variable rate microphone audio (VRM) is not supported\n"));
3527
3528	LogRel2(("AC97: Setting extended audio control to %#x\n", u32Val));
3529	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, u32Val);
3530	#else /* !IN_RING3 */
3531	rc = VINF_IOM_R3_IOPORT_WRITE;
3532	#endif
3533	break;
3534	case AC97_PCM_Front_DAC_Rate: /* Output slots 3, 4, 6. */
3535	#ifdef IN_RING3
3536	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
3537	{
3538	LogRel2(("AC97: Setting front DAC rate to 0x%x\n", u32Val));
3539	ichac97MixerSet(pThis, uPortIdx, u32Val);
3540	ichac97R3StreamReOpen(pThis, &pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX], true /* fForce */);
3541	}
3542	else
3543	LogRel2(("AC97: Setting front DAC rate (0x%x) when VRA is not set is forbidden, ignoring\n", u32Val));
3544	#else
3545	rc = VINF_IOM_R3_IOPORT_WRITE;
3546	#endif
3547	break;
3548	case AC97_MIC_ADC_Rate: /* Input slot 6. */
3549	#ifdef IN_RING3
3550	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRM)
3551	{
3552	LogRel2(("AC97: Setting microphone ADC rate to 0x%x\n", u32Val));
3553	ichac97MixerSet(pThis, uPortIdx, u32Val);
3554	ichac97R3StreamReOpen(pThis, &pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX], true /* fForce */);
3555	}
3556	else
3557	LogRel2(("AC97: Setting microphone ADC rate (0x%x) when VRM is not set is forbidden, ignoring\n",
3558	u32Val));
3559	#else
3560	rc = VINF_IOM_R3_IOPORT_WRITE;
3561	#endif
3562	break;
3563	case AC97_PCM_LR_ADC_Rate: /* Input slots 3, 4. */
3564	#ifdef IN_RING3
3565	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
3566	{
3567	LogRel2(("AC97: Setting line-in ADC rate to 0x%x\n", u32Val));
3568	ichac97MixerSet(pThis, uPortIdx, u32Val);
3569	ichac97R3StreamReOpen(pThis, &pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX], true /* fForce */);
3570	}
3571	else
3572	LogRel2(("AC97: Setting line-in ADC rate (0x%x) when VRA is not set is forbidden, ignoring\n", u32Val));
3573	#else
3574	rc = VINF_IOM_R3_IOPORT_WRITE;
3575	#endif
3576	break;
3577	default:
3578	LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
3579	ichac97MixerSet(pThis, uPortIdx, u32Val);
3580	break;
3581	}
3582	break;
3583	}
3584
3585	case 4:
3586	{
3587	LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
3588	pThis->cas = 0;
3589	break;
3590	}
3591
3592	default:
3593	AssertMsgFailed(("Unhandled NAMWrite port=%#x, cbVal=%u u32Val=%#x\n", uPort, cbVal, u32Val));
3594	break;
3595	}
3596
3597	DEVAC97_UNLOCK(pThis);
3598
3599	return rc;
3600	}
3601
3602	#ifdef IN_RING3
3603
3604	/**
3605	* @callback_method_impl{FNPCIIOREGIONMAP}
3606	*/
3607	static DECLCALLBACK(int) ichac97R3IOPortMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
3608	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
3609	{
3610	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3611	RTIOPORT Port = (RTIOPORT)GCPhysAddress;
3612	RT_NOREF(pPciDev, cb, enmType);
3613
3614	Assert(enmType == PCI_ADDRESS_SPACE_IO);
3615	Assert(cb >= 0x20);
3616	AssertReturn(iRegion <= 1, VERR_INVALID_PARAMETER); /* We support 2 regions max. at the moment. */
3617	Assert(pPciDev == pDevIns->apPciDevs[0]);
3618
3619
3620	int rc;
3621	if (iRegion == 0)
3622	{
3623	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 256, NULL, ichac97IOPortNAMWrite, ichac97IOPortNAMRead,
3624	NULL, NULL, "ICHAC97 NAM");
3625	AssertRCReturn(rc, rc);
3626	if (pThis->fRZEnabled)
3627	{
3628	rc = PDMDevHlpIOPortRegisterR0(pDevIns, Port, 256, NIL_RTR0PTR, "ichac97IOPortNAMWrite", "ichac97IOPortNAMRead",
3629	NULL, NULL, "ICHAC97 NAM");
3630	AssertRCReturn(rc, rc);
3631	rc = PDMDevHlpIOPortRegisterRC(pDevIns, Port, 256, NIL_RTRCPTR, "ichac97IOPortNAMWrite", "ichac97IOPortNAMRead",
3632	NULL, NULL, "ICHAC97 NAM");
3633	AssertRCReturn(rc, rc);
3634	}
3635	}
3636	else
3637	{
3638	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 64, NULL, ichac97IOPortNABMWrite, ichac97IOPortNABMRead,
3639	NULL, NULL, "ICHAC97 NABM");
3640	AssertRCReturn(rc, rc);
3641	if (pThis->fRZEnabled)
3642	{
3643	rc = PDMDevHlpIOPortRegisterR0(pDevIns, Port, 64, NIL_RTR0PTR, "ichac97IOPortNABMWrite", "ichac97IOPortNABMRead",
3644	NULL, NULL, "ICHAC97 NABM");
3645	AssertRCReturn(rc, rc);
3646	rc = PDMDevHlpIOPortRegisterRC(pDevIns, Port, 64, NIL_RTRCPTR, "ichac97IOPortNABMWrite", "ichac97IOPortNABMRead",
3647	NULL, NULL, "ICHAC97 NABM");
3648	AssertRCReturn(rc, rc);
3649
3650	}
3651	}
3652
3653	pThis->IOPortBase[iRegion] = Port;
3654	return VINF_SUCCESS;
3655	}
3656
3657
3658	/**
3659	* Saves (serializes) an AC'97 stream using SSM.
3660	*
3661	* @returns IPRT status code.
3662	* @param pDevIns Device instance.
3663	* @param pSSM Saved state manager (SSM) handle to use.
3664	* @param pStream AC'97 stream to save.
3665	*/
3666	static int ichac97R3SaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
3667	{
3668	RT_NOREF(pDevIns);
3669	PAC97BMREGS pRegs = &pStream->Regs;
3670
3671	SSMR3PutU32(pSSM, pRegs->bdbar);
3672	SSMR3PutU8( pSSM, pRegs->civ);
3673	SSMR3PutU8( pSSM, pRegs->lvi);
3674	SSMR3PutU16(pSSM, pRegs->sr);
3675	SSMR3PutU16(pSSM, pRegs->picb);
3676	SSMR3PutU8( pSSM, pRegs->piv);
3677	SSMR3PutU8( pSSM, pRegs->cr);
3678	SSMR3PutS32(pSSM, pRegs->bd_valid);
3679	SSMR3PutU32(pSSM, pRegs->bd.addr);
3680	SSMR3PutU32(pSSM, pRegs->bd.ctl_len);
3681
3682	return VINF_SUCCESS;
3683	}
3684
3685	/**
3686	* @callback_method_impl{FNSSMDEVSAVEEXEC}
3687	*/
3688	static DECLCALLBACK(int) ichac97R3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3689	{
3690	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3691
3692	LogFlowFuncEnter();
3693
3694	SSMR3PutU32(pSSM, pThis->glob_cnt);
3695	SSMR3PutU32(pSSM, pThis->glob_sta);
3696	SSMR3PutU32(pSSM, pThis->cas);
3697
3698	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
3699	/* Note: The order the streams are loaded here is critical, so don't touch. */
3700	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3701	{
3702	int rc2 = ichac97R3SaveStream(pDevIns, pSSM, &pThis->aStreams[i]);
3703	AssertRC(rc2);
3704	}
3705
3706	SSMR3PutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3707
3708	uint8_t active[AC97SOUNDSOURCE_END_INDEX];
3709
3710	active[AC97SOUNDSOURCE_PI_INDEX] = ichac97R3StreamIsEnabled(pThis, &pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX]) ? 1 : 0;
3711	active[AC97SOUNDSOURCE_PO_INDEX] = ichac97R3StreamIsEnabled(pThis, &pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX]) ? 1 : 0;
3712	active[AC97SOUNDSOURCE_MC_INDEX] = ichac97R3StreamIsEnabled(pThis, &pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX]) ? 1 : 0;
3713
3714	SSMR3PutMem(pSSM, active, sizeof(active));
3715
3716	LogFlowFuncLeaveRC(VINF_SUCCESS);
3717	return VINF_SUCCESS;
3718	}
3719
3720	/**
3721	* Loads an AC'97 stream from SSM.
3722	*
3723	* @returns IPRT status code.
3724	* @param pSSM Saved state manager (SSM) handle to use.
3725	* @param pStream AC'97 stream to load.
3726	*/
3727	static int ichac97R3LoadStream(PSSMHANDLE pSSM, PAC97STREAM pStream)
3728	{
3729	PAC97BMREGS pRegs = &pStream->Regs;
3730
3731	SSMR3GetU32(pSSM, &pRegs->bdbar);
3732	SSMR3GetU8( pSSM, &pRegs->civ);
3733	SSMR3GetU8( pSSM, &pRegs->lvi);
3734	SSMR3GetU16(pSSM, &pRegs->sr);
3735	SSMR3GetU16(pSSM, &pRegs->picb);
3736	SSMR3GetU8( pSSM, &pRegs->piv);
3737	SSMR3GetU8( pSSM, &pRegs->cr);
3738	SSMR3GetS32(pSSM, &pRegs->bd_valid);
3739	SSMR3GetU32(pSSM, &pRegs->bd.addr);
3740	return SSMR3GetU32(pSSM, &pRegs->bd.ctl_len);
3741	}
3742
3743	/**
3744	* @callback_method_impl{FNSSMDEVLOADEXEC}
3745	*/
3746	static DECLCALLBACK(int) ichac97R3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3747	{
3748	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3749
3750	LogRel2(("ichac97LoadExec: uVersion=%RU32, uPass=0x%x\n", uVersion, uPass));
3751
3752	AssertMsgReturn (uVersion == AC97_SSM_VERSION, ("%RU32\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
3753	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
3754
3755	SSMR3GetU32(pSSM, &pThis->glob_cnt);
3756	SSMR3GetU32(pSSM, &pThis->glob_sta);
3757	SSMR3GetU32(pSSM, &pThis->cas);
3758
3759	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
3760	/* Note: The order the streams are loaded here is critical, so don't touch. */
3761	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3762	{
3763	int rc2 = ichac97R3LoadStream(pSSM, &pThis->aStreams[i]);
3764	AssertRCReturn(rc2, rc2);
3765	}
3766
3767	SSMR3GetMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3768
3769	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
3770	uint8_t uaStrmsActive[AC97SOUNDSOURCE_END_INDEX];
3771	int rc2 = SSMR3GetMem(pSSM, uaStrmsActive, sizeof(uaStrmsActive));
3772	AssertRCReturn(rc2, rc2);
3773
3774	ichac97R3MixerRecordSelect(pThis, ichac97MixerGet(pThis, AC97_Record_Select));
3775	ichac97R3MixerSetVolume(pThis, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, ichac97MixerGet(pThis, AC97_Master_Volume_Mute));
3776	ichac97R3MixerSetVolume(pThis, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, ichac97MixerGet(pThis, AC97_PCM_Out_Volume_Mute));
3777	ichac97R3MixerSetVolume(pThis, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, ichac97MixerGet(pThis, AC97_Line_In_Volume_Mute));
3778	ichac97R3MixerSetVolume(pThis, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN, ichac97MixerGet(pThis, AC97_Mic_Volume_Mute));
3779	ichac97R3MixerSetGain(pThis, AC97_Record_Gain_Mic_Mute, PDMAUDIOMIXERCTL_MIC_IN, ichac97MixerGet(pThis, AC97_Record_Gain_Mic_Mute));
3780	ichac97R3MixerSetGain(pThis, AC97_Record_Gain_Mute, PDMAUDIOMIXERCTL_LINE_IN, ichac97MixerGet(pThis, AC97_Record_Gain_Mute));
3781	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3782	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
3783	ichac97R3MixerSetVolume(pThis, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER,
3784	ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute));
3785
3786	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
3787	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3788	{
3789	const bool fEnable = RT_BOOL(uaStrmsActive[i]);
3790	const PAC97STREAM pStream = &pThis->aStreams[i];
3791
3792	rc2 = ichac97R3StreamEnable(pThis, pStream, fEnable);
3793	if ( fEnable
3794	&& RT_SUCCESS(rc2))
3795	{
3796	/* Re-arm the timer for this stream. */
3797	rc2 = ichac97TimerSet(pThis, pStream,
3798	TMTimerGet((pThis)->DEVAC97_CTX_SUFF_SD(pTimer, pStream->u8SD)) + pStream->State.cTransferTicks,
3799	false /* fForce */);
3800	}
3801
3802	AssertRC(rc2);
3803	/* Keep going. */
3804	}
3805
3806	pThis->bup_flag = 0;
3807	pThis->last_samp = 0;
3808
3809	return VINF_SUCCESS;
3810	}
3811
3812
3813	/**
3814	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3815	*/
3816	static DECLCALLBACK(void ) ichac97R3QueryInterface(struct PDMIBASE pInterface, const char *pszIID)
3817	{
3818	PAC97STATE pThis = RT_FROM_MEMBER(pInterface, AC97STATE, IBase);
3819	Assert(&pThis->IBase == pInterface);
3820
3821	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3822	return NULL;
3823	}
3824
3825
3826	/**
3827	* Powers off the device.
3828	*
3829	* @param pDevIns Device instance to power off.
3830	*/
3831	static DECLCALLBACK(void) ichac97R3PowerOff(PPDMDEVINS pDevIns)
3832	{
3833	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3834
3835	LogRel2(("AC97: Powering off ...\n"));
3836
3837	/* Note: Involves mixer stream / sink destruction, so also do this here
3838	* instead of in ichac97R3Destruct(). */
3839	ichac97R3StreamsDestroy(pThis);
3840
3841	/**
3842	* Note: Destroy the mixer while powering off and not in ichac97R3Destruct,
3843	* giving the mixer the chance to release any references held to
3844	* PDM audio streams it maintains.
3845	*/
3846	if (pThis->pMixer)
3847	{
3848	AudioMixerDestroy(pThis->pMixer);
3849	pThis->pMixer = NULL;
3850	}
3851	}
3852
3853
3854	/**
3855	* @interface_method_impl{PDMDEVREG,pfnReset}
3856	*
3857	* @remarks The original sources didn't install a reset handler, but it seems to
3858	* make sense to me so we'll do it.
3859	*/
3860	static DECLCALLBACK(void) ichac97R3Reset(PPDMDEVINS pDevIns)
3861	{
3862	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3863
3864	LogRel(("AC97: Reset\n"));
3865
3866	/*
3867	* Reset the mixer too. The Windows XP driver seems to rely on
3868	* this. At least it wants to read the vendor id before it resets
3869	* the codec manually.
3870	*/
3871	ichac97R3MixerReset(pThis);
3872
3873	/*
3874	* Reset all streams.
3875	*/
3876	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3877	{
3878	ichac97R3StreamEnable(pThis, &pThis->aStreams[i], false /* fEnable */);
3879	ichac97R3StreamReset(pThis, &pThis->aStreams[i]);
3880	}
3881
3882	/*
3883	* Reset mixer sinks.
3884	*
3885	* Do the reset here instead of in ichac97R3StreamReset();
3886	* the mixer sink(s) might still have data to be processed when an audio stream gets reset.
3887	*/
3888	AudioMixerSinkReset(pThis->pSinkLineIn);
3889	AudioMixerSinkReset(pThis->pSinkMicIn);
3890	AudioMixerSinkReset(pThis->pSinkOut);
3891	}
3892
3893
3894	/**
3895	* Attach command, internal version.
3896	*
3897	* This is called to let the device attach to a driver for a specified LUN
3898	* during runtime. This is not called during VM construction, the device
3899	* constructor has to attach to all the available drivers.
3900	*
3901	* @returns VBox status code.
3902	* @param pThis AC'97 state.
3903	* @param uLUN The logical unit which is being attached.
3904	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3905	* @param ppDrv Attached driver instance on success. Optional.
3906	*/
3907	static int ichac97R3AttachInternal(PAC97STATE pThis, unsigned uLUN, uint32_t fFlags, PAC97DRIVER *ppDrv)
3908	{
3909	RT_NOREF(fFlags);
3910
3911	/*
3912	* Attach driver.
3913	*/
3914	char *pszDesc;
3915	if (RTStrAPrintf(&pszDesc, "Audio driver port (AC'97) for LUN #%u", uLUN) <= 0)
3916	AssertLogRelFailedReturn(VERR_NO_MEMORY);
3917
3918	PPDMIBASE pDrvBase;
3919	int rc = PDMDevHlpDriverAttach(pThis->pDevInsR3, uLUN,
3920	&pThis->IBase, &pDrvBase, pszDesc);
3921	if (RT_SUCCESS(rc))
3922	{
3923	PAC97DRIVER pDrv = (PAC97DRIVER)RTMemAllocZ(sizeof(AC97DRIVER));
3924	if (pDrv)
3925	{
3926	pDrv->pDrvBase = pDrvBase;
3927	pDrv->pConnector = PDMIBASE_QUERY_INTERFACE(pDrvBase, PDMIAUDIOCONNECTOR);
3928	AssertMsg(pDrv->pConnector != NULL, ("Configuration error: LUN #%u has no host audio interface, rc=%Rrc\n", uLUN, rc));
3929	pDrv->pAC97State = pThis;
3930	pDrv->uLUN = uLUN;
3931	pDrv->pszDesc = pszDesc;
3932
3933	/*
3934	* For now we always set the driver at LUN 0 as our primary
3935	* host backend. This might change in the future.
3936	*/
3937	if (pDrv->uLUN == 0)
3938	pDrv->fFlags \|= PDMAUDIODRVFLAGS_PRIMARY;
3939
3940	LogFunc(("LUN#%RU8: pCon=%p, drvFlags=0x%x\n", uLUN, pDrv->pConnector, pDrv->fFlags));
3941
3942	/* Attach to driver list if not attached yet. */
3943	if (!pDrv->fAttached)
3944	{
3945	RTListAppend(&pThis->lstDrv, &pDrv->Node);
3946	pDrv->fAttached = true;
3947	}
3948
3949	if (ppDrv)
3950	*ppDrv = pDrv;
3951	}
3952	else
3953	rc = VERR_NO_MEMORY;
3954	}
3955	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3956	LogFunc(("No attached driver for LUN #%u\n", uLUN));
3957
3958	if (RT_FAILURE(rc))
3959	{
3960	/* Only free this string on failure;
3961	* must remain valid for the live of the driver instance. */
3962	RTStrFree(pszDesc);
3963	}
3964
3965	LogFunc(("uLUN=%u, fFlags=0x%x, rc=%Rrc\n", uLUN, fFlags, rc));
3966	return rc;
3967	}
3968
3969	/**
3970	* Detach command, internal version.
3971	*
3972	* This is called to let the device detach from a driver for a specified LUN
3973	* during runtime.
3974	*
3975	* @returns VBox status code.
3976	* @param pThis AC'97 state.
3977	* @param pDrv Driver to detach from device.
3978	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3979	*/
3980	static int ichac97R3DetachInternal(PAC97STATE pThis, PAC97DRIVER pDrv, uint32_t fFlags)
3981	{
3982	RT_NOREF(fFlags);
3983
3984	/* First, remove the driver from our list and destory it's associated streams.
3985	* This also will un-set the driver as a recording source (if associated). */
3986	ichac97R3MixerRemoveDrv(pThis, pDrv);
3987
3988	/* Next, search backwards for a capable (attached) driver which now will be the
3989	* new recording source. */
3990	PDMAUDIODESTSOURCE dstSrc;
3991	PAC97DRIVER pDrvCur;
3992	RTListForEachReverse(&pThis->lstDrv, pDrvCur, AC97DRIVER, Node)
3993	{
3994	if (!pDrvCur->pConnector)
3995	continue;
3996
3997	PDMAUDIOBACKENDCFG Cfg;
3998	int rc2 = pDrvCur->pConnector->pfnGetConfig(pDrvCur->pConnector, &Cfg);
3999	if (RT_FAILURE(rc2))
4000	continue;
4001
4002	dstSrc.Source = PDMAUDIORECSOURCE_MIC;
4003	PAC97DRIVERSTREAM pDrvStrm = ichac97R3MixerGetDrvStream(pThis, pDrvCur, PDMAUDIODIR_IN, dstSrc);
4004	if ( pDrvStrm
4005	&& pDrvStrm->pMixStrm)
4006	{
4007	rc2 = AudioMixerSinkSetRecordingSource(pThis->pSinkMicIn, pDrvStrm->pMixStrm);
4008	if (RT_SUCCESS(rc2))
4009	LogRel2(("AC97: Set new recording source for 'Mic In' to '%s'\n", Cfg.szName));
4010	}
4011
4012	dstSrc.Source = PDMAUDIORECSOURCE_LINE;
4013	pDrvStrm = ichac97R3MixerGetDrvStream(pThis, pDrvCur, PDMAUDIODIR_IN, dstSrc);
4014	if ( pDrvStrm
4015	&& pDrvStrm->pMixStrm)
4016	{
4017	rc2 = AudioMixerSinkSetRecordingSource(pThis->pSinkLineIn, pDrvStrm->pMixStrm);
4018	if (RT_SUCCESS(rc2))
4019	LogRel2(("AC97: Set new recording source for 'Line In' to '%s'\n", Cfg.szName));
4020	}
4021	}
4022
4023	LogFunc(("uLUN=%u, fFlags=0x%x\n", pDrv->uLUN, fFlags));
4024	return VINF_SUCCESS;
4025	}
4026
4027	/**
4028	* @interface_method_impl{PDMDEVREG,pfnAttach}
4029	*/
4030	static DECLCALLBACK(int) ichac97R3Attach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
4031	{
4032	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
4033
4034	LogFunc(("uLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
4035
4036	DEVAC97_LOCK(pThis);
4037
4038	PAC97DRIVER pDrv;
4039	int rc2 = ichac97R3AttachInternal(pThis, uLUN, fFlags, &pDrv);
4040	if (RT_SUCCESS(rc2))
4041	rc2 = ichac97R3MixerAddDrv(pThis, pDrv);
4042
4043	if (RT_FAILURE(rc2))
4044	LogFunc(("Failed with %Rrc\n", rc2));
4045
4046	DEVAC97_UNLOCK(pThis);
4047
4048	return VINF_SUCCESS;
4049	}
4050
4051	/**
4052	* @interface_method_impl{PDMDEVREG,pfnDetach}
4053	*/
4054	static DECLCALLBACK(void) ichac97R3Detach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
4055	{
4056	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
4057
4058	LogFunc(("uLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
4059
4060	DEVAC97_LOCK(pThis);
4061
4062	PAC97DRIVER pDrv, pDrvNext;
4063	RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
4064	{
4065	if (pDrv->uLUN == uLUN)
4066	{
4067	int rc2 = ichac97R3DetachInternal(pThis, pDrv, fFlags);
4068	if (RT_SUCCESS(rc2))
4069	{
4070	RTStrFree(pDrv->pszDesc);
4071	RTMemFree(pDrv);
4072	pDrv = NULL;
4073	}
4074
4075	break;
4076	}
4077	}
4078
4079	DEVAC97_UNLOCK(pThis);
4080	}
4081
4082	/**
4083	* Re-attaches (replaces) a driver with a new driver.
4084	*
4085	* @returns VBox status code.
4086	* @param pThis Device instance.
4087	* @param pDrv Driver instance used for attaching to.
4088	* If NULL is specified, a new driver will be created and appended
4089	* to the driver list.
4090	* @param uLUN The logical unit which is being re-detached.
4091	* @param pszDriver New driver name to attach.
4092	*/
4093	static int ichac97R3ReattachInternal(PAC97STATE pThis, PAC97DRIVER pDrv, uint8_t uLUN, const char *pszDriver)
4094	{
4095	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
4096	AssertPtrReturn(pszDriver, VERR_INVALID_POINTER);
4097
4098	int rc;
4099
4100	if (pDrv)
4101	{
4102	rc = ichac97R3DetachInternal(pThis, pDrv, 0 /* fFlags */);
4103	if (RT_SUCCESS(rc))
4104	rc = PDMDevHlpDriverDetach(pThis->pDevInsR3, PDMIBASE_2_PDMDRV(pDrv->pDrvBase), 0 /* fFlags */);
4105
4106	if (RT_FAILURE(rc))
4107	return rc;
4108
4109	RTStrFree(pDrv->pszDesc);
4110	RTMemFree(pDrv);
4111	pDrv = NULL;
4112	}
4113
4114	PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
4115	PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
4116	PCFGMNODE pDev0 = CFGMR3GetChild(pRoot, "Devices/ichac97/0/");
4117
4118	/* Remove LUN branch. */
4119	CFGMR3RemoveNode(CFGMR3GetChildF(pDev0, "LUN#%u/", uLUN));
4120
4121	# define RC_CHECK() if (RT_FAILURE(rc)) { AssertReleaseRC(rc); break; }
4122
4123	do
4124	{
4125	PCFGMNODE pLunL0;
4126	rc = CFGMR3InsertNodeF(pDev0, &pLunL0, "LUN#%u/", uLUN); RC_CHECK();
4127	rc = CFGMR3InsertString(pLunL0, "Driver", "AUDIO"); RC_CHECK();
4128	rc = CFGMR3InsertNode(pLunL0, "Config/", NULL); RC_CHECK();
4129
4130	PCFGMNODE pLunL1, pLunL2;
4131	rc = CFGMR3InsertNode (pLunL0, "AttachedDriver/", &pLunL1); RC_CHECK();
4132	rc = CFGMR3InsertNode (pLunL1, "Config/", &pLunL2); RC_CHECK();
4133	rc = CFGMR3InsertString(pLunL1, "Driver", pszDriver); RC_CHECK();
4134
4135	rc = CFGMR3InsertString(pLunL2, "AudioDriver", pszDriver); RC_CHECK();
4136
4137	} while (0);
4138
4139	if (RT_SUCCESS(rc))
4140	rc = ichac97R3AttachInternal(pThis, uLUN, 0 /* fFlags /, NULL / ppDrv */);
4141
4142	LogFunc(("pThis=%p, uLUN=%u, pszDriver=%s, rc=%Rrc\n", pThis, uLUN, pszDriver, rc));
4143
4144	# undef RC_CHECK
4145
4146	return rc;
4147	}
4148
4149	/**
4150	* @interface_method_impl{PDMDEVREG,pfnRelocate}
4151	*/
4152	static DECLCALLBACK(void) ichac97R3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
4153	{
4154	NOREF(offDelta);
4155	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
4156	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4157
4158	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
4159	pThis->pTimerRC[i] = TMTimerRCPtr(pThis->pTimerR3[i]);
4160	}
4161
4162	/**
4163	* @interface_method_impl{PDMDEVREG,pfnDestruct}
4164	*/
4165	static DECLCALLBACK(int) ichac97R3Destruct(PPDMDEVINS pDevIns)
4166	{
4167	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns); /* this shall come first */
4168	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
4169
4170	LogFlowFuncEnter();
4171
4172	PAC97DRIVER pDrv, pDrvNext;
4173	RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
4174	{
4175	RTListNodeRemove(&pDrv->Node);
4176	RTMemFree(pDrv->pszDesc);
4177	RTMemFree(pDrv);
4178	}
4179
4180	/* Sanity. */
4181	Assert(RTListIsEmpty(&pThis->lstDrv));
4182
4183	return VINF_SUCCESS;
4184	}
4185
4186	/**
4187	* @interface_method_impl{PDMDEVREG,pfnConstruct}
4188	*/
4189	static DECLCALLBACK(int) ichac97R3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
4190	{
4191	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns); /* this shall come first */
4192	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
4193	Assert(iInstance == 0); RT_NOREF(iInstance);
4194
4195	/*
4196	* Initialize data so we can run the destructor without scewing up.
4197	*/
4198	pThis->pDevInsR3 = pDevIns;
4199	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
4200	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4201	pThis->IBase.pfnQueryInterface = ichac97R3QueryInterface;
4202	RTListInit(&pThis->lstDrv);
4203
4204	/*
4205	* Validations.
4206	*/
4207	if (!CFGMR3AreValuesValid(pCfg, "RZEnabled\0"
4208	"Codec\0"
4209	"TimerHz\0"
4210	"DebugEnabled\0"
4211	"DebugPathOut\0"))
4212	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4213	N_("Invalid configuration for the AC'97 device"));
4214
4215	/*
4216	* Read config data.
4217	*/
4218	int rc = CFGMR3QueryBoolDef(pCfg, "RZEnabled", &pThis->fRZEnabled, true);
4219	if (RT_FAILURE(rc))
4220	return PDMDEV_SET_ERROR(pDevIns, rc,
4221	N_("AC'97 configuration error: failed to read RCEnabled as boolean"));
4222
4223	char szCodec[20];
4224	rc = CFGMR3QueryStringDef(pCfg, "Codec", &szCodec[0], sizeof(szCodec), "STAC9700");
4225	if (RT_FAILURE(rc))
4226	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4227	N_("AC'97 configuration error: Querying \"Codec\" as string failed"));
4228
4229	rc = CFGMR3QueryU16Def(pCfg, "TimerHz", &pThis->uTimerHz, AC97_TIMER_HZ_DEFAULT /* Default value, if not set. */);
4230	if (RT_FAILURE(rc))
4231	return PDMDEV_SET_ERROR(pDevIns, rc,
4232	N_("AC'97 configuration error: failed to read Hertz (Hz) rate as unsigned integer"));
4233
4234	if (pThis->uTimerHz != AC97_TIMER_HZ_DEFAULT)
4235	LogRel(("AC97: Using custom device timer rate (%RU16Hz)\n", pThis->uTimerHz));
4236
4237	rc = CFGMR3QueryBoolDef(pCfg, "DebugEnabled", &pThis->Dbg.fEnabled, false);
4238	if (RT_FAILURE(rc))
4239	return PDMDEV_SET_ERROR(pDevIns, rc,
4240	N_("AC97 configuration error: failed to read debugging enabled flag as boolean"));
4241
4242	rc = CFGMR3QueryStringDef(pCfg, "DebugPathOut", pThis->Dbg.szOutPath, sizeof(pThis->Dbg.szOutPath),
4243	VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH);
4244	if (RT_FAILURE(rc))
4245	return PDMDEV_SET_ERROR(pDevIns, rc,
4246	N_("AC97 configuration error: failed to read debugging output path flag as string"));
4247
4248	if (!strlen(pThis->Dbg.szOutPath))
4249	RTStrPrintf(pThis->Dbg.szOutPath, sizeof(pThis->Dbg.szOutPath), VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH);
4250
4251	if (pThis->Dbg.fEnabled)
4252	LogRel2(("AC97: Debug output will be saved to '%s'\n", pThis->Dbg.szOutPath));
4253
4254	/*
4255	* The AD1980 codec (with corresponding PCI subsystem vendor ID) is whitelisted
4256	* in the Linux kernel; Linux makes no attempt to measure the data rate and assumes
4257	* 48 kHz rate, which is exactly what we need. Same goes for AD1981B.
4258	*/
4259	if (!strcmp(szCodec, "STAC9700"))
4260	pThis->uCodecModel = AC97_CODEC_STAC9700;
4261	else if (!strcmp(szCodec, "AD1980"))
4262	pThis->uCodecModel = AC97_CODEC_AD1980;
4263	else if (!strcmp(szCodec, "AD1981B"))
4264	pThis->uCodecModel = AC97_CODEC_AD1981B;
4265	else
4266	return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS,
4267	N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"), szCodec);
4268
4269	LogRel(("AC97: Using codec '%s'\n", szCodec));
4270
4271	/*
4272	* Use an own critical section for the device instead of the default
4273	* one provided by PDM. This allows fine-grained locking in combination
4274	* with TM when timer-specific stuff is being called in e.g. the MMIO handlers.
4275	*/
4276	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, RT_SRC_POS, "AC'97");
4277	AssertRCReturn(rc, rc);
4278
4279	rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
4280	AssertRCReturn(rc, rc);
4281
4282	/*
4283	* Initialize data (most of it anyway).
4284	*/
4285	/* PCI Device */
4286	PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
4287	PCIDevSetVendorId(pPciDev, 0x8086); /* 00 ro - intel. */ Assert(pPciDev->abConfig[0x00] == 0x86); Assert(pPciDev->abConfig[0x01] == 0x80);
4288	PCIDevSetDeviceId(pPciDev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */ Assert(pPciDev->abConfig[0x02] == 0x15); Assert(pPciDev->abConfig[0x03] == 0x24);
4289	PCIDevSetCommand(pPciDev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert(pPciDev->abConfig[0x04] == 0x00); Assert(pPciDev->abConfig[0x05] == 0x00);
4290	PCIDevSetStatus(pPciDev, VBOX_PCI_STATUS_DEVSEL_MEDIUM \| VBOX_PCI_STATUS_FAST_BACK); /* 06 rwc?,ro? - pcists. */ Assert(pPciDev->abConfig[0x06] == 0x80); Assert(pPciDev->abConfig[0x07] == 0x02);
4291	PCIDevSetRevisionId(pPciDev, 0x01); /* 08 ro - rid. */ Assert(pPciDev->abConfig[0x08] == 0x01);
4292	PCIDevSetClassProg(pPciDev, 0x00); /* 09 ro - pi. */ Assert(pPciDev->abConfig[0x09] == 0x00);
4293	PCIDevSetClassSub(pPciDev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert(pPciDev->abConfig[0x0a] == 0x01);
4294	PCIDevSetClassBase(pPciDev, 0x04); /* 0b ro - bcc; 04 == multimedia.*/Assert(pPciDev->abConfig[0x0b] == 0x04);
4295	PCIDevSetHeaderType(pPciDev, 0x00); /* 0e ro - headtyp. */ Assert(pPciDev->abConfig[0x0e] == 0x00);
4296	PCIDevSetBaseAddress(pPciDev, 0, /* 10 rw - nambar - native audio mixer base. */
4297	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pPciDev->abConfig[0x10] == 0x01); Assert(pPciDev->abConfig[0x11] == 0x00); Assert(pPciDev->abConfig[0x12] == 0x00); Assert(pPciDev->abConfig[0x13] == 0x00);
4298	PCIDevSetBaseAddress(pPciDev, 1, /* 14 rw - nabmbar - native audio bus mastering. */
4299	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pPciDev->abConfig[0x14] == 0x01); Assert(pPciDev->abConfig[0x15] == 0x00); Assert(pPciDev->abConfig[0x16] == 0x00); Assert(pPciDev->abConfig[0x17] == 0x00);
4300	PCIDevSetInterruptLine(pPciDev, 0x00); /* 3c rw. */ Assert(pPciDev->abConfig[0x3c] == 0x00);
4301	PCIDevSetInterruptPin(pPciDev, 0x01); /* 3d ro - INTA#. */ Assert(pPciDev->abConfig[0x3d] == 0x01);
4302
4303	if (pThis->uCodecModel == AC97_CODEC_AD1980)
4304	{
4305	PCIDevSetSubSystemVendorId(pPciDev, 0x1028); /* 2c ro - Dell.) */
4306	PCIDevSetSubSystemId(pPciDev, 0x0177); /* 2e ro. */
4307	}
4308	else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
4309	{
4310	PCIDevSetSubSystemVendorId(pPciDev, 0x1028); /* 2c ro - Dell.) */
4311	PCIDevSetSubSystemId(pPciDev, 0x01ad); /* 2e ro. */
4312	}
4313	else
4314	{
4315	PCIDevSetSubSystemVendorId(pPciDev, 0x8086); /* 2c ro - Intel.) */
4316	PCIDevSetSubSystemId(pPciDev, 0x0000); /* 2e ro. */
4317	}
4318
4319	/*
4320	* Register the PCI device, it's I/O regions, the timer and the
4321	* saved state item.
4322	*/
4323	rc = PDMDevHlpPCIRegister(pDevIns, pPciDev);
4324	if (RT_FAILURE(rc))
4325	return rc;
4326
4327	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 256, PCI_ADDRESS_SPACE_IO, ichac97R3IOPortMap);
4328	if (RT_FAILURE(rc))
4329	return rc;
4330
4331	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 64, PCI_ADDRESS_SPACE_IO, ichac97R3IOPortMap);
4332	if (RT_FAILURE(rc))
4333	return rc;
4334
4335	rc = PDMDevHlpSSMRegister(pDevIns, AC97_SSM_VERSION, sizeof(*pThis), ichac97R3SaveExec, ichac97R3LoadExec);
4336	if (RT_FAILURE(rc))
4337	return rc;
4338
4339	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
4340	LogRel(("AC97: Asynchronous I/O enabled\n"));
4341	# endif
4342
4343	/*
4344	* Attach driver.
4345	*/
4346	uint8_t uLUN;
4347	for (uLUN = 0; uLUN < UINT8_MAX; ++uLUN)
4348	{
4349	LogFunc(("Trying to attach driver for LUN #%RU8 ...\n", uLUN));
4350	rc = ichac97R3AttachInternal(pThis, uLUN, 0 /* fFlags /, NULL / ppDrv */);
4351	if (RT_FAILURE(rc))
4352	{
4353	if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4354	rc = VINF_SUCCESS;
4355	else if (rc == VERR_AUDIO_BACKEND_INIT_FAILED)
4356	{
4357	ichac97R3ReattachInternal(pThis, NULL /* pDrv */, uLUN, "NullAudio");
4358	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
4359	N_("Host audio backend initialization has failed. Selecting the NULL audio backend "
4360	"with the consequence that no sound is audible"));
4361	/* Attaching to the NULL audio backend will never fail. */
4362	rc = VINF_SUCCESS;
4363	}
4364	break;
4365	}
4366	}
4367
4368	LogFunc(("cLUNs=%RU8, rc=%Rrc\n", uLUN, rc));
4369
4370	if (RT_SUCCESS(rc))
4371	{
4372	rc = AudioMixerCreate("AC'97 Mixer", 0 /* uFlags */, &pThis->pMixer);
4373	if (RT_SUCCESS(rc))
4374	{
4375	rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Line In", AUDMIXSINKDIR_INPUT, &pThis->pSinkLineIn);
4376	AssertRC(rc);
4377	rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Microphone In", AUDMIXSINKDIR_INPUT, &pThis->pSinkMicIn);
4378	AssertRC(rc);
4379	rc = AudioMixerCreateSink(pThis->pMixer, "[Playback] PCM Output", AUDMIXSINKDIR_OUTPUT, &pThis->pSinkOut);
4380	AssertRC(rc);
4381	}
4382	}
4383
4384	if (RT_SUCCESS(rc))
4385	{
4386	/*
4387	* Create all hardware streams.
4388	*/
4389	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
4390	{
4391	int rc2 = ichac97R3StreamCreate(pThis, &pThis->aStreams[i], i /* SD# */);
4392	AssertRC(rc2);
4393	if (RT_SUCCESS(rc))
4394	rc = rc2;
4395	}
4396
4397	# ifdef VBOX_WITH_AUDIO_AC97_ONETIME_INIT
4398	PAC97DRIVER pDrv;
4399	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
4400	{
4401	/*
4402	* Only primary drivers are critical for the VM to run. Everything else
4403	* might not worth showing an own error message box in the GUI.
4404	*/
4405	if (!(pDrv->fFlags & PDMAUDIODRVFLAGS_PRIMARY))
4406	continue;
4407
4408	PPDMIAUDIOCONNECTOR pCon = pDrv->pConnector;
4409	AssertPtr(pCon);
4410
4411	bool fValidLineIn = AudioMixerStreamIsValid(pDrv->LineIn.pMixStrm);
4412	bool fValidMicIn = AudioMixerStreamIsValid(pDrv->MicIn.pMixStrm);
4413	bool fValidOut = AudioMixerStreamIsValid(pDrv->Out.pMixStrm);
4414
4415	if ( !fValidLineIn
4416	&& !fValidMicIn
4417	&& !fValidOut)
4418	{
4419	LogRel(("AC97: Falling back to NULL backend (no sound audible)\n"));
4420
4421	ichac97R3Reset(pDevIns);
4422	ichac97R3ReattachInternal(pThis, pDrv, pDrv->uLUN, "NullAudio");
4423
4424	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
4425	N_("No audio devices could be opened. Selecting the NULL audio backend "
4426	"with the consequence that no sound is audible"));
4427	}
4428	else
4429	{
4430	bool fWarn = false;
4431
4432	PDMAUDIOBACKENDCFG backendCfg;
4433	int rc2 = pCon->pfnGetConfig(pCon, &backendCfg);
4434	if (RT_SUCCESS(rc2))
4435	{
4436	if (backendCfg.cMaxStreamsIn)
4437	{
4438	/* If the audio backend supports two or more input streams at once,
4439	* warn if one of our two inputs (microphone-in and line-in) failed to initialize. */
4440	if (backendCfg.cMaxStreamsIn >= 2)
4441	fWarn = !fValidLineIn \|\| !fValidMicIn;
4442	/* If the audio backend only supports one input stream at once (e.g. pure ALSA, and
4443	* not ALSA via PulseAudio plugin!), only warn if both of our inputs failed to initialize.
4444	* One of the two simply is not in use then. */
4445	else if (backendCfg.cMaxStreamsIn == 1)
4446	fWarn = !fValidLineIn && !fValidMicIn;
4447	/* Don't warn if our backend is not able of supporting any input streams at all. */
4448	}
4449
4450	if ( !fWarn
4451	&& backendCfg.cMaxStreamsOut)
4452	{
4453	fWarn = !fValidOut;
4454	}
4455	}
4456	else
4457	{
4458	LogRel(("AC97: Unable to retrieve audio backend configuration for LUN #%RU8, rc=%Rrc\n", pDrv->uLUN, rc2));
4459	fWarn = true;
4460	}
4461
4462	if (fWarn)
4463	{
4464	char szMissingStreams[255] = "";
4465	size_t len = 0;
4466	if (!fValidLineIn)
4467	{
4468	LogRel(("AC97: WARNING: Unable to open PCM line input for LUN #%RU8!\n", pDrv->uLUN));
4469	len = RTStrPrintf(szMissingStreams, sizeof(szMissingStreams), "PCM Input");
4470	}
4471	if (!fValidMicIn)
4472	{
4473	LogRel(("AC97: WARNING: Unable to open PCM microphone input for LUN #%RU8!\n", pDrv->uLUN));
4474	len += RTStrPrintf(szMissingStreams + len,
4475	sizeof(szMissingStreams) - len, len ? ", PCM Microphone" : "PCM Microphone");
4476	}
4477	if (!fValidOut)
4478	{
4479	LogRel(("AC97: WARNING: Unable to open PCM output for LUN #%RU8!\n", pDrv->uLUN));
4480	len += RTStrPrintf(szMissingStreams + len,
4481	sizeof(szMissingStreams) - len, len ? ", PCM Output" : "PCM Output");
4482	}
4483
4484	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
4485	N_("Some AC'97 audio streams (%s) could not be opened. Guest applications generating audio "
4486	"output or depending on audio input may hang. Make sure your host audio device "
4487	"is working properly. Check the logfile for error messages of the audio "
4488	"subsystem"), szMissingStreams);
4489	}
4490	}
4491	}
4492	# endif /* VBOX_WITH_AUDIO_AC97_ONETIME_INIT */
4493	}
4494
4495	if (RT_SUCCESS(rc))
4496	ichac97R3Reset(pDevIns);
4497
4498	if (RT_SUCCESS(rc))
4499	{
4500	static const char * const s_apszNames[] =
4501	{
4502	"AC97 PI", "AC97 PO", "AC97 MC"
4503	};
4504	AssertCompile(RT_ELEMENTS(s_apszNames) == AC97_MAX_STREAMS);
4505
4506	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
4507	{
4508	/* Create the emulation timer (per stream).
4509	*
4510	* Note: Use TMCLOCK_VIRTUAL_SYNC here, as the guest's AC'97 driver
4511	* relies on exact (virtual) DMA timing and uses DMA Position Buffers
4512	* instead of the LPIB registers.
4513	*/
4514	rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, ichac97R3Timer, &pThis->aStreams[i],
4515	TMTIMER_FLAGS_NO_CRIT_SECT, s_apszNames[i], &pThis->pTimerR3[i]);
4516	AssertRCReturn(rc, rc);
4517	pThis->pTimerR0[i] = TMTimerR0Ptr(pThis->pTimerR3[i]);
4518	pThis->pTimerRC[i] = TMTimerRCPtr(pThis->pTimerR3[i]);
4519
4520	/* Use our own critcal section for the device timer.
4521	* That way we can control more fine-grained when to lock what. */
4522	rc = TMR3TimerSetCritSect(pThis->pTimerR3[i], &pThis->CritSect);
4523	AssertRCReturn(rc, rc);
4524	}
4525	}
4526
4527	# ifdef VBOX_WITH_STATISTICS
4528	if (RT_SUCCESS(rc))
4529	{
4530	/*
4531	* Register statistics.
4532	*/
4533	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, "/Devices/AC97/Timer", STAMUNIT_TICKS_PER_CALL, "Profiling ichac97Timer.");
4534	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatIn, STAMTYPE_PROFILE, "/Devices/AC97/Input", STAMUNIT_TICKS_PER_CALL, "Profiling input.");
4535	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatOut, STAMTYPE_PROFILE, "/Devices/AC97/Output", STAMUNIT_TICKS_PER_CALL, "Profiling output.");
4536	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, "/Devices/AC97/BytesRead" , STAMUNIT_BYTES, "Bytes read from AC97 emulation.");
4537	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, "/Devices/AC97/BytesWritten", STAMUNIT_BYTES, "Bytes written to AC97 emulation.");
4538	}
4539	# endif
4540
4541	LogFlowFuncLeaveRC(rc);
4542	return rc;
4543	}
4544
4545	#endif /* !IN_RING3 */
4546
4547	/**
4548	* The device registration structure.
4549	*/
4550	const PDMDEVREG g_DeviceICHAC97 =
4551	{
4552	/* .u32Version = */ PDM_DEVREG_VERSION,
4553	/* .uReserved0 = */ 0,
4554	/* .szName = */ "ichac97",
4555	/* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0,
4556	/* .fClass = */ PDM_DEVREG_CLASS_AUDIO,
4557	/* .cMaxInstances = */ 1,
4558	/* .uSharedVersion = */ 42,
4559	/* .cbInstanceShared = */ sizeof(AC97STATE),
4560	/* .cbInstanceCC = */ 0,
4561	/* .cbInstanceRC = */ 0,
4562	/* .cMaxPciDevices = */ 1,
4563	/* .cMaxMsixVectors = */ 0,
4564	/* .pszDescription = */ "ICH AC'97 Audio Controller",
4565	#if defined(IN_RING3)
4566	/* .pszRCMod = */ "VBoxDDRC.rc",
4567	/* .pszR0Mod = */ "VBoxDDR0.r0",
4568	/* .pfnConstruct = */ ichac97R3Construct,
4569	/* .pfnDestruct = */ ichac97R3Destruct,
4570	/* .pfnRelocate = */ ichac97R3Relocate,
4571	/* .pfnMemSetup = */ NULL,
4572	/* .pfnPowerOn = */ NULL,
4573	/* .pfnReset = */ ichac97R3Reset,
4574	/* .pfnSuspend = */ NULL,
4575	/* .pfnResume = */ NULL,
4576	/* .pfnAttach = */ ichac97R3Attach,
4577	/* .pfnDetach = */ ichac97R3Detach,
4578	/* .pfnQueryInterface = */ NULL,
4579	/* .pfnInitComplete = */ NULL,
4580	/* .pfnPowerOff = */ ichac97R3PowerOff,
4581	/* .pfnSoftReset = */ NULL,
4582	/* .pfnReserved0 = */ NULL,
4583	/* .pfnReserved1 = */ NULL,
4584	/* .pfnReserved2 = */ NULL,
4585	/* .pfnReserved3 = */ NULL,
4586	/* .pfnReserved4 = */ NULL,
4587	/* .pfnReserved5 = */ NULL,
4588	/* .pfnReserved6 = */ NULL,
4589	/* .pfnReserved7 = */ NULL,
4590	#elif defined(IN_RING0)
4591	/* .pfnEarlyConstruct = */ NULL,
4592	/* .pfnConstruct = */ NULL,
4593	/* .pfnDestruct = */ NULL,
4594	/* .pfnFinalDestruct = */ NULL,
4595	/* .pfnRequest = */ NULL,
4596	/* .pfnReserved0 = */ NULL,
4597	/* .pfnReserved1 = */ NULL,
4598	/* .pfnReserved2 = */ NULL,
4599	/* .pfnReserved3 = */ NULL,
4600	/* .pfnReserved4 = */ NULL,
4601	/* .pfnReserved5 = */ NULL,
4602	/* .pfnReserved6 = */ NULL,
4603	/* .pfnReserved7 = */ NULL,
4604	#elif defined(IN_RC)
4605	/* .pfnConstruct = */ NULL,
4606	/* .pfnReserved0 = */ NULL,
4607	/* .pfnReserved1 = */ NULL,
4608	/* .pfnReserved2 = */ NULL,
4609	/* .pfnReserved3 = */ NULL,
4610	/* .pfnReserved4 = */ NULL,
4611	/* .pfnReserved5 = */ NULL,
4612	/* .pfnReserved6 = */ NULL,
4613	/* .pfnReserved7 = */ NULL,
4614	#else
4615	# error "Not in IN_RING3, IN_RING0 or IN_RC!"
4616	#endif
4617	/* .u32VersionEnd = */ PDM_DEVREG_VERSION
4618	};
4619
4620	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
4621

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source: vbox/trunk/src/VBox/Devices/Audio/DevIchAc97.cpp@ 81328

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