DevIchAc97.cpp@ 61888

Last change on this file since 61888 was 61888, checked in by vboxsync, 8 years ago
Audio: Renamed PDMAUDIOMIXERCTL_VOLUME -> PDMAUDIOMIXERCTL_VOLUME_MASTER.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 102.5 KB

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1	/* $Id: DevIchAc97.cpp 61888 2016-06-27 08:32:31Z vboxsync $ */
2	/** @file
3	* DevIchAc97 - VBox ICH AC97 Audio Controller.
4	*/
5
6	/*
7	* Copyright (C) 2006-2016 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_AC97
23	#include <VBox/log.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <VBox/vmm/pdmaudioifs.h>
26
27	#include <iprt/assert.h>
28	#ifdef IN_RING3
29	# ifdef DEBUG
30	# include <iprt/file.h>
31	# endif
32	# include <iprt/mem.h>
33	# include <iprt/string.h>
34	# include <iprt/uuid.h>
35	#endif
36
37	#include "VBoxDD.h"
38
39	#include "AudioMixBuffer.h"
40	#include "AudioMixer.h"
41	#include "DrvAudio.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47
48	#ifdef DEBUG_andy
49	/*
50	* AC97_DEBUG_DUMP_PCM_DATA enables dumping the raw PCM data
51	* to a file on the host. Be sure to adjust AC97_DEBUG_DUMP_PCM_DATA_PATH
52	* to your needs before using this!
53	*/
54	# define AC97_DEBUG_DUMP_PCM_DATA
55	# ifdef RT_OS_WINDOWS
56	# define AC97_DEBUG_DUMP_PCM_DATA_PATH "c:\\temp\\"
57	# else
58	# define AC97_DEBUG_DUMP_PCM_DATA_PATH "/tmp/"
59	# endif
60	#endif /* DEBUG_andy */
61
62	/** Current saved state version. */
63	#define AC97_SSM_VERSION 1
64
65	/** Timer frequency (in Hz) */
66	#define AC97_TIMER_HZ 200
67
68	/** @todo Use AC97_ prefixes! */
69	#define SR_FIFOE RT_BIT(4) /* rwc, FIFO error. */
70	#define SR_BCIS RT_BIT(3) /* rwc, Buffer completion interrupt status. */
71	#define SR_LVBCI RT_BIT(2) /* rwc, Last valid buffer completion interrupt. */
72	#define SR_CELV RT_BIT(1) /* ro, Current equals last valid. */
73	#define SR_DCH RT_BIT(0) /* ro, Controller halted. */
74	#define SR_VALID_MASK (RT_BIT(5) - 1)
75	#define SR_WCLEAR_MASK (SR_FIFOE \| SR_BCIS \| SR_LVBCI)
76	#define SR_RO_MASK (SR_DCH \| SR_CELV)
77	#define SR_INT_MASK (SR_FIFOE \| SR_BCIS \| SR_LVBCI)
78
79	#define CR_IOCE RT_BIT(4) /* rw, Interrupt On Completion Enable. */
80	#define CR_FEIE RT_BIT(3) /* rw FIFO Error Interrupt Enable. */
81	#define CR_LVBIE RT_BIT(2) /* rw Last Valid Buffer Interrupt Enable. */
82	#define CR_RR RT_BIT(1) /* rw Reset Registers. */
83	#define CR_RPBM RT_BIT(0) /* rw Run/Pause Bus Master. */
84	#define CR_VALID_MASK (RT_BIT(5) - 1)
85	#define CR_DONT_CLEAR_MASK (CR_IOCE \| CR_FEIE \| CR_LVBIE)
86
87	#define GC_WR 4 /* rw */
88	#define GC_CR 2 /* rw */
89	#define GC_VALID_MASK (RT_BIT(6) - 1)
90
91	#define GS_MD3 RT_BIT(17) /* rw */
92	#define GS_AD3 RT_BIT(16) /* rw */
93	#define GS_RCS RT_BIT(15) /* rwc */
94	#define GS_B3S12 RT_BIT(14) /* ro */
95	#define GS_B2S12 RT_BIT(13) /* ro */
96	#define GS_B1S12 RT_BIT(12) /* ro */
97	#define GS_S1R1 RT_BIT(11) /* rwc */
98	#define GS_S0R1 RT_BIT(10) /* rwc */
99	#define GS_S1CR RT_BIT(9) /* ro */
100	#define GS_S0CR RT_BIT(8) /* ro */
101	#define GS_MINT RT_BIT(7) /* ro */
102	#define GS_POINT RT_BIT(6) /* ro */
103	#define GS_PIINT RT_BIT(5) /* ro */
104	#define GS_RSRVD (RT_BIT(4)\|RT_BIT(3))
105	#define GS_MOINT RT_BIT(2) /* ro */
106	#define GS_MIINT RT_BIT(1) /* ro */
107	#define GS_GSCI RT_BIT(0) /* rwc */
108	#define GS_RO_MASK (GS_B3S12 \| \
109	GS_B2S12 \| \
110	GS_B1S12 \| \
111	GS_S1CR \| \
112	GS_S0CR \| \
113	GS_MINT \| \
114	GS_POINT \| \
115	GS_PIINT \| \
116	GS_RSRVD \| \
117	GS_MOINT \| \
118	GS_MIINT)
119	#define GS_VALID_MASK (RT_BIT(18) - 1)
120	#define GS_WCLEAR_MASK (GS_RCS\|GS_S1R1\|GS_S0R1\|GS_GSCI)
121
122	/** @name Buffer Descriptor (BD).
123	* @{ */
124	#define BD_IOC RT_BIT(31) /*< Interrupt on Completion. /
125	#define BD_BUP RT_BIT(30) /*< Buffer Underrun Policy. /
126
127	#define BD_MAX_LEN_MASK 0xFFFE
128	/** @} */
129
130	/** @name Extended Audio Status and Control Register (EACS).
131	* @{ */
132	#define EACS_VRA 1 /*< Variable Rate Audio (4.2.1.1). /
133	#define EACS_VRM 8 /*< Variable Rate Mic Audio (4.2.1.1). /
134	/** @} */
135
136	/** @name Baseline Audio Register Set (BARS).
137	* @{ */
138	#define AC97_BARS_VOL_MASK 0x1f /*< Volume mask for the Baseline Audio Register Set (5.7.2). /
139	#define AC97_BARS_VOL_STEPS 31 /*< Volume steps for the Baseline Audio Register Set (5.7.2). /
140	#define AC97_BARS_VOL_MUTE_SHIFT 15 /*< Mute bit shift for the Baseline Audio Register Set (5.7.2). /
141
142	#define AC97_BARS_VOL_MASTER_MASK 0x3f /*< Master volume mask for the Baseline Audio Register Set (5.7.2). /
143	#define AC97_BARS_VOL_MASTER_STEPS 63 /*< Master volume steps for the Baseline Audio Register Set (5.7.2). /
144	#define AC97_BARS_VOL_MASTER_MUTE_SHIFT 15 /*< Master Mute bit shift for the Baseline Audio Register Set (5.7.2). /
145
146	#define AC97_VOL_MAX_STEPS 63
147	/** @} */
148
149	#define REC_MASK 7
150	enum
151	{
152	REC_MIC = 0,
153	REC_CD,
154	REC_VIDEO,
155	REC_AUX,
156	REC_LINE_IN,
157	REC_STEREO_MIX,
158	REC_MONO_MIX,
159	REC_PHONE
160	};
161
162	enum
163	{
164	AC97_Reset = 0x00,
165	AC97_Master_Volume_Mute = 0x02,
166	AC97_Headphone_Volume_Mute = 0x04, /** Also known as AUX, see table 16, section 5.7. */
167	AC97_Master_Volume_Mono_Mute = 0x06,
168	AC97_Master_Tone_RL = 0x08,
169	AC97_PC_BEEP_Volume_Mute = 0x0A,
170	AC97_Phone_Volume_Mute = 0x0C,
171	AC97_Mic_Volume_Mute = 0x0E,
172	AC97_Line_In_Volume_Mute = 0x10,
173	AC97_CD_Volume_Mute = 0x12,
174	AC97_Video_Volume_Mute = 0x14,
175	AC97_Aux_Volume_Mute = 0x16,
176	AC97_PCM_Out_Volume_Mute = 0x18,
177	AC97_Record_Select = 0x1A,
178	AC97_Record_Gain_Mute = 0x1C,
179	AC97_Record_Gain_Mic_Mute = 0x1E,
180	AC97_General_Purpose = 0x20,
181	AC97_3D_Control = 0x22,
182	AC97_AC_97_RESERVED = 0x24,
183	AC97_Powerdown_Ctrl_Stat = 0x26,
184	AC97_Extended_Audio_ID = 0x28,
185	AC97_Extended_Audio_Ctrl_Stat = 0x2A,
186	AC97_PCM_Front_DAC_Rate = 0x2C,
187	AC97_PCM_Surround_DAC_Rate = 0x2E,
188	AC97_PCM_LFE_DAC_Rate = 0x30,
189	AC97_PCM_LR_ADC_Rate = 0x32,
190	AC97_MIC_ADC_Rate = 0x34,
191	AC97_6Ch_Vol_C_LFE_Mute = 0x36,
192	AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
193	AC97_Vendor_Reserved = 0x58,
194	AC97_AD_Misc = 0x76,
195	AC97_Vendor_ID1 = 0x7c,
196	AC97_Vendor_ID2 = 0x7e
197	};
198
199	/* Codec models. */
200	enum {
201	Codec_STAC9700 = 0, /* SigmaTel STAC9700 */
202	Codec_AD1980, /* Analog Devices AD1980 */
203	Codec_AD1981B /* Analog Devices AD1981B */
204	};
205
206	/* Analog Devices miscellaneous regiter bits used in AD1980. */
207	#define AD_MISC_LOSEL RT_BIT(5) /* Surround (rear) goes to line out outputs. */
208	#define AD_MISC_HPSEL RT_BIT(10) /* PCM (front) goes to headphone outputs. */
209
210	#define ICHAC97STATE_2_DEVINS(a_pAC97) ((a_pAC97)->pDevInsR3)
211
212	enum
213	{
214	BUP_SET = RT_BIT(0),
215	BUP_LAST = RT_BIT(1)
216	};
217
218	/** Emits registers for a specific (Native Audio Bus Master BAR) NABMBAR. */
219	#define AC97_NABMBAR_REGS(prefix, off) \
220	enum { \
221	prefix ## _BDBAR = off, /* Buffer Descriptor Base Address */ \
222	prefix ## _CIV = off + 4, /* Current Index Value */ \
223	prefix ## _LVI = off + 5, /* Last Valid Index */ \
224	prefix ## _SR = off + 6, /* Status Register */ \
225	prefix ## _PICB = off + 8, /* Position in Current Buffer */ \
226	prefix ## _PIV = off + 10, /* Prefetched Index Value */ \
227	prefix ## _CR = off + 11 /* Control Register */ \
228	}
229
230	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
231	typedef enum
232	{
233	PI_INDEX = 0, /** PCM in */
234	PO_INDEX, /** PCM out */
235	MC_INDEX, /** Mic in */
236	LAST_INDEX
237	} AC97SOUNDSOURCE;
238
239	AC97_NABMBAR_REGS(PI, PI_INDEX * 16);
240	AC97_NABMBAR_REGS(PO, PO_INDEX * 16);
241	AC97_NABMBAR_REGS(MC, MC_INDEX * 16);
242	#endif
243
244	enum
245	{
246	/** NABMBAR: Global Control Register. */
247	GLOB_CNT = 0x2c,
248	/** NABMBAR Global Status. */
249	GLOB_STA = 0x30,
250	/** Codec Access Semaphore Register. */
251	CAS = 0x34
252	};
253
254	#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
255
256	/*********************************************************************************************************************************
257	* Structures and Typedefs *
258	*********************************************************************************************************************************/
259
260	/**
261	* Buffer Descriptor List Entry (BDLE).
262	*/
263	typedef struct AC97BDLE
264	{
265	uint32_t addr;
266	uint32_t ctl_len;
267	} AC97BDLE, *PAC97BDLE;
268
269	/**
270	* Bus master register set for an audio stream.
271	*/
272	typedef struct AC97BMREGS
273	{
274	uint32_t bdbar; /** rw 0, Buffer Descriptor List: BAR (Base Address Register). */
275	uint8_t civ; /** ro 0, Current index value. */
276	uint8_t lvi; /** rw 0, Last valid index. */
277	uint16_t sr; /** rw 1, Status register. */
278	uint16_t picb; /** ro 0, Position in current buffer (in samples). */
279	uint8_t piv; /** ro 0, Prefetched index value. */
280	uint8_t cr; /** rw 0, Control register. */
281	int bd_valid; /** Whether current BDLE is initialized or not. */
282	AC97BDLE bd; /** Current Buffer Descriptor List Entry (BDLE). */
283	} AC97BMREGS, *PAC97BMREGS;
284
285	/**
286	* Internal state of an AC97 stream.
287	*/
288	typedef struct AC97STREAMSTATE
289	{
290	/** Temporary FIFO write buffer. */
291	R3PTRTYPE(uint8_t *) au8FIFOW;
292	/** Size of the temporary FIFO write buffer. */
293	uint32_t cbFIFOW;
294	/** Current write offset in FIFO write buffer. */
295	uint32_t offFIFOW;
296	uint8_t Padding;
297	} AC97STREAMSTATE, *PAC97STREAMSTATE;
298
299	/**
300	* Structure for keeping an AC97 stream state.
301	*
302	* Contains only register values which do not change until a
303	* stream reset occurs.
304	*/
305	typedef struct AC97STREAM
306	{
307	/** Stream number (SDn). */
308	uint8_t u8Strm;
309	/** Bus master registers of this stream. */
310	AC97BMREGS Regs;
311	/** Internal state of this stream. */
312	AC97STREAMSTATE State;
313	} AC97STREAM, *PAC97STREAM;
314
315	typedef struct AC97INPUTSTREAM
316	{
317	/** Mixer handle for input stream. */
318	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
319	} AC97INPUTSTREAM, *PAC97INPUTSTREAM;
320
321	typedef struct AC97OUTPUTSTREAM
322	{
323	/** Mixer handle for output stream. */
324	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
325	} AC97OUTPUTSTREAM, *PAC97OUTPUTSTREAM;
326
327	/**
328	* Struct for maintaining a host backend driver.
329	*/
330	typedef struct AC97STATE *PAC97STATE;
331	typedef struct AC97DRIVER
332	{
333	/** Node for storing this driver in our device driver list of AC97STATE. */
334	RTLISTNODER3 Node;
335	/** Pointer to AC97 controller (state). */
336	R3PTRTYPE(PAC97STATE) pAC97State;
337	/** Driver flags. */
338	PDMAUDIODRVFLAGS Flags;
339	uint32_t PaddingFlags;
340	/** LUN # to which this driver has been assigned. */
341	uint8_t uLUN;
342	/** Whether this driver is in an attached state or not. */
343	bool fAttached;
344	uint8_t Padding[4];
345	/** Pointer to attached driver base interface. */
346	R3PTRTYPE(PPDMIBASE) pDrvBase;
347	/** Audio connector interface to the underlying host backend. */
348	R3PTRTYPE(PPDMIAUDIOCONNECTOR) pConnector;
349	/** Stream for line input. */
350	AC97INPUTSTREAM LineIn;
351	/** Stream for mic input. */
352	AC97INPUTSTREAM MicIn;
353	/** Stream for output. */
354	AC97OUTPUTSTREAM Out;
355	} AC97DRIVER, *PAC97DRIVER;
356
357	typedef struct AC97STATE
358	{
359	/** The PCI device state. */
360	PCIDevice PciDev;
361	/** R3 Pointer to the device instance. */
362	PPDMDEVINSR3 pDevInsR3;
363	/** Global Control (Bus Master Control Register). */
364	uint32_t glob_cnt;
365	/** Global Status (Bus Master Control Register). */
366	uint32_t glob_sta;
367	/** Codec Access Semaphore Register (Bus Master Control Register). */
368	uint32_t cas;
369	uint32_t last_samp;
370	uint8_t mixer_data[256];
371	/** Stream state for line-in. */
372	AC97STREAM StreamLineIn;
373	/** Stream state for microphone-in. */
374	AC97STREAM StreamMicIn;
375	/** Stream state for output. */
376	AC97STREAM StreamOut;
377	/** Number of active (running) SDn streams. */
378	uint8_t cStreamsActive;
379	#ifndef VBOX_WITH_AUDIO_CALLBACKS
380	/** The timer for pumping data thru the attached LUN drivers. */
381	PTMTIMERR3 pTimer;
382	# if HC_ARCH_BITS == 32
383	uint32_t Padding0;
384	# endif
385	/** Flag indicating whether the timer is active or not. */
386	bool fTimerActive;
387	uint8_t u8Padding1[7];
388	/** The timer interval for pumping data thru the LUN drivers in timer ticks. */
389	uint64_t cTimerTicks;
390	/** Timestamp of the last timer callback (ac97Timer).
391	* Used to calculate the time actually elapsed between two timer callbacks. */
392	uint64_t uTimerTS;
393	#endif
394	#ifdef VBOX_WITH_STATISTICS
395	uint8_t Padding1;
396	STAMPROFILE StatTimer;
397	STAMCOUNTER StatBytesRead;
398	STAMCOUNTER StatBytesWritten;
399	#endif
400	/** List of associated LUN drivers (AC97DRIVER). */
401	RTLISTANCHOR lstDrv;
402	/** The device's software mixer. */
403	R3PTRTYPE(PAUDIOMIXER) pMixer;
404	/** Audio sink for PCM output. */
405	R3PTRTYPE(PAUDMIXSINK) pSinkOutput;
406	/** Audio sink for line input. */
407	R3PTRTYPE(PAUDMIXSINK) pSinkLineIn;
408	/** Audio sink for microphone input. */
409	R3PTRTYPE(PAUDMIXSINK) pSinkMicIn;
410	uint8_t silence[128];
411	int bup_flag;
412	/** The base interface for LUN\#0. */
413	PDMIBASE IBase;
414	/** Base port of the I/O space region. */
415	RTIOPORT IOPortBase[2];
416	/** Codec model. */
417	uint32_t uCodecModel;
418	} AC97STATE, *PAC97STATE;
419
420	#ifdef VBOX_WITH_STATISTICS
421	AssertCompileMemberAlignment(AC97STATE, StatTimer, 8);
422	AssertCompileMemberAlignment(AC97STATE, StatBytesRead, 8);
423	AssertCompileMemberAlignment(AC97STATE, StatBytesWritten, 8);
424	#endif
425
426	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
427
428	static void ichac97DestroyIn(PAC97STATE pThis, PDMAUDIORECSOURCE enmRecSource);
429	static void ichac97DestroyOut(PAC97STATE pThis);
430	DECLINLINE(PAC97STREAM) ichac97GetStreamFromID(PAC97STATE pThis, uint32_t uID);
431	static int ichac97StreamInit(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm);
432	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns);
433	#ifndef VBOX_WITH_AUDIO_CALLBACKS
434	static void ichac97TimerMaybeStart(PAC97STATE pThis);
435	static void ichac97TimerMaybeStop(PAC97STATE pThis);
436	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
437	#endif
438	static int ichac97TransferAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcess, uint32_t *pcbProcessed);
439
440	static void ichac97WarmReset(PAC97STATE pThis)
441	{
442	NOREF(pThis);
443	}
444
445	static void ichac97ColdReset(PAC97STATE pThis)
446	{
447	NOREF(pThis);
448	}
449
450	DECLINLINE(PAUDMIXSINK) ichac97IndexToSink(PAC97STATE pThis, uint8_t uIndex)
451	{
452	AssertPtrReturn(pThis, NULL);
453
454	switch (uIndex)
455	{
456	case PI_INDEX: return pThis->pSinkLineIn; break;
457	case PO_INDEX: return pThis->pSinkOutput; break;
458	case MC_INDEX: return pThis->pSinkMicIn; break;
459	default: break;
460	}
461
462	AssertMsgFailed(("Wrong index %RU8\n", uIndex));
463	return NULL;
464	}
465
466	/** Fetches the buffer descriptor at _CIV. */
467	static void ichac97StreamFetchBDLE(PAC97STATE pThis, PAC97STREAM pStream)
468	{
469	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
470	PAC97BMREGS pRegs = &pStream->Regs;
471
472	uint32_t u32[2];
473
474	PDMDevHlpPhysRead(pDevIns, pRegs->bdbar + pRegs->civ * 8, &u32[0], sizeof(u32));
475	pRegs->bd_valid = 1;
476	#if !defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)
477	# error Please adapt the code (audio buffers are little endian)!
478	#else
479	pRegs->bd.addr = RT_H2LE_U32(u32[0] & ~3);
480	pRegs->bd.ctl_len = RT_H2LE_U32(u32[1]);
481	#endif
482	pRegs->picb = pRegs->bd.ctl_len & BD_MAX_LEN_MASK;
483	LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
484	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16,
485	pRegs->bd.ctl_len & BD_MAX_LEN_MASK,
486	(pRegs->bd.ctl_len & BD_MAX_LEN_MASK) << 1)); /** @todo r=andy Assumes 16bit samples. */
487	}
488
489	/**
490	* Update the BM status register
491	*/
492	static void ichac97StreamUpdateStatus(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
493	{
494	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
495	PAC97BMREGS pRegs = &pStream->Regs;
496
497	bool fSignal = false;
498	int iIRQL;
499
500	uint32_t new_mask = new_sr & SR_INT_MASK;
501	uint32_t old_mask = pRegs->sr & SR_INT_MASK;
502
503	static uint32_t const masks[] = { GS_PIINT, GS_POINT, GS_MINT };
504
505	if (new_mask ^ old_mask)
506	{
507	/** @todo Is IRQ deasserted when only one of status bits is cleared? */
508	if (!new_mask)
509	{
510	fSignal = true;
511	iIRQL = 0;
512	}
513	else if ((new_mask & SR_LVBCI) && (pRegs->cr & CR_LVBIE))
514	{
515	fSignal = true;
516	iIRQL = 1;
517	}
518	else if ((new_mask & SR_BCIS) && (pRegs->cr & CR_IOCE))
519	{
520	fSignal = true;
521	iIRQL = 1;
522	}
523	}
524
525	pRegs->sr = new_sr;
526
527	LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n",
528	pRegs->sr & SR_BCIS, pRegs->sr & SR_LVBCI, pRegs->sr, fSignal, iIRQL));
529
530	if (fSignal)
531	{
532	if (iIRQL)
533	pThis->glob_sta \|= masks[pStream->u8Strm];
534	else
535	pThis->glob_sta &= ~masks[pStream->u8Strm];
536
537	LogFlowFunc(("Setting IRQ level=%d\n", iIRQL));
538	PDMDevHlpPCISetIrq(pDevIns, 0, iIRQL);
539	}
540	}
541
542	static bool ichac97StreamIsActive(PAC97STATE pThis, PAC97STREAM pStream)
543	{
544	AssertPtrReturn(pThis, false);
545	AssertPtrReturn(pStream, false);
546
547	PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8Strm);
548	bool fActive = RT_BOOL(AudioMixerSinkGetStatus(pSink) & AUDMIXSINK_STS_RUNNING);
549
550	LogFlowFunc(("[SD%RU8] fActive=%RTbool\n", pStream->u8Strm, fActive));
551	return fActive;
552	}
553
554	static int ichac97StreamSetActive(PAC97STATE pThis, PAC97STREAM pStream, bool fActive)
555	{
556	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
557	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
558
559	if (!fActive)
560	{
561	if (pThis->cStreamsActive) /* Disable can be called mupltiple times. */
562	pThis->cStreamsActive--;
563
564	#ifndef VBOX_WITH_AUDIO_CALLBACKS
565	ichac97TimerMaybeStop(pThis);
566	#endif
567	}
568	else
569	{
570	pThis->cStreamsActive++;
571	#ifndef VBOX_WITH_AUDIO_CALLBACKS
572	ichac97TimerMaybeStart(pThis);
573	#endif
574	}
575
576	int rc = AudioMixerSinkCtl(ichac97IndexToSink(pThis, pStream->u8Strm),
577	fActive ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE);
578
579	LogFlowFunc(("[SD%RU8] fActive=%RTbool, cStreamsActive=%RU8, rc=%Rrc\n",
580	pStream->u8Strm, fActive, pThis->cStreamsActive, rc));
581
582	return rc;
583	}
584
585	static void ichac97StreamResetBMRegs(PAC97STATE pThis, PAC97STREAM pStream)
586	{
587	AssertPtrReturnVoid(pThis);
588	AssertPtrReturnVoid(pStream);
589
590	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
591
592	PAC97BMREGS pRegs = &pStream->Regs;
593
594	pRegs->bdbar = 0;
595	pRegs->civ = 0;
596	pRegs->lvi = 0;
597
598	ichac97StreamUpdateStatus(pThis, pStream, SR_DCH); /** @todo Do we need to do that? */
599
600	pRegs->picb = 0;
601	pRegs->piv = 0;
602	pRegs->cr = pRegs->cr & CR_DONT_CLEAR_MASK;
603	pRegs->bd_valid = 0;
604
605	ichac97StreamSetActive(pThis, pStream, false /* fActive */);
606
607	RT_ZERO(pThis->silence);
608	}
609
610	static void ichac97StreamDestroy(PAC97STREAM pStream)
611	{
612	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
613
614	if (pStream->State.au8FIFOW)
615	{
616	Assert(pStream->State.cbFIFOW);
617	RTMemFree(pStream->State.au8FIFOW);
618	pStream->State.au8FIFOW = NULL;
619	}
620
621	pStream->State.cbFIFOW = 0;
622	pStream->State.offFIFOW = 0;
623	}
624
625	static void ichac97StreamsDestroy(PAC97STATE pThis)
626	{
627	LogFlowFuncEnter();
628
629	ichac97DestroyIn(pThis, PDMAUDIORECSOURCE_LINE);
630	ichac97DestroyIn(pThis, PDMAUDIORECSOURCE_MIC);
631	ichac97DestroyOut(pThis);
632
633	ichac97StreamDestroy(&pThis->StreamLineIn);
634	ichac97StreamDestroy(&pThis->StreamMicIn);
635	ichac97StreamDestroy(&pThis->StreamOut);
636	}
637
638	static int ichac97StreamsInit(PAC97STATE pThis)
639	{
640	LogFlowFuncEnter();
641
642	ichac97StreamInit(pThis, &pThis->StreamLineIn, PI_INDEX);
643	ichac97StreamInit(pThis, &pThis->StreamMicIn, MC_INDEX);
644	ichac97StreamInit(pThis, &pThis->StreamOut, PO_INDEX);
645
646	return VINF_SUCCESS;
647	}
648
649	static void ichac97MixerSet(PAC97STATE pThis, uint8_t uMixerIdx, uint16_t uVal)
650	{
651	if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
652	{
653	AssertMsgFailed(("Index %RU8 out of bounds(%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
654	return;
655	}
656
657	pThis->mixer_data[uMixerIdx + 0] = RT_LO_U8(uVal);
658	pThis->mixer_data[uMixerIdx + 1] = RT_HI_U8(uVal);
659	}
660
661	static uint16_t ichac97MixerGet(PAC97STATE pThis, uint32_t uMixerIdx)
662	{
663	uint16_t uVal;
664
665	if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
666	{
667	AssertMsgFailed(("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
668	uVal = UINT16_MAX;
669	}
670	else
671	uVal = RT_MAKE_U16(pThis->mixer_data[uMixerIdx + 0], pThis->mixer_data[uMixerIdx + 1]);
672
673	return uVal;
674	}
675
676	static void ichac97DestroyIn(PAC97STATE pThis, PDMAUDIORECSOURCE enmRecSource)
677	{
678	AssertPtrReturnVoid(pThis);
679
680	LogFlowFuncEnter();
681
682	PAUDMIXSINK pSink;
683	switch (enmRecSource)
684	{
685	case PDMAUDIORECSOURCE_MIC:
686	pSink = pThis->pSinkMicIn;
687	break;
688	case PDMAUDIORECSOURCE_LINE:
689	pSink = pThis->pSinkLineIn;
690	break;
691	default:
692	AssertMsgFailed(("Audio source %ld not supported\n", enmRecSource));
693	return;
694	}
695
696	PAC97DRIVER pDrv;
697	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
698	{
699	PAC97INPUTSTREAM pStream;
700	if (enmRecSource == PDMAUDIORECSOURCE_MIC) /** @todo Refine this once we have more streams. */
701	pStream = &pDrv->MicIn;
702	else
703	pStream = &pDrv->LineIn;
704
705	if (pStream->pMixStrm)
706	{
707	AudioMixerSinkRemoveStream(pSink, pStream->pMixStrm);
708	AudioMixerStreamDestroy(pStream->pMixStrm);
709	}
710	pStream->pMixStrm = NULL;
711	}
712	}
713
714	static void ichac97DestroyOut(PAC97STATE pThis)
715	{
716	AssertPtrReturnVoid(pThis);
717
718	LogFlowFuncEnter();
719
720	PAC97DRIVER pDrv;
721	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
722	{
723	if (pDrv->Out.pMixStrm)
724	{
725	AudioMixerSinkRemoveStream(pThis->pSinkOutput, pDrv->Out.pMixStrm);
726	AudioMixerStreamDestroy(pDrv->Out.pMixStrm);
727
728	pDrv->Out.pMixStrm = NULL;
729	}
730	}
731	}
732
733	static int ichac97CreateIn(PAC97STATE pThis,
734	const char *pszName, PDMAUDIORECSOURCE enmRecSource, PPDMAUDIOSTREAMCFG pCfg)
735	{
736	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
737	AssertPtrReturn(pszName, VERR_INVALID_POINTER);
738	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
739
740	PAUDMIXSINK pSink;
741	switch (enmRecSource)
742	{
743	case PDMAUDIORECSOURCE_MIC:
744	pSink = pThis->pSinkMicIn;
745	break;
746	case PDMAUDIORECSOURCE_LINE:
747	pSink = pThis->pSinkLineIn;
748	break;
749	default:
750	AssertMsgFailed(("Audio source %ld not supported\n", enmRecSource));
751	return VERR_NOT_SUPPORTED;
752	}
753
754	/* Update the sink's format. */
755	PDMPCMPROPS PCMProps;
756	int rc = DrvAudioHlpStreamCfgToProps(pCfg, &PCMProps);
757	if (RT_SUCCESS(rc))
758	rc = AudioMixerSinkSetFormat(pSink, &PCMProps);
759
760	if (RT_FAILURE(rc))
761	return rc;
762
763	PAC97DRIVER pDrv;
764	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
765	{
766	if (!RTStrPrintf(pCfg->szName, sizeof(pCfg->szName), "[LUN#%RU8] %s", pDrv->uLUN, pszName))
767	{
768	rc = VERR_BUFFER_OVERFLOW;
769	break;
770	}
771
772	PAC97INPUTSTREAM pStream;
773	if (enmRecSource == PDMAUDIORECSOURCE_MIC) /** @todo Refine this once we have more streams. */
774	pStream = &pDrv->MicIn;
775	else
776	pStream = &pDrv->LineIn;
777
778	AudioMixerSinkRemoveStream(pSink, pStream->pMixStrm);
779
780	AudioMixerStreamDestroy(pStream->pMixStrm);
781	pStream->pMixStrm = NULL;
782
783	int rc2 = AudioMixerSinkCreateStream(pSink, pDrv->pConnector, pCfg, 0 /* fFlags */ , &pStream->pMixStrm);
784	if (RT_SUCCESS(rc2))
785	{
786	rc2 = AudioMixerSinkAddStream(pSink, pStream->pMixStrm);
787	LogFlowFunc(("LUN#%RU8: Created input \"%s\", rc=%Rrc\n", pDrv->uLUN, pCfg->szName, rc2));
788	}
789
790	if (RT_SUCCESS(rc))
791	rc = rc2;
792	}
793
794	LogFlowFuncLeaveRC(rc);
795	return rc;
796	}
797
798	static int ichac97CreateOut(PAC97STATE pThis, const char *pszName, PPDMAUDIOSTREAMCFG pCfg)
799	{
800	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
801	AssertPtrReturn(pszName, VERR_INVALID_POINTER);
802	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
803
804	/* Update the sink's format. */
805	PDMPCMPROPS PCMProps;
806	int rc = DrvAudioHlpStreamCfgToProps(pCfg, &PCMProps);
807	if (RT_SUCCESS(rc))
808	rc = AudioMixerSinkSetFormat(pThis->pSinkOutput, &PCMProps);
809
810	if (RT_FAILURE(rc))
811	return rc;
812
813	PAC97DRIVER pDrv;
814	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
815	{
816	if (!RTStrPrintf(pCfg->szName, sizeof(pCfg->szName), "[LUN#%RU8] %s (%RU32Hz, %RU8 %s)",
817	pDrv->uLUN, pszName, pCfg->uHz, pCfg->cChannels, pCfg->cChannels > 1 ? "Channels" : "Channel"))
818	{
819	rc = VERR_BUFFER_OVERFLOW;
820	break;
821	}
822
823	AudioMixerSinkRemoveStream(pThis->pSinkOutput, pDrv->Out.pMixStrm);
824
825	AudioMixerStreamDestroy(pDrv->Out.pMixStrm);
826	pDrv->Out.pMixStrm = NULL;
827
828	int rc2 = AudioMixerSinkCreateStream(pThis->pSinkOutput, pDrv->pConnector, pCfg, 0 /* fFlags */, &pDrv->Out.pMixStrm);
829	if (RT_SUCCESS(rc2))
830	{
831	rc2 = AudioMixerSinkAddStream(pThis->pSinkOutput, pDrv->Out.pMixStrm);
832	LogFlowFunc(("LUN#%RU8: Created output \"%s\", rc=%Rrc\n", pDrv->uLUN, pCfg->szName, rc2));
833	}
834
835	if (RT_SUCCESS(rc))
836	rc = rc2;
837	}
838
839	LogFlowFuncLeaveRC(rc);
840	return rc;
841	}
842
843	static int ichac97StreamInitEx(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm, PPDMAUDIOSTREAMCFG pCfg)
844	{
845	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
846	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
847	AssertReturn(u8Strm <= LAST_INDEX, VERR_INVALID_PARAMETER);
848	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
849
850	pStream->u8Strm = u8Strm;
851
852	LogFlowFunc(("u8Strm=%RU8, %RU32Hz, %RU8 %s\n",
853	pStream->u8Strm, pCfg->uHz, pCfg->cChannels, pCfg->cChannels > 1 ? "Channels" : "Channel"));
854
855	int rc;
856	switch (pStream->u8Strm)
857	{
858	case PI_INDEX:
859	rc = ichac97CreateIn(pThis, "ac97.pi", PDMAUDIORECSOURCE_LINE, pCfg);
860	break;
861
862	case MC_INDEX:
863	rc = ichac97CreateIn(pThis, "ac97.mc", PDMAUDIORECSOURCE_MIC, pCfg);
864	break;
865
866	case PO_INDEX:
867	rc = ichac97CreateOut(pThis, "ac97.po", pCfg);
868	break;
869
870	default:
871	rc = VERR_NOT_SUPPORTED;
872	break;
873	}
874
875	if (RT_FAILURE(rc))
876	LogRel2(("AC97: Error opening stream #%RU8, rc=%Rrc\n", pStream->u8Strm, rc));
877
878	LogFlowFuncLeaveRC(rc);
879	return rc;
880	}
881
882	static int ichac97StreamInit(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm)
883	{
884	int rc = VINF_SUCCESS;
885
886	PDMAUDIOSTREAMCFG streamCfg;
887	RT_ZERO(streamCfg);
888
889	switch (u8Strm)
890	{
891	case PI_INDEX:
892	streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate);
893	streamCfg.enmDir = PDMAUDIODIR_IN;
894	streamCfg.DestSource.Source = PDMAUDIORECSOURCE_LINE;
895	break;
896
897	case MC_INDEX:
898	streamCfg.uHz = ichac97MixerGet(pThis, AC97_MIC_ADC_Rate);
899	streamCfg.enmDir = PDMAUDIODIR_IN;
900	streamCfg.DestSource.Source = PDMAUDIORECSOURCE_MIC;
901	break;
902
903	case PO_INDEX:
904	streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate);
905	streamCfg.enmDir = PDMAUDIODIR_OUT;
906	streamCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
907	break;
908
909	default:
910	rc = VERR_NOT_SUPPORTED;
911	break;
912	}
913
914	if (RT_SUCCESS(rc))
915	{
916	pStream->State.cbFIFOW = _4K; /** @todo Make FIFOW size configurable. */
917	pStream->State.offFIFOW = 0;
918	pStream->State.au8FIFOW = (uint8_t *)RTMemAllocZ(pStream->State.cbFIFOW);
919	if (!pStream->State.au8FIFOW)
920	rc = VERR_NO_MEMORY;
921	}
922
923	if (RT_SUCCESS(rc))
924	{
925	if (streamCfg.uHz)
926	{
927	streamCfg.cChannels = 2; /** @todo Handle mono channels? */
928	streamCfg.enmFormat = PDMAUDIOFMT_S16;
929	streamCfg.enmEndianness = PDMAUDIOHOSTENDIANNESS;
930
931	rc = ichac97StreamInitEx(pThis, pStream, u8Strm, &streamCfg);
932	}
933	else
934	{
935	/* If no frequency is given, disable the stream. */
936	rc = ichac97StreamSetActive(pThis, pStream, false /* fActive */);
937	}
938	}
939
940	LogFlowFunc(("[SD%RU8] rc=%Rrc\n", u8Strm, rc));
941	return rc;
942	}
943
944	static int ichac97StreamReInit(PAC97STATE pThis, PAC97STREAM pStrm)
945	{
946	return ichac97StreamInit(pThis, pStrm, pStrm->u8Strm);
947	}
948
949	static void ichac97StreamReset(PAC97STATE pThis, PAC97STREAM pStrm)
950	{
951	AssertPtrReturnVoid(pThis);
952	AssertPtrReturnVoid(pStrm);
953
954	LogFlowFunc(("[SD%RU8]\n", pStrm->u8Strm));
955
956	if (pStrm->State.au8FIFOW)
957	{
958	Assert(pStrm->State.cbFIFOW);
959	RT_BZERO(pStrm->State.au8FIFOW, pStrm->State.cbFIFOW);
960	}
961
962	pStrm->State.offFIFOW = 0;
963	}
964
965	static int ichac97MixerSetVolume(PAC97STATE pThis, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
966	{
967	#ifdef DEBUG
968	uint32_t uValMaster = ichac97MixerGet(pThis, AC97_Master_Volume_Mute);
969
970	bool fMasterMuted = (uValMaster >> AC97_BARS_VOL_MASTER_MUTE_SHIFT) & 1;
971	uint8_t lMasterAtt = (uValMaster >> 8) & AC97_BARS_VOL_MASTER_MASK;
972	uint8_t rMasterAtt = uValMaster & AC97_BARS_VOL_MASTER_MASK;
973
974	Assert(lMasterAtt <= AC97_VOL_MAX_STEPS);
975	Assert(rMasterAtt <= AC97_VOL_MAX_STEPS);
976
977	LogFlowFunc(("lMasterAtt=%RU8, rMasterAtt=%RU8, fMasterMuted=%RTbool\n", lMasterAtt, rMasterAtt, fMasterMuted));
978	#endif
979
980	bool fCntlMuted;
981	uint8_t lCntlAtt, rCntlAtt;
982
983	uint8_t uSteps;
984
985	/*
986	* From AC'97 SoundMax Codec AD1981A/AD1981B:
987	* "Because AC '97 defines 6-bit volume registers, to maintain compatibility whenever the
988	* D5 or D13 bits are set to 1, their respective lower five volume bits are automatically
989	* set to 1 by the Codec logic. On readback, all lower 5 bits will read ones whenever
990	* these bits are set to 1."
991	*
992	* Linux ALSA depends on this behavior.
993	*/
994	if (uVal & RT_BIT(5))
995	uVal \|= RT_BIT(4) \| RT_BIT(3) \| RT_BIT(2) \| RT_BIT(1) \| RT_BIT(0);
996	if (uVal & RT_BIT(13))
997	uVal \|= RT_BIT(12) \| RT_BIT(11) \| RT_BIT(10) \| RT_BIT(9) \| RT_BIT(8);
998
999	/* For the master volume, 0 corresponds to 0dB attenuation, each step
1000	* corresponds to -1.5dB. */
1001	if (index == AC97_Master_Volume_Mute)
1002	{
1003	fCntlMuted = (uVal >> AC97_BARS_VOL_MASTER_MUTE_SHIFT) & 1;
1004	lCntlAtt = (uVal >> 8) & AC97_BARS_VOL_MASTER_MASK;
1005	rCntlAtt = uVal & AC97_BARS_VOL_MASTER_MASK;
1006
1007	uSteps = PDMAUDIO_VOLUME_MAX / AC97_BARS_VOL_MASTER_STEPS;
1008	}
1009	/* For other volume controls:
1010	* - 0 - 7 corresponds to +12dB, in 1.5dB steps.
1011	* - 8 corresponds to 0dB gain (unchanged).
1012	* - 9 - X corresponds to -1.5dB steps. */
1013	else
1014	{
1015	fCntlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
1016	lCntlAtt = (uVal >> 8) & AC97_BARS_VOL_MASK;
1017	rCntlAtt = uVal & AC97_BARS_VOL_MASK;
1018
1019	Assert(lCntlAtt <= AC97_VOL_MAX_STEPS);
1020	Assert(rCntlAtt <= AC97_VOL_MAX_STEPS);
1021
1022	#ifndef VBOX_WITH_AC97_GAIN_SUPPORT
1023	/* NB: Currently there is no gain support, only attenuation. */
1024	lCntlAtt = lCntlAtt <= 8 ? 0 : lCntlAtt - 8;
1025	rCntlAtt = rCntlAtt <= 8 ? 0 : rCntlAtt - 8;
1026	#endif
1027	uSteps = PDMAUDIO_VOLUME_MAX / AC97_BARS_VOL_STEPS;
1028	}
1029
1030	LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
1031
1032	LogFunc(("lAtt=%RU8, rAtt=%RU8 ", lCntlAtt, rCntlAtt));
1033
1034	/*
1035	* AC'97 volume controls have 31 steps, each -1.5dB => -40,5dB attenuation total.
1036	*
1037	* In contrast, we're internally using 255 (PDMAUDIO_VOLUME_MAX) steps, each -0.375dB,
1038	* where 0 corresponds to -96dB and 255 corresponds to 0dB (unchanged).
1039	*/
1040	uint8_t lVol = PDMAUDIO_VOLUME_MAX - RT_MIN((lCntlAtt * 4 /* dB resolution / uSteps /* steps */), PDMAUDIO_VOLUME_MAX);
1041	uint8_t rVol = PDMAUDIO_VOLUME_MAX - RT_MIN((rCntlAtt * 4 /* dB resolution / uSteps /* steps */), PDMAUDIO_VOLUME_MAX);
1042
1043	Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCntlMuted, lVol, rVol));
1044
1045	int rc;
1046
1047	if (pThis->pMixer) /* Device can be in reset state, so no mixer available. */
1048	{
1049	PDMAUDIOVOLUME Vol = { fCntlMuted, lVol, rVol };
1050	switch (enmMixerCtl)
1051	{
1052	case PDMAUDIOMIXERCTL_VOLUME_MASTER:
1053	rc = AudioMixerSetMasterVolume(pThis->pMixer, &Vol);
1054	break;
1055	case PDMAUDIOMIXERCTL_FRONT:
1056	rc = AudioMixerSinkSetVolume(pThis->pSinkOutput, &Vol);
1057	break;
1058
1059	case PDMAUDIOMIXERCTL_MIC_IN:
1060	rc = AudioMixerSinkSetVolume(pThis->pSinkMicIn, &Vol);
1061	break;
1062
1063	case PDMAUDIOMIXERCTL_LINE_IN:
1064	rc = AudioMixerSinkSetVolume(pThis->pSinkLineIn, &Vol);
1065	break;
1066
1067	default:
1068	AssertFailed();
1069	rc = VERR_NOT_SUPPORTED;
1070	break;
1071	}
1072	}
1073	else
1074	rc = VINF_SUCCESS;
1075
1076	ichac97MixerSet(pThis, index, uVal);
1077
1078	if (RT_FAILURE(rc))
1079	LogFlowFunc(("Failed with %Rrc\n", rc));
1080
1081	return rc;
1082	}
1083
1084	static PDMAUDIORECSOURCE ichac97IndextoRecSource(uint8_t i)
1085	{
1086	switch (i)
1087	{
1088	case REC_MIC: return PDMAUDIORECSOURCE_MIC;
1089	case REC_CD: return PDMAUDIORECSOURCE_CD;
1090	case REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO;
1091	case REC_AUX: return PDMAUDIORECSOURCE_AUX;
1092	case REC_LINE_IN: return PDMAUDIORECSOURCE_LINE;
1093	case REC_PHONE: return PDMAUDIORECSOURCE_PHONE;
1094	default:
1095	break;
1096	}
1097
1098	LogFlowFunc(("Unknown record source %d, using MIC\n", i));
1099	return PDMAUDIORECSOURCE_MIC;
1100	}
1101
1102	static uint8_t ichac97RecSourceToIndex(PDMAUDIORECSOURCE rs)
1103	{
1104	switch (rs)
1105	{
1106	case PDMAUDIORECSOURCE_MIC: return REC_MIC;
1107	case PDMAUDIORECSOURCE_CD: return REC_CD;
1108	case PDMAUDIORECSOURCE_VIDEO: return REC_VIDEO;
1109	case PDMAUDIORECSOURCE_AUX: return REC_AUX;
1110	case PDMAUDIORECSOURCE_LINE: return REC_LINE_IN;
1111	case PDMAUDIORECSOURCE_PHONE: return REC_PHONE;
1112	default:
1113	break;
1114	}
1115
1116	LogFlowFunc(("Unknown audio recording source %d using MIC\n", rs));
1117	return REC_MIC;
1118	}
1119
1120	static void ichac97RecordSelect(PAC97STATE pThis, uint32_t val)
1121	{
1122	uint8_t rs = val & REC_MASK;
1123	uint8_t ls = (val >> 8) & REC_MASK;
1124	PDMAUDIORECSOURCE ars = ichac97IndextoRecSource(rs);
1125	PDMAUDIORECSOURCE als = ichac97IndextoRecSource(ls);
1126	rs = ichac97RecSourceToIndex(ars);
1127	ls = ichac97RecSourceToIndex(als);
1128	ichac97MixerSet(pThis, AC97_Record_Select, rs \| (ls << 8));
1129	}
1130
1131	static int ichac97MixerReset(PAC97STATE pThis)
1132	{
1133	AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
1134
1135	LogFlowFuncEnter();
1136
1137	RT_ZERO(pThis->mixer_data);
1138
1139	/* Note: Make sure to reset all registers first before bailing out on error. */
1140
1141	ichac97MixerSet(pThis, AC97_Reset , 0x0000); /* 6940 */
1142	ichac97MixerSet(pThis, AC97_Master_Volume_Mono_Mute , 0x8000);
1143	ichac97MixerSet(pThis, AC97_PC_BEEP_Volume_Mute , 0x0000);
1144
1145	ichac97MixerSet(pThis, AC97_Phone_Volume_Mute , 0x8008);
1146	ichac97MixerSet(pThis, AC97_Mic_Volume_Mute , 0x8008);
1147	ichac97MixerSet(pThis, AC97_CD_Volume_Mute , 0x8808);
1148	ichac97MixerSet(pThis, AC97_Aux_Volume_Mute , 0x8808);
1149	ichac97MixerSet(pThis, AC97_Record_Gain_Mic_Mute , 0x8000);
1150	ichac97MixerSet(pThis, AC97_General_Purpose , 0x0000);
1151	ichac97MixerSet(pThis, AC97_3D_Control , 0x0000);
1152	ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f);
1153
1154	ichac97MixerSet(pThis, AC97_Extended_Audio_ID , 0x0809);
1155	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
1156	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80);
1157	ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80);
1158	ichac97MixerSet(pThis, AC97_PCM_LFE_DAC_Rate , 0xbb80);
1159	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate , 0xbb80);
1160	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80);
1161
1162	if (pThis->uCodecModel == Codec_AD1980)
1163	{
1164	/* Analog Devices 1980 (AD1980) */
1165	ichac97MixerSet(pThis, AC97_Reset , 0x0010); /* Headphones. */
1166	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1167	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5370);
1168	ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000);
1169	}
1170	else if (pThis->uCodecModel == Codec_AD1981B)
1171	{
1172	/* Analog Devices 1981B (AD1981B) */
1173	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1174	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5374);
1175	}
1176	else
1177	{
1178	/* Sigmatel 9700 (STAC9700) */
1179	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x8384);
1180	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x7600); /* 7608 */
1181	}
1182	ichac97RecordSelect(pThis, 0);
1183
1184	ichac97MixerSetVolume(pThis, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, 0x8000);
1185	ichac97MixerSetVolume(pThis, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, 0x8808);
1186	ichac97MixerSetVolume(pThis, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8808);
1187	ichac97MixerSetVolume(pThis, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8808);
1188
1189	return VINF_SUCCESS;
1190	}
1191
1192	/**
1193	* Writes data from the device to the host backends.
1194	*
1195	* @return IPRT status code.
1196	* @param pThis
1197	* @param pStream
1198	* @param cbMax
1199	* @param pcbWritten
1200	*/
1201	static int ichac97WriteAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToWrite, uint32_t *pcbWritten)
1202	{
1203	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1204	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1205	AssertReturn(cbToWrite, VERR_INVALID_PARAMETER);
1206	/* pcbWritten is optional. */
1207
1208	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
1209	PAC97BMREGS pRegs = &pStream->Regs;
1210
1211	uint32_t uAddr = pRegs->bd.addr;
1212
1213	uint32_t cbWrittenTotal = 0;
1214
1215	Log3Func(("PICB=%RU16, cbToWrite=%RU32\n", pRegs->picb, cbToWrite));
1216
1217	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToWrite); /** @todo r=andy Assumes 16bit sample size. */
1218	if (!cbLeft)
1219	{
1220	if (pcbWritten)
1221	*pcbWritten = 0;
1222	return VINF_EOF;
1223	}
1224
1225	int rc = VINF_SUCCESS;
1226
1227	Assert(pStream->State.offFIFOW <= pStream->State.cbFIFOW);
1228	uint32_t cbFIFOW = pStream->State.cbFIFOW - pStream->State.offFIFOW;
1229	uint8_t *pu8FIFOW = &pStream->State.au8FIFOW[pStream->State.offFIFOW];
1230
1231	uint32_t cbWritten = 0;
1232
1233	while (cbLeft)
1234	{
1235	uint32_t cbToRead = RT_MIN(cbLeft, cbFIFOW);
1236
1237	PDMDevHlpPhysRead(pDevIns, uAddr, pu8FIFOW, cbToRead); /** @todo r=andy Check rc? */
1238
1239	#ifdef AC97_DEBUG_DUMP_PCM_DATA
1240	RTFILE fh;
1241	RTFileOpen(&fh, AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97WriteAudio.pcm",
1242	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
1243	RTFileWrite(fh, pu8FIFOW, cbToRead, NULL);
1244	RTFileClose(fh);
1245	#endif
1246	/*
1247	* Write data to the mixer sink.
1248	*/
1249	rc = AudioMixerSinkWrite(pThis->pSinkOutput, AUDMIXOP_COPY, pu8FIFOW, cbToRead, &cbWritten);
1250	if (RT_FAILURE(rc))
1251	break;
1252
1253	/* Advance. */
1254	Assert(cbLeft >= cbWritten);
1255	cbLeft -= cbWritten;
1256	cbWrittenTotal += cbWritten;
1257	uAddr += cbWritten;
1258	Assert(cbWrittenTotal <= cbToWrite);
1259
1260	LogFlowFunc(("%RU32 / %RU32\n", cbWrittenTotal, cbToWrite));
1261	}
1262
1263	/* Set new buffer descriptor address. */
1264	pRegs->bd.addr = uAddr;
1265
1266	if (RT_SUCCESS(rc))
1267	{
1268	if (!cbLeft) /* All data written? */
1269	{
1270	if (cbWritten < 4)
1271	{
1272	AssertMsgFailed(("Unable to save last written sample, cbWritten < 4 (is %RU32)\n", cbWritten));
1273	pThis->last_samp = 0;
1274	}
1275	else
1276	pThis->last_samp = (uint32_t )&pStream->State.au8FIFOW[pStream->State.offFIFOW + cbWritten - 4];
1277	}
1278
1279	if (pcbWritten)
1280	*pcbWritten = cbWrittenTotal;
1281	}
1282
1283	if (RT_FAILURE(rc))
1284	LogFlowFunc(("Failed with %Rrc\n", rc));
1285
1286	return rc;
1287	}
1288
1289	static void ichac97WriteBUP(PAC97STATE pThis, uint32_t cbElapsed)
1290	{
1291	LogFlowFunc(("cbElapsed=%RU32\n", cbElapsed));
1292
1293	if (!(pThis->bup_flag & BUP_SET))
1294	{
1295	if (pThis->bup_flag & BUP_LAST)
1296	{
1297	unsigned int i;
1298	uint32_t p = (uint32_t)pThis->silence;
1299	for (i = 0; i < sizeof(pThis->silence) / 4; i++) /** @todo r=andy Assumes 16-bit samples, stereo. */
1300	*p++ = pThis->last_samp;
1301	}
1302	else
1303	RT_ZERO(pThis->silence);
1304
1305	pThis->bup_flag \|= BUP_SET;
1306	}
1307
1308	while (cbElapsed)
1309	{
1310	uint32_t cbToWrite = RT_MIN(cbElapsed, (uint32_t)sizeof(pThis->silence));
1311	uint32_t cbWrittenToStream;
1312
1313	int rc2 = AudioMixerSinkWrite(pThis->pSinkOutput, AUDMIXOP_COPY,
1314	pThis->silence, cbToWrite, &cbWrittenToStream);
1315	if (RT_SUCCESS(rc2))
1316	{
1317	if (cbWrittenToStream < cbToWrite) /* Lagging behind? */
1318	LogFlowFunc(("Warning: Only written %RU32 / %RU32 bytes, expect lags\n", cbWrittenToStream, cbToWrite));
1319	}
1320
1321	/* Always report all data as being written;
1322	* backends who were not able to catch up have to deal with it themselves. */
1323	Assert(cbElapsed >= cbToWrite);
1324	cbElapsed -= cbToWrite;
1325	}
1326	}
1327
1328	static int ichac97ReadAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToRead, uint32_t *pcbRead)
1329	{
1330	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1331	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1332	AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
1333	/* pcbRead is optional. */
1334
1335	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
1336	PAC97BMREGS pRegs = &pStream->Regs;
1337
1338	/* Select audio sink to process. */
1339	AssertMsg(pStream->u8Strm != PO_INDEX, ("Can't read from output\n"));
1340	PAUDMIXSINK pSink = pStream->u8Strm == MC_INDEX ? pThis->pSinkMicIn : pThis->pSinkLineIn;
1341	AssertPtr(pSink);
1342
1343	uint32_t cbRead = 0;
1344
1345	cbToRead = RT_MIN((uint32_t)(pRegs->picb << 1),
1346	RT_MIN(pStream->State.cbFIFOW, cbToRead)); /** @todo r=andy Assumes 16bit samples. */
1347
1348	if (!cbToRead)
1349	{
1350	if (pcbRead)
1351	*pcbRead = 0;
1352	return VINF_EOF;
1353	}
1354
1355	int rc;
1356
1357	rc = AudioMixerSinkRead(pSink, AUDMIXOP_BLEND, &pStream->State.au8FIFOW[pStream->State.offFIFOW], cbToRead, &cbRead);
1358	if ( RT_SUCCESS(rc)
1359	&& cbRead)
1360	{
1361	PDMDevHlpPCIPhysWrite(pDevIns, pRegs->bd.addr, &pStream->State.au8FIFOW[pStream->State.offFIFOW], cbRead);
1362	pRegs->bd.addr += cbRead;
1363	}
1364
1365	if (RT_SUCCESS(rc))
1366	{
1367	if (!cbRead)
1368	rc = VINF_EOF;
1369
1370	if (pcbRead)
1371	*pcbRead = cbRead;
1372	}
1373
1374	return rc;
1375	}
1376
1377	#ifndef VBOX_WITH_AUDIO_CALLBACKS
1378
1379	static void ichac97TimerMaybeStart(PAC97STATE pThis)
1380	{
1381	if (pThis->cStreamsActive == 0) /* Only start the timer if there are no active streams. */
1382	return;
1383
1384	if (!pThis->pTimer)
1385	return;
1386
1387	if (ASMAtomicReadBool(&pThis->fTimerActive) == true) /* Alredy started? */
1388	return;
1389
1390	LogFlowFunc(("Starting timer\n"));
1391
1392	/* Set timer flag. */
1393	ASMAtomicXchgBool(&pThis->fTimerActive, true);
1394
1395	/* Update current time timestamp. */
1396	pThis->uTimerTS = TMTimerGet(pThis->pTimer);
1397
1398	/* Fire off timer. */
1399	TMTimerSet(pThis->pTimer, TMTimerGet(pThis->pTimer) + pThis->cTimerTicks);
1400	}
1401
1402	static void ichac97TimerMaybeStop(PAC97STATE pThis)
1403	{
1404	if (pThis->cStreamsActive) /* Some streams still active? Bail out. */
1405	return;
1406
1407	if (!pThis->pTimer)
1408	return;
1409
1410	if (ASMAtomicReadBool(&pThis->fTimerActive) == false) /* Already stopped? */
1411	return;
1412
1413	LogFlowFunc(("Stopping timer\n"));
1414
1415	/* Set timer flag. */
1416	ASMAtomicXchgBool(&pThis->fTimerActive, false);
1417	}
1418
1419	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
1420	{
1421	PAC97STATE pThis = (PAC97STATE)pvUser;
1422	Assert(pThis == PDMINS_2_DATA(pDevIns, PAC97STATE));
1423	AssertPtr(pThis);
1424
1425	STAM_PROFILE_START(&pThis->StatTimer, a);
1426
1427	uint64_t cTicksNow = TMTimerGet(pTimer);
1428	uint64_t cTicksElapsed = cTicksNow - pThis->uTimerTS;
1429	uint64_t cTicksPerSec = TMTimerGetFreq(pTimer);
1430
1431	LogFlowFuncEnter();
1432
1433	/* Update current time timestamp. */
1434	pThis->uTimerTS = cTicksNow;
1435
1436	/* Flag indicating whether to kick the timer again for a
1437	* new data processing round. */
1438	bool fKickTimer = false;
1439
1440	uint32_t cbToProcess;
1441
1442	int rc = AudioMixerSinkUpdate(pThis->pSinkLineIn);
1443	if (RT_SUCCESS(rc))
1444	{
1445	cbToProcess = AudioMixerSinkGetReadable(pThis->pSinkLineIn);
1446	if (cbToProcess)
1447	rc = ichac97TransferAudio(pThis, &pThis->StreamLineIn, cbToProcess, NULL /* pcbProcessed */);
1448
1449	fKickTimer \|= AudioMixerSinkGetStatus(pThis->pSinkLineIn) & AUDMIXSINK_STS_DIRTY;
1450	}
1451
1452	rc = AudioMixerSinkUpdate(pThis->pSinkMicIn);
1453	if (RT_SUCCESS(rc))
1454	{
1455	cbToProcess = AudioMixerSinkGetReadable(pThis->pSinkMicIn);
1456	if (cbToProcess)
1457	rc = ichac97TransferAudio(pThis, &pThis->StreamMicIn, cbToProcess, NULL /* pcbProcessed */);
1458
1459	fKickTimer \|= AudioMixerSinkGetStatus(pThis->pSinkMicIn) & AUDMIXSINK_STS_DIRTY;
1460	}
1461
1462	rc = AudioMixerSinkUpdate(pThis->pSinkOutput);
1463	if (RT_SUCCESS(rc))
1464	{
1465	cbToProcess = AudioMixerSinkGetWritable(pThis->pSinkOutput);
1466	if (cbToProcess)
1467	rc = ichac97TransferAudio(pThis, &pThis->StreamOut, cbToProcess, NULL /* pcbProcessed */);
1468
1469	fKickTimer \|= AudioMixerSinkGetStatus(pThis->pSinkOutput) & AUDMIXSINK_STS_DIRTY;
1470	}
1471
1472	if ( ASMAtomicReadBool(&pThis->fTimerActive)
1473	\|\| fKickTimer)
1474	{
1475	/* Kick the timer again. */
1476	uint64_t cTicks = pThis->cTimerTicks;
1477	/** @todo adjust cTicks down by now much cbOutMin represents. */
1478	TMTimerSet(pThis->pTimer, cTicksNow + cTicks);
1479	}
1480
1481	STAM_PROFILE_STOP(&pThis->StatTimer, a);
1482	}
1483
1484	#endif /* !VBOX_WITH_AUDIO_CALLBACKS */
1485
1486	static int ichac97TransferAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcess, uint32_t *pcbProcessed)
1487	{
1488	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1489	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1490	/* pcbProcessed is optional. */
1491
1492	Log3Func(("[SD%RU8] cbToProcess=%RU32\n", pStream->u8Strm, cbToProcess));
1493
1494	PAC97BMREGS pRegs = &pStream->Regs;
1495
1496	if (pRegs->sr & SR_DCH) /* Controller halted? */
1497	{
1498	if (pRegs->cr & CR_RPBM) /* Bus master operation starts. */
1499	{
1500	switch (pStream->u8Strm)
1501	{
1502	case PO_INDEX:
1503	ichac97WriteBUP(pThis, cbToProcess);
1504	break;
1505
1506	default:
1507	break;
1508	}
1509	}
1510
1511	if (pcbProcessed)
1512	*pcbProcessed = 0;
1513	return VINF_SUCCESS;
1514	}
1515
1516	/* BCIS flag still set? Skip iteration. */
1517	if (pRegs->sr & SR_BCIS)
1518	{
1519	Log3Func(("[SD%RU8] BCIS set\n", pStream->u8Strm));
1520	if (pcbProcessed)
1521	*pcbProcessed = 0;
1522	return VINF_SUCCESS;
1523	}
1524
1525	int rc = VINF_SUCCESS;
1526
1527	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToProcess);
1528	uint32_t cbTotal = 0;
1529
1530	Log3Func(("[SD%RU8] cbLeft=%RU32\n", pStream->u8Strm, cbLeft));
1531
1532	while (cbLeft)
1533	{
1534	if (!pRegs->bd_valid)
1535	{
1536	LogFlowFunc(("Invalid buffer descriptor, fetching next one ...\n"));
1537	ichac97StreamFetchBDLE(pThis, pStream);
1538	}
1539
1540	if (!pRegs->picb) /* Got a new buffer descriptor, that is, the position is 0? */
1541	{
1542	LogFlowFunc(("Fresh buffer descriptor %RU8 is empty, addr=%#x, len=%#x, skipping\n",
1543	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len));
1544	if (pRegs->civ == pRegs->lvi)
1545	{
1546	pRegs->sr \|= SR_DCH; /** @todo r=andy Also set CELV? */
1547	pThis->bup_flag = 0;
1548
1549	rc = VINF_EOF;
1550	break;
1551	}
1552
1553	pRegs->sr &= ~SR_CELV;
1554	pRegs->civ = pRegs->piv;
1555	pRegs->piv = (pRegs->piv + 1) % 32; /** @todo r=andy Define for max BDLEs? */
1556
1557	ichac97StreamFetchBDLE(pThis, pStream);
1558	continue;
1559	}
1560
1561	uint32_t cbToTransfer, cbTransferred;
1562	switch (pStream->u8Strm)
1563	{
1564	case PO_INDEX:
1565	{
1566	cbToTransfer = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */
1567
1568	rc = ichac97WriteAudio(pThis, pStream, cbToTransfer, &cbTransferred);
1569	if ( RT_SUCCESS(rc)
1570	&& cbTransferred)
1571	{
1572	cbTotal += cbTransferred;
1573	Assert(cbLeft >= cbTransferred);
1574	cbLeft -= cbTransferred;
1575	Assert((cbTransferred & 1) == 0); /* Else the following shift won't work */
1576	pRegs->picb -= (cbTransferred >> 1); /** @todo r=andy Assumes 16bit samples. */
1577	}
1578	break;
1579	}
1580
1581	case PI_INDEX:
1582	case MC_INDEX:
1583	{
1584	cbToTransfer = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */
1585
1586	rc = ichac97ReadAudio(pThis, pStream, cbToTransfer, &cbTransferred);
1587	if ( RT_SUCCESS(rc)
1588	&& cbTransferred)
1589	{
1590	cbTotal += cbTransferred;
1591	Assert(cbLeft >= cbTransferred);
1592	cbLeft -= cbTransferred;
1593	Assert((cbTransferred & 1) == 0); /* Else the following shift won't work */
1594	pRegs->picb -= (cbTransferred >> 1); /** @todo r=andy Assumes 16bit samples. */
1595	}
1596	break;
1597	}
1598
1599	default:
1600	AssertMsgFailed(("Stream #%RU8 not supported\n", pStream->u8Strm));
1601	rc = VERR_NOT_SUPPORTED;
1602	break;
1603	}
1604
1605	LogFlowFunc(("[SD%RU8]: %RU32 / %RU32, rc=%Rrc\n", pStream->u8Strm, cbTotal, cbToProcess, rc));
1606
1607	if (!pRegs->picb)
1608	{
1609	uint32_t new_sr = pRegs->sr & ~SR_CELV;
1610
1611	if (pRegs->bd.ctl_len & BD_IOC)
1612	{
1613	new_sr \|= SR_BCIS;
1614	}
1615
1616	if (pRegs->civ == pRegs->lvi)
1617	{
1618	/* Did we run out of data? */
1619	LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi));
1620
1621	new_sr \|= SR_LVBCI \| SR_DCH \| SR_CELV;
1622	pThis->bup_flag = (pRegs->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
1623
1624	rc = VINF_EOF;
1625	}
1626	else
1627	{
1628	pRegs->civ = pRegs->piv;
1629	pRegs->piv = (pRegs->piv + 1) % 32; /** @todo r=andy Define for max BDLEs? */
1630	ichac97StreamFetchBDLE(pThis, pStream);
1631	}
1632
1633	ichac97StreamUpdateStatus(pThis, pStream, new_sr);
1634	}
1635
1636	if (rc == VINF_EOF) /* All data processed? */
1637	break;
1638	}
1639
1640	if (RT_SUCCESS(rc))
1641	{
1642	if (pcbProcessed)
1643	*pcbProcessed = cbTotal;
1644	}
1645
1646	LogFlowFuncLeaveRC(rc);
1647	return rc;
1648	}
1649
1650	/**
1651	* @callback_method_impl{FNIOMIOPORTIN}
1652	*/
1653	static DECLCALLBACK(int) ichac97IOPortNABMRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
1654	uint32_t *pu32Val, unsigned cbVal)
1655	{
1656	PAC97STATE pThis = (PAC97STATE)pvUser;
1657
1658	/* Get the index of the NABMBAR port. */
1659	const uint32_t uPortIdx = Port - pThis->IOPortBase[1];
1660
1661	PAC97STREAM pStream = ichac97GetStreamFromID(pThis, AC97_PORT2IDX(uPortIdx));
1662	PAC97BMREGS pRegs = pStream ? &pStream->Regs : NULL;
1663
1664	switch (cbVal)
1665	{
1666	case 1:
1667	{
1668	switch (uPortIdx)
1669	{
1670	case CAS:
1671	/* Codec Access Semaphore Register */
1672	LogFlowFunc(("CAS %d\n", pThis->cas));
1673	*pu32Val = pThis->cas;
1674	pThis->cas = 1;
1675	break;
1676	case PI_CIV:
1677	case PO_CIV:
1678	case MC_CIV:
1679	/* Current Index Value Register */
1680	*pu32Val = pRegs->civ;
1681	LogFlowFunc(("CIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1682	break;
1683	case PI_LVI:
1684	case PO_LVI:
1685	case MC_LVI:
1686	/* Last Valid Index Register */
1687	*pu32Val = pRegs->lvi;
1688	LogFlowFunc(("LVI[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1689	break;
1690	case PI_PIV:
1691	case PO_PIV:
1692	case MC_PIV:
1693	/* Prefetched Index Value Register */
1694	*pu32Val = pRegs->piv;
1695	LogFlowFunc(("PIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1696	break;
1697	case PI_CR:
1698	case PO_CR:
1699	case MC_CR:
1700	/* Control Register */
1701	*pu32Val = pRegs->cr;
1702	LogFlowFunc(("CR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1703	break;
1704	case PI_SR:
1705	case PO_SR:
1706	case MC_SR:
1707	/* Status Register (lower part) */
1708	pu32Val = pRegs->sr & 0xff; /* @todo r=andy Use RT_LO_U8. */
1709	LogFlowFunc(("SRb[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1710	break;
1711	default:
1712	*pu32Val = UINT32_MAX;
1713	LogFlowFunc(("U nabm readb %#x -> %#x\n", Port, *pu32Val));
1714	break;
1715	}
1716	break;
1717	}
1718
1719	case 2:
1720	{
1721	switch (uPortIdx)
1722	{
1723	case PI_SR:
1724	case PO_SR:
1725	case MC_SR:
1726	/* Status Register */
1727	*pu32Val = pRegs->sr;
1728	LogFlowFunc(("SR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1729	break;
1730	case PI_PICB:
1731	case PO_PICB:
1732	case MC_PICB:
1733	/* Position in Current Buffer */
1734	*pu32Val = pRegs->picb;
1735	LogFlowFunc(("PICB[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1736	break;
1737	default:
1738	*pu32Val = UINT32_MAX;
1739	LogFlowFunc(("U nabm readw %#x -> %#x\n", Port, *pu32Val));
1740	break;
1741	}
1742	break;
1743	}
1744
1745	case 4:
1746	{
1747	switch (uPortIdx)
1748	{
1749	case PI_BDBAR:
1750	case PO_BDBAR:
1751	case MC_BDBAR:
1752	/* Buffer Descriptor Base Address Register */
1753	*pu32Val = pRegs->bdbar;
1754	LogFlowFunc(("BMADDR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1755	break;
1756	case PI_CIV:
1757	case PO_CIV:
1758	case MC_CIV:
1759	/* 32-bit access: Current Index Value Register +
1760	* Last Valid Index Register +
1761	* Status Register */
1762	pu32Val = pRegs->civ \| (pRegs->lvi << 8) \| (pRegs->sr << 16); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
1763	LogFlowFunc(("CIV LVI SR[%d] -> %#x, %#x, %#x\n",
1764	AC97_PORT2IDX(uPortIdx), pRegs->civ, pRegs->lvi, pRegs->sr));
1765	break;
1766	case PI_PICB:
1767	case PO_PICB:
1768	case MC_PICB:
1769	/* 32-bit access: Position in Current Buffer Register +
1770	* Prefetched Index Value Register +
1771	* Control Register */
1772	pu32Val = pRegs->picb \| (pRegs->piv << 16) \| (pRegs->cr << 24); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
1773	LogFlowFunc(("PICB PIV CR[%d] -> %#x %#x %#x %#x\n",
1774	AC97_PORT2IDX(uPortIdx), *pu32Val, pRegs->picb, pRegs->piv, pRegs->cr));
1775	break;
1776	case GLOB_CNT:
1777	/* Global Control */
1778	*pu32Val = pThis->glob_cnt;
1779	LogFlowFunc(("glob_cnt -> %#x\n", *pu32Val));
1780	break;
1781	case GLOB_STA:
1782	/* Global Status */
1783	*pu32Val = pThis->glob_sta \| GS_S0CR;
1784	LogFlowFunc(("glob_sta -> %#x\n", *pu32Val));
1785	break;
1786	default:
1787	*pu32Val = UINT32_MAX;
1788	LogFlowFunc(("U nabm readl %#x -> %#x\n", Port, *pu32Val));
1789	break;
1790	}
1791	break;
1792	}
1793
1794	default:
1795	return VERR_IOM_IOPORT_UNUSED;
1796	}
1797	return VINF_SUCCESS;
1798	}
1799
1800	/**
1801	* @callback_method_impl{FNIOMIOPORTOUT}
1802	*/
1803	static DECLCALLBACK(int) ichac97IOPortNABMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
1804	uint32_t u32Val, unsigned cbVal)
1805	{
1806	PAC97STATE pThis = (PAC97STATE)pvUser;
1807
1808	/* Get the index of the NABMBAR register. */
1809	const uint32_t uPortIdx = Port - pThis->IOPortBase[1];
1810
1811	PAC97STREAM pStream = ichac97GetStreamFromID(pThis, AC97_PORT2IDX(uPortIdx));
1812	PAC97BMREGS pRegs = pStream ? &pStream->Regs : NULL;
1813
1814	switch (cbVal)
1815	{
1816	case 1:
1817	{
1818	switch (uPortIdx)
1819	{
1820	case PI_LVI:
1821	case PO_LVI:
1822	case MC_LVI:
1823	/* Last Valid Index */
1824	if ((pRegs->cr & CR_RPBM) && (pRegs->sr & SR_DCH))
1825	{
1826	pRegs->sr &= ~(SR_DCH \| SR_CELV);
1827	pRegs->civ = pRegs->piv;
1828	pRegs->piv = (pRegs->piv + 1) % 32;
1829
1830	ichac97StreamFetchBDLE(pThis, pStream);
1831	}
1832	pRegs->lvi = u32Val % 32;
1833	LogFlowFunc(("LVI[%d] <- %#x\n", AC97_PORT2IDX(uPortIdx), u32Val));
1834	break;
1835	case PI_CR:
1836	case PO_CR:
1837	case MC_CR:
1838	{
1839	/* Control Register */
1840	if (u32Val & CR_RR) /* Busmaster reset */
1841	{
1842	ichac97StreamResetBMRegs(pThis, pStream);
1843	}
1844	else
1845	{
1846	pRegs->cr = u32Val & CR_VALID_MASK;
1847	if (!(pRegs->cr & CR_RPBM))
1848	{
1849	ichac97StreamSetActive(pThis, pStream, false /* fActive */);
1850	pRegs->sr \|= SR_DCH;
1851	}
1852	else
1853	{
1854	pRegs->civ = pRegs->piv;
1855	pRegs->piv = (pRegs->piv + 1) % 32;
1856
1857	ichac97StreamFetchBDLE(pThis, pStream);
1858
1859	pRegs->sr &= ~SR_DCH;
1860	ichac97StreamSetActive(pThis, pStream, true /* fActive */);
1861	}
1862	}
1863	LogFlowFunc(("CR[%d] <- %#x (cr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->cr));
1864	break;
1865	}
1866	case PI_SR:
1867	case PO_SR:
1868	case MC_SR:
1869	/* Status Register */
1870	pRegs->sr \|= u32Val & ~(SR_RO_MASK \| SR_WCLEAR_MASK);
1871	ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & SR_WCLEAR_MASK));
1872	LogFlowFunc(("SR[%d] <- %#x (sr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->sr));
1873	break;
1874	default:
1875	LogFlowFunc(("U nabm writeb %#x <- %#x\n", Port, u32Val));
1876	break;
1877	}
1878	break;
1879	}
1880
1881	case 2:
1882	{
1883	switch (uPortIdx)
1884	{
1885	case PI_SR:
1886	case PO_SR:
1887	case MC_SR:
1888	/* Status Register */
1889	pRegs->sr \|= u32Val & ~(SR_RO_MASK \| SR_WCLEAR_MASK);
1890	ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & SR_WCLEAR_MASK));
1891	LogFlowFunc(("SR[%d] <- %#x (sr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->sr));
1892	break;
1893	default:
1894	LogFlowFunc(("U nabm writew %#x <- %#x\n", Port, u32Val));
1895	break;
1896	}
1897	break;
1898	}
1899
1900	case 4:
1901	{
1902	switch (uPortIdx)
1903	{
1904	case PI_BDBAR:
1905	case PO_BDBAR:
1906	case MC_BDBAR:
1907	/* Buffer Descriptor list Base Address Register */
1908	pRegs->bdbar = u32Val & ~3;
1909	LogFlowFunc(("BDBAR[%d] <- %#x (bdbar %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->bdbar));
1910	break;
1911	case GLOB_CNT:
1912	/* Global Control */
1913	if (u32Val & GC_WR)
1914	ichac97WarmReset(pThis);
1915	if (u32Val & GC_CR)
1916	ichac97ColdReset(pThis);
1917	if (!(u32Val & (GC_WR \| GC_CR)))
1918	pThis->glob_cnt = u32Val & GC_VALID_MASK;
1919	LogFlowFunc(("glob_cnt <- %#x (glob_cnt %#x)\n", u32Val, pThis->glob_cnt));
1920	break;
1921	case GLOB_STA:
1922	/* Global Status */
1923	pThis->glob_sta &= ~(u32Val & GS_WCLEAR_MASK);
1924	pThis->glob_sta \|= (u32Val & ~(GS_WCLEAR_MASK \| GS_RO_MASK)) & GS_VALID_MASK;
1925	LogFlowFunc(("glob_sta <- %#x (glob_sta %#x)\n", u32Val, pThis->glob_sta));
1926	break;
1927	default:
1928	LogFlowFunc(("U nabm writel %#x <- %#x\n", Port, u32Val));
1929	break;
1930	}
1931	break;
1932	}
1933
1934	default:
1935	AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cbVal, u32Val));
1936	break;
1937	}
1938	return VINF_SUCCESS;
1939	}
1940
1941	/**
1942	* @callback_method_impl{FNIOMIOPORTIN}
1943	*/
1944	static DECLCALLBACK(int) ichac97IOPortNAMRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32Val, unsigned cbVal)
1945	{
1946	PAC97STATE pThis = (PAC97STATE)pvUser;
1947
1948	switch (cbVal)
1949	{
1950	case 1:
1951	{
1952	LogFlowFunc(("U nam readb %#x\n", Port));
1953	pThis->cas = 0;
1954	*pu32Val = UINT32_MAX;
1955	break;
1956	}
1957
1958	case 2:
1959	{
1960	uint32_t index = Port - pThis->IOPortBase[0];
1961	*pu32Val = UINT32_MAX;
1962	pThis->cas = 0;
1963	switch (index)
1964	{
1965	default:
1966	*pu32Val = ichac97MixerGet(pThis, index);
1967	LogFlowFunc(("nam readw %#x -> %#x\n", Port, *pu32Val));
1968	break;
1969	}
1970	break;
1971	}
1972
1973	case 4:
1974	{
1975	LogFlowFunc(("U nam readl %#x\n", Port));
1976	pThis->cas = 0;
1977	*pu32Val = UINT32_MAX;
1978	break;
1979	}
1980
1981	default:
1982	return VERR_IOM_IOPORT_UNUSED;
1983	}
1984	return VINF_SUCCESS;
1985	}
1986
1987	/**
1988	* @callback_method_impl{FNIOMIOPORTOUT}
1989	*/
1990	static DECLCALLBACK(int) ichac97IOPortNAMWrite(PPDMDEVINS pDevIns,
1991	void *pvUser, RTIOPORT Port, uint32_t u32Val, unsigned cbVal)
1992	{
1993	PAC97STATE pThis = (PAC97STATE)pvUser;
1994
1995	switch (cbVal)
1996	{
1997	case 1:
1998	{
1999	LogFlowFunc(("U nam writeb %#x <- %#x\n", Port, u32Val));
2000	pThis->cas = 0;
2001	break;
2002	}
2003
2004	case 2:
2005	{
2006	uint32_t index = Port - pThis->IOPortBase[0];
2007	pThis->cas = 0;
2008	switch (index)
2009	{
2010	case AC97_Reset:
2011	ichac97Reset(pThis->CTX_SUFF(pDevIns));
2012	break;
2013	case AC97_Powerdown_Ctrl_Stat:
2014	u32Val &= ~0xf;
2015	u32Val \|= ichac97MixerGet(pThis, index) & 0xf;
2016	ichac97MixerSet(pThis, index, u32Val);
2017	break;
2018	case AC97_Master_Volume_Mute:
2019	if (pThis->uCodecModel == Codec_AD1980)
2020	{
2021	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_LOSEL)
2022	break; /* Register controls surround (rear), do nothing. */
2023	}
2024	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
2025	break;
2026	case AC97_Headphone_Volume_Mute:
2027	if (pThis->uCodecModel == Codec_AD1980)
2028	{
2029	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_HPSEL)
2030	{
2031	/* Register controls PCM (front) outputs. */
2032	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
2033	}
2034	}
2035	break;
2036	case AC97_PCM_Out_Volume_Mute:
2037	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_FRONT, u32Val);
2038	break;
2039	case AC97_Line_In_Volume_Mute:
2040	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
2041	break;
2042	case AC97_Record_Select:
2043	ichac97RecordSelect(pThis, u32Val);
2044	break;
2045	case AC97_Vendor_ID1:
2046	case AC97_Vendor_ID2:
2047	LogFlowFunc(("Attempt to write vendor ID to %#x\n", u32Val));
2048	break;
2049	case AC97_Extended_Audio_ID:
2050	LogFlowFunc(("Attempt to write extended audio ID to %#x\n", u32Val));
2051	break;
2052	case AC97_Extended_Audio_Ctrl_Stat:
2053	if (!(u32Val & EACS_VRA))
2054	{
2055	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 48000);
2056	ichac97StreamReInit(pThis, &pThis->StreamOut);
2057
2058	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate, 48000);
2059	ichac97StreamReInit(pThis, &pThis->StreamLineIn);
2060	}
2061	if (!(u32Val & EACS_VRM))
2062	{
2063	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 48000);
2064	ichac97StreamReInit(pThis, &pThis->StreamMicIn);
2065	}
2066	LogFlowFunc(("Setting extended audio control to %#x\n", u32Val));
2067	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, u32Val);
2068	break;
2069	case AC97_PCM_Front_DAC_Rate:
2070	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA)
2071	{
2072	ichac97MixerSet(pThis, index, u32Val);
2073	LogFlowFunc(("Set front DAC rate to %RU32\n", u32Val));
2074	ichac97StreamReInit(pThis, &pThis->StreamOut);
2075	}
2076	else
2077	AssertMsgFailed(("Attempt to set front DAC rate to %RU32, but VRA is not set\n", u32Val));
2078	break;
2079	case AC97_MIC_ADC_Rate:
2080	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM)
2081	{
2082	ichac97MixerSet(pThis, index, u32Val);
2083	LogFlowFunc(("Set MIC ADC rate to %RU32\n", u32Val));
2084	ichac97StreamReInit(pThis, &pThis->StreamMicIn);
2085	}
2086	else
2087	AssertMsgFailed(("Attempt to set MIC ADC rate to %RU32, but VRM is not set\n", u32Val));
2088	break;
2089	case AC97_PCM_LR_ADC_Rate:
2090	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA)
2091	{
2092	ichac97MixerSet(pThis, index, u32Val);
2093	LogFlowFunc(("Set front LR ADC rate to %RU32\n", u32Val));
2094	ichac97StreamReInit(pThis, &pThis->StreamLineIn);
2095	}
2096	else
2097	AssertMsgFailed(("Attempt to set LR ADC rate to %RU32, but VRA is not set\n", u32Val));
2098	break;
2099	default:
2100	LogFlowFunc(("U nam writew %#x <- %#x\n", Port, u32Val));
2101	ichac97MixerSet(pThis, index, u32Val);
2102	break;
2103	}
2104	break;
2105	}
2106
2107	case 4:
2108	{
2109	LogFlowFunc(("U nam writel %#x <- %#x\n", Port, u32Val));
2110	pThis->cas = 0;
2111	break;
2112	}
2113
2114	default:
2115	AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cbVal, u32Val));
2116	break;
2117	}
2118
2119	return VINF_SUCCESS;
2120	}
2121
2122
2123	/**
2124	* @callback_method_impl{FNPCIIOREGIONMAP}
2125	*/
2126	static DECLCALLBACK(int) ichac97IOPortMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb,
2127	PCIADDRESSSPACE enmType)
2128	{
2129	PPDMDEVINS pDevIns = pPciDev->pDevIns;
2130	PAC97STATE pThis = RT_FROM_MEMBER(pPciDev, AC97STATE, PciDev);
2131	RTIOPORT Port = (RTIOPORT)GCPhysAddress;
2132
2133	Assert(enmType == PCI_ADDRESS_SPACE_IO);
2134	Assert(cb >= 0x20);
2135
2136	if (iRegion < 0 \|\| iRegion > 1) /* We support 2 regions max. at the moment. */
2137	return VERR_INVALID_PARAMETER;
2138
2139	int rc;
2140	if (iRegion == 0)
2141	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 256, pThis,
2142	ichac97IOPortNAMWrite, ichac97IOPortNAMRead,
2143	NULL, NULL, "ICHAC97 NAM");
2144	else
2145	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 64, pThis,
2146	ichac97IOPortNABMWrite, ichac97IOPortNABMRead,
2147	NULL, NULL, "ICHAC97 NABM");
2148	if (RT_FAILURE(rc))
2149	return rc;
2150
2151	pThis->IOPortBase[iRegion] = Port;
2152	return VINF_SUCCESS;
2153	}
2154
2155	DECLINLINE(PAC97STREAM) ichac97GetStreamFromID(PAC97STATE pThis, uint32_t uID)
2156	{
2157	switch (uID)
2158	{
2159	case PI_INDEX: return &pThis->StreamLineIn;
2160	case MC_INDEX: return &pThis->StreamMicIn;
2161	case PO_INDEX: return &pThis->StreamOut;
2162	default: break;
2163	}
2164
2165	return NULL;
2166	}
2167
2168	#ifdef IN_RING3
2169	static int ichac97SaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
2170	{
2171	PAC97BMREGS pRegs = &pStream->Regs;
2172
2173	SSMR3PutU32(pSSM, pRegs->bdbar);
2174	SSMR3PutU8( pSSM, pRegs->civ);
2175	SSMR3PutU8( pSSM, pRegs->lvi);
2176	SSMR3PutU16(pSSM, pRegs->sr);
2177	SSMR3PutU16(pSSM, pRegs->picb);
2178	SSMR3PutU8( pSSM, pRegs->piv);
2179	SSMR3PutU8( pSSM, pRegs->cr);
2180	SSMR3PutS32(pSSM, pRegs->bd_valid);
2181	SSMR3PutU32(pSSM, pRegs->bd.addr);
2182	SSMR3PutU32(pSSM, pRegs->bd.ctl_len);
2183
2184	return VINF_SUCCESS;
2185	}
2186
2187	/**
2188	* @callback_method_impl{FNSSMDEVSAVEEXEC}
2189	*/
2190	static DECLCALLBACK(int) ichac97SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2191	{
2192	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2193
2194	LogFlowFuncEnter();
2195
2196	SSMR3PutU32(pSSM, pThis->glob_cnt);
2197	SSMR3PutU32(pSSM, pThis->glob_sta);
2198	SSMR3PutU32(pSSM, pThis->cas);
2199
2200	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
2201	/* Note: The order the streams are saved here is critical, so don't touch. */
2202	int rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamLineIn);
2203	AssertRC(rc2);
2204	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamOut);
2205	AssertRC(rc2);
2206	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamMicIn);
2207	AssertRC(rc2);
2208
2209	SSMR3PutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
2210
2211	uint8_t active[LAST_INDEX];
2212
2213	active[PI_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamLineIn) ? 1 : 0;
2214	active[PO_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamOut) ? 1 : 0;
2215	active[MC_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamMicIn) ? 1 : 0;
2216
2217	SSMR3PutMem(pSSM, active, sizeof(active));
2218
2219	LogFlowFuncLeaveRC(VINF_SUCCESS);
2220	return VINF_SUCCESS;
2221	}
2222
2223	static int ichac97LoadStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
2224	{
2225	PAC97BMREGS pRegs = &pStream->Regs;
2226
2227	SSMR3GetU32(pSSM, &pRegs->bdbar);
2228	SSMR3GetU8( pSSM, &pRegs->civ);
2229	SSMR3GetU8( pSSM, &pRegs->lvi);
2230	SSMR3GetU16(pSSM, &pRegs->sr);
2231	SSMR3GetU16(pSSM, &pRegs->picb);
2232	SSMR3GetU8( pSSM, &pRegs->piv);
2233	SSMR3GetU8( pSSM, &pRegs->cr);
2234	SSMR3GetS32(pSSM, &pRegs->bd_valid);
2235	SSMR3GetU32(pSSM, &pRegs->bd.addr);
2236	SSMR3GetU32(pSSM, &pRegs->bd.ctl_len);
2237
2238	return VINF_SUCCESS;
2239	}
2240
2241	/**
2242	* @callback_method_impl{FNSSMDEVLOADEXEC}
2243	*/
2244	static DECLCALLBACK(int) ichac97LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2245	{
2246	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2247
2248	LogRel2(("ichac97LoadExec: uVersion=%RU32, uPass=0x%x\n", uVersion, uPass));
2249
2250	AssertMsgReturn (uVersion == AC97_SSM_VERSION, ("%RU32\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2251	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2252
2253	SSMR3GetU32(pSSM, &pThis->glob_cnt);
2254	SSMR3GetU32(pSSM, &pThis->glob_sta);
2255	SSMR3GetU32(pSSM, &pThis->cas);
2256
2257	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
2258	/* Note: The order the streams are loaded here is critical, so don't touch. */
2259	int rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamLineIn);
2260	AssertRC(rc2);
2261	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamOut);
2262	AssertRC(rc2);
2263	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamMicIn);
2264	AssertRC(rc2);
2265
2266	SSMR3GetMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
2267
2268	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
2269	uint8_t uaStrmsActive[LAST_INDEX];
2270	SSMR3GetMem(pSSM, uaStrmsActive, sizeof(uaStrmsActive));
2271
2272	ichac97RecordSelect(pThis, ichac97MixerGet(pThis, AC97_Record_Select));
2273	# define V_(a, b) ichac97MixerSetVolume(pThis, a, b, ichac97MixerGet(pThis, a))
2274	V_(AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER);
2275	V_(AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT);
2276	V_(AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN);
2277	V_(AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN);
2278	# undef V_
2279	if (pThis->uCodecModel == Codec_AD1980)
2280	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_HPSEL)
2281	ichac97MixerSetVolume(pThis, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER,
2282	ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute));
2283
2284	int rc = ichac97StreamsInit(pThis);
2285	if (RT_SUCCESS(rc))
2286	{
2287	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
2288	rc = ichac97StreamSetActive(pThis, &pThis->StreamLineIn, RT_BOOL(uaStrmsActive[PI_INDEX]));
2289	if (RT_SUCCESS(rc))
2290	rc = ichac97StreamSetActive(pThis, &pThis->StreamMicIn, RT_BOOL(uaStrmsActive[MC_INDEX]));
2291	if (RT_SUCCESS(rc))
2292	rc = ichac97StreamSetActive(pThis, &pThis->StreamOut, RT_BOOL(uaStrmsActive[PO_INDEX]));
2293	}
2294
2295	pThis->bup_flag = 0;
2296	pThis->last_samp = 0;
2297
2298	LogFlowFuncLeaveRC(rc);
2299	return rc;
2300	}
2301
2302
2303	/**
2304	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2305	*/
2306	static DECLCALLBACK(void ) ichac97QueryInterface(struct PDMIBASE pInterface, const char *pszIID)
2307	{
2308	PAC97STATE pThis = RT_FROM_MEMBER(pInterface, AC97STATE, IBase);
2309	Assert(&pThis->IBase == pInterface);
2310
2311	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
2312	return NULL;
2313	}
2314
2315
2316	/**
2317	* Powers off the device.
2318	*
2319	* @param pDevIns Device instance to power off.
2320	*/
2321	static DECLCALLBACK(void) ichac97PowerOff(PPDMDEVINS pDevIns)
2322	{
2323	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2324
2325	LogRel2(("AC97: Powering off ...\n"));
2326
2327	/**
2328	* Note: Destroy the mixer while powering off and not in ichac97Destruct,
2329	* giving the mixer the chance to release any references held to
2330	* PDM audio streams it maintains.
2331	*/
2332	if (pThis->pMixer)
2333	{
2334	AudioMixerDestroy(pThis->pMixer);
2335	pThis->pMixer = NULL;
2336	}
2337	}
2338
2339
2340	/**
2341	* @interface_method_impl{PDMDEVREG,pfnReset}
2342	*
2343	* @remarks The original sources didn't install a reset handler, but it seems to
2344	* make sense to me so we'll do it.
2345	*/
2346	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns)
2347	{
2348	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2349
2350	LogFlowFuncEnter();
2351
2352	/*
2353	* Reset the device state (will need pDrv later).
2354	*/
2355	ichac97StreamResetBMRegs(pThis, &pThis->StreamLineIn);
2356	ichac97StreamResetBMRegs(pThis, &pThis->StreamMicIn);
2357	ichac97StreamResetBMRegs(pThis, &pThis->StreamOut);
2358
2359	/*
2360	* Reset the mixer too. The Windows XP driver seems to rely on
2361	* this. At least it wants to read the vendor id before it resets
2362	* the codec manually.
2363	*/
2364	ichac97MixerReset(pThis);
2365
2366	/*
2367	* Stop any audio currently playing and/or recording.
2368	*/
2369	AudioMixerSinkCtl(pThis->pSinkOutput, AUDMIXSINKCMD_DISABLE);
2370	AudioMixerSinkCtl(pThis->pSinkMicIn, AUDMIXSINKCMD_DISABLE);
2371	AudioMixerSinkCtl(pThis->pSinkLineIn, AUDMIXSINKCMD_DISABLE);
2372
2373	/*
2374	* Reset all streams.
2375	*/
2376	ichac97StreamReset(pThis, &pThis->StreamLineIn);
2377	ichac97StreamReset(pThis, &pThis->StreamMicIn);
2378	ichac97StreamReset(pThis, &pThis->StreamOut);
2379
2380	LogRel(("AC97: Reset\n"));
2381	}
2382
2383
2384	/**
2385	* @interface_method_impl{PDMDEVREG,pfnDestruct}
2386	*/
2387	static DECLCALLBACK(int) ichac97Destruct(PPDMDEVINS pDevIns)
2388	{
2389	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2390
2391	LogFlowFuncEnter();
2392
2393	ichac97StreamDestroy(&pThis->StreamLineIn);
2394	ichac97StreamDestroy(&pThis->StreamMicIn);
2395	ichac97StreamDestroy(&pThis->StreamOut);
2396
2397	PAC97DRIVER pDrv, pDrvNext;
2398	RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
2399	{
2400	RTListNodeRemove(&pDrv->Node);
2401	RTMemFree(pDrv);
2402	}
2403
2404	/* Sanity. */
2405	Assert(RTListIsEmpty(&pThis->lstDrv));
2406
2407	LogFlowFuncLeave();
2408	return VINF_SUCCESS;
2409	}
2410
2411
2412	/**
2413	* Attach command, internal version.
2414	*
2415	* This is called to let the device attach to a driver for a specified LUN
2416	* during runtime. This is not called during VM construction, the device
2417	* constructor has to attach to all the available drivers.
2418	*
2419	* @returns VBox status code.
2420	* @param pDevIns The device instance.
2421	* @param pDrv Driver to (re-)use for (re-)attaching to.
2422	* If NULL is specified, a new driver will be created and appended
2423	* to the driver list.
2424	* @param uLUN The logical unit which is being detached.
2425	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
2426	*/
2427	static DECLCALLBACK(int) ichac97AttachInternal(PPDMDEVINS pDevIns, PAC97DRIVER pDrv, unsigned uLUN, uint32_t fFlags)
2428	{
2429	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2430
2431	/*
2432	* Attach driver.
2433	*/
2434	char *pszDesc = NULL;
2435	if (RTStrAPrintf(&pszDesc, "Audio driver port (AC'97) for LUN #%u", uLUN) <= 0)
2436	AssertReleaseMsgReturn(pszDesc,
2437	("Not enough memory for AC'97 driver port description of LUN #%u\n", uLUN),
2438	VERR_NO_MEMORY);
2439
2440	PPDMIBASE pDrvBase;
2441	int rc = PDMDevHlpDriverAttach(pDevIns, uLUN,
2442	&pThis->IBase, &pDrvBase, pszDesc);
2443	if (RT_SUCCESS(rc))
2444	{
2445	if (pDrv == NULL)
2446	pDrv = (PAC97DRIVER)RTMemAllocZ(sizeof(AC97DRIVER));
2447	if (pDrv)
2448	{
2449	pDrv->pDrvBase = pDrvBase;
2450	pDrv->pConnector = PDMIBASE_QUERY_INTERFACE(pDrvBase, PDMIAUDIOCONNECTOR);
2451	AssertMsg(pDrv->pConnector != NULL, ("Configuration error: LUN #%u has no host audio interface, rc=%Rrc\n", uLUN, rc));
2452	pDrv->pAC97State = pThis;
2453	pDrv->uLUN = uLUN;
2454
2455	/*
2456	* For now we always set the driver at LUN 0 as our primary
2457	* host backend. This might change in the future.
2458	*/
2459	if (pDrv->uLUN == 0)
2460	pDrv->Flags \|= PDMAUDIODRVFLAG_PRIMARY;
2461
2462	LogFunc(("LUN#%RU8: pCon=%p, drvFlags=0x%x\n", uLUN, pDrv->pConnector, pDrv->Flags));
2463
2464	/* Attach to driver list if not attached yet. */
2465	if (!pDrv->fAttached)
2466	{
2467	RTListAppend(&pThis->lstDrv, &pDrv->Node);
2468	pDrv->fAttached = true;
2469	}
2470	}
2471	else
2472	rc = VERR_NO_MEMORY;
2473	}
2474	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
2475	LogFunc(("No attached driver for LUN #%u\n", uLUN));
2476
2477	if (RT_FAILURE(rc))
2478	{
2479	/* Only free this string on failure;
2480	* must remain valid for the live of the driver instance. */
2481	RTStrFree(pszDesc);
2482	}
2483
2484	LogFunc(("iLUN=%u, fFlags=0x%x, rc=%Rrc\n", uLUN, fFlags, rc));
2485	return rc;
2486	}
2487
2488
2489	/**
2490	* Attach command.
2491	*
2492	* This is called to let the device attach to a driver for a specified LUN
2493	* during runtime. This is not called during VM construction, the device
2494	* constructor has to attach to all the available drivers.
2495	*
2496	* @returns VBox status code.
2497	* @param pDevIns The device instance.
2498	* @param uLUN The logical unit which is being detached.
2499	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
2500	*/
2501	static DECLCALLBACK(int) ichac97Attach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
2502	{
2503	return ichac97AttachInternal(pDevIns, NULL /* pDrv */, uLUN, fFlags);
2504	}
2505
2506	static DECLCALLBACK(void) ichac97Detach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
2507	{
2508	LogFunc(("iLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
2509	}
2510
2511	/**
2512	* Re-attach.
2513	*
2514	* @returns VBox status code.
2515	* @param pThis Device instance.
2516	* @param pDrv Driver instance used for attaching to.
2517	* If NULL is specified, a new driver will be created and appended
2518	* to the driver list.
2519	* @param uLUN The logical unit which is being re-detached.
2520	* @param pszDriver Driver name.
2521	*/
2522	static int ichac97Reattach(PAC97STATE pThis, PAC97DRIVER pDrv, uint8_t uLUN, const char *pszDriver)
2523	{
2524	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2525	AssertPtrReturn(pszDriver, VERR_INVALID_POINTER);
2526
2527	PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
2528	PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
2529	PCFGMNODE pDev0 = CFGMR3GetChild(pRoot, "Devices/ichac97/0/");
2530
2531	/* Remove LUN branch. */
2532	CFGMR3RemoveNode(CFGMR3GetChildF(pDev0, "LUN#%u/", uLUN));
2533
2534	if (pDrv)
2535	{
2536	/* Re-use a driver instance => detach the driver before. */
2537	int rc = PDMDevHlpDriverDetach(pThis->pDevInsR3, PDMIBASE_2_PDMDRV(pDrv->pDrvBase), 0 /* fFlags */);
2538	if (RT_FAILURE(rc))
2539	return rc;
2540	}
2541
2542	#define RC_CHECK() if (RT_FAILURE(rc)) { AssertReleaseRC(rc); break; }
2543
2544	int rc;
2545	do
2546	{
2547	PCFGMNODE pLunL0;
2548	rc = CFGMR3InsertNodeF(pDev0, &pLunL0, "LUN#%u/", uLUN); RC_CHECK();
2549	rc = CFGMR3InsertString(pLunL0, "Driver", "AUDIO"); RC_CHECK();
2550	rc = CFGMR3InsertNode(pLunL0, "Config/", NULL); RC_CHECK();
2551
2552	PCFGMNODE pLunL1, pLunL2;
2553	rc = CFGMR3InsertNode (pLunL0, "AttachedDriver/", &pLunL1); RC_CHECK();
2554	rc = CFGMR3InsertNode (pLunL1, "Config/", &pLunL2); RC_CHECK();
2555	rc = CFGMR3InsertString(pLunL1, "Driver", pszDriver); RC_CHECK();
2556
2557	rc = CFGMR3InsertString(pLunL2, "AudioDriver", pszDriver); RC_CHECK();
2558
2559	} while (0);
2560
2561	if (RT_SUCCESS(rc))
2562	rc = ichac97AttachInternal(pThis->pDevInsR3, pDrv, uLUN, 0 /* fFlags */);
2563
2564	LogFunc(("pThis=%p, uLUN=%u, pszDriver=%s, rc=%Rrc\n", pThis, uLUN, pszDriver, rc));
2565
2566	#undef RC_CHECK
2567
2568	return rc;
2569	}
2570
2571	/**
2572	* @interface_method_impl{PDMDEVREG,pfnConstruct}
2573	*/
2574	static DECLCALLBACK(int) ichac97Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2575	{
2576	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2577
2578	/* NB: This must be done before any possible failure (and running the destructor). */
2579	RTListInit(&pThis->lstDrv);
2580
2581	Assert(iInstance == 0);
2582	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2583
2584	/*
2585	* Validations.
2586	*/
2587	if (!CFGMR3AreValuesValid(pCfg,
2588	"Codec\0"
2589	"TimerHz\0"))
2590	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
2591	N_("Invalid configuration for the AC'97 device"));
2592
2593	/*
2594	* Read config data.
2595	*/
2596	char szCodec[20];
2597	int rc = CFGMR3QueryStringDef(pCfg, "Codec", &szCodec[0], sizeof(szCodec), "STAC9700");
2598	if (RT_FAILURE(rc))
2599	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
2600	N_("AC'97 configuration error: Querying \"Codec\" as string failed"));
2601
2602	#ifndef VBOX_WITH_AUDIO_CALLBACKS
2603	uint16_t uTimerHz;
2604	rc = CFGMR3QueryU16Def(pCfg, "TimerHz", &uTimerHz, AC97_TIMER_HZ /* Default value, if not set. */);
2605	if (RT_FAILURE(rc))
2606	return PDMDEV_SET_ERROR(pDevIns, rc,
2607	N_("AC'97 configuration error: failed to read Hertz (Hz) rate as unsigned integer"));
2608	#endif
2609
2610	/*
2611	* The AD1980 codec (with corresponding PCI subsystem vendor ID) is whitelisted
2612	* in the Linux kernel; Linux makes no attempt to measure the data rate and assumes
2613	* 48 kHz rate, which is exactly what we need. Same goes for AD1981B.
2614	*/
2615	bool fChipAD1980 = false;
2616	if (!strcmp(szCodec, "STAC9700"))
2617	pThis->uCodecModel = Codec_STAC9700;
2618	else if (!strcmp(szCodec, "AD1980"))
2619	pThis->uCodecModel = Codec_AD1980;
2620	else if (!strcmp(szCodec, "AD1981B"))
2621	pThis->uCodecModel = Codec_AD1981B;
2622	else
2623	{
2624	return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS,
2625	N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"),
2626	szCodec);
2627	}
2628
2629	/*
2630	* Initialize data (most of it anyway).
2631	*/
2632	pThis->pDevInsR3 = pDevIns;
2633	/* IBase */
2634	pThis->IBase.pfnQueryInterface = ichac97QueryInterface;
2635
2636	/* PCI Device (the assertions will be removed later) */
2637	PCIDevSetVendorId (&pThis->PciDev, 0x8086); /* 00 ro - intel. */ Assert(pThis->PciDev.config[0x00] == 0x86); Assert(pThis->PciDev.config[0x01] == 0x80);
2638	PCIDevSetDeviceId (&pThis->PciDev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */ Assert(pThis->PciDev.config[0x02] == 0x15); Assert(pThis->PciDev.config[0x03] == 0x24);
2639	PCIDevSetCommand (&pThis->PciDev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert(pThis->PciDev.config[0x04] == 0x00); Assert(pThis->PciDev.config[0x05] == 0x00);
2640	PCIDevSetStatus (&pThis->PciDev, VBOX_PCI_STATUS_DEVSEL_MEDIUM \| VBOX_PCI_STATUS_FAST_BACK); /* 06 rwc?,ro? - pcists. */ Assert(pThis->PciDev.config[0x06] == 0x80); Assert(pThis->PciDev.config[0x07] == 0x02);
2641	PCIDevSetRevisionId (&pThis->PciDev, 0x01); /* 08 ro - rid. */ Assert(pThis->PciDev.config[0x08] == 0x01);
2642	PCIDevSetClassProg (&pThis->PciDev, 0x00); /* 09 ro - pi. */ Assert(pThis->PciDev.config[0x09] == 0x00);
2643	PCIDevSetClassSub (&pThis->PciDev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert(pThis->PciDev.config[0x0a] == 0x01);
2644	PCIDevSetClassBase (&pThis->PciDev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ Assert(pThis->PciDev.config[0x0b] == 0x04);
2645	PCIDevSetHeaderType (&pThis->PciDev, 0x00); /* 0e ro - headtyp. */ Assert(pThis->PciDev.config[0x0e] == 0x00);
2646	PCIDevSetBaseAddress (&pThis->PciDev, 0, /* 10 rw - nambar - native audio mixer base. */
2647	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.config[0x10] == 0x01); Assert(pThis->PciDev.config[0x11] == 0x00); Assert(pThis->PciDev.config[0x12] == 0x00); Assert(pThis->PciDev.config[0x13] == 0x00);
2648	PCIDevSetBaseAddress (&pThis->PciDev, 1, /* 14 rw - nabmbar - native audio bus mastering. */
2649	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.config[0x14] == 0x01); Assert(pThis->PciDev.config[0x15] == 0x00); Assert(pThis->PciDev.config[0x16] == 0x00); Assert(pThis->PciDev.config[0x17] == 0x00);
2650	PCIDevSetInterruptLine (&pThis->PciDev, 0x00); /* 3c rw. */ Assert(pThis->PciDev.config[0x3c] == 0x00);
2651	PCIDevSetInterruptPin (&pThis->PciDev, 0x01); /* 3d ro - INTA#. */ Assert(pThis->PciDev.config[0x3d] == 0x01);
2652
2653	if (pThis->uCodecModel == Codec_AD1980)
2654	{
2655	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
2656	PCIDevSetSubSystemId (&pThis->PciDev, 0x0177); /* 2e ro. */
2657	}
2658	else if (pThis->uCodecModel == Codec_AD1981B)
2659	{
2660	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
2661	PCIDevSetSubSystemId (&pThis->PciDev, 0x01ad); /* 2e ro. */
2662	}
2663	else
2664	{
2665	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x8086); /* 2c ro - Intel.) */
2666	PCIDevSetSubSystemId (&pThis->PciDev, 0x0000); /* 2e ro. */
2667	}
2668
2669	/*
2670	* Register the PCI device, it's I/O regions, the timer and the
2671	* saved state item.
2672	*/
2673	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
2674	if (RT_FAILURE(rc))
2675	return rc;
2676
2677	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 256, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
2678	if (RT_FAILURE(rc))
2679	return rc;
2680
2681	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 64, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
2682	if (RT_FAILURE(rc))
2683	return rc;
2684
2685	rc = PDMDevHlpSSMRegister(pDevIns, AC97_SSM_VERSION, sizeof(*pThis), ichac97SaveExec, ichac97LoadExec);
2686	if (RT_FAILURE(rc))
2687	return rc;
2688
2689	/*
2690	* Attach driver.
2691	*/
2692	uint8_t uLUN;
2693	for (uLUN = 0; uLUN < UINT8_MAX; ++uLUN)
2694	{
2695	LogFunc(("Trying to attach driver for LUN #%RU8 ...\n", uLUN));
2696	rc = ichac97AttachInternal(pDevIns, NULL /* pDrv /, uLUN, 0 / fFlags */);
2697	if (RT_FAILURE(rc))
2698	{
2699	if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
2700	rc = VINF_SUCCESS;
2701	else if (rc == VERR_AUDIO_BACKEND_INIT_FAILED)
2702	{
2703	ichac97Reattach(pThis, NULL /* pDrv */, uLUN, "NullAudio");
2704	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
2705	N_("No audio devices could be opened. Selecting the NULL audio backend "
2706	"with the consequence that no sound is audible"));
2707	/* attaching to the NULL audio backend will never fail */
2708	rc = VINF_SUCCESS;
2709	}
2710	break;
2711	}
2712	}
2713
2714	LogFunc(("cLUNs=%RU8, rc=%Rrc\n", uLUN, rc));
2715
2716	if (RT_SUCCESS(rc))
2717	{
2718	rc = AudioMixerCreate("AC'97 Mixer", 0 /* uFlags */, &pThis->pMixer);
2719	if (RT_SUCCESS(rc))
2720	{
2721	/* Set a default audio format for our mixer. */
2722	PDMAUDIOSTREAMCFG streamCfg;
2723	streamCfg.uHz = 44100;
2724	streamCfg.cChannels = 2;
2725	streamCfg.enmFormat = PDMAUDIOFMT_S16;
2726	streamCfg.enmEndianness = PDMAUDIOHOSTENDIANNESS;
2727
2728	rc = AudioMixerSetDeviceFormat(pThis->pMixer, &streamCfg);
2729	AssertRC(rc);
2730
2731	/* Add all required audio sinks. */
2732	int rc2 = AudioMixerCreateSink(pThis->pMixer, "[Playback] PCM Output", AUDMIXSINKDIR_OUTPUT, &pThis->pSinkOutput);
2733	AssertRC(rc2);
2734
2735	rc2 = AudioMixerCreateSink(pThis->pMixer, "[Recording] Line In", AUDMIXSINKDIR_INPUT, &pThis->pSinkLineIn);
2736	AssertRC(rc2);
2737
2738	rc2 = AudioMixerCreateSink(pThis->pMixer, "[Recording] Microphone In", AUDMIXSINKDIR_INPUT, &pThis->pSinkMicIn);
2739	AssertRC(rc2);
2740	}
2741	}
2742
2743	ichac97Reset(pDevIns);
2744
2745	if (RT_SUCCESS(rc))
2746	{
2747	ichac97StreamsInit(pThis);
2748
2749	PAC97DRIVER pDrv;
2750	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
2751	{
2752	/*
2753	* Only primary drivers are critical for the VM to run. Everything else
2754	* might not worth showing an own error message box in the GUI.
2755	*/
2756	if (!(pDrv->Flags & PDMAUDIODRVFLAG_PRIMARY))
2757	continue;
2758
2759	PPDMIAUDIOCONNECTOR pCon = pDrv->pConnector;
2760	AssertPtr(pCon);
2761
2762	bool fValidLineIn = AudioMixerStreamIsValid(pDrv->LineIn.pMixStrm);
2763	bool fValidMicIn = AudioMixerStreamIsValid(pDrv->MicIn.pMixStrm);
2764	bool fValidOut = AudioMixerStreamIsValid(pDrv->Out.pMixStrm);
2765
2766	if ( !fValidLineIn
2767	&& !fValidMicIn
2768	&& !fValidOut)
2769	{
2770	LogRel(("AC97: Falling back to NULL backend (no sound audible)\n"));
2771
2772	/* Destroy the streams before re-attaching the NULL driver. */
2773	ichac97StreamsDestroy(pThis);
2774
2775	ichac97Reset(pDevIns);
2776	ichac97Reattach(pThis, pDrv, pDrv->uLUN, "NullAudio");
2777
2778	ichac97StreamsInit(pThis);
2779
2780	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
2781	N_("No audio devices could be opened. Selecting the NULL audio backend "
2782	"with the consequence that no sound is audible"));
2783	}
2784	else
2785	{
2786	bool fWarn = false;
2787
2788	PDMAUDIOBACKENDCFG backendCfg;
2789	int rc2 = pCon->pfnGetConfig(pCon, &backendCfg);
2790	if (RT_SUCCESS(rc2))
2791	{
2792	if (backendCfg.cSources)
2793	{
2794	/* If the audio backend supports two or more input streams at once,
2795	* warn if one of our two inputs (microphone-in and line-in) failed to initialize. */
2796	if (backendCfg.cMaxStreamsIn >= 2)
2797	fWarn = !fValidLineIn \|\| !fValidMicIn;
2798	/* If the audio backend only supports one input stream at once (e.g. pure ALSA, and
2799	* not ALSA via PulseAudio plugin!), only warn if both of our inputs failed to initialize.
2800	* One of the two simply is not in use then. */
2801	else if (backendCfg.cMaxStreamsIn == 1)
2802	fWarn = !fValidLineIn && !fValidMicIn;
2803	/* Don't warn if our backend is not able of supporting any input streams at all. */
2804	}
2805
2806	if ( !fWarn
2807	&& backendCfg.cSinks)
2808	{
2809	fWarn = !fValidOut;
2810	}
2811	}
2812	else
2813	{
2814	LogRel(("AC97: Unable to retrieve audio backend configuration for LUN #%RU8, rc=%Rrc\n", pDrv->uLUN, rc2));
2815	fWarn = true;
2816	}
2817
2818	if (fWarn)
2819	{
2820	char szMissingStreams[255];
2821	size_t len = 0;
2822	if (!fValidLineIn)
2823	{
2824	LogRel(("AC97: WARNING: Unable to open PCM line input for LUN #%RU8!\n", pDrv->uLUN));
2825	len = RTStrPrintf(szMissingStreams, sizeof(szMissingStreams), "PCM Input");
2826	}
2827	if (!fValidMicIn)
2828	{
2829	LogRel(("AC97: WARNING: Unable to open PCM microphone input for LUN #%RU8!\n", pDrv->uLUN));
2830	len += RTStrPrintf(szMissingStreams + len,
2831	sizeof(szMissingStreams) - len, len ? ", PCM Microphone" : "PCM Microphone");
2832	}
2833	if (!fValidOut)
2834	{
2835	LogRel(("AC97: WARNING: Unable to open PCM output for LUN #%RU8!\n", pDrv->uLUN));
2836	len += RTStrPrintf(szMissingStreams + len,
2837	sizeof(szMissingStreams) - len, len ? ", PCM Output" : "PCM Output");
2838	}
2839
2840	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
2841	N_("Some AC'97 audio streams (%s) could not be opened. Guest applications generating audio "
2842	"output or depending on audio input may hang. Make sure your host audio device "
2843	"is working properly. Check the logfile for error messages of the audio "
2844	"subsystem"), szMissingStreams);
2845	}
2846	}
2847	}
2848	}
2849
2850	# ifndef VBOX_WITH_AUDIO_CALLBACKS
2851	if (RT_SUCCESS(rc))
2852	{
2853	/* Start the emulation timer. */
2854	rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, ichac97Timer, pThis,
2855	TMTIMER_FLAGS_NO_CRIT_SECT, "DevIchAc97", &pThis->pTimer);
2856	AssertRCReturn(rc, rc);
2857
2858	if (RT_SUCCESS(rc))
2859	{
2860	pThis->cTimerTicks = TMTimerGetFreq(pThis->pTimer) / uTimerHz;
2861	pThis->uTimerTS = TMTimerGet(pThis->pTimer);
2862	LogFunc(("Timer ticks=%RU64 (%RU16 Hz)\n", pThis->cTimerTicks, uTimerHz));
2863
2864	ichac97TimerMaybeStart(pThis);
2865	}
2866	}
2867	# else
2868	if (RT_SUCCESS(rc))
2869	{
2870	PAC97DRIVER pDrv;
2871	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
2872	{
2873	/* Only register primary driver.
2874	* The device emulation does the output multiplexing then. */
2875	if (!(pDrv->Flags & PDMAUDIODRVFLAG_PRIMARY))
2876	continue;
2877
2878	PDMAUDIOCALLBACK AudioCallbacks[2];
2879
2880	AC97CALLBACKCTX Ctx = { pThis, pDrv };
2881
2882	AudioCallbacks[0].enmType = PDMAUDIOCALLBACKTYPE_INPUT;
2883	AudioCallbacks[0].pfnCallback = ac97CallbackInput;
2884	AudioCallbacks[0].pvCtx = &Ctx;
2885	AudioCallbacks[0].cbCtx = sizeof(AC97CALLBACKCTX);
2886
2887	AudioCallbacks[1].enmType = PDMAUDIOCALLBACKTYPE_OUTPUT;
2888	AudioCallbacks[1].pfnCallback = ac97CallbackOutput;
2889	AudioCallbacks[1].pvCtx = &Ctx;
2890	AudioCallbacks[1].cbCtx = sizeof(AC97CALLBACKCTX);
2891
2892	rc = pDrv->pConnector->pfnRegisterCallbacks(pDrv->pConnector, AudioCallbacks, RT_ELEMENTS(AudioCallbacks));
2893	if (RT_FAILURE(rc))
2894	break;
2895	}
2896	}
2897	# endif
2898
2899	# ifdef VBOX_WITH_STATISTICS
2900	if (RT_SUCCESS(rc))
2901	{
2902	/*
2903	* Register statistics.
2904	*/
2905	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, "/Devices/AC97/Timer", STAMUNIT_TICKS_PER_CALL, "Profiling ichac97Timer.");
2906	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, "/Devices/AC97/BytesRead" , STAMUNIT_BYTES, "Bytes read from AC97 emulation.");
2907	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, "/Devices/AC97/BytesWritten", STAMUNIT_BYTES, "Bytes written to AC97 emulation.");
2908	}
2909	# endif
2910
2911	LogFlowFuncLeaveRC(rc);
2912	return rc;
2913	}
2914
2915	/**
2916	* The device registration structure.
2917	*/
2918	const PDMDEVREG g_DeviceICHAC97 =
2919	{
2920	/* u32Version */
2921	PDM_DEVREG_VERSION,
2922	/* szName */
2923	"ichac97",
2924	/* szRCMod */
2925	"",
2926	/* szR0Mod */
2927	"",
2928	/* pszDescription */
2929	"ICH AC'97 Audio Controller",
2930	/* fFlags */
2931	PDM_DEVREG_FLAGS_DEFAULT_BITS,
2932	/* fClass */
2933	PDM_DEVREG_CLASS_AUDIO,
2934	/* cMaxInstances */
2935	1,
2936	/* cbInstance */
2937	sizeof(AC97STATE),
2938	/* pfnConstruct */
2939	ichac97Construct,
2940	/* pfnDestruct */
2941	ichac97Destruct,
2942	/* pfnRelocate */
2943	NULL,
2944	/* pfnMemSetup */
2945	NULL,
2946	/* pfnPowerOn */
2947	NULL,
2948	/* pfnReset */
2949	ichac97Reset,
2950	/* pfnSuspend */
2951	NULL,
2952	/* pfnResume */
2953	NULL,
2954	/* pfnAttach */
2955	ichac97Attach,
2956	/* pfnDetach */
2957	ichac97Detach,
2958	/* pfnQueryInterface. */
2959	NULL,
2960	/* pfnInitComplete */
2961	NULL,
2962	/* pfnPowerOff */
2963	ichac97PowerOff,
2964	/* pfnSoftReset */
2965	NULL,
2966	/* u32VersionEnd */
2967	PDM_DEVREG_VERSION
2968	};
2969
2970	#endif /* !IN_RING3 */
2971	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Audio/DevIchAc97.cpp@ 61888

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