DevIchAc97.cpp@ 64998

Last change on this file since 64998 was 64998, checked in by vboxsync, 8 years ago
DevIchAc97: temporary fix
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1	/* $Id: DevIchAc97.cpp 64998 2016-12-22 14:53:56Z vboxsync $ */
2	/** @file
3	* DevIchAc97 - VBox ICH AC97 Audio Controller.
4	*/
5
6	/*
7	* Copyright (C) 2006-2016 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_AC97
23	#include <VBox/log.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <VBox/vmm/pdmaudioifs.h>
26
27	#include <iprt/assert.h>
28	#ifdef IN_RING3
29	# ifdef DEBUG
30	# include <iprt/file.h>
31	# endif
32	# include <iprt/mem.h>
33	# include <iprt/semaphore.h>
34	# include <iprt/string.h>
35	# include <iprt/uuid.h>
36	#endif
37
38	#include "VBoxDD.h"
39
40	#include "AudioMixBuffer.h"
41	#include "AudioMixer.h"
42	#include "DrvAudio.h"
43
44
45	/*********************************************************************************************************************************
46	* Defined Constants And Macros *
47	*********************************************************************************************************************************/
48
49	#if 0
50	/*
51	* AC97_DEBUG_DUMP_PCM_DATA enables dumping the raw PCM data
52	* to a file on the host. Be sure to adjust AC97_DEBUG_DUMP_PCM_DATA_PATH
53	* to your needs before using this!
54	*/
55	# define AC97_DEBUG_DUMP_PCM_DATA
56	# ifdef RT_OS_WINDOWS
57	# define AC97_DEBUG_DUMP_PCM_DATA_PATH "c:\\temp\\"
58	# else
59	# define AC97_DEBUG_DUMP_PCM_DATA_PATH "/tmp/"
60	# endif
61	#endif
62
63	/** Current saved state version. */
64	#define AC97_SSM_VERSION 1
65
66	/** Default timer frequency (in Hz). */
67	#define AC97_TIMER_HZ 100
68
69	#define AC97_SR_FIFOE RT_BIT(4) /* rwc, FIFO error. */
70	#define AC97_SR_BCIS RT_BIT(3) /* rwc, Buffer completion interrupt status. */
71	#define AC97_SR_LVBCI RT_BIT(2) /* rwc, Last valid buffer completion interrupt. */
72	#define AC97_SR_CELV RT_BIT(1) /* ro, Current equals last valid. */
73	#define AC97_SR_DCH RT_BIT(0) /* ro, Controller halted. */
74	#define AC97_SR_VALID_MASK (RT_BIT(5) - 1)
75	#define AC97_SR_WCLEAR_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
76	#define AC97_SR_RO_MASK (AC97_SR_DCH \| AC97_SR_CELV)
77	#define AC97_SR_INT_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
78
79	#define AC97_CR_IOCE RT_BIT(4) /* rw, Interrupt On Completion Enable. */
80	#define AC97_CR_FEIE RT_BIT(3) /* rw FIFO Error Interrupt Enable. */
81	#define AC97_CR_LVBIE RT_BIT(2) /* rw Last Valid Buffer Interrupt Enable. */
82	#define AC97_CR_RR RT_BIT(1) /* rw Reset Registers. */
83	#define AC97_CR_RPBM RT_BIT(0) /* rw Run/Pause Bus Master. */
84	#define AC97_CR_VALID_MASK (RT_BIT(5) - 1)
85	#define AC97_CR_DONT_CLEAR_MASK (AC97_CR_IOCE \| AC97_CR_FEIE \| AC97_CR_LVBIE)
86
87	#define AC97_GC_WR 4 /* rw Warm reset. */
88	#define AC97_GC_CR 2 /* rw Cold reset. */
89	#define AC97_GC_VALID_MASK (RT_BIT(6) - 1)
90
91	#define AC97_GS_MD3 RT_BIT(17) /* rw */
92	#define AC97_GS_AD3 RT_BIT(16) /* rw */
93	#define AC97_GS_RCS RT_BIT(15) /* rwc */
94	#define AC97_GS_B3S12 RT_BIT(14) /* ro */
95	#define AC97_GS_B2S12 RT_BIT(13) /* ro */
96	#define AC97_GS_B1S12 RT_BIT(12) /* ro */
97	#define AC97_GS_S1R1 RT_BIT(11) /* rwc */
98	#define AC97_GS_S0R1 RT_BIT(10) /* rwc */
99	#define AC97_GS_S1CR RT_BIT(9) /* ro */
100	#define AC97_GS_S0CR RT_BIT(8) /* ro */
101	#define AC97_GS_MINT RT_BIT(7) /* ro */
102	#define AC97_GS_POINT RT_BIT(6) /* ro */
103	#define AC97_GS_PIINT RT_BIT(5) /* ro */
104	#define AC97_GS_RSRVD (RT_BIT(4)\|RT_BIT(3))
105	#define AC97_GS_MOINT RT_BIT(2) /* ro */
106	#define AC97_GS_MIINT RT_BIT(1) /* ro */
107	#define AC97_GS_GSCI RT_BIT(0) /* rwc */
108	#define AC97_GS_RO_MASK (AC97_GS_B3S12 \| \
109	AC97_GS_B2S12 \| \
110	AC97_GS_B1S12 \| \
111	AC97_GS_S1CR \| \
112	AC97_GS_S0CR \| \
113	AC97_GS_MINT \| \
114	AC97_GS_POINT \| \
115	AC97_GS_PIINT \| \
116	AC97_GS_RSRVD \| \
117	AC97_GS_MOINT \| \
118	AC97_GS_MIINT)
119	#define AC97_GS_VALID_MASK (RT_BIT(18) - 1)
120	#define AC97_GS_WCLEAR_MASK (AC97_GS_RCS\|AC97_GS_S1R1\|AC97_GS_S0R1\|AC97_GS_GSCI)
121
122	/** @name Buffer Descriptor (BD).
123	* @{ */
124	#define AC97_BD_IOC RT_BIT(31) /*< Interrupt on Completion. /
125	#define AC97_BD_BUP RT_BIT(30) /*< Buffer Underrun Policy. /
126
127	#define AC97_BD_MAX_LEN_MASK 0xFFFE
128	/** @} */
129
130	/** @name Extended Audio Status and Control Register (EACS).
131	* @{ */
132	#define AC97_EACS_VRA 1 /*< Variable Rate Audio (4.2.1.1). /
133	#define AC97_EACS_VRM 8 /*< Variable Rate Mic Audio (4.2.1.1). /
134	/** @} */
135
136	/** @name Baseline Audio Register Set (BARS).
137	* @{ */
138	#define AC97_BARS_VOL_MASK 0x1f /*< Volume mask for the Baseline Audio Register Set (5.7.2). /
139	#define AC97_BARS_VOL_STEPS 31 /*< Volume steps for the Baseline Audio Register Set (5.7.2). /
140	#define AC97_BARS_VOL_MUTE_SHIFT 15 /*< Mute bit shift for the Baseline Audio Register Set (5.7.2). /
141	/** @} */
142
143	/* AC'97 uses 1.5dB steps, we use 0.375dB steps: 1 AC'97 step equals 4 PDM steps. */
144	#define AC97_DB_FACTOR 4
145
146	#define AC97_REC_MASK 7
147	enum
148	{
149	AC97_REC_MIC = 0,
150	AC97_REC_CD,
151	AC97_REC_VIDEO,
152	AC97_REC_AUX,
153	AC97_REC_LINE_IN,
154	AC97_REC_STEREO_MIX,
155	AC97_REC_MONO_MIX,
156	AC97_REC_PHONE
157	};
158
159	enum
160	{
161	AC97_Reset = 0x00,
162	AC97_Master_Volume_Mute = 0x02,
163	AC97_Headphone_Volume_Mute = 0x04, /** Also known as AUX, see table 16, section 5.7. */
164	AC97_Master_Volume_Mono_Mute = 0x06,
165	AC97_Master_Tone_RL = 0x08,
166	AC97_PC_BEEP_Volume_Mute = 0x0A,
167	AC97_Phone_Volume_Mute = 0x0C,
168	AC97_Mic_Volume_Mute = 0x0E,
169	AC97_Line_In_Volume_Mute = 0x10,
170	AC97_CD_Volume_Mute = 0x12,
171	AC97_Video_Volume_Mute = 0x14,
172	AC97_Aux_Volume_Mute = 0x16,
173	AC97_PCM_Out_Volume_Mute = 0x18,
174	AC97_Record_Select = 0x1A,
175	AC97_Record_Gain_Mute = 0x1C,
176	AC97_Record_Gain_Mic_Mute = 0x1E,
177	AC97_General_Purpose = 0x20,
178	AC97_3D_Control = 0x22,
179	AC97_AC_97_RESERVED = 0x24,
180	AC97_Powerdown_Ctrl_Stat = 0x26,
181	AC97_Extended_Audio_ID = 0x28,
182	AC97_Extended_Audio_Ctrl_Stat = 0x2A,
183	AC97_PCM_Front_DAC_Rate = 0x2C,
184	AC97_PCM_Surround_DAC_Rate = 0x2E,
185	AC97_PCM_LFE_DAC_Rate = 0x30,
186	AC97_PCM_LR_ADC_Rate = 0x32,
187	AC97_MIC_ADC_Rate = 0x34,
188	AC97_6Ch_Vol_C_LFE_Mute = 0x36,
189	AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
190	AC97_Vendor_Reserved = 0x58,
191	AC97_AD_Misc = 0x76,
192	AC97_Vendor_ID1 = 0x7c,
193	AC97_Vendor_ID2 = 0x7e
194	};
195
196	/* Codec models. */
197	typedef enum
198	{
199	AC97_CODEC_STAC9700 = 0, /* SigmaTel STAC9700 */
200	AC97_CODEC_AD1980, /* Analog Devices AD1980 */
201	AC97_CODEC_AD1981B /* Analog Devices AD1981B */
202	} AC97CODEC;
203
204	/* Analog Devices miscellaneous regiter bits used in AD1980. */
205	#define AC97_AD_MISC_LOSEL RT_BIT(5) /* Surround (rear) goes to line out outputs. */
206	#define AC97_AD_MISC_HPSEL RT_BIT(10) /* PCM (front) goes to headphone outputs. */
207
208	#define ICHAC97STATE_2_DEVINS(a_pAC97) ((a_pAC97)->pDevInsR3)
209
210	enum
211	{
212	BUP_SET = RT_BIT(0),
213	BUP_LAST = RT_BIT(1)
214	};
215
216	/** Emits registers for a specific (Native Audio Bus Master BAR) NABMBAR. */
217	#define AC97_NABMBAR_REGS(prefix, off) \
218	enum { \
219	prefix ## _BDBAR = off, /* Buffer Descriptor Base Address */ \
220	prefix ## _CIV = off + 4, /* Current Index Value */ \
221	prefix ## _LVI = off + 5, /* Last Valid Index */ \
222	prefix ## _SR = off + 6, /* Status Register */ \
223	prefix ## _PICB = off + 8, /* Position in Current Buffer */ \
224	prefix ## _PIV = off + 10, /* Prefetched Index Value */ \
225	prefix ## _CR = off + 11 /* Control Register */ \
226	}
227
228	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
229	typedef enum
230	{
231	AC97SOUNDSOURCE_PI_INDEX = 0, /** PCM in */
232	AC97SOUNDSOURCE_PO_INDEX, /** PCM out */
233	AC97SOUNDSOURCE_MC_INDEX, /** Mic in */
234	AC97SOUNDSOURCE_LAST_INDEX
235	} AC97SOUNDSOURCE;
236
237	AC97_NABMBAR_REGS(PI, AC97SOUNDSOURCE_PI_INDEX * 16);
238	AC97_NABMBAR_REGS(PO, AC97SOUNDSOURCE_PO_INDEX * 16);
239	AC97_NABMBAR_REGS(MC, AC97SOUNDSOURCE_MC_INDEX * 16);
240	#endif
241
242	enum
243	{
244	/** NABMBAR: Global Control Register. */
245	AC97_GLOB_CNT = 0x2c,
246	/** NABMBAR Global Status. */
247	AC97_GLOB_STA = 0x30,
248	/** Codec Access Semaphore Register. */
249	AC97_CAS = 0x34
250	};
251
252	#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
253
254
255	/*********************************************************************************************************************************
256	* Structures and Typedefs *
257	*********************************************************************************************************************************/
258
259	/**
260	* Buffer Descriptor List Entry (BDLE).
261	*/
262	typedef struct AC97BDLE
263	{
264	uint32_t addr;
265	uint32_t ctl_len;
266	} AC97BDLE, *PAC97BDLE;
267
268	/**
269	* Bus master register set for an audio stream.
270	*/
271	typedef struct AC97BMREGS
272	{
273	uint32_t bdbar; /** rw 0, Buffer Descriptor List: BAR (Base Address Register). */
274	uint8_t civ; /** ro 0, Current index value. */
275	uint8_t lvi; /** rw 0, Last valid index. */
276	uint16_t sr; /** rw 1, Status register. */
277	uint16_t picb; /** ro 0, Position in current buffer (in samples). */
278	uint8_t piv; /** ro 0, Prefetched index value. */
279	uint8_t cr; /** rw 0, Control register. */
280	int bd_valid; /** Whether current BDLE is initialized or not. */
281	AC97BDLE bd; /** Current Buffer Descriptor List Entry (BDLE). */
282	} AC97BMREGS, *PAC97BMREGS;
283
284	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
285	/**
286	* Structure keeping the AC'97 stream's state for asynchronous I/O.
287	*/
288	typedef struct AC97STREAMSTATEAIO
289	{
290	/** Thread handle for the actual I/O thread. */
291	RTTHREAD Thread;
292	/** Event for letting the thread know there is some data to process. */
293	RTSEMEVENT Event;
294	/** Critical section for synchronizing access. */
295	RTCRITSECT CritSect;
296	/** Started indicator. */
297	volatile bool fStarted;
298	/** Shutdown indicator. */
299	volatile bool fShutdown;
300	uint32_t Padding1;
301	} AC97STREAMSTATEAIO, *PAC97STREAMSTATEAIO;
302	#endif
303
304	/**
305	* Structure for keeping the internal state of an AC'97 stream.
306	*/
307	typedef struct AC97STREAMSTATE
308	{
309	/** Circular buffer (FIFO) for holding DMA'ed data. */
310	R3PTRTYPE(PRTCIRCBUF) pCircBuf;
311	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
312	/** Asynchronous I/O state members. */
313	AC97STREAMSTATEAIO AIO;
314	#endif
315	} AC97STREAMSTATE, *PAC97STREAMSTATE;
316
317	/**
318	* Structure for an AC'97 stream.
319	*/
320	typedef struct AC97STREAM
321	{
322	/** Stream number (SDn). */
323	uint8_t u8Strm;
324	/** Criticial section for this stream. */
325	RTCRITSECT CritSect;
326	/** Bus master registers of this stream. */
327	AC97BMREGS Regs;
328	/** Internal state of this stream. */
329	AC97STREAMSTATE State;
330	} AC97STREAM, *PAC97STREAM;
331
332	typedef struct AC97STATE *PAC97STATE;
333	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
334	/**
335	* Structure for the async I/O thread context.
336	*/
337	typedef struct AC97STREAMTHREADCTX
338	{
339	PAC97STATE pThis;
340	PAC97STREAM pStream;
341	} AC97STREAMTHREADCTX, *PAC97STREAMTHREADCTX;
342	#endif
343
344	/**
345	* Structure defining a (host backend) driver stream.
346	* Each driver has its own instances of audio mixer streams, which then
347	* can go into the same (or even different) audio mixer sinks.
348	*/
349	typedef struct AC97DRIVERSTREAM
350	{
351	union
352	{
353	/** Desired playback destination (for an output stream). */
354	PDMAUDIOPLAYBACKDEST Dest;
355	/** Desired recording source (for an input stream). */
356	PDMAUDIORECSOURCE Source;
357	} DestSource;
358	uint8_t Padding1[4];
359	/** Associated mixer stream handle. */
360	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
361	} AC97DRIVERSTREAM, *PAC97DRIVERSTREAM;
362
363	/**
364	* Struct for maintaining a host backend driver.
365	*/
366	typedef struct AC97DRIVER
367	{
368	/** Node for storing this driver in our device driver list of AC97STATE. */
369	RTLISTNODER3 Node;
370	/** Pointer to AC97 controller (state). */
371	R3PTRTYPE(PAC97STATE) pAC97State;
372	/** Driver flags. */
373	PDMAUDIODRVFLAGS Flags;
374	uint32_t PaddingFlags;
375	/** LUN # to which this driver has been assigned. */
376	uint8_t uLUN;
377	/** Whether this driver is in an attached state or not. */
378	bool fAttached;
379	uint8_t Padding[4];
380	/** Pointer to attached driver base interface. */
381	R3PTRTYPE(PPDMIBASE) pDrvBase;
382	/** Audio connector interface to the underlying host backend. */
383	R3PTRTYPE(PPDMIAUDIOCONNECTOR) pConnector;
384	/** Driver stream for line input. */
385	AC97DRIVERSTREAM LineIn;
386	/** Driver stream for mic input. */
387	AC97DRIVERSTREAM MicIn;
388	/** Driver stream for output. */
389	AC97DRIVERSTREAM Out;
390	} AC97DRIVER, *PAC97DRIVER;
391
392	/**
393	* Structure for maintaining an AC'97 device state.
394	*/
395	typedef struct AC97STATE
396	{
397	/** The PCI device state. */
398	PDMPCIDEV PciDev;
399	/** R3 Pointer to the device instance. */
400	PPDMDEVINSR3 pDevInsR3;
401	/** Global Control (Bus Master Control Register). */
402	uint32_t glob_cnt;
403	/** Global Status (Bus Master Control Register). */
404	uint32_t glob_sta;
405	/** Codec Access Semaphore Register (Bus Master Control Register). */
406	uint32_t cas;
407	uint32_t last_samp;
408	uint8_t mixer_data[256];
409	/** AC'97 stream for line-in. */
410	AC97STREAM StreamLineIn;
411	/** AC'97 stream for microphone-in. */
412	AC97STREAM StreamMicIn;
413	/** AC'97 stream for output. */
414	AC97STREAM StreamOut;
415	/** Number of active (running) SDn streams. */
416	uint8_t cStreamsActive;
417	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
418	/** The timer for pumping data thru the attached LUN drivers. */
419	PTMTIMERR3 pTimer;
420	/** Criticial section for timer. */
421	RTCRITSECT csTimer;
422	# if HC_ARCH_BITS == 32
423	uint32_t Padding0;
424	# endif
425	/** Flag indicating whether the timer is active or not. */
426	bool fTimerActive;
427	uint8_t u8Padding1[7];
428	/** The timer interval for pumping data thru the LUN drivers in timer ticks. */
429	uint64_t cTimerTicks;
430	/** Timestamp of the last timer callback (ac97Timer).
431	* Used to calculate the time actually elapsed between two timer callbacks. */
432	uint64_t uTimerTS;
433	#endif
434	#ifdef VBOX_WITH_STATISTICS
435	STAMPROFILE StatTimer;
436	STAMPROFILE StatIn;
437	STAMPROFILE StatOut;
438	STAMCOUNTER StatBytesRead;
439	STAMCOUNTER StatBytesWritten;
440	#endif
441	/** List of associated LUN drivers (AC97DRIVER). */
442	RTLISTANCHOR lstDrv;
443	/** The device's software mixer. */
444	R3PTRTYPE(PAUDIOMIXER) pMixer;
445	/** Audio sink for PCM output. */
446	R3PTRTYPE(PAUDMIXSINK) pSinkOut;
447	/** Audio sink for line input. */
448	R3PTRTYPE(PAUDMIXSINK) pSinkLineIn;
449	/** Audio sink for microphone input. */
450	R3PTRTYPE(PAUDMIXSINK) pSinkMicIn;
451	uint8_t silence[128];
452	int bup_flag;
453	/** The base interface for LUN\#0. */
454	PDMIBASE IBase;
455	/** Base port of the I/O space region. */
456	RTIOPORT IOPortBase[2];
457	/** Codec model. */
458	uint32_t uCodecModel;
459	} AC97STATE, *PAC97STATE;
460
461	#ifdef VBOX_WITH_STATISTICS
462	AssertCompileMemberAlignment(AC97STATE, StatTimer, 8);
463	AssertCompileMemberAlignment(AC97STATE, StatBytesRead, 8);
464	AssertCompileMemberAlignment(AC97STATE, StatBytesWritten, 8);
465	#endif
466
467	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
468
469	DECLINLINE(PAC97STREAM) ichac97GetStreamFromID(PAC97STATE pThis, uint32_t uID);
470	static int ichac97StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm);
471	static void ichac97StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream);
472	static int ichac97StreamOpen(PAC97STATE pThis, PAC97STREAM pStream);
473	static int ichac97StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream);
474	static int ichac97StreamClose(PAC97STATE pThis, PAC97STREAM pStream);
475
476	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns);
477	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
478	static void ichac97TimerMaybeStart(PAC97STATE pThis);
479	static void ichac97TimerMaybeStop(PAC97STATE pThis);
480	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
481	#endif
482	static int ichac97DoDMA(PAC97STATE pThis, PAC97STREAM pStream, void pvBuf, uint32_t cbBuf, uint32_t cbToProcess, uint32_t pcbProcessed);
483	static void ichac97DoTransfers(PAC97STATE pThis);
484
485	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
486	static DECLCALLBACK(int) ichac97StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser);
487	static int ichac97StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream);
488	static void ichac97StreamAsyncIOLock(PAC97STREAM pStream);
489	static void ichac97StreamAsyncIOUnlock(PAC97STREAM pStream);
490	#endif
491
492	static void ichac97WarmReset(PAC97STATE pThis)
493	{
494	NOREF(pThis);
495	}
496
497	static void ichac97ColdReset(PAC97STATE pThis)
498	{
499	NOREF(pThis);
500	}
501
502	DECLINLINE(PAUDMIXSINK) ichac97IndexToSink(PAC97STATE pThis, uint8_t uIndex)
503	{
504	AssertPtrReturn(pThis, NULL);
505
506	switch (uIndex)
507	{
508	case AC97SOUNDSOURCE_PI_INDEX: return pThis->pSinkLineIn; break;
509	case AC97SOUNDSOURCE_PO_INDEX: return pThis->pSinkOut; break;
510	case AC97SOUNDSOURCE_MC_INDEX: return pThis->pSinkMicIn; break;
511	default: break;
512	}
513
514	AssertMsgFailed(("Wrong index %RU8\n", uIndex));
515	return NULL;
516	}
517
518	/** Fetches the buffer descriptor at _CIV. */
519	static void ichac97StreamFetchBDLE(PAC97STATE pThis, PAC97STREAM pStream)
520	{
521	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
522	PAC97BMREGS pRegs = &pStream->Regs;
523
524	uint32_t u32[2];
525
526	PDMDevHlpPhysRead(pDevIns, pRegs->bdbar + pRegs->civ * 8, &u32[0], sizeof(u32));
527	pRegs->bd_valid = 1;
528	#if !defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)
529	# error Please adapt the code (audio buffers are little endian)!
530	#else
531	pRegs->bd.addr = RT_H2LE_U32(u32[0] & ~3);
532	pRegs->bd.ctl_len = RT_H2LE_U32(u32[1]);
533	#endif
534	pRegs->picb = pRegs->bd.ctl_len & AC97_BD_MAX_LEN_MASK;
535	LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
536	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16,
537	pRegs->bd.ctl_len & AC97_BD_MAX_LEN_MASK,
538	(pRegs->bd.ctl_len & AC97_BD_MAX_LEN_MASK) << 1)); /** @todo r=andy Assumes 16bit samples. */
539	}
540
541	/**
542	* Update the BM status register
543	*/
544	static void ichac97StreamUpdateSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
545	{
546	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
547	PAC97BMREGS pRegs = &pStream->Regs;
548
549	bool fSignal = false;
550	int iIRQL = 0;
551
552	uint32_t new_mask = new_sr & AC97_SR_INT_MASK;
553	uint32_t old_mask = pRegs->sr & AC97_SR_INT_MASK;
554
555	static uint32_t const masks[] = { AC97_GS_PIINT, AC97_GS_POINT, AC97_GS_MINT };
556
557	if (new_mask ^ old_mask)
558	{
559	/** @todo Is IRQ deasserted when only one of status bits is cleared? */
560	if (!new_mask)
561	{
562	fSignal = true;
563	iIRQL = 0;
564	}
565	else if ((new_mask & AC97_SR_LVBCI) && (pRegs->cr & AC97_CR_LVBIE))
566	{
567	fSignal = true;
568	iIRQL = 1;
569	}
570	else if ((new_mask & AC97_SR_BCIS) && (pRegs->cr & AC97_CR_IOCE))
571	{
572	fSignal = true;
573	iIRQL = 1;
574	}
575	}
576
577	pRegs->sr = new_sr;
578
579	LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n",
580	pRegs->sr & AC97_SR_BCIS, pRegs->sr & AC97_SR_LVBCI, pRegs->sr, fSignal, iIRQL));
581
582	if (fSignal)
583	{
584	if (iIRQL)
585	pThis->glob_sta \|= masks[pStream->u8Strm];
586	else
587	pThis->glob_sta &= ~masks[pStream->u8Strm];
588
589	LogFlowFunc(("Setting IRQ level=%d\n", iIRQL));
590	PDMDevHlpPCISetIrq(pDevIns, 0, iIRQL);
591	}
592	}
593
594	/**
595	* Returns whether an AC'97 stream is enabled or not.
596	*
597	* @returns IPRT status code.
598	* @param pThis AC'97 device state.
599	* @param pStream Stream to return status for.
600	*/
601	static bool ichac97StreamIsEnabled(PAC97STATE pThis, PAC97STREAM pStream)
602	{
603	AssertPtrReturn(pThis, false);
604	AssertPtrReturn(pStream, false);
605
606	PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8Strm);
607	bool fIsEnabled = RT_BOOL(AudioMixerSinkGetStatus(pSink) & AUDMIXSINK_STS_RUNNING);
608
609	LogFunc(("[SD%RU8] fIsEnabled=%RTbool\n", pStream->u8Strm, fIsEnabled));
610	return fIsEnabled;
611	}
612
613	static int ichac97StreamEnable(PAC97STATE pThis, PAC97STREAM pStream, bool fEnable)
614	{
615	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
616	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
617
618	PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8Strm);
619	if (!pSink) /* No sink available (yet)? Bail out early. */
620	return VINF_SUCCESS;
621
622	#ifdef LOG_ENABLED
623	const AUDMIXSINKSTS stsSink = AudioMixerSinkGetStatus(pSink);
624
625	const bool fIsEnabled = RT_BOOL(stsSink & AUDMIXSINK_STS_RUNNING);
626	const bool fPendingDisable = RT_BOOL(stsSink & AUDMIXSINK_STS_PENDING_DISABLE);
627
628	LogFunc(("[SD%RU8] fEnable=%RTbool, fIsEnabled=%RTbool, fPendingDisable=%RTbool, DCH=%RTbool, cStreamsActive=%RU8\n",
629	pStream->u8Strm, fEnable, fIsEnabled, fPendingDisable, RT_BOOL(pStream->Regs.sr & AC97_SR_DCH), pThis->cStreamsActive));
630	#endif
631
632	int rc = VINF_SUCCESS;
633
634	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
635	ichac97StreamAsyncIOLock(pStream);
636	#endif
637
638	if (fEnable)
639	rc = ichac97StreamOpen(pThis, pStream);
640	else
641	rc = ichac97StreamClose(pThis, pStream);
642
643	if (RT_SUCCESS(rc))
644	rc = AudioMixerSinkCtl(ichac97IndexToSink(pThis, pStream->u8Strm),
645	fEnable ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE);
646
647	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
648	ichac97StreamAsyncIOUnlock(pStream);
649	#endif
650
651	if (RT_SUCCESS(rc))
652	{
653	if (!fEnable)
654	{
655	if (pThis->cStreamsActive) /* Disable can be called mupltiple times. */
656	pThis->cStreamsActive--;
657
658	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
659	ichac97TimerMaybeStop(pThis);
660	#endif
661	}
662	else
663	{
664	pThis->cStreamsActive++;
665	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
666	ichac97TimerMaybeStart(pThis);
667	#endif
668	}
669	}
670
671	LogFunc(("Returning %Rrc\n", rc));
672	return rc;
673	}
674
675	static void ichac97StreamResetBMRegs(PAC97STATE pThis, PAC97STREAM pStream)
676	{
677	AssertPtrReturnVoid(pThis);
678	AssertPtrReturnVoid(pStream);
679
680	LogFunc(("[SD%RU8]\n", pStream->u8Strm));
681
682	PAC97BMREGS pRegs = &pStream->Regs;
683
684	pRegs->bdbar = 0;
685	pRegs->civ = 0;
686	pRegs->lvi = 0;
687
688	ichac97StreamEnable(pThis, pStream, false /* fEnable */);
689
690	ichac97StreamUpdateSR(pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */
691
692	pRegs->picb = 0;
693	pRegs->piv = 0;
694	pRegs->cr = pRegs->cr & AC97_CR_DONT_CLEAR_MASK;
695	pRegs->bd_valid = 0;
696
697	RT_ZERO(pThis->silence);
698	}
699
700	/**
701	* Creates an AC'97 stream.
702	*
703	* @returns IPRT status code.
704	* @param pThis AC'97 state.
705	* @param pStream AC'97 stream to create.
706	* @param u8Strm Stream ID to assign AC'97 stream to.
707	*/
708	static int ichac97StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm)
709	{
710	AssertPtrReturn(pStream, VERR_INVALID_PARAMETER);
711
712	LogFunc(("[SD%RU8] pStream=%p\n", u8Strm, pStream));
713
714	pStream->u8Strm = u8Strm;
715
716	int rc = RTCritSectInit(&pStream->CritSect);
717	if (RT_SUCCESS(rc))
718	rc = RTCircBufCreate(&pStream->State.pCircBuf, _4K); /** @todo Make this configurable. */
719
720	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
721	/*
722	* Create async I/O stuff.
723	*/
724	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
725
726	pAIO->fShutdown = false;
727
728	if (RT_SUCCESS(rc))
729	{
730	rc = RTSemEventCreate(&pAIO->Event);
731	if (RT_SUCCESS(rc))
732	{
733	rc = RTCritSectInit(&pAIO->CritSect);
734	if (RT_SUCCESS(rc))
735	{
736	AC97STREAMTHREADCTX Ctx = { pThis, pStream };
737
738	char szThreadName[64];
739	RTStrPrintf2(szThreadName, sizeof(szThreadName), "ac97AIO%RU8", pStream->u8Strm);
740
741	/** @todo Create threads on demand? */
742
743	rc = RTThreadCreate(&pAIO->Thread, ichac97StreamAsyncIOThread, &Ctx,
744	0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
745	if (RT_SUCCESS(rc))
746	rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
747	}
748	}
749	}
750	#else
751	RT_NOREF(pThis);
752	#endif
753
754	return rc;
755	}
756
757	/**
758	* Destroys an AC'97 stream.
759	*
760	* @returns IPRT status code.
761	* @param pThis AC'97 state.
762	* @param pStream AC'97 stream to destroy.
763	*/
764	static void ichac97StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream)
765	{
766	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
767
768	int rc2 = RTCritSectDelete(&pStream->CritSect);
769	AssertRC(rc2);
770
771	if (pStream->State.pCircBuf)
772	{
773	RTCircBufDestroy(pStream->State.pCircBuf);
774	pStream->State.pCircBuf = NULL;
775	}
776
777	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
778	/*
779	* Destroy async I/O stuff.
780	*/
781	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
782
783	if (ASMAtomicReadBool(&pAIO->fStarted))
784	{
785	ASMAtomicWriteBool(&pAIO->fShutdown, true);
786
787	rc2 = ichac97StreamAsyncIONotify(pThis, pStream);
788	AssertRC(rc2);
789
790	int rcThread;
791	rc2 = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
792	LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc2, rcThread));
793
794	if (RT_SUCCESS(rc2))
795	{
796	rc2 = RTCritSectDelete(&pAIO->CritSect);
797	AssertRC(rc2);
798
799	rc2 = RTSemEventDestroy(pAIO->Event);
800	AssertRC(rc2);
801
802	pAIO->fStarted = false;
803	pAIO->fShutdown = false;
804	}
805	}
806	#else
807	RT_NOREF(pThis);
808	#endif
809
810	LogFlowFuncLeave();
811	}
812
813	/**
814	* Creates all AC'97 streams for the device.
815	*
816	* @returns IPRT status code.
817	* @param pThis AC'97 state.
818	*/
819	static int ichac97StreamsCreate(PAC97STATE pThis)
820	{
821	LogFlowFuncEnter();
822
823	/*
824	* Create all sinks and AC'97 streams.
825	*/
826
827	/* Line-In. */
828	int rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Line In", AUDMIXSINKDIR_INPUT, &pThis->pSinkLineIn);
829	if (RT_SUCCESS(rc))
830	rc = ichac97StreamCreate(pThis, &pThis->StreamLineIn, AC97SOUNDSOURCE_PI_INDEX);
831
832	/* Microphone-In. */
833	if (RT_SUCCESS(rc))
834	{
835	rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Microphone In", AUDMIXSINKDIR_INPUT, &pThis->pSinkMicIn);
836	if (RT_SUCCESS(rc))
837	rc = ichac97StreamCreate(pThis, &pThis->StreamMicIn, AC97SOUNDSOURCE_MC_INDEX);
838	}
839
840	/* Output. */
841	if (RT_SUCCESS(rc))
842	{
843	rc = AudioMixerCreateSink(pThis->pMixer, "[Playback] PCM Output", AUDMIXSINKDIR_OUTPUT, &pThis->pSinkOut);
844	if (RT_SUCCESS(rc))
845	rc = ichac97StreamCreate(pThis, &pThis->StreamOut, AC97SOUNDSOURCE_PO_INDEX);
846	}
847
848	/*
849	* Open all streams with the current AC'97 mixer settings.
850	*/
851	if (RT_SUCCESS(rc))
852	{
853	rc = ichac97StreamOpen (pThis, &pThis->StreamLineIn);
854	if (RT_SUCCESS(rc))
855	{
856	rc = ichac97StreamOpen (pThis, &pThis->StreamMicIn);
857	if (RT_SUCCESS(rc))
858	{
859	rc = ichac97StreamOpen(pThis, &pThis->StreamOut);
860	}
861	}
862	}
863
864	LogFlowFunc(("Returning %Rrc\n", rc));
865	return rc;
866	}
867
868	static void ichac97StreamsDestroy(PAC97STATE pThis)
869	{
870	LogFlowFuncEnter();
871
872	ichac97StreamDestroy(pThis, &pThis->StreamLineIn);
873	ichac97StreamDestroy(pThis, &pThis->StreamMicIn);
874	ichac97StreamDestroy(pThis, &pThis->StreamOut);
875	}
876
877	/**
878	* Writes audio data from a mixer sink into an AC'97 stream's DMA buffer.
879	*
880	* @returns IPRT status code.
881	* @param pThis AC'97 state.
882	* @param pStream AC'97 stream to write to.
883	* @param pMixSink Mixer sink to get audio data to write from.
884	* @param cbToWrite Number of bytes to write.
885	* @param pcbWritten Number of bytes written. Optional.
886	*/
887	static int ichac97StreamWrite(PAC97STATE pThis, PAC97STREAM pDstStream, PAUDMIXSINK pSrcMixSink, uint32_t cbToWrite,
888	uint32_t *pcbWritten)
889	{
890	RT_NOREF(pThis);
891
892	PRTCIRCBUF pCircBuf = pDstStream->State.pCircBuf;
893	AssertPtr(pCircBuf);
894
895	void *pvDst;
896	size_t cbDst;
897
898	uint32_t cbRead = 0;
899
900	RTCircBufAcquireWriteBlock(pCircBuf, cbToWrite, &pvDst, &cbDst);
901
902	if (cbDst)
903	{
904	int rc2 = AudioMixerSinkRead(pSrcMixSink, AUDMIXOP_COPY, pvDst, (uint32_t)cbDst, &cbRead);
905	AssertRC(rc2);
906
907	#ifdef AC97_DEBUG_DUMP_PCM_DATA
908	RTFILE fh;
909	RTFileOpen(&fh, AC97_DEBUG_DUMP_PCM_DATA_PATH "ichac97StreamWrite.pcm",
910	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
911	RTFileWrite(fh, pvDst, cbRead, NULL);
912	RTFileClose(fh);
913	#endif
914	}
915
916	RTCircBufReleaseWriteBlock(pCircBuf, cbRead);
917
918	if (pcbWritten)
919	*pcbWritten = cbRead;
920
921	return VINF_SUCCESS;
922	}
923
924	/**
925	* Reads audio data from an AC'97 stream's DMA buffer and writes into a specified mixer sink.
926	*
927	* @returns IPRT status code.
928	* @param pThis AC'97 state.
929	* @param pSrcStream AC'97 stream to read audio data from.
930	* @param pDstMixSink Mixer sink to write audio data to.
931	* @param cbToRead Number of bytes to read.
932	* @param pcbRead Number of bytes read. Optional.
933	*/
934	static int ichac97StreamRead(PAC97STATE pThis, PAC97STREAM pSrcStream, PAUDMIXSINK pDstMixSink, uint32_t cbToRead,
935	uint32_t *pcbRead)
936	{
937	RT_NOREF(pThis);
938
939	PRTCIRCBUF pCircBuf = pSrcStream->State.pCircBuf;
940	AssertPtr(pCircBuf);
941
942	void *pvSrc;
943	size_t cbSrc;
944
945	uint32_t cbWritten = 0;
946
947	RTCircBufAcquireReadBlock(pCircBuf, cbToRead, &pvSrc, &cbSrc);
948
949	if (cbSrc)
950	{
951	#ifdef AC97_DEBUG_DUMP_PCM_DATA
952	RTFILE fh;
953	RTFileOpen(&fh, AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamRead.pcm",
954	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
955	RTFileWrite(fh, pvSrc, cbSrc, NULL);
956	RTFileClose(fh);
957	#endif
958	int rc2 = AudioMixerSinkWrite(pDstMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
959	AssertRC(rc2);
960	}
961
962	RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
963
964	if (pcbRead)
965	*pcbRead = cbWritten;
966
967	return VINF_SUCCESS;
968	}
969
970	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
971	/**
972	* Asynchronous I/O thread for an AC'97 stream.
973	* This will do the heavy lifting work for us as soon as it's getting notified by another thread.
974	*
975	* @returns IPRT status code.
976	* @param hThreadSelf Thread handle.
977	* @param pvUser User argument. Must be of type PAC97STREAMTHREADCTX.
978	*/
979	static DECLCALLBACK(int) ichac97StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
980	{
981	PAC97STREAMTHREADCTX pCtx = (PAC97STREAMTHREADCTX)pvUser;
982	AssertPtr(pCtx);
983
984	PAC97STATE pThis = pCtx->pThis;
985	AssertPtr(pThis);
986
987	PAC97STREAM pStream = pCtx->pStream;
988	AssertPtr(pStream);
989
990	PAC97STREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
991
992	PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
993	AssertPtr(pCircBuf);
994
995	PAUDMIXSINK pMixSink = ichac97IndexToSink(pThis, pStream->u8Strm);
996	AssertPtr(pMixSink);
997
998	ASMAtomicXchgBool(&pAIO->fStarted, true);
999
1000	RTThreadUserSignal(hThreadSelf);
1001
1002	LogFunc(("[SD%RU8]: Started\n", pStream->u8Strm));
1003
1004	for (;;)
1005	{
1006	Log2Func(("[SD%RU8]: Waiting ...\n", pStream->u8Strm));
1007
1008	int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1009	if (RT_FAILURE(rc2))
1010	break;
1011
1012	if (ASMAtomicReadBool(&pAIO->fShutdown))
1013	break;
1014
1015	size_t cbToProcess = RTCircBufUsed(pCircBuf);
1016	if (cbToProcess)
1017	{
1018	uint32_t cbProcessed = 0;
1019
1020	rc2 = RTCritSectEnter(&pAIO->CritSect);
1021	if (RT_SUCCESS(rc2))
1022	{
1023	switch (pStream->u8Strm)
1024	{
1025	case AC97SOUNDSOURCE_PI_INDEX:
1026	case AC97SOUNDSOURCE_MC_INDEX:
1027	rc2 = ichac97StreamWrite(pThis, pStream, pMixSink, (uint32_t)cbToProcess, &cbProcessed);
1028	break;
1029
1030	case AC97SOUNDSOURCE_PO_INDEX:
1031	rc2 = ichac97StreamRead(pThis, pStream, pMixSink, (uint32_t)cbToProcess, &cbProcessed);
1032	break;
1033
1034	default:
1035	AssertFailedStmt(rc2 = VERR_NOT_SUPPORTED);
1036	break;
1037	}
1038
1039	if (RT_SUCCESS(rc2))
1040	rc2 = AudioMixerSinkUpdate(pMixSink);
1041
1042	if (cbProcessed)
1043	{
1044	Assert(cbToProcess >= cbProcessed);
1045	cbToProcess -= cbProcessed;
1046	}
1047
1048	int rc3 = RTCritSectLeave(&pAIO->CritSect);
1049	AssertRC(rc3);
1050	}
1051	}
1052
1053	AssertRC(rc2);
1054	}
1055
1056	LogFunc(("[SD%RU8]: Ended\n", pStream->u8Strm));
1057
1058	ASMAtomicXchgBool(&pAIO->fStarted, false);
1059
1060	return VINF_SUCCESS;
1061	}
1062
1063	/**
1064	* Lets the stream's async I/O thread know that there is some data to process.
1065	*
1066	* @returns IPRT status code.
1067	* @param pThis AC'97 state.
1068	* @param pStream AC'97 stream to notify async I/O thread for.
1069	*/
1070	static int ichac97StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream)
1071	{
1072	RT_NOREF(pThis);
1073
1074	LogFunc(("[SD%RU8]\n", pStream->u8Strm));
1075	return RTSemEventSignal(pStream->State.AIO.Event);
1076	}
1077
1078	static void ichac97StreamAsyncIOLock(PAC97STREAM pStream)
1079	{
1080	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1081
1082	int rc2 = RTCritSectEnter(&pAIO->CritSect);
1083	AssertRC(rc2);
1084	}
1085
1086	static void ichac97StreamAsyncIOUnlock(PAC97STREAM pStream)
1087	{
1088	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1089
1090	int rc2 = RTCritSectLeave(&pAIO->CritSect);
1091	AssertRC(rc2);
1092	}
1093	#endif /* VBOX_WITH_AUDIO_AC97_ASYNC_IO*/
1094
1095	/**
1096	* Updates an AC'97 stream according to its usage (input / output).
1097	*
1098	* For an SDO (output) stream this means reading DMA data from the device to
1099	* the connected audio sink(s).
1100	*
1101	* For an SDI (input) stream this is reading audio data from the connected
1102	* audio sink(s) and writing it as DMA data to the device.
1103	*
1104	* @returns IPRT status code.
1105	* @param pThis AC'97 state.
1106	* @param pStream AC'97 stream to update.
1107	*/
1108	static int ichac97StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream)
1109	{
1110	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1111	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1112
1113	PAUDMIXSINK pMixSink = ichac97IndexToSink(pThis, pStream->u8Strm);
1114	if (!pMixSink)
1115	return VINF_SUCCESS;
1116
1117	if (AudioMixerSinkIsActive(pMixSink) == false)
1118	return VINF_SUCCESS;
1119
1120	PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
1121	AssertPtr(pCircBuf);
1122
1123	int rc = VINF_SUCCESS;
1124
1125	bool fDone = false;
1126
1127	LogFunc(("[SD%RU8] Started\n", pStream->u8Strm));
1128
1129	while (!fDone)
1130	{
1131	int rc2;
1132	uint32_t cbProcessed = 0;
1133
1134	if (pStream->u8Strm == AC97SOUNDSOURCE_PO_INDEX) /* Output. */
1135	{
1136	STAM_PROFILE_START(&pThis->StatOut, a);
1137
1138	void *pvDst;
1139	size_t cbDst;
1140
1141	RTCircBufAcquireWriteBlock(pCircBuf, 256 /** @todo */, &pvDst, &cbDst);
1142
1143	if (cbDst)
1144	{
1145	/* Do one DMA transfer with FIFOS size at a time. */
1146	rc2 = ichac97DoDMA(pThis, pStream, pvDst, (uint32_t)cbDst, (uint32_t)cbDst /* cbToProcess */, &cbProcessed);
1147	AssertRC(rc2);
1148	}
1149
1150	RTCircBufReleaseWriteBlock(pCircBuf, cbProcessed);
1151
1152	if (cbProcessed)
1153	{
1154	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1155	/* Let the asynchronous thread know that there is some new data to process. */
1156	ichac97StreamAsyncIONotify(pThis, pStream);
1157	#else
1158	rc2 = ichac97StreamRead(pThis, pStream, pMixSink, cbProcessed, NULL /* pcbRead */);
1159	AssertRC(rc2);
1160	#endif
1161	}
1162
1163	if ( !cbProcessed
1164	#ifndef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1165	&& RTCircBufUsed(pCircBuf) == 0
1166	#endif
1167	)
1168	{
1169	fDone = true;
1170	}
1171
1172	STAM_PROFILE_STOP(&pThis->StatOut, a);
1173	}
1174	else if ( pStream->u8Strm == AC97SOUNDSOURCE_PI_INDEX /* Input. */
1175	\|\| pStream->u8Strm == AC97SOUNDSOURCE_MC_INDEX) /* Input. */
1176	{
1177	STAM_PROFILE_START(&pThis->StatIn, a);
1178
1179	void *pvSrc;
1180	size_t cbSrc;
1181
1182	RTCircBufAcquireReadBlock(pCircBuf, 256 /** @todo */, &pvSrc, &cbSrc);
1183
1184	if (cbSrc)
1185	{
1186	/* Do one DMA transfer with FIFOS size at a time. */
1187	rc2 = ichac97DoDMA(pThis, pStream, pvSrc, (uint32_t)cbSrc, (uint32_t)cbSrc /* cbToProcess */, &cbProcessed);
1188	AssertRC(rc2);
1189	}
1190
1191	RTCircBufReleaseReadBlock(pCircBuf, cbProcessed);
1192
1193	if (cbProcessed)
1194	{
1195	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1196	/* Let the asynchronous thread know that there is some new data to process. */
1197	ichac97StreamAsyncIONotify(pThis, pStream);
1198	#else
1199	rc2 = ichac97StreamWrite(pThis, pStream, pMixSink, cbProcessed, NULL /* pcbWritten */);
1200	AssertRC(rc2);
1201	#endif
1202	}
1203
1204	/** @todo: Check this! */
1205	if ( !cbProcessed
1206	#ifndef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1207	&& RTCircBufUsed(pCircBuf) == 0
1208	#endif
1209	)
1210	{
1211	fDone = true;
1212	}
1213
1214	STAM_PROFILE_STOP(&pThis->StatIn, a);
1215	}
1216	else
1217	AssertFailed();
1218
1219	#ifndef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1220	rc2 = AudioMixerSinkUpdate(pMixSink);
1221	AssertRC(rc2);
1222	#endif
1223	if (fDone)
1224	break;
1225	}
1226
1227	LogFunc(("[SD%RU8] End\n", pStream->u8Strm));
1228
1229	return rc;
1230	}
1231
1232	static void ichac97MixerSet(PAC97STATE pThis, uint8_t uMixerIdx, uint16_t uVal)
1233	{
1234	if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
1235	{
1236	AssertMsgFailed(("Index %RU8 out of bounds(%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1237	return;
1238	}
1239
1240	pThis->mixer_data[uMixerIdx + 0] = RT_LO_U8(uVal);
1241	pThis->mixer_data[uMixerIdx + 1] = RT_HI_U8(uVal);
1242	}
1243
1244	static uint16_t ichac97MixerGet(PAC97STATE pThis, uint32_t uMixerIdx)
1245	{
1246	uint16_t uVal;
1247
1248	if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
1249	{
1250	AssertMsgFailed(("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1251	uVal = UINT16_MAX;
1252	}
1253	else
1254	uVal = RT_MAKE_U16(pThis->mixer_data[uMixerIdx + 0], pThis->mixer_data[uMixerIdx + 1]);
1255
1256	return uVal;
1257	}
1258
1259	/**
1260	* Retrieves a specific driver stream of a AC'97 driver.
1261	*
1262	* @returns Pointer to driver stream if found, or NULL if not found.
1263	* @param pThis AC'97 state.
1264	* @param pDrv Driver to retrieve driver stream for.
1265	* @param enmDir Stream direction to retrieve.
1266	* @param dstSrc Stream destination / source to retrieve.
1267	*/
1268	static PAC97DRIVERSTREAM ichac97MixerGetDrvStream(PAC97STATE pThis, PAC97DRIVER pDrv,
1269	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1270	{
1271	RT_NOREF(pThis);
1272
1273	PAC97DRIVERSTREAM pDrvStream = NULL;
1274
1275	if (enmDir == PDMAUDIODIR_IN)
1276	{
1277	LogFunc(("enmRecSource=%d\n", dstSrc.Source));
1278
1279	switch (dstSrc.Source)
1280	{
1281	case PDMAUDIORECSOURCE_LINE:
1282	pDrvStream = &pDrv->LineIn;
1283	break;
1284	case PDMAUDIORECSOURCE_MIC:
1285	pDrvStream = &pDrv->MicIn;
1286	break;
1287	default:
1288	AssertFailed();
1289	break;
1290	}
1291	}
1292	else if (enmDir == PDMAUDIODIR_OUT)
1293	{
1294	LogFunc(("enmPlaybackDest=%d\n", dstSrc.Dest));
1295
1296	switch (dstSrc.Dest)
1297	{
1298	case PDMAUDIOPLAYBACKDEST_FRONT:
1299	pDrvStream = &pDrv->Out;
1300	break;
1301	default:
1302	AssertFailed();
1303	break;
1304	}
1305	}
1306	else
1307	AssertFailed();
1308
1309	return pDrvStream;
1310	}
1311
1312	/**
1313	* Adds audio streams for all drivers to a specific mixer sink.
1314	*
1315	* @returns IPRT status code.
1316	* @param pThis AC'97 state.
1317	* @param pMixSink Mixer sink to add stream to.
1318	* @param pCfg Stream configuration to use.
1319	*/
1320	static int ichac97MixerAddDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg)
1321	{
1322	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1323	AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1324	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
1325
1326	/* Update the sink's format. */
1327	PDMAUDIOPCMPROPS PCMProps;
1328	int rc = DrvAudioHlpStreamCfgToProps(pCfg, &PCMProps);
1329	if (RT_SUCCESS(rc))
1330	rc = AudioMixerSinkSetFormat(pMixSink, &PCMProps);
1331
1332	if (RT_FAILURE(rc))
1333	return rc;
1334
1335	PAC97DRIVER pDrv;
1336	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1337	{
1338	PPDMAUDIOSTREAMCFG pStreamCfg = (PPDMAUDIOSTREAMCFG)RTMemDup(pCfg, sizeof(PDMAUDIOSTREAMCFG));
1339	if (!pStreamCfg)
1340	{
1341	rc = VERR_NO_MEMORY;
1342	break;
1343	}
1344
1345	if (!RTStrPrintf(pStreamCfg->szName, sizeof(pStreamCfg->szName), "[LUN#%RU8] %s", pDrv->uLUN, pCfg->szName))
1346	{
1347	RTMemFree(pStreamCfg);
1348
1349	rc = VERR_BUFFER_OVERFLOW;
1350	break;
1351	}
1352
1353	LogFunc(("%s\n", pStreamCfg->szName));
1354
1355	int rc2 = VINF_SUCCESS;
1356
1357	PAC97DRIVERSTREAM pDrvStream = ichac97MixerGetDrvStream(pThis, pDrv, pStreamCfg->enmDir, pStreamCfg->DestSource);
1358	if (pDrvStream)
1359	{
1360	AssertMsg(pDrvStream->pMixStrm == NULL, ("[LUN#%RU8] Driver stream already present when it must not\n", pDrv->uLUN));
1361
1362	PAUDMIXSTREAM pMixStrm;
1363	rc2 = AudioMixerSinkCreateStream(pMixSink, pDrv->pConnector, pStreamCfg, 0 /* fFlags */, &pMixStrm);
1364	if (RT_SUCCESS(rc2))
1365	{
1366	rc2 = AudioMixerSinkAddStream(pMixSink, pMixStrm);
1367	LogFlowFunc(("LUN#%RU8: Created stream \"%s\", rc=%Rrc\n", pDrv->uLUN, pCfg->szName, rc2));
1368	}
1369
1370	if (RT_SUCCESS(rc2))
1371	pDrvStream->pMixStrm = pMixStrm;
1372	}
1373
1374	if (RT_SUCCESS(rc))
1375	rc = rc2;
1376
1377	if (pStreamCfg)
1378	{
1379	RTMemFree(pStreamCfg);
1380	pStreamCfg = NULL;
1381	}
1382	}
1383
1384	LogFlowFuncLeaveRC(rc);
1385	return rc;
1386	}
1387
1388	/**
1389	* Removes specific audio streams for all drivers.
1390	*
1391	* @param pThis AC'97 state.
1392	* @param pMixSink Mixer sink to remove audio streams from.
1393	* @param enmDir Stream direction to remove.
1394	* @param dstSrc Stream destination / source to remove.
1395	*/
1396	static void ichac97MixerRemoveDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink,
1397	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1398	{
1399	AssertPtrReturnVoid(pThis);
1400	AssertPtrReturnVoid(pMixSink);
1401
1402	PAC97DRIVER pDrv;
1403	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1404	{
1405	PAC97DRIVERSTREAM pDrvStream = ichac97MixerGetDrvStream(pThis, pDrv, enmDir, dstSrc);
1406	if (pDrvStream)
1407	{
1408	if (pDrvStream->pMixStrm)
1409	{
1410	AudioMixerSinkRemoveStream(pMixSink, pDrvStream->pMixStrm);
1411
1412	AudioMixerStreamDestroy(pDrvStream->pMixStrm);
1413	pDrvStream->pMixStrm = NULL;
1414	}
1415	}
1416	}
1417	}
1418
1419	/**
1420	* Opens an AC'97 stream with its current mixer settings.
1421	*
1422	* This will open an AC'97 stream with 2 (stereo) channels, 16-bit samples and
1423	* the last set sample rate in the AC'97 mixer for this stream.
1424	*
1425	* @returns IPRT status code.
1426	* @param pThis AC'97 state.
1427	* @param pStream AC'97 Stream to open.
1428	*/
1429	static int ichac97StreamOpen(PAC97STATE pThis, PAC97STREAM pStream)
1430	{
1431	int rc = VINF_SUCCESS;
1432
1433	LogFunc(("[SD%RU8]\n", pStream->u8Strm));
1434
1435	PDMAUDIOSTREAMCFG streamCfg;
1436	RT_ZERO(streamCfg);
1437
1438	PAUDMIXSINK pMixSink = NULL;
1439
1440	switch (pStream->u8Strm)
1441	{
1442	case AC97SOUNDSOURCE_PI_INDEX:
1443	{
1444	streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate);
1445	streamCfg.enmDir = PDMAUDIODIR_IN;
1446	streamCfg.DestSource.Source = PDMAUDIORECSOURCE_LINE;
1447
1448	RTStrPrintf2(streamCfg.szName, sizeof(streamCfg.szName), "Line-In");
1449
1450	pMixSink = pThis->pSinkLineIn;
1451	break;
1452	}
1453
1454	case AC97SOUNDSOURCE_MC_INDEX:
1455	{
1456	streamCfg.uHz = ichac97MixerGet(pThis, AC97_MIC_ADC_Rate);
1457	streamCfg.enmDir = PDMAUDIODIR_IN;
1458	streamCfg.DestSource.Source = PDMAUDIORECSOURCE_MIC;
1459
1460	RTStrPrintf2(streamCfg.szName, sizeof(streamCfg.szName), "Mic-In");
1461
1462	pMixSink = pThis->pSinkMicIn;
1463	break;
1464	}
1465
1466	case AC97SOUNDSOURCE_PO_INDEX:
1467	{
1468	streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate);
1469	streamCfg.enmDir = PDMAUDIODIR_OUT;
1470	streamCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
1471
1472	RTStrPrintf2(streamCfg.szName, sizeof(streamCfg.szName), "Output");
1473
1474	pMixSink = pThis->pSinkOut;
1475	break;
1476	}
1477
1478	default:
1479	rc = VERR_NOT_SUPPORTED;
1480	break;
1481	}
1482
1483	if (RT_SUCCESS(rc))
1484	{
1485	if (streamCfg.uHz) /* Some valid rate set in the AC'97 mixer? */
1486	{
1487	streamCfg.cChannels = 2;
1488	streamCfg.enmFormat = PDMAUDIOFMT_S16;
1489	streamCfg.enmEndianness = PDMAUDIOHOSTENDIANNESS;
1490
1491	ichac97MixerRemoveDrvStreams(pThis, pMixSink, streamCfg.enmDir, streamCfg.DestSource);
1492
1493	rc = ichac97MixerAddDrvStreams(pThis, pMixSink, &streamCfg);
1494	}
1495	}
1496
1497	LogFlowFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8Strm, rc));
1498	return rc;
1499	}
1500
1501	/**
1502	* Closes an AC'97 stream.
1503	*
1504	* @returns IPRT status code.
1505	* @param pThis AC'97 state.
1506	* @param pStream AC'97 stream to close.
1507	*/
1508	static int ichac97StreamClose(PAC97STATE pThis, PAC97STREAM pStream)
1509	{
1510	RT_NOREF(pThis);
1511	RT_NOREF(pStream);
1512
1513	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
1514
1515	return VINF_SUCCESS;
1516	}
1517
1518	/**
1519	* Re-opens (that is, closes and opens again) an AC'97 stream on the backend
1520	* side with the current AC'97 mixer settings for this stream.
1521	*
1522	* @returns IPRT status code.
1523	* @param pThis AC'97 device state.
1524	* @param pStream AC'97 stream to re-open.
1525	*/
1526	static int ichac97StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream)
1527	{
1528	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
1529
1530	int rc = ichac97StreamClose(pThis, pStream);
1531	if (RT_SUCCESS(rc))
1532	rc = ichac97StreamOpen(pThis, pStream);
1533
1534	return rc;
1535	}
1536
1537	/**
1538	* Resets an AC'97 stream.
1539	*
1540	* @returns IPRT status code.
1541	* @param pThis AC'97 state.
1542	* @param pStream AC'97 stream to reset.
1543	* @remark
1544	*/
1545	static void ichac97StreamReset(PAC97STATE pThis, PAC97STREAM pStream)
1546	{
1547	AssertPtrReturnVoid(pThis);
1548	AssertPtrReturnVoid(pStream);
1549
1550	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
1551
1552	if (pStream->State.pCircBuf)
1553	RTCircBufReset(pStream->State.pCircBuf);
1554	}
1555
1556	static int ichac97MixerSetVolume(PAC97STATE pThis, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
1557	{
1558	bool fCntlMuted;
1559	uint8_t lCntlAtt, rCntlAtt;
1560
1561	/*
1562	* From AC'97 SoundMax Codec AD1981A/AD1981B:
1563	* "Because AC '97 defines 6-bit volume registers, to maintain compatibility whenever the
1564	* D5 or D13 bits are set to 1, their respective lower five volume bits are automatically
1565	* set to 1 by the Codec logic. On readback, all lower 5 bits will read ones whenever
1566	* these bits are set to 1."
1567	*
1568	* Linux ALSA depends on this behavior.
1569	*/
1570	/// @todo Does this apply to anything other than the master volume control?
1571	if (uVal & RT_BIT(5))
1572	uVal \|= RT_BIT(4) \| RT_BIT(3) \| RT_BIT(2) \| RT_BIT(1) \| RT_BIT(0);
1573	if (uVal & RT_BIT(13))
1574	uVal \|= RT_BIT(12) \| RT_BIT(11) \| RT_BIT(10) \| RT_BIT(9) \| RT_BIT(8);
1575
1576	fCntlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
1577	lCntlAtt = (uVal >> 8) & AC97_BARS_VOL_MASK;
1578	rCntlAtt = uVal & AC97_BARS_VOL_MASK;
1579
1580	/* For the master and headphone volume, 0 corresponds to 0dB attenuation. For the other
1581	* volume controls, 0 means 12dB gain and 8 means unity gain.
1582	*/
1583	if (index != AC97_Master_Volume_Mute && index != AC97_Headphone_Volume_Mute)
1584	{
1585	#ifndef VBOX_WITH_AC97_GAIN_SUPPORT
1586	/* NB: Currently there is no gain support, only attenuation. */
1587	lCntlAtt = lCntlAtt < 8 ? 0 : lCntlAtt - 8;
1588	rCntlAtt = rCntlAtt < 8 ? 0 : rCntlAtt - 8;
1589	#endif
1590	}
1591	Assert(lCntlAtt <= 255 / AC97_DB_FACTOR);
1592	Assert(rCntlAtt <= 255 / AC97_DB_FACTOR);
1593
1594	LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
1595	LogFunc(("lAtt=%RU8, rAtt=%RU8 ", lCntlAtt, rCntlAtt));
1596
1597	/*
1598	* For AC'97 volume controls, each additional step means -1.5dB attenuation with
1599	* zero being maximum. In contrast, we're internally using 255 (PDMAUDIO_VOLUME_MAX)
1600	* steps, each -0.375dB, where 0 corresponds to -96dB and 255 corresponds to 0dB.
1601	*/
1602	uint8_t lVol = PDMAUDIO_VOLUME_MAX - lCntlAtt * AC97_DB_FACTOR;
1603	uint8_t rVol = PDMAUDIO_VOLUME_MAX - rCntlAtt * AC97_DB_FACTOR;
1604
1605	Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCntlMuted, lVol, rVol));
1606
1607	int rc = VINF_SUCCESS;
1608
1609	if (pThis->pMixer) /* Device can be in reset state, so no mixer available. */
1610	{
1611	PDMAUDIOVOLUME Vol = { fCntlMuted, lVol, rVol };
1612	PAUDMIXSINK pSink = NULL;
1613
1614	switch (enmMixerCtl)
1615	{
1616	case PDMAUDIOMIXERCTL_VOLUME_MASTER:
1617	rc = AudioMixerSetMasterVolume(pThis->pMixer, &Vol);
1618	break;
1619
1620	case PDMAUDIOMIXERCTL_FRONT:
1621	pSink = pThis->pSinkOut;
1622	break;
1623
1624	case PDMAUDIOMIXERCTL_MIC_IN:
1625	pSink = pThis->pSinkMicIn;
1626	break;
1627
1628	case PDMAUDIOMIXERCTL_LINE_IN:
1629	pSink = pThis->pSinkLineIn;
1630	break;
1631
1632	default:
1633	AssertFailed();
1634	rc = VERR_NOT_SUPPORTED;
1635	break;
1636	}
1637
1638	if (pSink)
1639	rc = AudioMixerSinkSetVolume(pSink, &Vol);
1640	}
1641
1642	ichac97MixerSet(pThis, index, uVal);
1643
1644	if (RT_FAILURE(rc))
1645	LogFlowFunc(("Failed with %Rrc\n", rc));
1646
1647	return rc;
1648	}
1649
1650	static PDMAUDIORECSOURCE ichac97IndextoRecSource(uint8_t i)
1651	{
1652	switch (i)
1653	{
1654	case AC97_REC_MIC: return PDMAUDIORECSOURCE_MIC;
1655	case AC97_REC_CD: return PDMAUDIORECSOURCE_CD;
1656	case AC97_REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO;
1657	case AC97_REC_AUX: return PDMAUDIORECSOURCE_AUX;
1658	case AC97_REC_LINE_IN: return PDMAUDIORECSOURCE_LINE;
1659	case AC97_REC_PHONE: return PDMAUDIORECSOURCE_PHONE;
1660	default:
1661	break;
1662	}
1663
1664	LogFlowFunc(("Unknown record source %d, using MIC\n", i));
1665	return PDMAUDIORECSOURCE_MIC;
1666	}
1667
1668	static uint8_t ichac97RecSourceToIndex(PDMAUDIORECSOURCE rs)
1669	{
1670	switch (rs)
1671	{
1672	case PDMAUDIORECSOURCE_MIC: return AC97_REC_MIC;
1673	case PDMAUDIORECSOURCE_CD: return AC97_REC_CD;
1674	case PDMAUDIORECSOURCE_VIDEO: return AC97_REC_VIDEO;
1675	case PDMAUDIORECSOURCE_AUX: return AC97_REC_AUX;
1676	case PDMAUDIORECSOURCE_LINE: return AC97_REC_LINE_IN;
1677	case PDMAUDIORECSOURCE_PHONE: return AC97_REC_PHONE;
1678	default:
1679	break;
1680	}
1681
1682	LogFlowFunc(("Unknown audio recording source %d using MIC\n", rs));
1683	return AC97_REC_MIC;
1684	}
1685
1686	static void ichac97RecordSelect(PAC97STATE pThis, uint32_t val)
1687	{
1688	uint8_t rs = val & AC97_REC_MASK;
1689	uint8_t ls = (val >> 8) & AC97_REC_MASK;
1690	PDMAUDIORECSOURCE ars = ichac97IndextoRecSource(rs);
1691	PDMAUDIORECSOURCE als = ichac97IndextoRecSource(ls);
1692	rs = ichac97RecSourceToIndex(ars);
1693	ls = ichac97RecSourceToIndex(als);
1694	ichac97MixerSet(pThis, AC97_Record_Select, rs \| (ls << 8));
1695	}
1696
1697	static int ichac97MixerReset(PAC97STATE pThis)
1698	{
1699	AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
1700
1701	LogFlowFuncEnter();
1702
1703	RT_ZERO(pThis->mixer_data);
1704
1705	/* Note: Make sure to reset all registers first before bailing out on error. */
1706
1707	ichac97MixerSet(pThis, AC97_Reset , 0x0000); /* 6940 */
1708	ichac97MixerSet(pThis, AC97_Master_Volume_Mono_Mute , 0x8000);
1709	ichac97MixerSet(pThis, AC97_PC_BEEP_Volume_Mute , 0x0000);
1710
1711	ichac97MixerSet(pThis, AC97_Phone_Volume_Mute , 0x8008);
1712	ichac97MixerSet(pThis, AC97_Mic_Volume_Mute , 0x8008);
1713	ichac97MixerSet(pThis, AC97_CD_Volume_Mute , 0x8808);
1714	ichac97MixerSet(pThis, AC97_Aux_Volume_Mute , 0x8808);
1715	ichac97MixerSet(pThis, AC97_Record_Gain_Mic_Mute , 0x8000);
1716	ichac97MixerSet(pThis, AC97_General_Purpose , 0x0000);
1717	ichac97MixerSet(pThis, AC97_3D_Control , 0x0000);
1718	ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f);
1719
1720	ichac97MixerSet(pThis, AC97_Extended_Audio_ID , 0x0809);
1721	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
1722	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80);
1723	ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80);
1724	ichac97MixerSet(pThis, AC97_PCM_LFE_DAC_Rate , 0xbb80);
1725	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate , 0xbb80);
1726	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80);
1727
1728	if (pThis->uCodecModel == AC97_CODEC_AD1980)
1729	{
1730	/* Analog Devices 1980 (AD1980) */
1731	ichac97MixerSet(pThis, AC97_Reset , 0x0010); /* Headphones. */
1732	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1733	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5370);
1734	ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000);
1735	}
1736	else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
1737	{
1738	/* Analog Devices 1981B (AD1981B) */
1739	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1740	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5374);
1741	}
1742	else
1743	{
1744	/* Sigmatel 9700 (STAC9700) */
1745	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x8384);
1746	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x7600); /* 7608 */
1747	}
1748	ichac97RecordSelect(pThis, 0);
1749
1750	ichac97MixerSetVolume(pThis, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, 0x8000);
1751	ichac97MixerSetVolume(pThis, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, 0x8808);
1752	ichac97MixerSetVolume(pThis, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8808);
1753	ichac97MixerSetVolume(pThis, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8808);
1754
1755	return VINF_SUCCESS;
1756	}
1757
1758	/* Unused */
1759	#if 0
1760	static void ichac97WriteBUP(PAC97STATE pThis, uint32_t cbElapsed)
1761	{
1762	LogFlowFunc(("cbElapsed=%RU32\n", cbElapsed));
1763
1764	if (!(pThis->bup_flag & BUP_SET))
1765	{
1766	if (pThis->bup_flag & BUP_LAST)
1767	{
1768	unsigned int i;
1769	uint32_t p = (uint32_t)pThis->silence;
1770	for (i = 0; i < sizeof(pThis->silence) / 4; i++) /** @todo r=andy Assumes 16-bit samples, stereo. */
1771	*p++ = pThis->last_samp;
1772	}
1773	else
1774	RT_ZERO(pThis->silence);
1775
1776	pThis->bup_flag \|= BUP_SET;
1777	}
1778
1779	while (cbElapsed)
1780	{
1781	uint32_t cbToWrite = RT_MIN(cbElapsed, (uint32_t)sizeof(pThis->silence));
1782	uint32_t cbWrittenToStream;
1783
1784	int rc2 = AudioMixerSinkWrite(pThis->pSinkOut, AUDMIXOP_COPY,
1785	pThis->silence, cbToWrite, &cbWrittenToStream);
1786	if (RT_SUCCESS(rc2))
1787	{
1788	if (cbWrittenToStream < cbToWrite) /* Lagging behind? */
1789	LogFlowFunc(("Warning: Only written %RU32 / %RU32 bytes, expect lags\n", cbWrittenToStream, cbToWrite));
1790	}
1791
1792	/* Always report all data as being written;
1793	* backends who were not able to catch up have to deal with it themselves. */
1794	Assert(cbElapsed >= cbToWrite);
1795	cbElapsed -= cbToWrite;
1796	}
1797	}
1798	#endif /* Unused */
1799
1800	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
1801	static void ichac97TimerMaybeStart(PAC97STATE pThis)
1802	{
1803	if (pThis->cStreamsActive == 0) /* Only start the timer if there at least is one active streams. */
1804	return;
1805
1806	if (!pThis->pTimer)
1807	return;
1808
1809	if (ASMAtomicReadBool(&pThis->fTimerActive) == true) /* Already started? */
1810	return;
1811
1812	LogRel2(("AC97: Starting transfers\n"));
1813
1814	/* Set timer flag. */
1815	ASMAtomicXchgBool(&pThis->fTimerActive, true);
1816
1817	/* Update current time timestamp. */
1818	pThis->uTimerTS = TMTimerGet(pThis->pTimer);
1819
1820	/* Start transfers. */
1821	ichac97DoTransfers(pThis);
1822	}
1823
1824	static void ichac97TimerMaybeStop(PAC97STATE pThis)
1825	{
1826	if (pThis->cStreamsActive) /* Some streams still active? Bail out. */
1827	return;
1828
1829	if (!pThis->pTimer)
1830	return;
1831
1832	if (ASMAtomicReadBool(&pThis->fTimerActive) == false) /* Already stopped? */
1833	return;
1834
1835	LogRel2(("AC97: Stopping transfers\n"));
1836
1837	/* Set timer flag. */
1838	ASMAtomicXchgBool(&pThis->fTimerActive, false);
1839	}
1840
1841	static void ichac97DoTransfers(PAC97STATE pThis)
1842	{
1843	AssertPtrReturnVoid(pThis);
1844
1845	STAM_PROFILE_START(&pThis->StatTimer, a);
1846
1847	uint64_t cTicksNow = TMTimerGet(pThis->pTimer);
1848
1849	/* Update current time timestamp. */
1850	pThis->uTimerTS = cTicksNow;
1851
1852	/* Flag indicating whether to kick the timer again for the next DMA transfer or sink processing. */
1853	bool fKickTimer = false;
1854
1855	ichac97StreamUpdate(pThis, &pThis->StreamLineIn);
1856	ichac97StreamUpdate(pThis, &pThis->StreamMicIn);
1857	ichac97StreamUpdate(pThis, &pThis->StreamOut);
1858
1859	/* Do we need to kick the timer again? */
1860	if ( AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamLineIn.u8Strm))
1861	\|\| AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamMicIn.u8Strm))
1862	\|\| AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamOut.u8Strm)))
1863	{
1864	fKickTimer = true;
1865	}
1866
1867	if ( ASMAtomicReadBool(&pThis->fTimerActive)
1868	\|\| fKickTimer)
1869	{
1870	/* Kick the timer again. */
1871	uint64_t cTicks = pThis->cTimerTicks;
1872	/** @todo adjust cTicks down by now much cbOutMin represents. */
1873	TMTimerSet(pThis->pTimer, cTicksNow + cTicks);
1874	}
1875	else
1876	LogRel2(("AC97: Stopped transfers\n"));
1877
1878	STAM_PROFILE_STOP(&pThis->StatTimer, a);
1879	}
1880	#endif /* !VBOX_WITH_AUDIO_AC97_CALLBACKS */
1881
1882	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
1883	{
1884	RT_NOREF(pDevIns, pTimer);
1885
1886	PAC97STATE pThis = (PAC97STATE)pvUser;
1887	Assert(pThis == PDMINS_2_DATA(pDevIns, PAC97STATE));
1888	AssertPtr(pThis);
1889
1890	ichac97DoTransfers(pThis);
1891	}
1892
1893	/**
1894	* Does a single DMA transfer for a specific AC'97 stream.
1895	* This either can be a read or write operation, depending on the AC'97 stream.
1896	*
1897	* @returns IPRT status code.
1898	* @param pThis AC'97 state.
1899	* @param pStream AC'97 stream to do the DMA transfer for.
1900	* @param pvBuf Pointer to buffer data to write data to / read data from.
1901	* @param cbBuf Size of buffer (in bytes).
1902	* @param cbToProcess Size (in bytes) to transfer (read/write).
1903	* @param pcbProcessed Size (in bytes) transferred (read/written). Optional.
1904	*/
1905	static int ichac97DoDMA(PAC97STATE pThis, PAC97STREAM pStream, void *pvBuf, uint32_t cbBuf,
1906	uint32_t cbToProcess, uint32_t *pcbProcessed)
1907	{
1908	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1909	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1910	/* pcbProcessed is optional. */
1911
1912	PAC97BMREGS pRegs = &pStream->Regs;
1913
1914	if (pRegs->sr & AC97_SR_DCH) /* Controller halted? */
1915	{
1916	if (pRegs->cr & AC97_CR_RPBM) /* Bus master operation starts. */
1917	{
1918	switch (pStream->u8Strm)
1919	{
1920	case AC97SOUNDSOURCE_PO_INDEX:
1921	/ichac97WriteBUP(pThis, cbToProcess);/
1922	break;
1923
1924	default:
1925	break;
1926	}
1927	}
1928
1929	if (pcbProcessed)
1930	*pcbProcessed = 0;
1931
1932	return VINF_SUCCESS;
1933	}
1934
1935	/* BCIS flag still set? Skip iteration. */
1936	if (pRegs->sr & AC97_SR_BCIS)
1937	{
1938	Log3Func(("[SD%RU8] BCIS set\n", pStream->u8Strm));
1939
1940	if (pcbProcessed)
1941	*pcbProcessed = 0;
1942
1943	return VINF_SUCCESS;
1944	}
1945
1946	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), RT_MIN(cbToProcess, cbBuf));
1947	uint32_t cbTotal = 0;
1948	uint32_t cbChunk;
1949
1950	int rc = VINF_SUCCESS;
1951
1952	Log3Func(("[SD%RU8] cbToProcess=%RU32, cbLeft=%RU32\n", pStream->u8Strm, cbToProcess, cbLeft));
1953
1954	while (cbLeft)
1955	{
1956	if (!pRegs->bd_valid)
1957	{
1958	Log3Func(("Invalid buffer descriptor, fetching next one ...\n"));
1959	ichac97StreamFetchBDLE(pThis, pStream);
1960	}
1961
1962	if (!pRegs->picb) /* Got a new buffer descriptor, that is, the position is 0? */
1963	{
1964	Log3Func(("Fresh buffer descriptor %RU8 is empty, addr=%#x, len=%#x, skipping\n",
1965	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len));
1966	if (pRegs->civ == pRegs->lvi)
1967	{
1968	pRegs->sr \|= AC97_SR_DCH; /** @todo r=andy Also set CELV? */
1969	pThis->bup_flag = 0;
1970
1971	rc = VINF_EOF;
1972	break;
1973	}
1974
1975	pRegs->sr &= ~AC97_SR_CELV;
1976	pRegs->civ = pRegs->piv;
1977	pRegs->piv = (pRegs->piv + 1) % 32; /** @todo r=andy Define for max BDLEs? */
1978
1979	ichac97StreamFetchBDLE(pThis, pStream);
1980	continue;
1981	}
1982
1983	cbChunk = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */
1984	Assert(cbChunk);
1985
1986	switch (pStream->u8Strm)
1987	{
1988	case AC97SOUNDSOURCE_PO_INDEX: /* Output */
1989	{
1990	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr,
1991	(uint8_t *)pvBuf + cbTotal, cbChunk);
1992	break;
1993	}
1994
1995	case AC97SOUNDSOURCE_PI_INDEX: /* Input */
1996	case AC97SOUNDSOURCE_MC_INDEX: /* Input */
1997	{
1998	PDMDevHlpPhysWrite(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr,
1999	(uint8_t *)pvBuf + cbTotal, cbChunk);
2000	break;
2001	}
2002
2003	default:
2004	AssertMsgFailed(("Stream #%RU8 not supported\n", pStream->u8Strm));
2005	rc = VERR_NOT_SUPPORTED;
2006	break;
2007	}
2008
2009	if (RT_FAILURE(rc))
2010	break;
2011
2012	#ifdef AC97_DEBUG_DUMP_PCM_DATA
2013	RTFILE fh;
2014	RTFileOpen(&fh,
2015	pStream->u8Strm == AC97SOUNDSOURCE_PO_INDEX
2016	? AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97DMARead.pcm" : AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97DMAWrite.pcm",
2017	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
2018	RTFileWrite(fh, (uint8_t *)pvBuf + cbTotal, cbChunk, NULL);
2019	RTFileClose(fh);
2020	#endif
2021
2022	if (cbChunk)
2023	{
2024	cbTotal += cbChunk;
2025	Assert(cbLeft >= cbChunk);
2026	cbLeft -= cbChunk;
2027	Assert((cbChunk & 1) == 0); /* Else the following shift won't work */
2028
2029	pRegs->picb -= (cbChunk >> 1); /** @todo r=andy Assumes 16bit samples. */
2030	pRegs->bd.addr += cbChunk;
2031	}
2032
2033	LogFlowFunc(("[SD%RU8]: cbChunk=%RU32, cbLeft=%RU32, cbTotal=%RU32, rc=%Rrc\n",
2034	pStream->u8Strm, cbChunk, cbLeft, cbTotal, rc));
2035
2036	if (!pRegs->picb)
2037	{
2038	uint32_t new_sr = pRegs->sr & ~AC97_SR_CELV;
2039
2040	if (pRegs->bd.ctl_len & AC97_BD_IOC)
2041	{
2042	new_sr \|= AC97_SR_BCIS;
2043	}
2044
2045	if (pRegs->civ == pRegs->lvi)
2046	{
2047	/* Did we run out of data? */
2048	LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi));
2049
2050	new_sr \|= AC97_SR_LVBCI \| AC97_SR_DCH \| AC97_SR_CELV;
2051	pThis->bup_flag = (pRegs->bd.ctl_len & AC97_BD_BUP) ? BUP_LAST : 0;
2052
2053	rc = VINF_EOF;
2054	}
2055	else
2056	{
2057	pRegs->civ = pRegs->piv;
2058	pRegs->piv = (pRegs->piv + 1) % 32; /** @todo r=andy Define for max BDLEs? */
2059	ichac97StreamFetchBDLE(pThis, pStream);
2060	}
2061
2062	ichac97StreamUpdateSR(pThis, pStream, new_sr);
2063	}
2064
2065	if (/* All data processed? */
2066	rc == VINF_EOF
2067	/* ... or an error occurred? */
2068	\|\| RT_FAILURE(rc))
2069	{
2070	break;
2071	}
2072	}
2073
2074	if (RT_SUCCESS(rc))
2075	{
2076	if (pcbProcessed)
2077	*pcbProcessed = cbTotal;
2078	}
2079
2080	LogFlowFuncLeaveRC(rc);
2081	return rc;
2082	}
2083
2084	/**
2085	* @callback_method_impl{FNIOMIOPORTIN}
2086	*/
2087	static DECLCALLBACK(int) ichac97IOPortNABMRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32Val, unsigned cbVal)
2088	{
2089	RT_NOREF(pDevIns);
2090	PAC97STATE pThis = (PAC97STATE)pvUser;
2091
2092	/* Get the index of the NABMBAR port. */
2093	const uint32_t uPortIdx = Port - pThis->IOPortBase[1];
2094
2095	PAC97STREAM pStream = ichac97GetStreamFromID(pThis, AC97_PORT2IDX(uPortIdx));
2096	PAC97BMREGS pRegs = NULL;
2097
2098	if (pStream)
2099	{
2100	pRegs = &pStream->Regs;
2101
2102	int rc2 = RTCritSectEnter(&pStream->CritSect);
2103	AssertRC(rc2);
2104	}
2105
2106	int rc = VINF_SUCCESS;
2107
2108	switch (cbVal)
2109	{
2110	case 1:
2111	{
2112	switch (uPortIdx)
2113	{
2114	case AC97_CAS:
2115	/* Codec Access Semaphore Register */
2116	Log3Func(("CAS %d\n", pThis->cas));
2117	*pu32Val = pThis->cas;
2118	pThis->cas = 1;
2119	break;
2120	case PI_CIV:
2121	case PO_CIV:
2122	case MC_CIV:
2123	/* Current Index Value Register */
2124	*pu32Val = pRegs->civ;
2125	Log3Func(("CIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2126	break;
2127	case PI_LVI:
2128	case PO_LVI:
2129	case MC_LVI:
2130	/* Last Valid Index Register */
2131	*pu32Val = pRegs->lvi;
2132	Log3Func(("LVI[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2133	break;
2134	case PI_PIV:
2135	case PO_PIV:
2136	case MC_PIV:
2137	/* Prefetched Index Value Register */
2138	*pu32Val = pRegs->piv;
2139	Log3Func(("PIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2140	break;
2141	case PI_CR:
2142	case PO_CR:
2143	case MC_CR:
2144	/* Control Register */
2145	*pu32Val = pRegs->cr;
2146	Log3Func(("CR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2147	break;
2148	case PI_SR:
2149	case PO_SR:
2150	case MC_SR:
2151	/* Status Register (lower part) */
2152	*pu32Val = RT_LO_U8(pRegs->sr);
2153	Log3Func(("SRb[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2154	break;
2155	default:
2156	*pu32Val = UINT32_MAX;
2157	LogFunc(("U nabm readb %#x -> %#x\n", Port, *pu32Val));
2158	break;
2159	}
2160	break;
2161	}
2162
2163	case 2:
2164	{
2165	switch (uPortIdx)
2166	{
2167	case PI_SR:
2168	case PO_SR:
2169	case MC_SR:
2170	/* Status Register */
2171	*pu32Val = pRegs->sr;
2172	Log3Func(("SR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2173	break;
2174	case PI_PICB:
2175	case PO_PICB:
2176	case MC_PICB:
2177	/* Position in Current Buffer */
2178	*pu32Val = pRegs->picb;
2179	Log3Func(("PICB[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2180	break;
2181	default:
2182	*pu32Val = UINT32_MAX;
2183	LogFunc(("U nabm readw %#x -> %#x\n", Port, *pu32Val));
2184	break;
2185	}
2186	break;
2187	}
2188
2189	case 4:
2190	{
2191	switch (uPortIdx)
2192	{
2193	case PI_BDBAR:
2194	case PO_BDBAR:
2195	case MC_BDBAR:
2196	/* Buffer Descriptor Base Address Register */
2197	*pu32Val = pRegs->bdbar;
2198	Log3Func(("BMADDR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2199	break;
2200	case PI_CIV:
2201	case PO_CIV:
2202	case MC_CIV:
2203	/* 32-bit access: Current Index Value Register +
2204	* Last Valid Index Register +
2205	* Status Register */
2206	pu32Val = pRegs->civ \| (pRegs->lvi << 8) \| (pRegs->sr << 16); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
2207	Log3Func(("CIV LVI SR[%d] -> %#x, %#x, %#x\n",
2208	AC97_PORT2IDX(uPortIdx), pRegs->civ, pRegs->lvi, pRegs->sr));
2209	break;
2210	case PI_PICB:
2211	case PO_PICB:
2212	case MC_PICB:
2213	/* 32-bit access: Position in Current Buffer Register +
2214	* Prefetched Index Value Register +
2215	* Control Register */
2216	pu32Val = pRegs->picb \| (pRegs->piv << 16) \| (pRegs->cr << 24); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
2217	Log3Func(("PICB PIV CR[%d] -> %#x %#x %#x %#x\n",
2218	AC97_PORT2IDX(uPortIdx), *pu32Val, pRegs->picb, pRegs->piv, pRegs->cr));
2219	break;
2220	case AC97_GLOB_CNT:
2221	/* Global Control */
2222	*pu32Val = pThis->glob_cnt;
2223	Log3Func(("glob_cnt -> %#x\n", *pu32Val));
2224	break;
2225	case AC97_GLOB_STA:
2226	/* Global Status */
2227	*pu32Val = pThis->glob_sta \| AC97_GS_S0CR;
2228	Log3Func(("glob_sta -> %#x\n", *pu32Val));
2229	break;
2230	default:
2231	*pu32Val = UINT32_MAX;
2232	LogFunc(("U nabm readl %#x -> %#x\n", Port, *pu32Val));
2233	break;
2234	}
2235	break;
2236	}
2237
2238	default:
2239	{
2240	AssertFailed();
2241	rc = VERR_IOM_IOPORT_UNUSED;
2242	}
2243	}
2244
2245	if (pStream)
2246	{
2247	int rc2 = RTCritSectLeave(&pStream->CritSect);
2248	AssertRC(rc2);
2249	}
2250
2251	return rc;
2252	}
2253
2254	/**
2255	* @callback_method_impl{FNIOMIOPORTOUT}
2256	*/
2257	static DECLCALLBACK(int) ichac97IOPortNABMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2258	uint32_t u32Val, unsigned cbVal)
2259	{
2260	RT_NOREF(pDevIns);
2261	PAC97STATE pThis = (PAC97STATE)pvUser;
2262
2263	/* Get the index of the NABMBAR register. */
2264	const uint32_t uPortIdx = Port - pThis->IOPortBase[1];
2265
2266	PAC97STREAM pStream = ichac97GetStreamFromID(pThis, AC97_PORT2IDX(uPortIdx));
2267	PAC97BMREGS pRegs = NULL;
2268
2269	if (pStream)
2270	{
2271	pRegs = &pStream->Regs;
2272
2273	int rc2 = RTCritSectEnter(&pStream->CritSect);
2274	AssertRC(rc2);
2275	}
2276
2277	switch (cbVal)
2278	{
2279	case 1:
2280	{
2281	switch (uPortIdx)
2282	{
2283	/*
2284	* Last Valid Index.
2285	*/
2286	case PI_LVI:
2287	case PO_LVI:
2288	case MC_LVI:
2289	{
2290	if ( (pRegs->cr & AC97_CR_RPBM)
2291	&& (pRegs->sr & AC97_SR_DCH))
2292	{
2293	pRegs->sr &= ~(AC97_SR_DCH \| AC97_SR_CELV);
2294	pRegs->civ = pRegs->piv;
2295	pRegs->piv = (pRegs->piv + 1) % 32;
2296
2297	ichac97StreamFetchBDLE(pThis, pStream);
2298	}
2299	pRegs->lvi = u32Val % 32;
2300	Log3Func(("[SD%RU8] LVI <- %#x\n", pStream->u8Strm, u32Val));
2301	break;
2302	}
2303
2304	/*
2305	* Control Registers.
2306	*/
2307	case PI_CR:
2308	case PO_CR:
2309	case MC_CR:
2310	{
2311	Log3Func(("[SD%RU8] CR <- %#x (cr %#x)\n", pStream->u8Strm, u32Val, pRegs->cr));
2312
2313	if (u32Val & AC97_CR_RR) /* Busmaster reset. */
2314	{
2315	Log3Func(("[SD%RU8] Reset\n", pStream->u8Strm));
2316
2317	/* Make sure that Run/Pause Bus Master bit (RPBM) is cleared (0). */
2318	Assert((pRegs->cr & AC97_CR_RPBM) == 0);
2319
2320	ichac97StreamResetBMRegs(pThis, pStream);
2321	}
2322	else
2323	{
2324	pRegs->cr = u32Val & AC97_CR_VALID_MASK;
2325
2326	if (!(pRegs->cr & AC97_CR_RPBM))
2327	{
2328	Log3Func(("[SD%RU8] Disable\n", pStream->u8Strm));
2329
2330	ichac97StreamEnable(pThis, pStream, false /* fEnable */);
2331
2332	pRegs->sr \|= AC97_SR_DCH;
2333	}
2334	else
2335	{
2336	Log3Func(("[SD%RU8] Enable\n", pStream->u8Strm));
2337
2338	pRegs->civ = pRegs->piv;
2339	pRegs->piv = (pRegs->piv + 1) % 32;
2340
2341	pRegs->sr &= ~AC97_SR_DCH;
2342
2343	/* Fetch the initial BDLE descriptor. */
2344	ichac97StreamFetchBDLE(pThis, pStream);
2345
2346	ichac97StreamEnable(pThis, pStream, true /* fEnable */);
2347	}
2348	}
2349	break;
2350	}
2351
2352	/*
2353	* Status Registers.
2354	*/
2355	case PI_SR:
2356	case PO_SR:
2357	case MC_SR:
2358	{
2359	pRegs->sr \|= u32Val & ~(AC97_SR_RO_MASK \| AC97_SR_WCLEAR_MASK);
2360	ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
2361	Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8Strm, u32Val, pRegs->sr));
2362	break;
2363	}
2364
2365	default:
2366	LogFunc(("Unimplemented: %#x <- %#x (Byte)\n", Port, u32Val));
2367	break;
2368	}
2369	break;
2370	}
2371
2372	case 2:
2373	{
2374	switch (uPortIdx)
2375	{
2376	case PI_SR:
2377	case PO_SR:
2378	case MC_SR:
2379	/* Status Register */
2380	pRegs->sr \|= u32Val & ~(AC97_SR_RO_MASK \| AC97_SR_WCLEAR_MASK);
2381	ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
2382	Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8Strm, u32Val, pRegs->sr));
2383	break;
2384	default:
2385	LogFunc(("Unimplemented: %#x <- %#x (Word)\n", Port, u32Val));
2386	break;
2387	}
2388	break;
2389	}
2390
2391	case 4:
2392	{
2393	switch (uPortIdx)
2394	{
2395	case PI_BDBAR:
2396	case PO_BDBAR:
2397	case MC_BDBAR:
2398	/* Buffer Descriptor list Base Address Register */
2399	pRegs->bdbar = u32Val & ~3;
2400	Log3Func(("[SD%RU8] BDBAR <- %#x (bdbar %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->bdbar));
2401	break;
2402	case AC97_GLOB_CNT:
2403	/* Global Control */
2404	if (u32Val & AC97_GC_WR)
2405	ichac97WarmReset(pThis);
2406	if (u32Val & AC97_GC_CR)
2407	ichac97ColdReset(pThis);
2408	if (!(u32Val & (AC97_GC_WR \| AC97_GC_CR)))
2409	pThis->glob_cnt = u32Val & AC97_GC_VALID_MASK;
2410	Log3Func(("glob_cnt <- %#x (glob_cnt %#x)\n", u32Val, pThis->glob_cnt));
2411	break;
2412	case AC97_GLOB_STA:
2413	/* Global Status */
2414	pThis->glob_sta &= ~(u32Val & AC97_GS_WCLEAR_MASK);
2415	pThis->glob_sta \|= (u32Val & ~(AC97_GS_WCLEAR_MASK \| AC97_GS_RO_MASK)) & AC97_GS_VALID_MASK;
2416	Log3Func(("glob_sta <- %#x (glob_sta %#x)\n", u32Val, pThis->glob_sta));
2417	break;
2418	default:
2419	LogFunc(("Unimplemented: %#x <- %#x (DWord)\n", Port, u32Val));
2420	break;
2421	}
2422	break;
2423	}
2424
2425	default:
2426	AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cbVal, u32Val));
2427	break;
2428	}
2429
2430	if (pStream)
2431	{
2432	int rc2 = RTCritSectLeave(&pStream->CritSect);
2433	AssertRC(rc2);
2434	}
2435
2436	return VINF_SUCCESS;
2437	}
2438
2439	/**
2440	* @callback_method_impl{FNIOMIOPORTIN}
2441	*/
2442	static DECLCALLBACK(int) ichac97IOPortNAMRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32Val, unsigned cbVal)
2443	{
2444	RT_NOREF(pDevIns);
2445	PAC97STATE pThis = (PAC97STATE)pvUser;
2446
2447	int rc = VINF_SUCCESS;
2448
2449	switch (cbVal)
2450	{
2451	case 1:
2452	{
2453	Log3Func(("U nam readb %#x\n", Port));
2454	pThis->cas = 0;
2455	*pu32Val = UINT32_MAX;
2456	break;
2457	}
2458
2459	case 2:
2460	{
2461	uint32_t index = Port - pThis->IOPortBase[0];
2462	*pu32Val = UINT32_MAX;
2463	pThis->cas = 0;
2464	switch (index)
2465	{
2466	default:
2467	*pu32Val = ichac97MixerGet(pThis, index);
2468	Log3Func(("nam readw %#x -> %#x\n", Port, *pu32Val));
2469	break;
2470	}
2471	break;
2472	}
2473
2474	case 4:
2475	{
2476	Log3Func(("U nam readl %#x\n", Port));
2477	pThis->cas = 0;
2478	*pu32Val = UINT32_MAX;
2479	break;
2480	}
2481
2482	default:
2483	{
2484	AssertFailed();
2485	rc = VERR_IOM_IOPORT_UNUSED;
2486	}
2487	}
2488
2489	return rc;
2490	}
2491
2492	/**
2493	* @callback_method_impl{FNIOMIOPORTOUT}
2494	*/
2495	static DECLCALLBACK(int) ichac97IOPortNAMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32Val, unsigned cbVal)
2496	{
2497	RT_NOREF(pDevIns);
2498	PAC97STATE pThis = (PAC97STATE)pvUser;
2499
2500	switch (cbVal)
2501	{
2502	case 1:
2503	{
2504	Log3Func(("U nam writeb %#x <- %#x\n", Port, u32Val));
2505	pThis->cas = 0;
2506	break;
2507	}
2508
2509	case 2:
2510	{
2511	uint32_t index = Port - pThis->IOPortBase[0];
2512	pThis->cas = 0;
2513	switch (index)
2514	{
2515	case AC97_Reset:
2516	ichac97Reset(pThis->CTX_SUFF(pDevIns));
2517	break;
2518	case AC97_Powerdown_Ctrl_Stat:
2519	u32Val &= ~0xf;
2520	u32Val \|= ichac97MixerGet(pThis, index) & 0xf;
2521	ichac97MixerSet(pThis, index, u32Val);
2522	break;
2523	case AC97_Master_Volume_Mute:
2524	if (pThis->uCodecModel == AC97_CODEC_AD1980)
2525	{
2526	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_LOSEL)
2527	break; /* Register controls surround (rear), do nothing. */
2528	}
2529	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
2530	break;
2531	case AC97_Headphone_Volume_Mute:
2532	if (pThis->uCodecModel == AC97_CODEC_AD1980)
2533	{
2534	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
2535	{
2536	/* Register controls PCM (front) outputs. */
2537	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
2538	}
2539	}
2540	break;
2541	case AC97_PCM_Out_Volume_Mute:
2542	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_FRONT, u32Val);
2543	break;
2544	case AC97_Line_In_Volume_Mute:
2545	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
2546	break;
2547	case AC97_Record_Select:
2548	ichac97RecordSelect(pThis, u32Val);
2549	break;
2550	case AC97_Vendor_ID1:
2551	case AC97_Vendor_ID2:
2552	LogFunc(("Attempt to write vendor ID to %#x\n", u32Val));
2553	break;
2554	case AC97_Extended_Audio_ID:
2555	LogFunc(("Attempt to write extended audio ID to %#x\n", u32Val));
2556	break;
2557	case AC97_Extended_Audio_Ctrl_Stat:
2558	if (!(u32Val & AC97_EACS_VRA))
2559	{
2560	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 48000);
2561	ichac97StreamReOpen(pThis, &pThis->StreamOut);
2562
2563	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate, 48000);
2564	ichac97StreamReOpen(pThis, &pThis->StreamLineIn);
2565	}
2566	else
2567	LogRel2(("AC97: Variable rate audio (VRA) is not supported\n"));
2568
2569	if (!(u32Val & AC97_EACS_VRM))
2570	{
2571	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 48000);
2572	ichac97StreamReOpen(pThis, &pThis->StreamMicIn);
2573	}
2574	else
2575	LogRel2(("AC97: Variable rate microphone audio (VRM) is not supported\n"));
2576
2577	LogFunc(("Setting extended audio control to %#x\n", u32Val));
2578	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, u32Val);
2579	break;
2580	case AC97_PCM_Front_DAC_Rate:
2581	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
2582	{
2583	ichac97MixerSet(pThis, index, u32Val);
2584	LogFunc(("Set front DAC rate to %RU32\n", u32Val));
2585	ichac97StreamReOpen(pThis, &pThis->StreamOut);
2586	}
2587	else
2588	AssertMsgFailed(("Attempt to set front DAC rate to %RU32, but VRA is not set\n", u32Val));
2589	break;
2590	case AC97_MIC_ADC_Rate:
2591	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRM)
2592	{
2593	ichac97MixerSet(pThis, index, u32Val);
2594	LogFunc(("Set MIC ADC rate to %RU32\n", u32Val));
2595	ichac97StreamReOpen(pThis, &pThis->StreamMicIn);
2596	}
2597	else
2598	AssertMsgFailed(("Attempt to set MIC ADC rate to %RU32, but VRM is not set\n", u32Val));
2599	break;
2600	case AC97_PCM_LR_ADC_Rate:
2601	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
2602	{
2603	ichac97MixerSet(pThis, index, u32Val);
2604	LogFunc(("Set front LR ADC rate to %RU32\n", u32Val));
2605	ichac97StreamReOpen(pThis, &pThis->StreamLineIn);
2606	}
2607	else
2608	AssertMsgFailed(("Attempt to set LR ADC rate to %RU32, but VRA is not set\n", u32Val));
2609	break;
2610	default:
2611	LogFunc(("U nam writew %#x <- %#x\n", Port, u32Val));
2612	ichac97MixerSet(pThis, index, u32Val);
2613	break;
2614	}
2615	break;
2616	}
2617
2618	case 4:
2619	{
2620	Log3Func(("U nam writel %#x <- %#x\n", Port, u32Val));
2621	pThis->cas = 0;
2622	break;
2623	}
2624
2625	default:
2626	AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cbVal, u32Val));
2627	break;
2628	}
2629
2630	return VINF_SUCCESS;
2631	}
2632
2633
2634	/**
2635	* @callback_method_impl{FNPCIIOREGIONMAP}
2636	*/
2637	static DECLCALLBACK(int) ichac97IOPortMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
2638	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
2639	{
2640	RT_NOREF(cb, enmType);
2641	PAC97STATE pThis = RT_FROM_MEMBER(pPciDev, AC97STATE, PciDev);
2642	RTIOPORT Port = (RTIOPORT)GCPhysAddress;
2643
2644	Assert(enmType == PCI_ADDRESS_SPACE_IO);
2645	Assert(cb >= 0x20);
2646
2647	if (iRegion > 1) /* We support 2 regions max. at the moment. */
2648	return VERR_INVALID_PARAMETER;
2649
2650	int rc;
2651	if (iRegion == 0)
2652	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 256, pThis,
2653	ichac97IOPortNAMWrite, ichac97IOPortNAMRead,
2654	NULL, NULL, "ICHAC97 NAM");
2655	else
2656	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 64, pThis,
2657	ichac97IOPortNABMWrite, ichac97IOPortNABMRead,
2658	NULL, NULL, "ICHAC97 NABM");
2659	if (RT_FAILURE(rc))
2660	return rc;
2661
2662	pThis->IOPortBase[iRegion] = Port;
2663	return VINF_SUCCESS;
2664	}
2665
2666	DECLINLINE(PAC97STREAM) ichac97GetStreamFromID(PAC97STATE pThis, uint32_t uID)
2667	{
2668	switch (uID)
2669	{
2670	case AC97SOUNDSOURCE_PI_INDEX: return &pThis->StreamLineIn;
2671	case AC97SOUNDSOURCE_MC_INDEX: return &pThis->StreamMicIn;
2672	case AC97SOUNDSOURCE_PO_INDEX: return &pThis->StreamOut;
2673	default: break;
2674	}
2675
2676	return NULL;
2677	}
2678
2679	#ifdef IN_RING3
2680	static int ichac97SaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
2681	{
2682	RT_NOREF(pDevIns);
2683	PAC97BMREGS pRegs = &pStream->Regs;
2684
2685	SSMR3PutU32(pSSM, pRegs->bdbar);
2686	SSMR3PutU8( pSSM, pRegs->civ);
2687	SSMR3PutU8( pSSM, pRegs->lvi);
2688	SSMR3PutU16(pSSM, pRegs->sr);
2689	SSMR3PutU16(pSSM, pRegs->picb);
2690	SSMR3PutU8( pSSM, pRegs->piv);
2691	SSMR3PutU8( pSSM, pRegs->cr);
2692	SSMR3PutS32(pSSM, pRegs->bd_valid);
2693	SSMR3PutU32(pSSM, pRegs->bd.addr);
2694	SSMR3PutU32(pSSM, pRegs->bd.ctl_len);
2695
2696	return VINF_SUCCESS;
2697	}
2698
2699	/**
2700	* @callback_method_impl{FNSSMDEVSAVEEXEC}
2701	*/
2702	static DECLCALLBACK(int) ichac97SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2703	{
2704	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2705
2706	LogFlowFuncEnter();
2707
2708	SSMR3PutU32(pSSM, pThis->glob_cnt);
2709	SSMR3PutU32(pSSM, pThis->glob_sta);
2710	SSMR3PutU32(pSSM, pThis->cas);
2711
2712	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
2713	/* Note: The order the streams are saved here is critical, so don't touch. */
2714	int rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamLineIn);
2715	AssertRC(rc2);
2716	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamOut);
2717	AssertRC(rc2);
2718	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamMicIn);
2719	AssertRC(rc2);
2720
2721	SSMR3PutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
2722
2723	uint8_t active[AC97SOUNDSOURCE_LAST_INDEX];
2724
2725	active[AC97SOUNDSOURCE_PI_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamLineIn) ? 1 : 0;
2726	active[AC97SOUNDSOURCE_PO_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamOut) ? 1 : 0;
2727	active[AC97SOUNDSOURCE_MC_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamMicIn) ? 1 : 0;
2728
2729	SSMR3PutMem(pSSM, active, sizeof(active));
2730
2731	LogFlowFuncLeaveRC(VINF_SUCCESS);
2732	return VINF_SUCCESS;
2733	}
2734
2735	static int ichac97LoadStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
2736	{
2737	RT_NOREF(pDevIns);
2738	PAC97BMREGS pRegs = &pStream->Regs;
2739
2740	SSMR3GetU32(pSSM, &pRegs->bdbar);
2741	SSMR3GetU8( pSSM, &pRegs->civ);
2742	SSMR3GetU8( pSSM, &pRegs->lvi);
2743	SSMR3GetU16(pSSM, &pRegs->sr);
2744	SSMR3GetU16(pSSM, &pRegs->picb);
2745	SSMR3GetU8( pSSM, &pRegs->piv);
2746	SSMR3GetU8( pSSM, &pRegs->cr);
2747	SSMR3GetS32(pSSM, &pRegs->bd_valid);
2748	SSMR3GetU32(pSSM, &pRegs->bd.addr);
2749	SSMR3GetU32(pSSM, &pRegs->bd.ctl_len);
2750
2751	return VINF_SUCCESS;
2752	}
2753
2754	/**
2755	* @callback_method_impl{FNSSMDEVLOADEXEC}
2756	*/
2757	static DECLCALLBACK(int) ichac97LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2758	{
2759	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2760
2761	LogRel2(("ichac97LoadExec: uVersion=%RU32, uPass=0x%x\n", uVersion, uPass));
2762
2763	AssertMsgReturn (uVersion == AC97_SSM_VERSION, ("%RU32\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2764	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2765
2766	SSMR3GetU32(pSSM, &pThis->glob_cnt);
2767	SSMR3GetU32(pSSM, &pThis->glob_sta);
2768	SSMR3GetU32(pSSM, &pThis->cas);
2769
2770	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
2771	/* Note: The order the streams are loaded here is critical, so don't touch. */
2772	int rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamLineIn);
2773	AssertRC(rc2);
2774	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamOut);
2775	AssertRC(rc2);
2776	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamMicIn);
2777	AssertRC(rc2);
2778
2779	SSMR3GetMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
2780
2781	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
2782	uint8_t uaStrmsActive[AC97SOUNDSOURCE_LAST_INDEX];
2783	SSMR3GetMem(pSSM, uaStrmsActive, sizeof(uaStrmsActive));
2784
2785	ichac97RecordSelect(pThis, ichac97MixerGet(pThis, AC97_Record_Select));
2786	# define V_(a, b) ichac97MixerSetVolume(pThis, a, b, ichac97MixerGet(pThis, a))
2787	V_(AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER);
2788	V_(AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT);
2789	V_(AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN);
2790	V_(AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN);
2791	# undef V_
2792	if (pThis->uCodecModel == AC97_CODEC_AD1980)
2793	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
2794	ichac97MixerSetVolume(pThis, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER,
2795	ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute));
2796
2797	rc2 = ichac97StreamsCreate(pThis);
2798	if (RT_SUCCESS(rc2))
2799	{
2800	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
2801	rc2 = ichac97StreamEnable(pThis, &pThis->StreamLineIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PI_INDEX]));
2802	if (RT_SUCCESS(rc2))
2803	rc2 = ichac97StreamEnable(pThis, &pThis->StreamMicIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_MC_INDEX]));
2804	if (RT_SUCCESS(rc2))
2805	rc2 = ichac97StreamEnable(pThis, &pThis->StreamOut, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PO_INDEX]));
2806	}
2807
2808	pThis->bup_flag = 0;
2809	pThis->last_samp = 0;
2810
2811	return VINF_SUCCESS;
2812	}
2813
2814
2815	/**
2816	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2817	*/
2818	static DECLCALLBACK(void ) ichac97QueryInterface(struct PDMIBASE pInterface, const char *pszIID)
2819	{
2820	PAC97STATE pThis = RT_FROM_MEMBER(pInterface, AC97STATE, IBase);
2821	Assert(&pThis->IBase == pInterface);
2822
2823	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
2824	return NULL;
2825	}
2826
2827
2828	/**
2829	* Powers off the device.
2830	*
2831	* @param pDevIns Device instance to power off.
2832	*/
2833	static DECLCALLBACK(void) ichac97PowerOff(PPDMDEVINS pDevIns)
2834	{
2835	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2836
2837	LogRel2(("AC97: Powering off ...\n"));
2838
2839	/* Note: Involves mixer stream / sink destruction, so also do this here
2840	* instead of in ichac97Destruct(). */
2841	ichac97StreamsDestroy(pThis);
2842
2843	/**
2844	* Note: Destroy the mixer while powering off and not in ichac97Destruct,
2845	* giving the mixer the chance to release any references held to
2846	* PDM audio streams it maintains.
2847	*/
2848	if (pThis->pMixer)
2849	{
2850	AudioMixerDestroy(pThis->pMixer);
2851	pThis->pMixer = NULL;
2852	}
2853	}
2854
2855
2856	/**
2857	* @interface_method_impl{PDMDEVREG,pfnReset}
2858	*
2859	* @remarks The original sources didn't install a reset handler, but it seems to
2860	* make sense to me so we'll do it.
2861	*/
2862	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns)
2863	{
2864	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2865
2866	LogFlowFuncEnter();
2867
2868	/*
2869	* Reset the device state (will need pDrv later).
2870	*/
2871	ichac97StreamResetBMRegs(pThis, &pThis->StreamLineIn);
2872	ichac97StreamResetBMRegs(pThis, &pThis->StreamMicIn);
2873	ichac97StreamResetBMRegs(pThis, &pThis->StreamOut);
2874
2875	/*
2876	* Reset the mixer too. The Windows XP driver seems to rely on
2877	* this. At least it wants to read the vendor id before it resets
2878	* the codec manually.
2879	*/
2880	ichac97MixerReset(pThis);
2881
2882	/*
2883	* Reset all streams.
2884	*/
2885	ichac97StreamReset(pThis, &pThis->StreamLineIn);
2886	ichac97StreamReset(pThis, &pThis->StreamMicIn);
2887	ichac97StreamReset(pThis, &pThis->StreamOut);
2888
2889	LogRel(("AC97: Reset\n"));
2890	}
2891
2892
2893	/**
2894	* @interface_method_impl{PDMDEVREG,pfnDestruct}
2895	*/
2896	static DECLCALLBACK(int) ichac97Destruct(PPDMDEVINS pDevIns)
2897	{
2898	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2899
2900	LogFlowFuncEnter();
2901
2902	PAC97DRIVER pDrv, pDrvNext;
2903	RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
2904	{
2905	RTListNodeRemove(&pDrv->Node);
2906	RTMemFree(pDrv);
2907	}
2908
2909	/* Sanity. */
2910	Assert(RTListIsEmpty(&pThis->lstDrv));
2911
2912	int rc;
2913	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
2914	rc = RTCritSectDelete(&pThis->csTimer);
2915	#else
2916	rc = VINF_SUCCESS;
2917	#endif
2918
2919	LogFlowFuncLeaveRC(rc);
2920	return rc;
2921	}
2922
2923
2924	/**
2925	* Attach command, internal version.
2926	*
2927	* This is called to let the device attach to a driver for a specified LUN
2928	* during runtime. This is not called during VM construction, the device
2929	* constructor has to attach to all the available drivers.
2930	*
2931	* @returns VBox status code.
2932	* @param pDevIns The device instance.
2933	* @param pDrv Driver to (re-)use for (re-)attaching to.
2934	* If NULL is specified, a new driver will be created and appended
2935	* to the driver list.
2936	* @param uLUN The logical unit which is being detached.
2937	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
2938	*/
2939	static DECLCALLBACK(int) ichac97AttachInternal(PPDMDEVINS pDevIns, PAC97DRIVER pDrv, unsigned uLUN, uint32_t fFlags)
2940	{
2941	RT_NOREF(fFlags);
2942	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2943
2944	/*
2945	* Attach driver.
2946	*/
2947	char *pszDesc = NULL;
2948	if (RTStrAPrintf(&pszDesc, "Audio driver port (AC'97) for LUN #%u", uLUN) <= 0)
2949	AssertReleaseMsgReturn(pszDesc,
2950	("Not enough memory for AC'97 driver port description of LUN #%u\n", uLUN),
2951	VERR_NO_MEMORY);
2952
2953	PPDMIBASE pDrvBase;
2954	int rc = PDMDevHlpDriverAttach(pDevIns, uLUN,
2955	&pThis->IBase, &pDrvBase, pszDesc);
2956	if (RT_SUCCESS(rc))
2957	{
2958	if (pDrv == NULL)
2959	pDrv = (PAC97DRIVER)RTMemAllocZ(sizeof(AC97DRIVER));
2960	if (pDrv)
2961	{
2962	pDrv->pDrvBase = pDrvBase;
2963	pDrv->pConnector = PDMIBASE_QUERY_INTERFACE(pDrvBase, PDMIAUDIOCONNECTOR);
2964	AssertMsg(pDrv->pConnector != NULL, ("Configuration error: LUN #%u has no host audio interface, rc=%Rrc\n", uLUN, rc));
2965	pDrv->pAC97State = pThis;
2966	pDrv->uLUN = uLUN;
2967
2968	/*
2969	* For now we always set the driver at LUN 0 as our primary
2970	* host backend. This might change in the future.
2971	*/
2972	if (pDrv->uLUN == 0)
2973	pDrv->Flags \|= PDMAUDIODRVFLAGS_PRIMARY;
2974
2975	LogFunc(("LUN#%RU8: pCon=%p, drvFlags=0x%x\n", uLUN, pDrv->pConnector, pDrv->Flags));
2976
2977	/* Attach to driver list if not attached yet. */
2978	if (!pDrv->fAttached)
2979	{
2980	RTListAppend(&pThis->lstDrv, &pDrv->Node);
2981	pDrv->fAttached = true;
2982	}
2983	}
2984	else
2985	rc = VERR_NO_MEMORY;
2986	}
2987	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
2988	LogFunc(("No attached driver for LUN #%u\n", uLUN));
2989
2990	if (RT_FAILURE(rc))
2991	{
2992	/* Only free this string on failure;
2993	* must remain valid for the live of the driver instance. */
2994	RTStrFree(pszDesc);
2995	}
2996
2997	LogFunc(("iLUN=%u, fFlags=0x%x, rc=%Rrc\n", uLUN, fFlags, rc));
2998	return rc;
2999	}
3000
3001
3002	/**
3003	* Attach command.
3004	*
3005	* This is called to let the device attach to a driver for a specified LUN
3006	* during runtime. This is not called during VM construction, the device
3007	* constructor has to attach to all the available drivers.
3008	*
3009	* @returns VBox status code.
3010	* @param pDevIns The device instance.
3011	* @param uLUN The logical unit which is being detached.
3012	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3013	*/
3014	static DECLCALLBACK(int) ichac97Attach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
3015	{
3016	return ichac97AttachInternal(pDevIns, NULL /* pDrv */, uLUN, fFlags);
3017	}
3018
3019	static DECLCALLBACK(void) ichac97Detach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
3020	{
3021	RT_NOREF(pDevIns, uLUN, fFlags);
3022	LogFunc(("iLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
3023	}
3024
3025	/**
3026	* Re-attach.
3027	*
3028	* @returns VBox status code.
3029	* @param pThis Device instance.
3030	* @param pDrv Driver instance used for attaching to.
3031	* If NULL is specified, a new driver will be created and appended
3032	* to the driver list.
3033	* @param uLUN The logical unit which is being re-detached.
3034	* @param pszDriver Driver name.
3035	*/
3036	static int ichac97Reattach(PAC97STATE pThis, PAC97DRIVER pDrv, uint8_t uLUN, const char *pszDriver)
3037	{
3038	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3039	AssertPtrReturn(pszDriver, VERR_INVALID_POINTER);
3040
3041	PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
3042	PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
3043	PCFGMNODE pDev0 = CFGMR3GetChild(pRoot, "Devices/ichac97/0/");
3044
3045	/* Remove LUN branch. */
3046	CFGMR3RemoveNode(CFGMR3GetChildF(pDev0, "LUN#%u/", uLUN));
3047
3048	if (pDrv)
3049	{
3050	/* Re-use a driver instance => detach the driver before. */
3051	int rc = PDMDevHlpDriverDetach(pThis->pDevInsR3, PDMIBASE_2_PDMDRV(pDrv->pDrvBase), 0 /* fFlags */);
3052	if (RT_FAILURE(rc))
3053	return rc;
3054	}
3055
3056	#define RC_CHECK() if (RT_FAILURE(rc)) { AssertReleaseRC(rc); break; }
3057
3058	int rc;
3059	do
3060	{
3061	PCFGMNODE pLunL0;
3062	rc = CFGMR3InsertNodeF(pDev0, &pLunL0, "LUN#%u/", uLUN); RC_CHECK();
3063	rc = CFGMR3InsertString(pLunL0, "Driver", "AUDIO"); RC_CHECK();
3064	rc = CFGMR3InsertNode(pLunL0, "Config/", NULL); RC_CHECK();
3065
3066	PCFGMNODE pLunL1, pLunL2;
3067	rc = CFGMR3InsertNode (pLunL0, "AttachedDriver/", &pLunL1); RC_CHECK();
3068	rc = CFGMR3InsertNode (pLunL1, "Config/", &pLunL2); RC_CHECK();
3069	rc = CFGMR3InsertString(pLunL1, "Driver", pszDriver); RC_CHECK();
3070
3071	rc = CFGMR3InsertString(pLunL2, "AudioDriver", pszDriver); RC_CHECK();
3072
3073	} while (0);
3074
3075	if (RT_SUCCESS(rc))
3076	rc = ichac97AttachInternal(pThis->pDevInsR3, pDrv, uLUN, 0 /* fFlags */);
3077
3078	LogFunc(("pThis=%p, uLUN=%u, pszDriver=%s, rc=%Rrc\n", pThis, uLUN, pszDriver, rc));
3079
3080	#undef RC_CHECK
3081
3082	return rc;
3083	}
3084
3085	/**
3086	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3087	*/
3088	static DECLCALLBACK(int) ichac97Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3089	{
3090	RT_NOREF(iInstance);
3091	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3092
3093	/* NB: This must be done before any possible failure (and running the destructor). */
3094	RTListInit(&pThis->lstDrv);
3095
3096	Assert(iInstance == 0);
3097	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3098
3099	/*
3100	* Validations.
3101	*/
3102	if (!CFGMR3AreValuesValid(pCfg,
3103	"Codec\0"
3104	"TimerHz\0"))
3105	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3106	N_("Invalid configuration for the AC'97 device"));
3107
3108	/*
3109	* Read config data.
3110	*/
3111	char szCodec[20];
3112	int rc = CFGMR3QueryStringDef(pCfg, "Codec", &szCodec[0], sizeof(szCodec), "STAC9700");
3113	if (RT_FAILURE(rc))
3114	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3115	N_("AC'97 configuration error: Querying \"Codec\" as string failed"));
3116
3117	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3118	uint16_t uTimerHz;
3119	rc = CFGMR3QueryU16Def(pCfg, "TimerHz", &uTimerHz, AC97_TIMER_HZ /* Default value, if not set. */);
3120	if (RT_FAILURE(rc))
3121	return PDMDEV_SET_ERROR(pDevIns, rc,
3122	N_("AC'97 configuration error: failed to read Hertz (Hz) rate as unsigned integer"));
3123	#endif
3124
3125	/*
3126	* The AD1980 codec (with corresponding PCI subsystem vendor ID) is whitelisted
3127	* in the Linux kernel; Linux makes no attempt to measure the data rate and assumes
3128	* 48 kHz rate, which is exactly what we need. Same goes for AD1981B.
3129	*/
3130	if (!strcmp(szCodec, "STAC9700"))
3131	pThis->uCodecModel = AC97_CODEC_STAC9700;
3132	else if (!strcmp(szCodec, "AD1980"))
3133	pThis->uCodecModel = AC97_CODEC_AD1980;
3134	else if (!strcmp(szCodec, "AD1981B"))
3135	pThis->uCodecModel = AC97_CODEC_AD1981B;
3136	else
3137	{
3138	return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS,
3139	N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"),
3140	szCodec);
3141	}
3142
3143	/*
3144	* Initialize data (most of it anyway).
3145	*/
3146	pThis->pDevInsR3 = pDevIns;
3147	/* IBase */
3148	pThis->IBase.pfnQueryInterface = ichac97QueryInterface;
3149
3150	/* PCI Device (the assertions will be removed later) */
3151	PCIDevSetVendorId (&pThis->PciDev, 0x8086); /* 00 ro - intel. */ Assert(pThis->PciDev.abConfig[0x00] == 0x86); Assert(pThis->PciDev.abConfig[0x01] == 0x80);
3152	PCIDevSetDeviceId (&pThis->PciDev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */ Assert(pThis->PciDev.abConfig[0x02] == 0x15); Assert(pThis->PciDev.abConfig[0x03] == 0x24);
3153	PCIDevSetCommand (&pThis->PciDev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert(pThis->PciDev.abConfig[0x04] == 0x00); Assert(pThis->PciDev.abConfig[0x05] == 0x00);
3154	PCIDevSetStatus (&pThis->PciDev, VBOX_PCI_STATUS_DEVSEL_MEDIUM \| VBOX_PCI_STATUS_FAST_BACK); /* 06 rwc?,ro? - pcists. */ Assert(pThis->PciDev.abConfig[0x06] == 0x80); Assert(pThis->PciDev.abConfig[0x07] == 0x02);
3155	PCIDevSetRevisionId (&pThis->PciDev, 0x01); /* 08 ro - rid. */ Assert(pThis->PciDev.abConfig[0x08] == 0x01);
3156	PCIDevSetClassProg (&pThis->PciDev, 0x00); /* 09 ro - pi. */ Assert(pThis->PciDev.abConfig[0x09] == 0x00);
3157	PCIDevSetClassSub (&pThis->PciDev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert(pThis->PciDev.abConfig[0x0a] == 0x01);
3158	PCIDevSetClassBase (&pThis->PciDev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ Assert(pThis->PciDev.abConfig[0x0b] == 0x04);
3159	PCIDevSetHeaderType (&pThis->PciDev, 0x00); /* 0e ro - headtyp. */ Assert(pThis->PciDev.abConfig[0x0e] == 0x00);
3160	PCIDevSetBaseAddress (&pThis->PciDev, 0, /* 10 rw - nambar - native audio mixer base. */
3161	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.abConfig[0x10] == 0x01); Assert(pThis->PciDev.abConfig[0x11] == 0x00); Assert(pThis->PciDev.abConfig[0x12] == 0x00); Assert(pThis->PciDev.abConfig[0x13] == 0x00);
3162	PCIDevSetBaseAddress (&pThis->PciDev, 1, /* 14 rw - nabmbar - native audio bus mastering. */
3163	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.abConfig[0x14] == 0x01); Assert(pThis->PciDev.abConfig[0x15] == 0x00); Assert(pThis->PciDev.abConfig[0x16] == 0x00); Assert(pThis->PciDev.abConfig[0x17] == 0x00);
3164	PCIDevSetInterruptLine (&pThis->PciDev, 0x00); /* 3c rw. */ Assert(pThis->PciDev.abConfig[0x3c] == 0x00);
3165	PCIDevSetInterruptPin (&pThis->PciDev, 0x01); /* 3d ro - INTA#. */ Assert(pThis->PciDev.abConfig[0x3d] == 0x01);
3166
3167	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3168	{
3169	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
3170	PCIDevSetSubSystemId (&pThis->PciDev, 0x0177); /* 2e ro. */
3171	}
3172	else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
3173	{
3174	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
3175	PCIDevSetSubSystemId (&pThis->PciDev, 0x01ad); /* 2e ro. */
3176	}
3177	else
3178	{
3179	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x8086); /* 2c ro - Intel.) */
3180	PCIDevSetSubSystemId (&pThis->PciDev, 0x0000); /* 2e ro. */
3181	}
3182
3183	/*
3184	* Register the PCI device, it's I/O regions, the timer and the
3185	* saved state item.
3186	*/
3187	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
3188	if (RT_FAILURE(rc))
3189	return rc;
3190
3191	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 256, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
3192	if (RT_FAILURE(rc))
3193	return rc;
3194
3195	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 64, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
3196	if (RT_FAILURE(rc))
3197	return rc;
3198
3199	rc = PDMDevHlpSSMRegister(pDevIns, AC97_SSM_VERSION, sizeof(*pThis), ichac97SaveExec, ichac97LoadExec);
3200	if (RT_FAILURE(rc))
3201	return rc;
3202
3203	/*
3204	* Attach driver.
3205	*/
3206	uint8_t uLUN;
3207	for (uLUN = 0; uLUN < UINT8_MAX; ++uLUN)
3208	{
3209	LogFunc(("Trying to attach driver for LUN #%RU8 ...\n", uLUN));
3210	rc = ichac97AttachInternal(pDevIns, NULL /* pDrv /, uLUN, 0 / fFlags */);
3211	if (RT_FAILURE(rc))
3212	{
3213	if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3214	rc = VINF_SUCCESS;
3215	else if (rc == VERR_AUDIO_BACKEND_INIT_FAILED)
3216	{
3217	ichac97Reattach(pThis, NULL /* pDrv */, uLUN, "NullAudio");
3218	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
3219	N_("Host audio backend initialization has failed. Selecting the NULL audio backend "
3220	"with the consequence that no sound is audible"));
3221	/* Attaching to the NULL audio backend will never fail. */
3222	rc = VINF_SUCCESS;
3223	}
3224	break;
3225	}
3226	}
3227
3228	LogFunc(("cLUNs=%RU8, rc=%Rrc\n", uLUN, rc));
3229
3230	if (RT_SUCCESS(rc))
3231	rc = AudioMixerCreate("AC'97 Mixer", 0 /* uFlags */, &pThis->pMixer);
3232
3233	ichac97Reset(pDevIns);
3234
3235	if (RT_SUCCESS(rc))
3236	{
3237	ichac97StreamsCreate(pThis);
3238
3239	#ifdef VBOX_WITH_AUDIO_AC97_ONETIME_INIT
3240	PAC97DRIVER pDrv;
3241	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
3242	{
3243	/*
3244	* Only primary drivers are critical for the VM to run. Everything else
3245	* might not worth showing an own error message box in the GUI.
3246	*/
3247	if (!(pDrv->Flags & PDMAUDIODRVFLAGS_PRIMARY))
3248	continue;
3249
3250	PPDMIAUDIOCONNECTOR pCon = pDrv->pConnector;
3251	AssertPtr(pCon);
3252
3253	bool fValidLineIn = AudioMixerStreamIsValid(pDrv->LineIn.pMixStrm);
3254	bool fValidMicIn = AudioMixerStreamIsValid(pDrv->MicIn.pMixStrm);
3255	bool fValidOut = AudioMixerStreamIsValid(pDrv->Out.pMixStrm);
3256
3257	if ( !fValidLineIn
3258	&& !fValidMicIn
3259	&& !fValidOut)
3260	{
3261	LogRel(("AC97: Falling back to NULL backend (no sound audible)\n"));
3262
3263	/* Destroy the streams before re-attaching the NULL driver. */
3264	ichac97StreamsDestroy(pThis);
3265
3266	ichac97Reset(pDevIns);
3267	ichac97Reattach(pThis, pDrv, pDrv->uLUN, "NullAudio");
3268
3269	/* Re-create the streams after re-attaching. */
3270	ichac97StreamsCreate(pThis);
3271
3272	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
3273	N_("No audio devices could be opened. Selecting the NULL audio backend "
3274	"with the consequence that no sound is audible"));
3275	}
3276	else
3277	{
3278	bool fWarn = false;
3279
3280	PDMAUDIOBACKENDCFG backendCfg;
3281	int rc2 = pCon->pfnGetConfig(pCon, &backendCfg);
3282	if (RT_SUCCESS(rc2))
3283	{
3284	if (backendCfg.cMaxStreamsIn)
3285	{
3286	/* If the audio backend supports two or more input streams at once,
3287	* warn if one of our two inputs (microphone-in and line-in) failed to initialize. */
3288	if (backendCfg.cMaxStreamsIn >= 2)
3289	fWarn = !fValidLineIn \|\| !fValidMicIn;
3290	/* If the audio backend only supports one input stream at once (e.g. pure ALSA, and
3291	* not ALSA via PulseAudio plugin!), only warn if both of our inputs failed to initialize.
3292	* One of the two simply is not in use then. */
3293	else if (backendCfg.cMaxStreamsIn == 1)
3294	fWarn = !fValidLineIn && !fValidMicIn;
3295	/* Don't warn if our backend is not able of supporting any input streams at all. */
3296	}
3297
3298	if ( !fWarn
3299	&& backendCfg.cMaxStreamsOut)
3300	{
3301	fWarn = !fValidOut;
3302	}
3303	}
3304	else
3305	{
3306	LogRel(("AC97: Unable to retrieve audio backend configuration for LUN #%RU8, rc=%Rrc\n", pDrv->uLUN, rc2));
3307	fWarn = true;
3308	}
3309
3310	if (fWarn)
3311	{
3312	char szMissingStreams[255] = "";
3313	size_t len = 0;
3314	if (!fValidLineIn)
3315	{
3316	LogRel(("AC97: WARNING: Unable to open PCM line input for LUN #%RU8!\n", pDrv->uLUN));
3317	len = RTStrPrintf(szMissingStreams, sizeof(szMissingStreams), "PCM Input");
3318	}
3319	if (!fValidMicIn)
3320	{
3321	LogRel(("AC97: WARNING: Unable to open PCM microphone input for LUN #%RU8!\n", pDrv->uLUN));
3322	len += RTStrPrintf(szMissingStreams + len,
3323	sizeof(szMissingStreams) - len, len ? ", PCM Microphone" : "PCM Microphone");
3324	}
3325	if (!fValidOut)
3326	{
3327	LogRel(("AC97: WARNING: Unable to open PCM output for LUN #%RU8!\n", pDrv->uLUN));
3328	len += RTStrPrintf(szMissingStreams + len,
3329	sizeof(szMissingStreams) - len, len ? ", PCM Output" : "PCM Output");
3330	}
3331
3332	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
3333	N_("Some AC'97 audio streams (%s) could not be opened. Guest applications generating audio "
3334	"output or depending on audio input may hang. Make sure your host audio device "
3335	"is working properly. Check the logfile for error messages of the audio "
3336	"subsystem"), szMissingStreams);
3337	}
3338	}
3339	}
3340	#endif /* VBOX_WITH_AUDIO_AC97_ONETIME_INIT */
3341	}
3342
3343	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3344	if (RT_SUCCESS(rc))
3345	{
3346	rc = RTCritSectInit(&pThis->csTimer);
3347	if (RT_SUCCESS(rc))
3348	{
3349	/* Create the emulation timer. */
3350	rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, ichac97Timer, pThis,
3351	TMTIMER_FLAGS_NO_CRIT_SECT, "DevIchAc97", &pThis->pTimer);
3352	AssertRCReturn(rc, rc);
3353
3354	if (RT_SUCCESS(rc))
3355	{
3356	pThis->cTimerTicks = TMTimerGetFreq(pThis->pTimer) / uTimerHz;
3357	pThis->uTimerTS = TMTimerGet(pThis->pTimer);
3358	LogFunc(("Timer ticks=%RU64 (%RU16 Hz)\n", pThis->cTimerTicks, uTimerHz));
3359	}
3360	}
3361	}
3362	#else /* !VBOX_WITH_AUDIO_AC97_CALLBACKS */
3363	if (RT_SUCCESS(rc))
3364	{
3365	PAC97DRIVER pDrv;
3366	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
3367	{
3368	/* Only register primary driver.
3369	* The device emulation does the output multiplexing then. */
3370	if (!(pDrv->Flags & PDMAUDIODRVFLAGS_PRIMARY))
3371	continue;
3372
3373	PDMAUDIOCALLBACK AudioCallbacks[2];
3374
3375	AC97CALLBACKCTX Ctx = { pThis, pDrv };
3376
3377	AudioCallbacks[0].enmType = PDMAUDIOCALLBACKTYPE_INPUT;
3378	AudioCallbacks[0].pfnCallback = ac97CallbackInput;
3379	AudioCallbacks[0].pvCtx = &Ctx;
3380	AudioCallbacks[0].cbCtx = sizeof(AC97CALLBACKCTX);
3381
3382	AudioCallbacks[1].enmType = PDMAUDIOCALLBACKTYPE_OUTPUT;
3383	AudioCallbacks[1].pfnCallback = ac97CallbackOutput;
3384	AudioCallbacks[1].pvCtx = &Ctx;
3385	AudioCallbacks[1].cbCtx = sizeof(AC97CALLBACKCTX);
3386
3387	rc = pDrv->pConnector->pfnRegisterCallbacks(pDrv->pConnector, AudioCallbacks, RT_ELEMENTS(AudioCallbacks));
3388	if (RT_FAILURE(rc))
3389	break;
3390	}
3391	}
3392	#endif /* VBOX_WITH_AUDIO_AC97_CALLBACKS */
3393
3394	#ifdef VBOX_WITH_STATISTICS
3395	if (RT_SUCCESS(rc))
3396	{
3397	/*
3398	* Register statistics.
3399	*/
3400	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, "/Devices/AC97/Timer", STAMUNIT_TICKS_PER_CALL, "Profiling ichac97Timer.");
3401	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatIn, STAMTYPE_PROFILE, "/Devices/AC97/Input", STAMUNIT_TICKS_PER_CALL, "Profiling input.");
3402	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatOut, STAMTYPE_PROFILE, "/Devices/AC97/Output", STAMUNIT_TICKS_PER_CALL, "Profiling output.");
3403	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, "/Devices/AC97/BytesRead" , STAMUNIT_BYTES, "Bytes read from AC97 emulation.");
3404	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, "/Devices/AC97/BytesWritten", STAMUNIT_BYTES, "Bytes written to AC97 emulation.");
3405	}
3406	#endif
3407
3408	#ifdef AC97_DEBUG_DUMP_PCM_DATA
3409	RTFileDelete(AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97DMARead.pcm");
3410	RTFileDelete(AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97DMAWrite.pcm");
3411	RTFileDelete(AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamRead.pcm");
3412	RTFileDelete(AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamWrite.pcm");
3413	#endif
3414
3415	LogFlowFuncLeaveRC(rc);
3416	return rc;
3417	}
3418
3419	/**
3420	* The device registration structure.
3421	*/
3422	const PDMDEVREG g_DeviceICHAC97 =
3423	{
3424	/* u32Version */
3425	PDM_DEVREG_VERSION,
3426	/* szName */
3427	"ichac97",
3428	/* szRCMod */
3429	"",
3430	/* szR0Mod */
3431	"",
3432	/* pszDescription */
3433	"ICH AC'97 Audio Controller",
3434	/* fFlags */
3435	PDM_DEVREG_FLAGS_DEFAULT_BITS,
3436	/* fClass */
3437	PDM_DEVREG_CLASS_AUDIO,
3438	/* cMaxInstances */
3439	1,
3440	/* cbInstance */
3441	sizeof(AC97STATE),
3442	/* pfnConstruct */
3443	ichac97Construct,
3444	/* pfnDestruct */
3445	ichac97Destruct,
3446	/* pfnRelocate */
3447	NULL,
3448	/* pfnMemSetup */
3449	NULL,
3450	/* pfnPowerOn */
3451	NULL,
3452	/* pfnReset */
3453	ichac97Reset,
3454	/* pfnSuspend */
3455	NULL,
3456	/* pfnResume */
3457	NULL,
3458	/* pfnAttach */
3459	ichac97Attach,
3460	/* pfnDetach */
3461	ichac97Detach,
3462	/* pfnQueryInterface. */
3463	NULL,
3464	/* pfnInitComplete */
3465	NULL,
3466	/* pfnPowerOff */
3467	ichac97PowerOff,
3468	/* pfnSoftReset */
3469	NULL,
3470	/* u32VersionEnd */
3471	PDM_DEVREG_VERSION
3472	};
3473
3474	#endif /* !IN_RING3 */
3475	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Audio/DevIchAc97.cpp@ 64998

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