VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevIchAc97.cpp@ 68253

Last change on this file since 68253 was 68021, checked in by vboxsync, 7 years ago

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1/* $Id: DevIchAc97.cpp 68021 2017-07-18 12:57:19Z vboxsync $ */
2/** @file
3 * DevIchAc97 - VBox ICH AC97 Audio Controller.
4 */
5
6/*
7 * Copyright (C) 2006-2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_AC97
23#include <VBox/log.h>
24#include <VBox/vmm/pdmdev.h>
25#include <VBox/vmm/pdmaudioifs.h>
26
27#include <iprt/assert.h>
28#ifdef IN_RING3
29# ifdef DEBUG
30# include <iprt/file.h>
31# endif
32# include <iprt/mem.h>
33# include <iprt/semaphore.h>
34# include <iprt/string.h>
35# include <iprt/uuid.h>
36#endif
37
38#include "VBoxDD.h"
39
40#include "AudioMixBuffer.h"
41#include "AudioMixer.h"
42#include "DrvAudio.h"
43
44
45/*********************************************************************************************************************************
46* Defined Constants And Macros *
47*********************************************************************************************************************************/
48
49/** Current saved state version. */
50#define AC97_SSM_VERSION 1
51
52/** Default timer frequency (in Hz). */
53#define AC97_TIMER_HZ 200
54
55/** Maximum FIFO size (in bytes). */
56#define AC97_FIFO_MAX 256
57
58#define AC97_SR_FIFOE RT_BIT(4) /* rwc, FIFO error. */
59#define AC97_SR_BCIS RT_BIT(3) /* rwc, Buffer completion interrupt status. */
60#define AC97_SR_LVBCI RT_BIT(2) /* rwc, Last valid buffer completion interrupt. */
61#define AC97_SR_CELV RT_BIT(1) /* ro, Current equals last valid. */
62#define AC97_SR_DCH RT_BIT(0) /* ro, Controller halted. */
63#define AC97_SR_VALID_MASK (RT_BIT(5) - 1)
64#define AC97_SR_WCLEAR_MASK (AC97_SR_FIFOE | AC97_SR_BCIS | AC97_SR_LVBCI)
65#define AC97_SR_RO_MASK (AC97_SR_DCH | AC97_SR_CELV)
66#define AC97_SR_INT_MASK (AC97_SR_FIFOE | AC97_SR_BCIS | AC97_SR_LVBCI)
67
68#define AC97_CR_IOCE RT_BIT(4) /* rw, Interrupt On Completion Enable. */
69#define AC97_CR_FEIE RT_BIT(3) /* rw FIFO Error Interrupt Enable. */
70#define AC97_CR_LVBIE RT_BIT(2) /* rw Last Valid Buffer Interrupt Enable. */
71#define AC97_CR_RR RT_BIT(1) /* rw Reset Registers. */
72#define AC97_CR_RPBM RT_BIT(0) /* rw Run/Pause Bus Master. */
73#define AC97_CR_VALID_MASK (RT_BIT(5) - 1)
74#define AC97_CR_DONT_CLEAR_MASK (AC97_CR_IOCE | AC97_CR_FEIE | AC97_CR_LVBIE)
75
76#define AC97_GC_WR 4 /* rw Warm reset. */
77#define AC97_GC_CR 2 /* rw Cold reset. */
78#define AC97_GC_VALID_MASK (RT_BIT(6) - 1)
79
80#define AC97_GS_MD3 RT_BIT(17) /* rw */
81#define AC97_GS_AD3 RT_BIT(16) /* rw */
82#define AC97_GS_RCS RT_BIT(15) /* rwc */
83#define AC97_GS_B3S12 RT_BIT(14) /* ro */
84#define AC97_GS_B2S12 RT_BIT(13) /* ro */
85#define AC97_GS_B1S12 RT_BIT(12) /* ro */
86#define AC97_GS_S1R1 RT_BIT(11) /* rwc */
87#define AC97_GS_S0R1 RT_BIT(10) /* rwc */
88#define AC97_GS_S1CR RT_BIT(9) /* ro */
89#define AC97_GS_S0CR RT_BIT(8) /* ro */
90#define AC97_GS_MINT RT_BIT(7) /* ro */
91#define AC97_GS_POINT RT_BIT(6) /* ro */
92#define AC97_GS_PIINT RT_BIT(5) /* ro */
93#define AC97_GS_RSRVD (RT_BIT(4)|RT_BIT(3))
94#define AC97_GS_MOINT RT_BIT(2) /* ro */
95#define AC97_GS_MIINT RT_BIT(1) /* ro */
96#define AC97_GS_GSCI RT_BIT(0) /* rwc */
97#define AC97_GS_RO_MASK (AC97_GS_B3S12 | \
98 AC97_GS_B2S12 | \
99 AC97_GS_B1S12 | \
100 AC97_GS_S1CR | \
101 AC97_GS_S0CR | \
102 AC97_GS_MINT | \
103 AC97_GS_POINT | \
104 AC97_GS_PIINT | \
105 AC97_GS_RSRVD | \
106 AC97_GS_MOINT | \
107 AC97_GS_MIINT)
108#define AC97_GS_VALID_MASK (RT_BIT(18) - 1)
109#define AC97_GS_WCLEAR_MASK (AC97_GS_RCS|AC97_GS_S1R1|AC97_GS_S0R1|AC97_GS_GSCI)
110
111/** @name Buffer Descriptor (BD).
112 * @{ */
113#define AC97_BD_IOC RT_BIT(31) /**< Interrupt on Completion. */
114#define AC97_BD_BUP RT_BIT(30) /**< Buffer Underrun Policy. */
115
116#define AC97_BD_LEN_MASK 0xFFFF /**< Mask for the BDL buffer length. */
117
118#define AC97_MAX_BDLE 32 /**< Maximum number of BDLEs. */
119/** @} */
120
121/** @name Extended Audio Status and Control Register (EACS).
122 * @{ */
123#define AC97_EACS_VRA 1 /**< Variable Rate Audio (4.2.1.1). */
124#define AC97_EACS_VRM 8 /**< Variable Rate Mic Audio (4.2.1.1). */
125/** @} */
126
127/** @name Baseline Audio Register Set (BARS).
128 * @{ */
129#define AC97_BARS_VOL_MASK 0x1f /**< Volume mask for the Baseline Audio Register Set (5.7.2). */
130#define AC97_BARS_VOL_STEPS 31 /**< Volume steps for the Baseline Audio Register Set (5.7.2). */
131#define AC97_BARS_VOL_MUTE_SHIFT 15 /**< Mute bit shift for the Baseline Audio Register Set (5.7.2). */
132/** @} */
133
134/* AC'97 uses 1.5dB steps, we use 0.375dB steps: 1 AC'97 step equals 4 PDM steps. */
135#define AC97_DB_FACTOR 4
136
137#define AC97_REC_MASK 7
138enum
139{
140 AC97_REC_MIC = 0,
141 AC97_REC_CD,
142 AC97_REC_VIDEO,
143 AC97_REC_AUX,
144 AC97_REC_LINE_IN,
145 AC97_REC_STEREO_MIX,
146 AC97_REC_MONO_MIX,
147 AC97_REC_PHONE
148};
149
150enum
151{
152 AC97_Reset = 0x00,
153 AC97_Master_Volume_Mute = 0x02,
154 AC97_Headphone_Volume_Mute = 0x04, /** Also known as AUX, see table 16, section 5.7. */
155 AC97_Master_Volume_Mono_Mute = 0x06,
156 AC97_Master_Tone_RL = 0x08,
157 AC97_PC_BEEP_Volume_Mute = 0x0A,
158 AC97_Phone_Volume_Mute = 0x0C,
159 AC97_Mic_Volume_Mute = 0x0E,
160 AC97_Line_In_Volume_Mute = 0x10,
161 AC97_CD_Volume_Mute = 0x12,
162 AC97_Video_Volume_Mute = 0x14,
163 AC97_Aux_Volume_Mute = 0x16,
164 AC97_PCM_Out_Volume_Mute = 0x18,
165 AC97_Record_Select = 0x1A,
166 AC97_Record_Gain_Mute = 0x1C,
167 AC97_Record_Gain_Mic_Mute = 0x1E,
168 AC97_General_Purpose = 0x20,
169 AC97_3D_Control = 0x22,
170 AC97_AC_97_RESERVED = 0x24,
171 AC97_Powerdown_Ctrl_Stat = 0x26,
172 AC97_Extended_Audio_ID = 0x28,
173 AC97_Extended_Audio_Ctrl_Stat = 0x2A,
174 AC97_PCM_Front_DAC_Rate = 0x2C,
175 AC97_PCM_Surround_DAC_Rate = 0x2E,
176 AC97_PCM_LFE_DAC_Rate = 0x30,
177 AC97_PCM_LR_ADC_Rate = 0x32,
178 AC97_MIC_ADC_Rate = 0x34,
179 AC97_6Ch_Vol_C_LFE_Mute = 0x36,
180 AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
181 AC97_Vendor_Reserved = 0x58,
182 AC97_AD_Misc = 0x76,
183 AC97_Vendor_ID1 = 0x7c,
184 AC97_Vendor_ID2 = 0x7e
185};
186
187/* Codec models. */
188typedef enum
189{
190 AC97_CODEC_STAC9700 = 0, /* SigmaTel STAC9700 */
191 AC97_CODEC_AD1980, /* Analog Devices AD1980 */
192 AC97_CODEC_AD1981B /* Analog Devices AD1981B */
193} AC97CODEC;
194
195/* Analog Devices miscellaneous regiter bits used in AD1980. */
196#define AC97_AD_MISC_LOSEL RT_BIT(5) /* Surround (rear) goes to line out outputs. */
197#define AC97_AD_MISC_HPSEL RT_BIT(10) /* PCM (front) goes to headphone outputs. */
198
199#define ICHAC97STATE_2_DEVINS(a_pAC97) ((a_pAC97)->pDevInsR3)
200
201enum
202{
203 BUP_SET = RT_BIT(0),
204 BUP_LAST = RT_BIT(1)
205};
206
207/** Emits registers for a specific (Native Audio Bus Master BAR) NABMBAR. */
208#define AC97_NABMBAR_REGS(prefix, off) \
209 enum { \
210 prefix ## _BDBAR = off, /* Buffer Descriptor Base Address */ \
211 prefix ## _CIV = off + 4, /* Current Index Value */ \
212 prefix ## _LVI = off + 5, /* Last Valid Index */ \
213 prefix ## _SR = off + 6, /* Status Register */ \
214 prefix ## _PICB = off + 8, /* Position in Current Buffer */ \
215 prefix ## _PIV = off + 10, /* Prefetched Index Value */ \
216 prefix ## _CR = off + 11 /* Control Register */ \
217 }
218
219#ifndef VBOX_DEVICE_STRUCT_TESTCASE
220typedef enum
221{
222 AC97SOUNDSOURCE_PI_INDEX = 0, /** PCM in */
223 AC97SOUNDSOURCE_PO_INDEX, /** PCM out */
224 AC97SOUNDSOURCE_MC_INDEX, /** Mic in */
225 AC97SOUNDSOURCE_LAST_INDEX
226} AC97SOUNDSOURCE;
227
228AC97_NABMBAR_REGS(PI, AC97SOUNDSOURCE_PI_INDEX * 16);
229AC97_NABMBAR_REGS(PO, AC97SOUNDSOURCE_PO_INDEX * 16);
230AC97_NABMBAR_REGS(MC, AC97SOUNDSOURCE_MC_INDEX * 16);
231#endif
232
233enum
234{
235 /** NABMBAR: Global Control Register. */
236 AC97_GLOB_CNT = 0x2c,
237 /** NABMBAR Global Status. */
238 AC97_GLOB_STA = 0x30,
239 /** Codec Access Semaphore Register. */
240 AC97_CAS = 0x34
241};
242
243#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
244
245
246/*********************************************************************************************************************************
247* Structures and Typedefs *
248*********************************************************************************************************************************/
249
250/**
251 * Buffer Descriptor List Entry (BDLE).
252 */
253typedef struct AC97BDLE
254{
255 uint32_t addr;
256 uint32_t ctl_len;
257} AC97BDLE, *PAC97BDLE;
258
259/**
260 * Bus master register set for an audio stream.
261 */
262typedef struct AC97BMREGS
263{
264 uint32_t bdbar; /** rw 0, Buffer Descriptor List: BAR (Base Address Register). */
265 uint8_t civ; /** ro 0, Current index value. */
266 uint8_t lvi; /** rw 0, Last valid index. */
267 uint16_t sr; /** rw 1, Status register. */
268 uint16_t picb; /** ro 0, Position in current buffer (in samples). */
269 uint8_t piv; /** ro 0, Prefetched index value. */
270 uint8_t cr; /** rw 0, Control register. */
271 int bd_valid; /** Whether current BDLE is initialized or not. */
272 AC97BDLE bd; /** Current Buffer Descriptor List Entry (BDLE). */
273} AC97BMREGS, *PAC97BMREGS;
274
275#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
276/**
277 * Structure keeping the AC'97 stream's state for asynchronous I/O.
278 */
279typedef struct AC97STREAMSTATEAIO
280{
281 /** Thread handle for the actual I/O thread. */
282 RTTHREAD Thread;
283 /** Event for letting the thread know there is some data to process. */
284 RTSEMEVENT Event;
285 /** Critical section for synchronizing access. */
286 RTCRITSECT CritSect;
287 /** Started indicator. */
288 volatile bool fStarted;
289 /** Shutdown indicator. */
290 volatile bool fShutdown;
291 /** Whether the thread should do any data processing or not. */
292 volatile bool fEnabled;
293 uint32_t Padding1;
294} AC97STREAMSTATEAIO, *PAC97STREAMSTATEAIO;
295#endif
296
297/**
298 * Structure for keeping the internal state of an AC'97 stream.
299 */
300typedef struct AC97STREAMSTATE
301{
302 /** Circular buffer (FIFO) for holding DMA'ed data. */
303 R3PTRTYPE(PRTCIRCBUF) pCircBuf;
304 /** Criticial section for this stream. */
305 RTCRITSECT CritSect;
306#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
307 /** Asynchronous I/O state members. */
308 AC97STREAMSTATEAIO AIO;
309#endif
310} AC97STREAMSTATE, *PAC97STREAMSTATE;
311
312/**
313 * Structure for an AC'97 stream.
314 */
315typedef struct AC97STREAM
316{
317 /** Stream number (SDn). */
318 uint8_t u8SD;
319 /** Bus master registers of this stream. */
320 AC97BMREGS Regs;
321 /** Internal state of this stream. */
322 AC97STREAMSTATE State;
323} AC97STREAM, *PAC97STREAM;
324
325typedef struct AC97STATE *PAC97STATE;
326#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
327/**
328 * Structure for the async I/O thread context.
329 */
330typedef struct AC97STREAMTHREADCTX
331{
332 PAC97STATE pThis;
333 PAC97STREAM pStream;
334} AC97STREAMTHREADCTX, *PAC97STREAMTHREADCTX;
335#endif
336
337/**
338 * Structure defining a (host backend) driver stream.
339 * Each driver has its own instances of audio mixer streams, which then
340 * can go into the same (or even different) audio mixer sinks.
341 */
342typedef struct AC97DRIVERSTREAM
343{
344 union
345 {
346 /** Desired playback destination (for an output stream). */
347 PDMAUDIOPLAYBACKDEST Dest;
348 /** Desired recording source (for an input stream). */
349 PDMAUDIORECSOURCE Source;
350 } DestSource;
351 uint8_t Padding1[4];
352 /** Associated mixer stream handle. */
353 R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
354} AC97DRIVERSTREAM, *PAC97DRIVERSTREAM;
355
356/**
357 * Struct for maintaining a host backend driver.
358 */
359typedef struct AC97DRIVER
360{
361 /** Node for storing this driver in our device driver list of AC97STATE. */
362 RTLISTNODER3 Node;
363 /** Pointer to AC97 controller (state). */
364 R3PTRTYPE(PAC97STATE) pAC97State;
365 /** Driver flags. */
366 PDMAUDIODRVFLAGS fFlags;
367 uint32_t PaddingFlags;
368 /** LUN # to which this driver has been assigned. */
369 uint8_t uLUN;
370 /** Whether this driver is in an attached state or not. */
371 bool fAttached;
372 uint8_t Padding[4];
373 /** Pointer to attached driver base interface. */
374 R3PTRTYPE(PPDMIBASE) pDrvBase;
375 /** Audio connector interface to the underlying host backend. */
376 R3PTRTYPE(PPDMIAUDIOCONNECTOR) pConnector;
377 /** Driver stream for line input. */
378 AC97DRIVERSTREAM LineIn;
379 /** Driver stream for mic input. */
380 AC97DRIVERSTREAM MicIn;
381 /** Driver stream for output. */
382 AC97DRIVERSTREAM Out;
383} AC97DRIVER, *PAC97DRIVER;
384
385/**
386 * Structure for maintaining an AC'97 device state.
387 */
388typedef struct AC97STATE
389{
390 /** The PCI device state. */
391 PDMPCIDEV PciDev;
392 /** R3 Pointer to the device instance. */
393 PPDMDEVINSR3 pDevInsR3;
394 /** Global Control (Bus Master Control Register). */
395 uint32_t glob_cnt;
396 /** Global Status (Bus Master Control Register). */
397 uint32_t glob_sta;
398 /** Codec Access Semaphore Register (Bus Master Control Register). */
399 uint32_t cas;
400 uint32_t last_samp;
401 uint8_t mixer_data[256];
402 /** AC'97 stream for line-in. */
403 AC97STREAM StreamLineIn;
404 /** AC'97 stream for microphone-in. */
405 AC97STREAM StreamMicIn;
406 /** AC'97 stream for output. */
407 AC97STREAM StreamOut;
408 /** Number of active (running) SDn streams. */
409 uint8_t cStreamsActive;
410#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
411 /** The timer for pumping data thru the attached LUN drivers. */
412 PTMTIMERR3 pTimer;
413 /** Criticial section for timer. */
414 RTCRITSECT csTimer;
415# if HC_ARCH_BITS == 32
416 uint32_t Padding0;
417# endif
418 /** Flag indicating whether the timer is active or not. */
419 bool fTimerActive;
420 uint8_t u8Padding1[7];
421 /** The timer interval for pumping data thru the LUN drivers in timer ticks. */
422 uint64_t cTimerTicks;
423 /** Timestamp of the last timer callback (ac97Timer).
424 * Used to calculate the time actually elapsed between two timer callbacks. */
425 uint64_t uTimerTS;
426#endif
427#ifdef VBOX_WITH_STATISTICS
428 STAMPROFILE StatTimer;
429 STAMPROFILE StatIn;
430 STAMPROFILE StatOut;
431 STAMCOUNTER StatBytesRead;
432 STAMCOUNTER StatBytesWritten;
433#endif
434 /** List of associated LUN drivers (AC97DRIVER). */
435 RTLISTANCHOR lstDrv;
436 /** The device's software mixer. */
437 R3PTRTYPE(PAUDIOMIXER) pMixer;
438 /** Audio sink for PCM output. */
439 R3PTRTYPE(PAUDMIXSINK) pSinkOut;
440 /** Audio sink for line input. */
441 R3PTRTYPE(PAUDMIXSINK) pSinkLineIn;
442 /** Audio sink for microphone input. */
443 R3PTRTYPE(PAUDMIXSINK) pSinkMicIn;
444 uint8_t silence[128];
445 int bup_flag;
446 /** The base interface for LUN\#0. */
447 PDMIBASE IBase;
448 /** Base port of the I/O space region. */
449 RTIOPORT IOPortBase[2];
450 /** Codec model. */
451 uint32_t uCodecModel;
452} AC97STATE, *PAC97STATE;
453
454#ifdef VBOX_WITH_STATISTICS
455AssertCompileMemberAlignment(AC97STATE, StatTimer, 8);
456AssertCompileMemberAlignment(AC97STATE, StatBytesRead, 8);
457AssertCompileMemberAlignment(AC97STATE, StatBytesWritten, 8);
458#endif
459
460#ifndef VBOX_DEVICE_STRUCT_TESTCASE
461
462DECLINLINE(PAC97STREAM) ichac97GetStreamFromIdx(PAC97STATE pThis, uint32_t uIdx);
463static int ichac97StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm);
464static void ichac97StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream);
465static int ichac97StreamOpen(PAC97STATE pThis, PAC97STREAM pStream);
466static int ichac97StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream);
467static int ichac97StreamClose(PAC97STATE pThis, PAC97STREAM pStream);
468static void ichac97StreamReset(PAC97STATE pThis, PAC97STREAM pStream);
469static void ichac97StreamLock(PAC97STREAM pStream);
470static void ichac97StreamUnlock(PAC97STREAM pStream);
471static uint32_t ichac97StreamGetUsed(PAC97STREAM pStream);
472static uint32_t ichac97StreamGetFree(PAC97STREAM pStream);
473static int ichac97StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax);
474
475static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns);
476#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
477static void ichac97TimerMaybeStart(PAC97STATE pThis);
478static void ichac97TimerMaybeStop(PAC97STATE pThis);
479static void ichac97TimerMain(PAC97STATE pThis);
480static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
481#endif
482static void ichac97DoTransfers(PAC97STATE pThis);
483
484static int ichac97MixerAddDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg);
485static void ichac97MixerRemoveDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc);
486
487#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
488static DECLCALLBACK(int) ichac97StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser);
489static int ichac97StreamAsyncIOCreate(PAC97STATE pThis, PAC97STREAM pStream);
490static int ichac97StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAM pStream);
491static int ichac97StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream);
492static void ichac97StreamAsyncIOLock(PAC97STREAM pStream);
493static void ichac97StreamAsyncIOUnlock(PAC97STREAM pStream);
494static void ichac97StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable);
495#endif
496
497static void ichac97WarmReset(PAC97STATE pThis)
498{
499 NOREF(pThis);
500}
501
502static void ichac97ColdReset(PAC97STATE pThis)
503{
504 NOREF(pThis);
505}
506
507/**
508 * Retrieves the audio mixer sink of a corresponding AC'97 stream index.
509 *
510 * @returns Pointer to audio mixer sink if found, or NULL if not found / invalid.
511 * @param pThis AC'97 state.
512 * @param uIndex Stream index to get audio mixer sink for.
513 */
514DECLINLINE(PAUDMIXSINK) ichac97IndexToSink(PAC97STATE pThis, uint8_t uIndex)
515{
516 AssertPtrReturn(pThis, NULL);
517
518 switch (uIndex)
519 {
520 case AC97SOUNDSOURCE_PI_INDEX: return pThis->pSinkLineIn; break;
521 case AC97SOUNDSOURCE_PO_INDEX: return pThis->pSinkOut; break;
522 case AC97SOUNDSOURCE_MC_INDEX: return pThis->pSinkMicIn; break;
523 default: break;
524 }
525
526 AssertMsgFailed(("Wrong index %RU8\n", uIndex));
527 return NULL;
528}
529
530/**
531 * Fetches the current BDLE (Buffer Descriptor List Entry) of an AC'97 audio stream.
532 *
533 * @returns IPRT status code.
534 * @param pThis AC'97 state.
535 * @param pStream AC'97 stream to fetch BDLE for.
536 *
537 * @remark Uses CIV as BDLE index.
538 */
539static void ichac97StreamFetchBDLE(PAC97STATE pThis, PAC97STREAM pStream)
540{
541 PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
542 PAC97BMREGS pRegs = &pStream->Regs;
543
544 uint32_t u32[2];
545
546 PDMDevHlpPhysRead(pDevIns, pRegs->bdbar + pRegs->civ * 8, &u32[0], sizeof(u32));
547 pRegs->bd_valid = 1;
548#if !defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)
549# error Please adapt the code (audio buffers are little endian)!
550#else
551 pRegs->bd.addr = RT_H2LE_U32(u32[0] & ~3);
552 pRegs->bd.ctl_len = RT_H2LE_U32(u32[1]);
553#endif
554 pRegs->picb = pRegs->bd.ctl_len & AC97_BD_LEN_MASK;
555 LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
556 pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16,
557 pRegs->bd.ctl_len & AC97_BD_LEN_MASK,
558 (pRegs->bd.ctl_len & AC97_BD_LEN_MASK) << 1)); /** @todo r=andy Assumes 16bit samples. */
559}
560
561/**
562 * Updates the status register (SR) of an AC'97 audio stream.
563 *
564 * @param pThis AC'97 state.
565 * @param pStream AC'97 stream to update SR for.
566 * @param new_sr New value for status register (SR).
567 */
568static void ichac97StreamUpdateSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
569{
570 PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
571 PAC97BMREGS pRegs = &pStream->Regs;
572
573 bool fSignal = false;
574 int iIRQL = 0;
575
576 uint32_t new_mask = new_sr & AC97_SR_INT_MASK;
577 uint32_t old_mask = pRegs->sr & AC97_SR_INT_MASK;
578
579 static uint32_t const masks[] = { AC97_GS_PIINT, AC97_GS_POINT, AC97_GS_MINT };
580
581 if (new_mask ^ old_mask)
582 {
583 /** @todo Is IRQ deasserted when only one of status bits is cleared? */
584 if (!new_mask)
585 {
586 fSignal = true;
587 iIRQL = 0;
588 }
589 else if ((new_mask & AC97_SR_LVBCI) && (pRegs->cr & AC97_CR_LVBIE))
590 {
591 fSignal = true;
592 iIRQL = 1;
593 }
594 else if ((new_mask & AC97_SR_BCIS) && (pRegs->cr & AC97_CR_IOCE))
595 {
596 fSignal = true;
597 iIRQL = 1;
598 }
599 }
600
601 pRegs->sr = new_sr;
602
603 LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n",
604 pRegs->sr & AC97_SR_BCIS, pRegs->sr & AC97_SR_LVBCI, pRegs->sr, fSignal, iIRQL));
605
606 if (fSignal)
607 {
608 if (iIRQL)
609 pThis->glob_sta |= masks[pStream->u8SD];
610 else
611 pThis->glob_sta &= ~masks[pStream->u8SD];
612
613 LogFlowFunc(("Setting IRQ level=%d\n", iIRQL));
614 PDMDevHlpPCISetIrq(pDevIns, 0, iIRQL);
615 }
616}
617
618/**
619 * Returns whether an AC'97 stream is enabled or not.
620 *
621 * @returns IPRT status code.
622 * @param pThis AC'97 device state.
623 * @param pStream Stream to return status for.
624 */
625static bool ichac97StreamIsEnabled(PAC97STATE pThis, PAC97STREAM pStream)
626{
627 AssertPtrReturn(pThis, false);
628 AssertPtrReturn(pStream, false);
629
630 PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8SD);
631 bool fIsEnabled = RT_BOOL(AudioMixerSinkGetStatus(pSink) & AUDMIXSINK_STS_RUNNING);
632
633 LogFunc(("[SD%RU8] fIsEnabled=%RTbool\n", pStream->u8SD, fIsEnabled));
634 return fIsEnabled;
635}
636
637/**
638 * Enables or disables an AC'97 audio stream.
639 *
640 * @returns IPRT status code.
641 * @param pThis AC'97 state.
642 * @param pStream AC'97 stream to enable or disable.
643 * @param fEnable Whether to enable or disble the stream.
644 *
645 */
646static int ichac97StreamEnable(PAC97STATE pThis, PAC97STREAM pStream, bool fEnable)
647{
648 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
649 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
650
651 ichac97StreamLock(pStream);
652
653 int rc = VINF_SUCCESS;
654
655#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
656 if (fEnable)
657 rc = ichac97StreamAsyncIOCreate(pThis, pStream);
658 if (RT_SUCCESS(rc))
659 {
660 ichac97StreamAsyncIOLock(pStream);
661 ichac97StreamAsyncIOEnable(pStream, fEnable);
662 }
663#endif
664
665 if (fEnable)
666 {
667 if (pStream->State.pCircBuf)
668 RTCircBufReset(pStream->State.pCircBuf);
669
670 rc = ichac97StreamOpen(pThis, pStream);
671 }
672 else
673 rc = ichac97StreamClose(pThis, pStream);
674
675 if (RT_SUCCESS(rc))
676 {
677 /* First, enable or disable the stream and the stream's sink, if any. */
678 rc = AudioMixerSinkCtl(ichac97IndexToSink(pThis, pStream->u8SD),
679 fEnable ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE);
680 }
681
682#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
683 ichac97StreamAsyncIOUnlock(pStream);
684#endif
685
686 /* Make sure to leave the lock before (eventually) starting the timer. */
687 ichac97StreamUnlock(pStream);
688
689#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
690 /* Second, see if we need to start or stop the timer. */
691 if (!fEnable)
692 ichac97TimerMaybeStop(pThis);
693 else
694 ichac97TimerMaybeStart(pThis);
695#endif
696
697 LogFunc(("[SD%RU8] cStreamsActive=%RU8, rc=%Rrc\n", pStream->u8SD, pThis->cStreamsActive, rc));
698 return rc;
699}
700
701/**
702 * Resets an AC'97 stream.
703 *
704 * @param pThis AC'97 state.
705 * @param pStream AC'97 stream to reset.
706 *
707 */
708static void ichac97StreamReset(PAC97STATE pThis, PAC97STREAM pStream)
709{
710 AssertPtrReturnVoid(pThis);
711 AssertPtrReturnVoid(pStream);
712
713 ichac97StreamLock(pStream);
714
715 LogFunc(("[SD%RU8]\n", pStream->u8SD));
716
717 AudioMixerSinkReset(ichac97IndexToSink(pThis, pStream->u8SD));
718
719 if (pStream->State.pCircBuf)
720 RTCircBufReset(pStream->State.pCircBuf);
721
722 PAC97BMREGS pRegs = &pStream->Regs;
723
724 pRegs->bdbar = 0;
725 pRegs->civ = 0;
726 pRegs->lvi = 0;
727
728 pRegs->picb = 0;
729 pRegs->piv = 0;
730 pRegs->cr = pRegs->cr & AC97_CR_DONT_CLEAR_MASK;
731 pRegs->bd_valid = 0;
732
733 RT_ZERO(pThis->silence);
734
735 ichac97StreamUnlock(pStream);
736}
737
738/**
739 * Creates an AC'97 audio stream.
740 *
741 * @returns IPRT status code.
742 * @param pThis AC'97 state.
743 * @param pStream AC'97 stream to create.
744 * @param u8Strm Stream ID to assign AC'97 stream to.
745 */
746static int ichac97StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm)
747{
748 RT_NOREF(pThis);
749 AssertPtrReturn(pStream, VERR_INVALID_PARAMETER);
750 /** @todo Validate u8Strm. */
751
752 LogFunc(("[SD%RU8] pStream=%p\n", u8Strm, pStream));
753
754 pStream->u8SD = u8Strm;
755
756 int rc = RTCritSectInit(&pStream->State.CritSect);
757 if (RT_SUCCESS(rc))
758 rc = RTCircBufCreate(&pStream->State.pCircBuf, _4K); /** @todo Make this configurable. */
759
760 return rc;
761}
762
763/**
764 * Destroys an AC'97 audio stream.
765 *
766 * @returns IPRT status code.
767 * @param pThis AC'97 state.
768 * @param pStream AC'97 stream to destroy.
769 */
770static void ichac97StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream)
771{
772 LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
773
774 int rc2 = RTCritSectDelete(&pStream->State.CritSect);
775 AssertRC(rc2);
776
777 if (pStream->State.pCircBuf)
778 {
779 RTCircBufDestroy(pStream->State.pCircBuf);
780 pStream->State.pCircBuf = NULL;
781 }
782
783#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
784 rc2 = ichac97StreamAsyncIODestroy(pThis, pStream);
785 AssertRC(rc2);
786#else
787 RT_NOREF(pThis);
788#endif
789
790 LogFlowFuncLeave();
791}
792
793/**
794 * Destroys all AC'97 audio streams of the device.
795 *
796 * @param pThis AC'97 state.
797 */
798static void ichac97StreamsDestroy(PAC97STATE pThis)
799{
800 LogFlowFuncEnter();
801
802 /*
803 * Destroy all AC'97 streams.
804 */
805
806 ichac97StreamDestroy(pThis, &pThis->StreamLineIn);
807 ichac97StreamDestroy(pThis, &pThis->StreamMicIn);
808 ichac97StreamDestroy(pThis, &pThis->StreamOut);
809
810 /*
811 * Destroy all sinks.
812 */
813
814 PDMAUDIODESTSOURCE dstSrc;
815 if (pThis->pSinkLineIn)
816 {
817 dstSrc.Source = PDMAUDIORECSOURCE_LINE;
818 ichac97MixerRemoveDrvStreams(pThis, pThis->pSinkLineIn, PDMAUDIODIR_IN, dstSrc);
819
820 AudioMixerSinkDestroy(pThis->pSinkLineIn);
821 pThis->pSinkLineIn = NULL;
822 }
823
824 if (pThis->pSinkMicIn)
825 {
826 dstSrc.Source = PDMAUDIORECSOURCE_MIC;
827 ichac97MixerRemoveDrvStreams(pThis, pThis->pSinkMicIn, PDMAUDIODIR_IN, dstSrc);
828
829 AudioMixerSinkDestroy(pThis->pSinkMicIn);
830 pThis->pSinkMicIn = NULL;
831 }
832
833 if (pThis->pSinkOut)
834 {
835 dstSrc.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
836 ichac97MixerRemoveDrvStreams(pThis, pThis->pSinkOut, PDMAUDIODIR_OUT, dstSrc);
837
838 AudioMixerSinkDestroy(pThis->pSinkOut);
839 pThis->pSinkOut = NULL;
840 }
841}
842
843/**
844 * Writes audio data from a mixer sink into an AC'97 stream's DMA buffer.
845 *
846 * @returns IPRT status code.
847 * @param pThis AC'97 state.
848 * @param pDstStream AC'97 stream to write to.
849 * @param pSrcMixSink Mixer sink to get audio data to write from.
850 * @param cbToWrite Number of bytes to write.
851 * @param pcbWritten Number of bytes written. Optional.
852 */
853static int ichac97StreamWrite(PAC97STATE pThis, PAC97STREAM pDstStream, PAUDMIXSINK pSrcMixSink, uint32_t cbToWrite,
854 uint32_t *pcbWritten)
855{
856 RT_NOREF(pThis);
857 AssertPtrReturn(pDstStream, VERR_INVALID_POINTER);
858 AssertPtrReturn(pSrcMixSink, VERR_INVALID_POINTER);
859 AssertReturn(cbToWrite, VERR_INVALID_PARAMETER);
860 /* pcbWritten is optional. */
861
862 PRTCIRCBUF pCircBuf = pDstStream->State.pCircBuf;
863 AssertPtr(pCircBuf);
864
865 void *pvDst;
866 size_t cbDst;
867
868 uint32_t cbRead = 0;
869
870 RTCircBufAcquireWriteBlock(pCircBuf, cbToWrite, &pvDst, &cbDst);
871
872 if (cbDst)
873 {
874 int rc2 = AudioMixerSinkRead(pSrcMixSink, AUDMIXOP_COPY, pvDst, (uint32_t)cbDst, &cbRead);
875 AssertRC(rc2);
876
877#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
878 RTFILE fh;
879 RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ichac97StreamWrite.pcm",
880 RTFILE_O_OPEN_CREATE | RTFILE_O_APPEND | RTFILE_O_WRITE | RTFILE_O_DENY_NONE);
881 RTFileWrite(fh, pvDst, cbRead, NULL);
882 RTFileClose(fh);
883#endif
884 }
885
886 RTCircBufReleaseWriteBlock(pCircBuf, cbRead);
887
888 if (pcbWritten)
889 *pcbWritten = cbRead;
890
891 return VINF_SUCCESS;
892}
893
894/**
895 * Reads audio data from an AC'97 stream's DMA buffer and writes into a specified mixer sink.
896 *
897 * @returns IPRT status code.
898 * @param pThis AC'97 state.
899 * @param pSrcStream AC'97 stream to read audio data from.
900 * @param pDstMixSink Mixer sink to write audio data to.
901 * @param cbToRead Number of bytes to read.
902 * @param pcbRead Number of bytes read. Optional.
903 */
904static int ichac97StreamRead(PAC97STATE pThis, PAC97STREAM pSrcStream, PAUDMIXSINK pDstMixSink, uint32_t cbToRead,
905 uint32_t *pcbRead)
906{
907 RT_NOREF(pThis);
908 AssertPtrReturn(pSrcStream, VERR_INVALID_POINTER);
909 AssertPtrReturn(pDstMixSink, VERR_INVALID_POINTER);
910 AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
911 /* pcbRead is optional. */
912
913 int rc = VINF_SUCCESS;
914
915 uint32_t cbReadTotal = 0;
916
917 PRTCIRCBUF pCircBuf = pSrcStream->State.pCircBuf;
918 AssertPtr(pCircBuf);
919
920 void *pvSrc;
921 size_t cbSrc;
922
923 while (cbToRead)
924 {
925 uint32_t cbWritten = 0;
926
927 RTCircBufAcquireReadBlock(pCircBuf, cbToRead, &pvSrc, &cbSrc);
928
929 if (cbSrc)
930 {
931#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
932 RTFILE fh;
933 RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamRead.pcm",
934 RTFILE_O_OPEN_CREATE | RTFILE_O_APPEND | RTFILE_O_WRITE | RTFILE_O_DENY_NONE);
935 RTFileWrite(fh, pvSrc, cbSrc, NULL);
936 RTFileClose(fh);
937#endif
938 rc = AudioMixerSinkWrite(pDstMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
939 if (RT_SUCCESS(rc))
940 {
941 Assert(cbWritten <= cbSrc);
942
943 cbReadTotal += cbWritten;
944
945 Assert(cbToRead >= cbWritten);
946 cbToRead -= cbWritten;
947 }
948 }
949
950 RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
951
952 if ( !cbWritten
953 || !RTCircBufUsed(pCircBuf))
954 break;
955
956 if (RT_FAILURE(rc))
957 break;
958 }
959
960 if (pcbRead)
961 *pcbRead = cbReadTotal;
962
963 return rc;
964}
965
966#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
967/**
968 * Asynchronous I/O thread for an AC'97 stream.
969 * This will do the heavy lifting work for us as soon as it's getting notified by another thread.
970 *
971 * @returns IPRT status code.
972 * @param hThreadSelf Thread handle.
973 * @param pvUser User argument. Must be of type PAC97STREAMTHREADCTX.
974 */
975static DECLCALLBACK(int) ichac97StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
976{
977 PAC97STREAMTHREADCTX pCtx = (PAC97STREAMTHREADCTX)pvUser;
978 AssertPtr(pCtx);
979
980 PAC97STATE pThis = pCtx->pThis;
981 AssertPtr(pThis);
982
983 PAC97STREAM pStream = pCtx->pStream;
984 AssertPtr(pStream);
985
986 PAC97STREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
987
988 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
989 AssertPtr(pCircBuf);
990
991 PAUDMIXSINK pMixSink = ichac97IndexToSink(pThis, pStream->u8SD);
992 AssertPtr(pMixSink);
993
994 ASMAtomicXchgBool(&pAIO->fStarted, true);
995
996 RTThreadUserSignal(hThreadSelf);
997
998 LogFunc(("[SD%RU8] Started\n", pStream->u8SD));
999
1000 for (;;)
1001 {
1002 Log2Func(("[SD%RU8] Waiting ...\n", pStream->u8SD));
1003
1004 int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1005 if (RT_FAILURE(rc2))
1006 break;
1007
1008 if (ASMAtomicReadBool(&pAIO->fShutdown))
1009 break;
1010
1011 rc2 = RTCritSectEnter(&pAIO->CritSect);
1012 if (RT_SUCCESS(rc2))
1013 {
1014 if (!pAIO->fEnabled)
1015 {
1016 RTCritSectLeave(&pAIO->CritSect);
1017 continue;
1018 }
1019
1020 uint32_t cbToProcess;
1021 uint32_t cbProcessed = 0;
1022
1023 switch (pStream->u8SD)
1024 {
1025 /* Input. */
1026 case AC97SOUNDSOURCE_PI_INDEX:
1027 case AC97SOUNDSOURCE_MC_INDEX:
1028 {
1029 cbToProcess = (uint32_t)RTCircBufFree(pCircBuf);
1030 if (cbToProcess)
1031 rc2 = ichac97StreamWrite(pThis, pStream, pMixSink, (uint32_t)cbToProcess, &cbProcessed);
1032 break;
1033 }
1034
1035 /* Output. */
1036 case AC97SOUNDSOURCE_PO_INDEX:
1037 {
1038 cbToProcess = (uint32_t)RTCircBufUsed(pCircBuf);
1039 if (cbToProcess)
1040 rc2 = ichac97StreamRead(pThis, pStream, pMixSink, (uint32_t)cbToProcess, &cbProcessed);
1041 break;
1042 }
1043
1044 default:
1045 AssertFailedStmt(rc2 = VERR_NOT_SUPPORTED);
1046 break;
1047 }
1048
1049 if (RT_SUCCESS(rc2))
1050 rc2 = AudioMixerSinkUpdate(pMixSink);
1051
1052 int rc3 = RTCritSectLeave(&pAIO->CritSect);
1053 AssertRC(rc3);
1054 }
1055
1056 AssertRC(rc2);
1057 }
1058
1059 LogFunc(("[SD%RU8] Ended\n", pStream->u8SD));
1060
1061 ASMAtomicXchgBool(&pAIO->fStarted, false);
1062
1063 return VINF_SUCCESS;
1064}
1065
1066/**
1067 * Creates the async I/O thread for a specific AC'97 audio stream.
1068 *
1069 * @returns IPRT status code.
1070 * @param pThis AC'97 state.
1071 * @param pStream AC'97 audio stream to create the async I/O thread for.
1072 */
1073static int ichac97StreamAsyncIOCreate(PAC97STATE pThis, PAC97STREAM pStream)
1074{
1075 PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1076
1077 int rc;
1078
1079 if (!ASMAtomicReadBool(&pAIO->fStarted))
1080 {
1081 pAIO->fShutdown = false;
1082
1083 rc = RTSemEventCreate(&pAIO->Event);
1084 if (RT_SUCCESS(rc))
1085 {
1086 rc = RTCritSectInit(&pAIO->CritSect);
1087 if (RT_SUCCESS(rc))
1088 {
1089 AC97STREAMTHREADCTX Ctx = { pThis, pStream };
1090
1091 char szThreadName[64];
1092 RTStrPrintf2(szThreadName, sizeof(szThreadName), "ac97AIO%RU8", pStream->u8SD);
1093
1094 rc = RTThreadCreate(&pAIO->Thread, ichac97StreamAsyncIOThread, &Ctx,
1095 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
1096 if (RT_SUCCESS(rc))
1097 rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
1098 }
1099 }
1100 }
1101 else
1102 rc = VINF_SUCCESS;
1103
1104 LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
1105 return rc;
1106}
1107
1108/**
1109 * Destroys the async I/O thread of a specific AC'97 audio stream.
1110 *
1111 * @returns IPRT status code.
1112 * @param pThis AC'97 state.
1113 * @param pStream AC'97 audio stream to destroy the async I/O thread for.
1114 */
1115static int ichac97StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAM pStream)
1116{
1117 PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1118
1119 if (!ASMAtomicReadBool(&pAIO->fStarted))
1120 return VINF_SUCCESS;
1121
1122 ASMAtomicWriteBool(&pAIO->fShutdown, true);
1123
1124 int rc = ichac97StreamAsyncIONotify(pThis, pStream);
1125 AssertRC(rc);
1126
1127 int rcThread;
1128 rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
1129 LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
1130
1131 if (RT_SUCCESS(rc))
1132 {
1133 rc = RTCritSectDelete(&pAIO->CritSect);
1134 AssertRC(rc);
1135
1136 rc = RTSemEventDestroy(pAIO->Event);
1137 AssertRC(rc);
1138
1139 pAIO->fStarted = false;
1140 pAIO->fShutdown = false;
1141 pAIO->fEnabled = false;
1142 }
1143
1144 LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
1145 return rc;
1146}
1147
1148/**
1149 * Lets the stream's async I/O thread know that there is some data to process.
1150 *
1151 * @returns IPRT status code.
1152 * @param pThis AC'97 state.
1153 * @param pStream AC'97 stream to notify async I/O thread for.
1154 */
1155static int ichac97StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream)
1156{
1157 RT_NOREF(pThis);
1158
1159 LogFunc(("[SD%RU8]\n", pStream->u8SD));
1160 return RTSemEventSignal(pStream->State.AIO.Event);
1161}
1162
1163/**
1164 * Locks the async I/O thread of a specific AC'97 audio stream.
1165 *
1166 * @param pStream AC'97 stream to lock async I/O thread for.
1167 */
1168static void ichac97StreamAsyncIOLock(PAC97STREAM pStream)
1169{
1170 PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1171
1172 if (!ASMAtomicReadBool(&pAIO->fStarted))
1173 return;
1174
1175 int rc2 = RTCritSectEnter(&pAIO->CritSect);
1176 AssertRC(rc2);
1177}
1178
1179/**
1180 * Unlocks the async I/O thread of a specific AC'97 audio stream.
1181 *
1182 * @param pStream AC'97 stream to unlock async I/O thread for.
1183 */
1184static void ichac97StreamAsyncIOUnlock(PAC97STREAM pStream)
1185{
1186 PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1187
1188 if (!ASMAtomicReadBool(&pAIO->fStarted))
1189 return;
1190
1191 int rc2 = RTCritSectLeave(&pAIO->CritSect);
1192 AssertRC(rc2);
1193}
1194
1195/**
1196 * Enables (resumes) or disables (pauses) the async I/O thread.
1197 *
1198 * @param pStream AC'97 stream to enable/disable async I/O thread for.
1199 * @param fEnable Whether to enable or disable the I/O thread.
1200 *
1201 * @remarks Does not do locking.
1202 */
1203static void ichac97StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable)
1204{
1205 PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1206 ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
1207}
1208#endif /* VBOX_WITH_AUDIO_AC97_ASYNC_IO */
1209
1210/**
1211 * Updates an AC'97 stream by doing its required data transfers.
1212 * The host sink(s) set the overall pace.
1213 *
1214 * This routine is called by both, the synchronous and the asynchronous, implementations.
1215 *
1216 * @param pThis AC'97 state.
1217 * @param pStream AC'97 stream to update.
1218 * @param fInTimer Whether to this function was called from the timer
1219 * context or an asynchronous I/O stream thread (if supported).
1220 */
1221static void ichac97StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer)
1222{
1223 PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8SD);
1224 AssertPtr(pSink);
1225
1226 if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
1227 return;
1228
1229 int rc2;
1230
1231 if (pStream->u8SD == AC97SOUNDSOURCE_PO_INDEX) /* Output (SDO). */
1232 {
1233 /* Is the AC'97 stream ready to be written (guest output data) to? If so, by how much? */
1234 const uint32_t cbFree = ichac97StreamGetFree(pStream);
1235
1236 if ( fInTimer
1237 && cbFree)
1238 {
1239 Log3Func(("[SD%RU8] cbFree=%RU32\n", pStream->u8SD, cbFree));
1240
1241 /* Do the DMA transfer. */
1242 rc2 = ichac97StreamTransfer(pThis, pStream, cbFree);
1243 AssertRC(rc2);
1244 }
1245
1246 /* How much (guest output) data is available at the moment for the HDA stream? */
1247 uint32_t cbUsed = ichac97StreamGetUsed(pStream);
1248
1249#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1250 if ( fInTimer
1251 && cbUsed)
1252 {
1253 rc2 = ichac97StreamAsyncIONotify(pThis, pStream);
1254 AssertRC(rc2);
1255 }
1256 else
1257 {
1258#endif
1259 const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
1260
1261 /* Do not write more than the sink can hold at the moment.
1262 * The host sets the overall pace. */
1263 if (cbUsed > cbSinkWritable)
1264 cbUsed = cbSinkWritable;
1265
1266 if (cbUsed)
1267 {
1268 /* Read (guest output) data and write it to the stream's sink. */
1269 uint32_t cbRead;
1270 rc2 = ichac97StreamRead(pThis, pStream, pSink, cbUsed, &cbRead);
1271 AssertRC(rc2);
1272
1273 AssertMsg(cbUsed == cbRead, ("[SD%RU8] %RU32 bytes announced to be ready to read but %RU32 bytes read\n",
1274 pStream->u8SD, cbUsed, cbRead));
1275 }
1276
1277 /* When running synchronously, update the associated sink here.
1278 * Otherwise this will be done in the device timer. */
1279 rc2 = AudioMixerSinkUpdate(pSink);
1280 AssertRC(rc2);
1281
1282#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1283 }
1284#endif
1285 }
1286 else /* Input (SDI). */
1287 {
1288#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1289 if (fInTimer)
1290 {
1291 rc2 = ichac97StreamAsyncIONotify(pThis, pStream);
1292 AssertRC(rc2);
1293 }
1294 else
1295 {
1296#endif
1297 rc2 = AudioMixerSinkUpdate(pSink);
1298 AssertRC(rc2);
1299
1300 /* Is the sink ready to be read (host input data) from? If so, by how much? */
1301 const uint32_t cbReadable = AudioMixerSinkGetReadable(pSink);
1302
1303 /* How much (guest input) data is free at the moment? */
1304 uint32_t cbFree = ichac97StreamGetFree(pStream);
1305
1306 Log3Func(("[SD%RU8] cbReadable=%RU32, cbFree=%RU32\n", pStream->u8SD, cbReadable, cbFree));
1307
1308 /* Do not read more than the sink can provide at the moment.
1309 * The host sets the overall pace. */
1310 if (cbFree > cbReadable)
1311 cbFree = cbReadable;
1312
1313 if (cbFree)
1314 {
1315 /* Write (guest input) data to the stream which was read from stream's sink before. */
1316 rc2 = ichac97StreamWrite(pThis, pStream, pSink, cbFree, NULL /* pcbWritten */);
1317 AssertRC(rc2);
1318 }
1319#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1320 }
1321#endif
1322
1323#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1324 if (fInTimer)
1325 {
1326#endif
1327 const uint32_t cbToTransfer = ichac97StreamGetUsed(pStream);
1328 if (cbToTransfer)
1329 {
1330 /* When running synchronously, do the DMA data transfers here.
1331 * Otherwise this will be done in the stream's async I/O thread. */
1332 rc2 = ichac97StreamTransfer(pThis, pStream, cbToTransfer);
1333 AssertRC(rc2);
1334 }
1335#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1336 }
1337#endif
1338 }
1339}
1340
1341/**
1342 * Sets a AC'97 mixer control to a specific value.
1343 *
1344 * @returns IPRT status code.
1345 * @param pThis AC'97 state.
1346 * @param uMixerIdx Mixer control to set value for.
1347 * @param uVal Value to set.
1348 */
1349static void ichac97MixerSet(PAC97STATE pThis, uint8_t uMixerIdx, uint16_t uVal)
1350{
1351 if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
1352 {
1353 AssertMsgFailed(("Index %RU8 out of bounds(%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1354 return;
1355 }
1356
1357 pThis->mixer_data[uMixerIdx + 0] = RT_LO_U8(uVal);
1358 pThis->mixer_data[uMixerIdx + 1] = RT_HI_U8(uVal);
1359}
1360
1361/**
1362 * Gets a value from a specific AC'97 mixer control.
1363 *
1364 * @returns Retrieved mixer control value.
1365 * @param pThis AC'97 state.
1366 * @param uMixerIdx Mixer control to get value for.
1367 */
1368static uint16_t ichac97MixerGet(PAC97STATE pThis, uint32_t uMixerIdx)
1369{
1370 uint16_t uVal;
1371
1372 if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
1373 {
1374 AssertMsgFailed(("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1375 uVal = UINT16_MAX;
1376 }
1377 else
1378 uVal = RT_MAKE_U16(pThis->mixer_data[uMixerIdx + 0], pThis->mixer_data[uMixerIdx + 1]);
1379
1380 return uVal;
1381}
1382
1383/**
1384 * Retrieves a specific driver stream of a AC'97 driver.
1385 *
1386 * @returns Pointer to driver stream if found, or NULL if not found.
1387 * @param pThis AC'97 state.
1388 * @param pDrv Driver to retrieve driver stream for.
1389 * @param enmDir Stream direction to retrieve.
1390 * @param dstSrc Stream destination / source to retrieve.
1391 */
1392static PAC97DRIVERSTREAM ichac97MixerGetDrvStream(PAC97STATE pThis, PAC97DRIVER pDrv,
1393 PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1394{
1395 RT_NOREF(pThis);
1396
1397 PAC97DRIVERSTREAM pDrvStream = NULL;
1398
1399 if (enmDir == PDMAUDIODIR_IN)
1400 {
1401 LogFunc(("enmRecSource=%d\n", dstSrc.Source));
1402
1403 switch (dstSrc.Source)
1404 {
1405 case PDMAUDIORECSOURCE_LINE:
1406 pDrvStream = &pDrv->LineIn;
1407 break;
1408 case PDMAUDIORECSOURCE_MIC:
1409 pDrvStream = &pDrv->MicIn;
1410 break;
1411 default:
1412 AssertFailed();
1413 break;
1414 }
1415 }
1416 else if (enmDir == PDMAUDIODIR_OUT)
1417 {
1418 LogFunc(("enmPlaybackDest=%d\n", dstSrc.Dest));
1419
1420 switch (dstSrc.Dest)
1421 {
1422 case PDMAUDIOPLAYBACKDEST_FRONT:
1423 pDrvStream = &pDrv->Out;
1424 break;
1425 default:
1426 AssertFailed();
1427 break;
1428 }
1429 }
1430 else
1431 AssertFailed();
1432
1433 return pDrvStream;
1434}
1435
1436/**
1437 * Adds audio streams for all drivers to a specific mixer sink.
1438 *
1439 * @returns IPRT status code.
1440 * @param pThis AC'97 state.
1441 * @param pMixSink Mixer sink to add stream to.
1442 * @param pCfg Stream configuration to use.
1443 */
1444static int ichac97MixerAddDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg)
1445{
1446 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1447 AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1448 AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
1449
1450 if (!DrvAudioHlpStreamCfgIsValid(pCfg))
1451 return VERR_INVALID_PARAMETER;
1452
1453 int rc = AudioMixerSinkSetFormat(pMixSink, &pCfg->Props);
1454 if (RT_FAILURE(rc))
1455 return rc;
1456
1457 PAC97DRIVER pDrv;
1458 RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1459 {
1460 PPDMAUDIOSTREAMCFG pStreamCfg = DrvAudioHlpStreamCfgDup(pCfg);
1461 if (!pStreamCfg)
1462 {
1463 rc = VERR_NO_MEMORY;
1464 break;
1465 }
1466
1467 if (!RTStrPrintf(pStreamCfg->szName, sizeof(pStreamCfg->szName), "[LUN#%RU8] %s", pDrv->uLUN, pCfg->szName))
1468 {
1469 RTMemFree(pStreamCfg);
1470
1471 rc = VERR_BUFFER_OVERFLOW;
1472 break;
1473 }
1474
1475 LogFunc(("%s\n", pStreamCfg->szName));
1476
1477 int rc2 = VINF_SUCCESS;
1478
1479 PAC97DRIVERSTREAM pDrvStream = ichac97MixerGetDrvStream(pThis, pDrv, pStreamCfg->enmDir, pStreamCfg->DestSource);
1480 if (pDrvStream)
1481 {
1482 AssertMsg(pDrvStream->pMixStrm == NULL, ("[LUN#%RU8] Driver stream already present when it must not\n", pDrv->uLUN));
1483
1484 PAUDMIXSTREAM pMixStrm;
1485 rc2 = AudioMixerSinkCreateStream(pMixSink, pDrv->pConnector, pStreamCfg, 0 /* fFlags */, &pMixStrm);
1486 if (RT_SUCCESS(rc2))
1487 {
1488 rc2 = AudioMixerSinkAddStream(pMixSink, pMixStrm);
1489 LogFlowFunc(("LUN#%RU8: Created stream \"%s\", rc=%Rrc\n", pDrv->uLUN, pCfg->szName, rc2));
1490 }
1491
1492 if (RT_SUCCESS(rc2))
1493 pDrvStream->pMixStrm = pMixStrm;
1494
1495 /* If creating a stream fails, be forgiving and continue -- don't pass rc2 to rc here. */
1496 }
1497
1498 if (pStreamCfg)
1499 {
1500 RTMemFree(pStreamCfg);
1501 pStreamCfg = NULL;
1502 }
1503 }
1504
1505 LogFlowFuncLeaveRC(rc);
1506 return rc;
1507}
1508
1509/**
1510 * Removes specific audio streams for all drivers.
1511 *
1512 * @param pThis AC'97 state.
1513 * @param pMixSink Mixer sink to remove audio streams from.
1514 * @param enmDir Stream direction to remove.
1515 * @param dstSrc Stream destination / source to remove.
1516 */
1517static void ichac97MixerRemoveDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink,
1518 PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1519{
1520 AssertPtrReturnVoid(pThis);
1521 AssertPtrReturnVoid(pMixSink);
1522
1523 PAC97DRIVER pDrv;
1524 RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1525 {
1526 PAC97DRIVERSTREAM pDrvStream = ichac97MixerGetDrvStream(pThis, pDrv, enmDir, dstSrc);
1527 if (pDrvStream)
1528 {
1529 if (pDrvStream->pMixStrm)
1530 {
1531 AudioMixerSinkRemoveStream(pMixSink, pDrvStream->pMixStrm);
1532
1533 AudioMixerStreamDestroy(pDrvStream->pMixStrm);
1534 pDrvStream->pMixStrm = NULL;
1535 }
1536 }
1537 }
1538}
1539
1540/**
1541 * Opens an AC'97 stream with its current mixer settings.
1542 *
1543 * This will open an AC'97 stream with 2 (stereo) channels, 16-bit samples and
1544 * the last set sample rate in the AC'97 mixer for this stream.
1545 *
1546 * @returns IPRT status code.
1547 * @param pThis AC'97 state.
1548 * @param pStream AC'97 Stream to open.
1549 */
1550static int ichac97StreamOpen(PAC97STATE pThis, PAC97STREAM pStream)
1551{
1552 int rc = VINF_SUCCESS;
1553
1554 LogFunc(("[SD%RU8]\n", pStream->u8SD));
1555
1556 PDMAUDIOSTREAMCFG streamCfg;
1557 RT_ZERO(streamCfg);
1558
1559 PAUDMIXSINK pMixSink = NULL;
1560
1561 switch (pStream->u8SD)
1562 {
1563 case AC97SOUNDSOURCE_PI_INDEX:
1564 {
1565 streamCfg.Props.uHz = ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate);
1566 streamCfg.enmDir = PDMAUDIODIR_IN;
1567 streamCfg.DestSource.Source = PDMAUDIORECSOURCE_LINE;
1568 streamCfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
1569
1570 RTStrPrintf2(streamCfg.szName, sizeof(streamCfg.szName), "Line-In");
1571
1572 pMixSink = pThis->pSinkLineIn;
1573 break;
1574 }
1575
1576 case AC97SOUNDSOURCE_MC_INDEX:
1577 {
1578 streamCfg.Props.uHz = ichac97MixerGet(pThis, AC97_MIC_ADC_Rate);
1579 streamCfg.enmDir = PDMAUDIODIR_IN;
1580 streamCfg.DestSource.Source = PDMAUDIORECSOURCE_MIC;
1581 streamCfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
1582
1583 RTStrPrintf2(streamCfg.szName, sizeof(streamCfg.szName), "Mic-In");
1584
1585 pMixSink = pThis->pSinkMicIn;
1586 break;
1587 }
1588
1589 case AC97SOUNDSOURCE_PO_INDEX:
1590 {
1591 streamCfg.Props.uHz = ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate);
1592 streamCfg.enmDir = PDMAUDIODIR_OUT;
1593 streamCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
1594 streamCfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
1595
1596 RTStrPrintf2(streamCfg.szName, sizeof(streamCfg.szName), "Output");
1597
1598 pMixSink = pThis->pSinkOut;
1599 break;
1600 }
1601
1602 default:
1603 rc = VERR_NOT_SUPPORTED;
1604 break;
1605 }
1606
1607 if (RT_SUCCESS(rc))
1608 {
1609 ichac97MixerRemoveDrvStreams(pThis, pMixSink, streamCfg.enmDir, streamCfg.DestSource);
1610
1611 if (streamCfg.Props.uHz)
1612 {
1613 Assert(streamCfg.enmDir != PDMAUDIODIR_UNKNOWN);
1614
1615 streamCfg.Props.cChannels = 2;
1616 streamCfg.Props.cBits = 16;
1617 streamCfg.Props.fSigned = true;
1618 streamCfg.Props.cShift = PDMAUDIOPCMPROPS_MAKE_SHIFT_PARMS(streamCfg.Props.cBits, streamCfg.Props.cChannels);
1619
1620 rc = ichac97MixerAddDrvStreams(pThis, pMixSink, &streamCfg);
1621 }
1622 }
1623
1624 LogFlowFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
1625 return rc;
1626}
1627
1628/**
1629 * Closes an AC'97 stream.
1630 *
1631 * @returns IPRT status code.
1632 * @param pThis AC'97 state.
1633 * @param pStream AC'97 stream to close.
1634 */
1635static int ichac97StreamClose(PAC97STATE pThis, PAC97STREAM pStream)
1636{
1637 RT_NOREF(pThis);
1638 RT_NOREF(pStream);
1639
1640 LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
1641
1642 return VINF_SUCCESS;
1643}
1644
1645/**
1646 * Re-opens (that is, closes and opens again) an AC'97 stream on the backend
1647 * side with the current AC'97 mixer settings for this stream.
1648 *
1649 * @returns IPRT status code.
1650 * @param pThis AC'97 device state.
1651 * @param pStream AC'97 stream to re-open.
1652 */
1653static int ichac97StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream)
1654{
1655 LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
1656
1657 int rc = ichac97StreamClose(pThis, pStream);
1658 if (RT_SUCCESS(rc))
1659 rc = ichac97StreamOpen(pThis, pStream);
1660
1661 return rc;
1662}
1663
1664/**
1665 * Locks an AC'97 stream for serialized access.
1666 *
1667 * @returns IPRT status code.
1668 * @param pStream AC'97 stream to lock.
1669 */
1670static void ichac97StreamLock(PAC97STREAM pStream)
1671{
1672 AssertPtrReturnVoid(pStream);
1673 int rc2 = RTCritSectEnter(&pStream->State.CritSect);
1674 AssertRC(rc2);
1675}
1676
1677/**
1678 * Unlocks a formerly locked AC'97 stream.
1679 *
1680 * @returns IPRT status code.
1681 * @param pStream AC'97 stream to unlock.
1682 */
1683static void ichac97StreamUnlock(PAC97STREAM pStream)
1684{
1685 AssertPtrReturnVoid(pStream);
1686 int rc2 = RTCritSectLeave(&pStream->State.CritSect);
1687 AssertRC(rc2);
1688}
1689
1690/**
1691 * Retrieves the available size of (buffered) audio data (in bytes) of a given AC'97 stream.
1692 *
1693 * @returns Available data (in bytes).
1694 * @param pStream AC'97 stream to retrieve size for.
1695 */
1696static uint32_t ichac97StreamGetUsed(PAC97STREAM pStream)
1697{
1698 AssertPtrReturn(pStream, 0);
1699
1700 if (!pStream->State.pCircBuf)
1701 return 0;
1702
1703 return (uint32_t)RTCircBufUsed(pStream->State.pCircBuf);
1704}
1705
1706/**
1707 * Retrieves the free size of audio data (in bytes) of a given AC'97 stream.
1708 *
1709 * @returns Free data (in bytes).
1710 * @param pStream AC'97 stream to retrieve size for.
1711 */
1712static uint32_t ichac97StreamGetFree(PAC97STREAM pStream)
1713{
1714 AssertPtrReturn(pStream, 0);
1715
1716 if (!pStream->State.pCircBuf)
1717 return 0;
1718
1719 return (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
1720}
1721
1722/**
1723 * Sets the volume of a specific AC'97 mixer control.
1724 *
1725 * This currently only supports attenuation -- gain support is currently not implemented.
1726 *
1727 * @returns IPRT status code.
1728 * @param pThis AC'97 state.
1729 * @param index AC'97 mixer index to set volume for.
1730 * @param enmMixerCtl Corresponding audio mixer sink.
1731 * @param uVal Volume value to set.
1732 */
1733static int ichac97MixerSetVolume(PAC97STATE pThis, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
1734{
1735 /*
1736 * From AC'97 SoundMax Codec AD1981A/AD1981B:
1737 * "Because AC '97 defines 6-bit volume registers, to maintain compatibility whenever the
1738 * D5 or D13 bits are set to 1, their respective lower five volume bits are automatically
1739 * set to 1 by the Codec logic. On readback, all lower 5 bits will read ones whenever
1740 * these bits are set to 1."
1741 *
1742 * Linux ALSA depends on this behavior.
1743 */
1744 /// @todo Does this apply to anything other than the master volume control?
1745 if (uVal & RT_BIT(5)) /* D5 bit set? */
1746 uVal |= RT_BIT(4) | RT_BIT(3) | RT_BIT(2) | RT_BIT(1) | RT_BIT(0);
1747 if (uVal & RT_BIT(13)) /* D13 bit set? */
1748 uVal |= RT_BIT(12) | RT_BIT(11) | RT_BIT(10) | RT_BIT(9) | RT_BIT(8);
1749
1750 const bool fCtlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
1751 uint8_t uCtlAttLeft = (uVal >> 8) & AC97_BARS_VOL_MASK;
1752 uint8_t uCtlAttRight = uVal & AC97_BARS_VOL_MASK;
1753
1754 /* For the master and headphone volume, 0 corresponds to 0dB attenuation. For the other
1755 * volume controls, 0 means 12dB gain and 8 means unity gain.
1756 */
1757 if (index != AC97_Master_Volume_Mute && index != AC97_Headphone_Volume_Mute)
1758 {
1759#ifndef VBOX_WITH_AC97_GAIN_SUPPORT
1760 /* NB: Currently there is no gain support, only attenuation. */
1761 uCtlAttLeft = uCtlAttLeft < 8 ? 0 : uCtlAttLeft - 8;
1762 uCtlAttRight = uCtlAttRight < 8 ? 0 : uCtlAttRight - 8;
1763#endif
1764 }
1765 Assert(uCtlAttLeft <= 255 / AC97_DB_FACTOR);
1766 Assert(uCtlAttRight <= 255 / AC97_DB_FACTOR);
1767
1768 LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
1769 LogFunc(("uCtlAttLeft=%RU8, uCtlAttRight=%RU8 ", uCtlAttLeft, uCtlAttRight));
1770
1771 /*
1772 * For AC'97 volume controls, each additional step means -1.5dB attenuation with
1773 * zero being maximum. In contrast, we're internally using 255 (PDMAUDIO_VOLUME_MAX)
1774 * steps, each -0.375dB, where 0 corresponds to -96dB and 255 corresponds to 0dB.
1775 */
1776 uint8_t lVol = PDMAUDIO_VOLUME_MAX - uCtlAttLeft * AC97_DB_FACTOR;
1777 uint8_t rVol = PDMAUDIO_VOLUME_MAX - uCtlAttRight * AC97_DB_FACTOR;
1778
1779 Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCtlMuted, lVol, rVol));
1780
1781 int rc = VINF_SUCCESS;
1782
1783 if (pThis->pMixer) /* Device can be in reset state, so no mixer available. */
1784 {
1785 PDMAUDIOVOLUME Vol = { fCtlMuted, lVol, rVol };
1786 PAUDMIXSINK pSink = NULL;
1787
1788 switch (enmMixerCtl)
1789 {
1790 case PDMAUDIOMIXERCTL_VOLUME_MASTER:
1791 rc = AudioMixerSetMasterVolume(pThis->pMixer, &Vol);
1792 break;
1793
1794 case PDMAUDIOMIXERCTL_FRONT:
1795 pSink = pThis->pSinkOut;
1796 break;
1797
1798 case PDMAUDIOMIXERCTL_MIC_IN:
1799 pSink = pThis->pSinkMicIn;
1800 break;
1801
1802 case PDMAUDIOMIXERCTL_LINE_IN:
1803 pSink = pThis->pSinkLineIn;
1804 break;
1805
1806 default:
1807 AssertFailed();
1808 rc = VERR_NOT_SUPPORTED;
1809 break;
1810 }
1811
1812 if (pSink)
1813 rc = AudioMixerSinkSetVolume(pSink, &Vol);
1814 }
1815
1816 ichac97MixerSet(pThis, index, uVal);
1817
1818 if (RT_FAILURE(rc))
1819 LogFlowFunc(("Failed with %Rrc\n", rc));
1820
1821 return rc;
1822}
1823
1824/**
1825 * Converts an AC'97 recording source index to a PDM audio recording source.
1826 *
1827 * @returns PDM audio recording source.
1828 * @param uIdx AC'97 index to convert.
1829 */
1830static PDMAUDIORECSOURCE ichac97IdxToRecSource(uint8_t uIdx)
1831{
1832 switch (uIdx)
1833 {
1834 case AC97_REC_MIC: return PDMAUDIORECSOURCE_MIC;
1835 case AC97_REC_CD: return PDMAUDIORECSOURCE_CD;
1836 case AC97_REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO;
1837 case AC97_REC_AUX: return PDMAUDIORECSOURCE_AUX;
1838 case AC97_REC_LINE_IN: return PDMAUDIORECSOURCE_LINE;
1839 case AC97_REC_PHONE: return PDMAUDIORECSOURCE_PHONE;
1840 default:
1841 break;
1842 }
1843
1844 LogFlowFunc(("Unknown record source %d, using MIC\n", uIdx));
1845 return PDMAUDIORECSOURCE_MIC;
1846}
1847
1848/**
1849 * Converts a PDM audio recording source to an AC'97 recording source index.
1850 *
1851 * @returns AC'97 recording source index.
1852 * @param enmRecSrc PDM audio recording source to convert.
1853 */
1854static uint8_t ichac97RecSourceToIdx(PDMAUDIORECSOURCE enmRecSrc)
1855{
1856 switch (enmRecSrc)
1857 {
1858 case PDMAUDIORECSOURCE_MIC: return AC97_REC_MIC;
1859 case PDMAUDIORECSOURCE_CD: return AC97_REC_CD;
1860 case PDMAUDIORECSOURCE_VIDEO: return AC97_REC_VIDEO;
1861 case PDMAUDIORECSOURCE_AUX: return AC97_REC_AUX;
1862 case PDMAUDIORECSOURCE_LINE: return AC97_REC_LINE_IN;
1863 case PDMAUDIORECSOURCE_PHONE: return AC97_REC_PHONE;
1864 default:
1865 break;
1866 }
1867
1868 LogFlowFunc(("Unknown audio recording source %d using MIC\n", enmRecSrc));
1869 return AC97_REC_MIC;
1870}
1871
1872/**
1873 * Retrieves an AC'97 audio stream from an AC'97 stream index.
1874 *
1875 * @returns Pointer to AC'97 audio stream if found, or NULL if not found / invalid.
1876 * @param pThis AC'97 state.
1877 * @param uIdx AC'97 stream index to retrieve AC'97 audio stream for.
1878 */
1879DECLINLINE(PAC97STREAM) ichac97GetStreamFromIdx(PAC97STATE pThis, uint32_t uIdx)
1880{
1881 switch (uIdx)
1882 {
1883 case AC97SOUNDSOURCE_PI_INDEX: return &pThis->StreamLineIn;
1884 case AC97SOUNDSOURCE_MC_INDEX: return &pThis->StreamMicIn;
1885 case AC97SOUNDSOURCE_PO_INDEX: return &pThis->StreamOut;
1886 default: break;
1887 }
1888
1889 return NULL;
1890}
1891
1892/**
1893 * Performs an AC'97 mixer record select to switch to a different recording
1894 * source.
1895 *
1896 * @param pThis AC'97 state.
1897 * @param val AC'97 recording source index to set.
1898 */
1899static void ichac97MixerRecordSelect(PAC97STATE pThis, uint32_t val)
1900{
1901 uint8_t rs = val & AC97_REC_MASK;
1902 uint8_t ls = (val >> 8) & AC97_REC_MASK;
1903 PDMAUDIORECSOURCE ars = ichac97IdxToRecSource(rs);
1904 PDMAUDIORECSOURCE als = ichac97IdxToRecSource(ls);
1905 rs = ichac97RecSourceToIdx(ars);
1906 ls = ichac97RecSourceToIdx(als);
1907 ichac97MixerSet(pThis, AC97_Record_Select, rs | (ls << 8));
1908}
1909
1910/**
1911 * Resets the AC'97 mixer.
1912 *
1913 * @returns IPRT status code.
1914 * @param pThis AC'97 state.
1915 */
1916static int ichac97MixerReset(PAC97STATE pThis)
1917{
1918 AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
1919
1920 LogFlowFuncEnter();
1921
1922 RT_ZERO(pThis->mixer_data);
1923
1924 /* Note: Make sure to reset all registers first before bailing out on error. */
1925
1926 ichac97MixerSet(pThis, AC97_Reset , 0x0000); /* 6940 */
1927 ichac97MixerSet(pThis, AC97_Master_Volume_Mono_Mute , 0x8000);
1928 ichac97MixerSet(pThis, AC97_PC_BEEP_Volume_Mute , 0x0000);
1929
1930 ichac97MixerSet(pThis, AC97_Phone_Volume_Mute , 0x8008);
1931 ichac97MixerSet(pThis, AC97_Mic_Volume_Mute , 0x8008);
1932 ichac97MixerSet(pThis, AC97_CD_Volume_Mute , 0x8808);
1933 ichac97MixerSet(pThis, AC97_Aux_Volume_Mute , 0x8808);
1934 ichac97MixerSet(pThis, AC97_Record_Gain_Mic_Mute , 0x8000);
1935 ichac97MixerSet(pThis, AC97_General_Purpose , 0x0000);
1936 ichac97MixerSet(pThis, AC97_3D_Control , 0x0000);
1937 ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f);
1938
1939 ichac97MixerSet(pThis, AC97_Extended_Audio_ID , 0x0809);
1940 ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
1941 ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80);
1942 ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80);
1943 ichac97MixerSet(pThis, AC97_PCM_LFE_DAC_Rate , 0xbb80);
1944 ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate , 0xbb80);
1945 ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80);
1946
1947 if (pThis->uCodecModel == AC97_CODEC_AD1980)
1948 {
1949 /* Analog Devices 1980 (AD1980) */
1950 ichac97MixerSet(pThis, AC97_Reset , 0x0010); /* Headphones. */
1951 ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1952 ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5370);
1953 ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000);
1954 }
1955 else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
1956 {
1957 /* Analog Devices 1981B (AD1981B) */
1958 ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1959 ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5374);
1960 }
1961 else
1962 {
1963 /* Sigmatel 9700 (STAC9700) */
1964 ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x8384);
1965 ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x7600); /* 7608 */
1966 }
1967 ichac97MixerRecordSelect(pThis, 0);
1968
1969 /* The default value is 8000h, which corresponds to 0 dB attenuation with mute on. */
1970 ichac97MixerSetVolume(pThis, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, 0x8000);
1971
1972 /* The default value for stereo registers is 8808h, which corresponds to 0 dB gain with mute on.*/
1973 ichac97MixerSetVolume(pThis, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, 0x8808);
1974 ichac97MixerSetVolume(pThis, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8808);
1975 ichac97MixerSetVolume(pThis, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8808);
1976
1977 return VINF_SUCCESS;
1978}
1979
1980/* Unused */
1981#if 0
1982static void ichac97WriteBUP(PAC97STATE pThis, uint32_t cbElapsed)
1983{
1984 LogFlowFunc(("cbElapsed=%RU32\n", cbElapsed));
1985
1986 if (!(pThis->bup_flag & BUP_SET))
1987 {
1988 if (pThis->bup_flag & BUP_LAST)
1989 {
1990 unsigned int i;
1991 uint32_t *p = (uint32_t*)pThis->silence;
1992 for (i = 0; i < sizeof(pThis->silence) / 4; i++) /** @todo r=andy Assumes 16-bit samples, stereo. */
1993 *p++ = pThis->last_samp;
1994 }
1995 else
1996 RT_ZERO(pThis->silence);
1997
1998 pThis->bup_flag |= BUP_SET;
1999 }
2000
2001 while (cbElapsed)
2002 {
2003 uint32_t cbToWrite = RT_MIN(cbElapsed, (uint32_t)sizeof(pThis->silence));
2004 uint32_t cbWrittenToStream;
2005
2006 int rc2 = AudioMixerSinkWrite(pThis->pSinkOut, AUDMIXOP_COPY,
2007 pThis->silence, cbToWrite, &cbWrittenToStream);
2008 if (RT_SUCCESS(rc2))
2009 {
2010 if (cbWrittenToStream < cbToWrite) /* Lagging behind? */
2011 LogFlowFunc(("Warning: Only written %RU32 / %RU32 bytes, expect lags\n", cbWrittenToStream, cbToWrite));
2012 }
2013
2014 /* Always report all data as being written;
2015 * backends who were not able to catch up have to deal with it themselves. */
2016 Assert(cbElapsed >= cbToWrite);
2017 cbElapsed -= cbToWrite;
2018 }
2019}
2020#endif /* Unused */
2021
2022#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
2023/**
2024 * Starts the internal audio device timer (if not started yet).
2025 *
2026 * @param pThis AC'97 state.
2027 */
2028static void ichac97TimerMaybeStart(PAC97STATE pThis)
2029{
2030 LogFlowFuncEnter();
2031
2032 if (!pThis->pTimer)
2033 return;
2034
2035 pThis->cStreamsActive++;
2036
2037 /* Only start the timer at the first active stream. */
2038 if (pThis->cStreamsActive == 1)
2039 {
2040 LogRel2(("AC97: Starting transfers\n"));
2041
2042 /* Set timer flag. */
2043 ASMAtomicXchgBool(&pThis->fTimerActive, true);
2044
2045 /* Update current time timestamp. */
2046 pThis->uTimerTS = TMTimerGet(pThis->pTimer);
2047
2048 /* Start transfers. */
2049 ichac97TimerMain(pThis);
2050 }
2051}
2052
2053/**
2054 * Stops the internal audio device timer.
2055 *
2056 * @param pThis AC'97 state.
2057 */
2058static void ichac97TimerStop(PAC97STATE pThis)
2059{
2060 LogFlowFuncEnter();
2061
2062 /* Set timer flag. */
2063 ASMAtomicXchgBool(&pThis->fTimerActive, false);
2064}
2065
2066/**
2067 * Decreases the active AC'97 streams count by one and
2068 * then checks if the internal audio device timer can be
2069 * stopped.
2070 *
2071 * @param pThis AC'97 state.
2072 */
2073static void ichac97TimerMaybeStop(PAC97STATE pThis)
2074{
2075 LogFlowFuncEnter();
2076
2077 if (!pThis->pTimer)
2078 return;
2079
2080 if (pThis->cStreamsActive) /* Function can be called mupltiple times. */
2081 {
2082 pThis->cStreamsActive--;
2083
2084 if (pThis->cStreamsActive == 0)
2085 ichac97TimerStop(pThis);
2086 }
2087}
2088
2089/**
2090 * Main routine for the device timer.
2091 *
2092 * @returns IPRT status code.
2093 * @param pThis AC'97 state.
2094 */
2095static void ichac97TimerMain(PAC97STATE pThis)
2096{
2097 STAM_PROFILE_START(&pThis->StatTimer, a);
2098
2099 uint64_t cTicksNow = TMTimerGet(pThis->pTimer);
2100
2101 /* Update current time timestamp. */
2102 pThis->uTimerTS = cTicksNow;
2103
2104 /* Flag indicating whether to kick the timer again for the next DMA transfer or sink processing. */
2105 bool fKickTimer = false;
2106
2107 ichac97DoTransfers(pThis);
2108
2109 /* Do we need to kick the timer again? */
2110 if ( AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamLineIn.u8SD))
2111 || AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamMicIn.u8SD))
2112 || AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamOut.u8SD)))
2113 {
2114 fKickTimer = true;
2115 }
2116
2117 if ( ASMAtomicReadBool(&pThis->fTimerActive)
2118 || fKickTimer)
2119 {
2120 /* Kick the timer again. */
2121 uint64_t cTicks = pThis->cTimerTicks;
2122 /** @todo adjust cTicks down by now much cbOutMin represents. */
2123 TMTimerSet(pThis->pTimer, cTicksNow + cTicks);
2124 }
2125 else
2126 LogRel2(("AC97: Stopping transfers\n"));
2127
2128 STAM_PROFILE_STOP(&pThis->StatTimer, a);
2129}
2130
2131/**
2132 * Timer callback which handles the audio data transfers on a periodic basis.
2133 *
2134 * @param pDevIns Device instance.
2135 * @param pTimer Timer which was used when calling this.
2136 * @param pvUser User argument as PAC97STATE.
2137 */
2138static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2139{
2140 RT_NOREF(pDevIns, pTimer);
2141
2142 PAC97STATE pThis = (PAC97STATE)pvUser;
2143 Assert(pThis == PDMINS_2_DATA(pDevIns, PAC97STATE));
2144 AssertPtr(pThis);
2145
2146 ichac97TimerMain(pThis);
2147}
2148#endif /* !VBOX_WITH_AUDIO_AC97_CALLBACKS */
2149
2150/**
2151 * Main routine to perform the actual audio data transfers from the AC'97 streams
2152 * to the backend(s) and vice versa.
2153 *
2154 * @param pThis AC'97 state.
2155 */
2156static void ichac97DoTransfers(PAC97STATE pThis)
2157{
2158 AssertPtrReturnVoid(pThis);
2159
2160 ichac97StreamUpdate(pThis, &pThis->StreamLineIn, true /* fInTimer */);
2161 ichac97StreamUpdate(pThis, &pThis->StreamMicIn, true /* fInTimer */);
2162 ichac97StreamUpdate(pThis, &pThis->StreamOut, true /* fInTimer */);
2163}
2164
2165/**
2166 * Transfers data of an AC'97 stream according to its usage (input / output).
2167 *
2168 * For an SDO (output) stream this means reading DMA data from the device to
2169 * the HDA stream's internal FIFO buffer.
2170 *
2171 * For an SDI (input) stream this is reading audio data from the HDA stream's
2172 * internal FIFO buffer and writing it as DMA data to the device.
2173 *
2174 * @returns IPRT status code.
2175 * @param pThis AC'97 state.
2176 * @param pStream AC'97 stream to update.
2177 * @param cbToProcessMax Maximum of data (in bytes) to process.
2178 */
2179static int ichac97StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax)
2180{
2181 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2182 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
2183 AssertReturn(cbToProcessMax, VERR_INVALID_PARAMETER);
2184
2185 PAC97BMREGS pRegs = &pStream->Regs;
2186
2187 if (pRegs->sr & AC97_SR_DCH) /* Controller halted? */
2188 {
2189 if (pRegs->cr & AC97_CR_RPBM) /* Bus master operation starts. */
2190 {
2191 switch (pStream->u8SD)
2192 {
2193 case AC97SOUNDSOURCE_PO_INDEX:
2194 /*ichac97WriteBUP(pThis, cbToProcess);*/
2195 break;
2196
2197 default:
2198 break;
2199 }
2200 }
2201
2202 return VINF_SUCCESS;
2203 }
2204
2205 /* BCIS flag still set? Skip iteration. */
2206 if (pRegs->sr & AC97_SR_BCIS)
2207 {
2208 Log3Func(("[SD%RU8] BCIS set\n", pStream->u8SD));
2209 return VINF_SUCCESS;
2210 }
2211
2212 uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToProcessMax); /** @todo r=andy Assumes 16bit samples. */
2213 uint32_t cbProcessedTotal = 0;
2214
2215 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
2216 AssertPtr(pCircBuf);
2217
2218 int rc = VINF_SUCCESS;
2219
2220 Log3Func(("[SD%RU8] cbToProcessMax=%RU32, cbLeft=%RU32\n", pStream->u8SD, cbToProcessMax, cbLeft));
2221
2222 while (cbLeft)
2223 {
2224 if (!pRegs->bd_valid)
2225 {
2226 Log3Func(("Invalid buffer descriptor, fetching next one ...\n"));
2227 ichac97StreamFetchBDLE(pThis, pStream);
2228 }
2229
2230 if (!pRegs->picb) /* Got a new buffer descriptor, that is, the position is 0? */
2231 {
2232 Log3Func(("Fresh buffer descriptor %RU8 is empty, addr=%#x, len=%#x, skipping\n",
2233 pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len));
2234 if (pRegs->civ == pRegs->lvi)
2235 {
2236 pRegs->sr |= AC97_SR_DCH; /** @todo r=andy Also set CELV? */
2237 pThis->bup_flag = 0;
2238
2239 rc = VINF_EOF;
2240 break;
2241 }
2242
2243 pRegs->sr &= ~AC97_SR_CELV;
2244 pRegs->civ = pRegs->piv;
2245 pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2246
2247 ichac97StreamFetchBDLE(pThis, pStream);
2248 continue;
2249 }
2250
2251 uint32_t cbChunk = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */
2252 Assert(cbChunk);
2253
2254 switch (pStream->u8SD)
2255 {
2256 case AC97SOUNDSOURCE_PO_INDEX: /* Output */
2257 {
2258 void *pvDst;
2259 size_t cbDst;
2260
2261 RTCircBufAcquireWriteBlock(pCircBuf, cbChunk, &pvDst, &cbDst);
2262
2263 if (cbDst)
2264 {
2265 int rc2 = PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr, (uint8_t *)pvDst, cbDst);
2266 AssertRC(rc2);
2267
2268#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
2269 RTFILE fh;
2270 RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMARead.pcm",
2271 RTFILE_O_OPEN_CREATE | RTFILE_O_APPEND | RTFILE_O_WRITE | RTFILE_O_DENY_NONE);
2272 RTFileWrite(fh, pvDst, cbDst, NULL);
2273 RTFileClose(fh);
2274#endif
2275 }
2276
2277 RTCircBufReleaseWriteBlock(pCircBuf, cbDst);
2278
2279 cbChunk = (uint32_t)cbDst; /* Update the current chunk size to what really has been written. */
2280 break;
2281 }
2282
2283 case AC97SOUNDSOURCE_PI_INDEX: /* Input */
2284 case AC97SOUNDSOURCE_MC_INDEX: /* Input */
2285 {
2286 void *pvSrc;
2287 size_t cbSrc;
2288
2289 RTCircBufAcquireReadBlock(pCircBuf, cbChunk, &pvSrc, &cbSrc);
2290
2291 if (cbSrc)
2292 {
2293 int rc2 = PDMDevHlpPhysWrite(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr, (uint8_t *)pvSrc, cbSrc);
2294 AssertRC(rc2);
2295
2296#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
2297 RTFILE fh;
2298 RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMAWrite.pcm",
2299 RTFILE_O_OPEN_CREATE | RTFILE_O_APPEND | RTFILE_O_WRITE | RTFILE_O_DENY_NONE);
2300 RTFileWrite(fh, pvSrc, cbSrc, NULL);
2301 RTFileClose(fh);
2302#endif
2303 }
2304
2305 RTCircBufReleaseReadBlock(pCircBuf, cbSrc);
2306
2307 cbChunk = (uint32_t)cbSrc; /* Update the current chunk size to what really has been read. */
2308 break;
2309 }
2310
2311 default:
2312 AssertMsgFailed(("Stream #%RU8 not supported\n", pStream->u8SD));
2313 rc = VERR_NOT_SUPPORTED;
2314 break;
2315 }
2316
2317 if (RT_FAILURE(rc))
2318 break;
2319
2320 if (cbChunk)
2321 {
2322 cbProcessedTotal += cbChunk;
2323 Assert(cbProcessedTotal <= cbToProcessMax);
2324 Assert(cbLeft >= cbChunk);
2325 cbLeft -= cbChunk;
2326 Assert((cbChunk & 1) == 0); /* Else the following shift won't work */
2327
2328 pRegs->picb -= (cbChunk >> 1); /** @todo r=andy Assumes 16bit samples. */
2329 pRegs->bd.addr += cbChunk;
2330 }
2331
2332 LogFlowFunc(("[SD%RU8] cbChunk=%RU32, cbLeft=%RU32, cbTotal=%RU32, rc=%Rrc\n",
2333 pStream->u8SD, cbChunk, cbLeft, cbProcessedTotal, rc));
2334
2335 if (!pRegs->picb)
2336 {
2337 uint32_t new_sr = pRegs->sr & ~AC97_SR_CELV;
2338
2339 if (pRegs->bd.ctl_len & AC97_BD_IOC)
2340 {
2341 new_sr |= AC97_SR_BCIS;
2342 }
2343
2344 if (pRegs->civ == pRegs->lvi)
2345 {
2346 /* Did we run out of data? */
2347 LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi));
2348
2349 new_sr |= AC97_SR_LVBCI | AC97_SR_DCH | AC97_SR_CELV;
2350 pThis->bup_flag = (pRegs->bd.ctl_len & AC97_BD_BUP) ? BUP_LAST : 0;
2351
2352 rc = VINF_EOF;
2353 }
2354 else
2355 {
2356 pRegs->civ = pRegs->piv;
2357 pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2358 ichac97StreamFetchBDLE(pThis, pStream);
2359 }
2360
2361 ichac97StreamUpdateSR(pThis, pStream, new_sr);
2362 }
2363
2364 if (/* All data processed? */
2365 rc == VINF_EOF
2366 /* ... or an error occurred? */
2367 || RT_FAILURE(rc))
2368 {
2369 break;
2370 }
2371 }
2372
2373 LogFlowFuncLeaveRC(rc);
2374 return rc;
2375}
2376
2377/**
2378 * Port I/O Handler for IN operations.
2379 *
2380 * @returns VINF_SUCCESS or VINF_EM_*.
2381 * @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
2382 *
2383 * @param pDevIns The device instance.
2384 * @param pvUser User argument.
2385 * @param uPort Port number used for the IN operation.
2386 * @param pu32Val Where to store the result. This is always a 32-bit
2387 * variable regardless of what @a cbVal might say.
2388 * @param cbVal Number of bytes read.
2389 * @remarks Caller enters the device critical section.
2390 */
2391static DECLCALLBACK(int) ichac97IOPortNABMRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort,
2392 uint32_t *pu32Val, unsigned cbVal)
2393{
2394 RT_NOREF(pDevIns);
2395 PAC97STATE pThis = (PAC97STATE)pvUser;
2396
2397 /* Get the index of the NABMBAR port. */
2398 const uint32_t uPortIdx = uPort - pThis->IOPortBase[1];
2399
2400 PAC97STREAM pStream = ichac97GetStreamFromIdx(pThis, AC97_PORT2IDX(uPortIdx));
2401 PAC97BMREGS pRegs = NULL;
2402
2403 if (pStream) /* Can be NULL, depending on the index (port). */
2404 pRegs = &pStream->Regs;
2405
2406 int rc = VINF_SUCCESS;
2407
2408 switch (cbVal)
2409 {
2410 case 1:
2411 {
2412 switch (uPortIdx)
2413 {
2414 case AC97_CAS:
2415 /* Codec Access Semaphore Register */
2416 Log3Func(("CAS %d\n", pThis->cas));
2417 *pu32Val = pThis->cas;
2418 pThis->cas = 1;
2419 break;
2420 case PI_CIV:
2421 case PO_CIV:
2422 case MC_CIV:
2423 /* Current Index Value Register */
2424 *pu32Val = pRegs->civ;
2425 Log3Func(("CIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2426 break;
2427 case PI_LVI:
2428 case PO_LVI:
2429 case MC_LVI:
2430 /* Last Valid Index Register */
2431 *pu32Val = pRegs->lvi;
2432 Log3Func(("LVI[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2433 break;
2434 case PI_PIV:
2435 case PO_PIV:
2436 case MC_PIV:
2437 /* Prefetched Index Value Register */
2438 *pu32Val = pRegs->piv;
2439 Log3Func(("PIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2440 break;
2441 case PI_CR:
2442 case PO_CR:
2443 case MC_CR:
2444 /* Control Register */
2445 *pu32Val = pRegs->cr;
2446 Log3Func(("CR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2447 break;
2448 case PI_SR:
2449 case PO_SR:
2450 case MC_SR:
2451 /* Status Register (lower part) */
2452 *pu32Val = RT_LO_U8(pRegs->sr);
2453 Log3Func(("SRb[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2454 break;
2455 default:
2456 *pu32Val = UINT32_MAX;
2457 LogFunc(("U nabm readb %#x -> %#x\n", uPort, *pu32Val));
2458 break;
2459 }
2460 break;
2461 }
2462
2463 case 2:
2464 {
2465 switch (uPortIdx)
2466 {
2467 case PI_SR:
2468 case PO_SR:
2469 case MC_SR:
2470 /* Status Register */
2471 *pu32Val = pRegs->sr;
2472 Log3Func(("SR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2473 break;
2474 case PI_PICB:
2475 case PO_PICB:
2476 case MC_PICB:
2477 /* Position in Current Buffer */
2478 *pu32Val = pRegs->picb;
2479 Log3Func(("PICB[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2480 break;
2481 default:
2482 *pu32Val = UINT32_MAX;
2483 LogFunc(("U nabm readw %#x -> %#x\n", uPort, *pu32Val));
2484 break;
2485 }
2486 break;
2487 }
2488
2489 case 4:
2490 {
2491 switch (uPortIdx)
2492 {
2493 case PI_BDBAR:
2494 case PO_BDBAR:
2495 case MC_BDBAR:
2496 /* Buffer Descriptor Base Address Register */
2497 *pu32Val = pRegs->bdbar;
2498 Log3Func(("BMADDR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2499 break;
2500 case PI_CIV:
2501 case PO_CIV:
2502 case MC_CIV:
2503 /* 32-bit access: Current Index Value Register +
2504 * Last Valid Index Register +
2505 * Status Register */
2506 *pu32Val = pRegs->civ | (pRegs->lvi << 8) | (pRegs->sr << 16); /** @todo r=andy Use RT_MAKE_U32_FROM_U8. */
2507 Log3Func(("CIV LVI SR[%d] -> %#x, %#x, %#x\n",
2508 AC97_PORT2IDX(uPortIdx), pRegs->civ, pRegs->lvi, pRegs->sr));
2509 break;
2510 case PI_PICB:
2511 case PO_PICB:
2512 case MC_PICB:
2513 /* 32-bit access: Position in Current Buffer Register +
2514 * Prefetched Index Value Register +
2515 * Control Register */
2516 *pu32Val = pRegs->picb | (pRegs->piv << 16) | (pRegs->cr << 24); /** @todo r=andy Use RT_MAKE_U32_FROM_U8. */
2517 Log3Func(("PICB PIV CR[%d] -> %#x %#x %#x %#x\n",
2518 AC97_PORT2IDX(uPortIdx), *pu32Val, pRegs->picb, pRegs->piv, pRegs->cr));
2519 break;
2520 case AC97_GLOB_CNT:
2521 /* Global Control */
2522 *pu32Val = pThis->glob_cnt;
2523 Log3Func(("glob_cnt -> %#x\n", *pu32Val));
2524 break;
2525 case AC97_GLOB_STA:
2526 /* Global Status */
2527 *pu32Val = pThis->glob_sta | AC97_GS_S0CR;
2528 Log3Func(("glob_sta -> %#x\n", *pu32Val));
2529 break;
2530 default:
2531 *pu32Val = UINT32_MAX;
2532 LogFunc(("U nabm readl %#x -> %#x\n", uPort, *pu32Val));
2533 break;
2534 }
2535 break;
2536 }
2537
2538 default:
2539 {
2540 AssertFailed();
2541 rc = VERR_IOM_IOPORT_UNUSED;
2542 }
2543 }
2544
2545 return rc;
2546}
2547
2548/**
2549 * Port I/O Handler for OUT operations.
2550 *
2551 * @returns VINF_SUCCESS or VINF_EM_*.
2552 *
2553 * @param pDevIns The device instance.
2554 * @param pvUser User argument.
2555 * @param uPort Port number used for the OUT operation.
2556 * @param u32Val The value to output.
2557 * @param cbVal The value size in bytes.
2558 * @remarks Caller enters the device critical section.
2559 */
2560static DECLCALLBACK(int) ichac97IOPortNABMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort,
2561 uint32_t u32Val, unsigned cbVal)
2562{
2563 RT_NOREF(pDevIns);
2564 PAC97STATE pThis = (PAC97STATE)pvUser;
2565
2566 /* Get the index of the NABMBAR register. */
2567 const uint32_t uPortIdx = uPort - pThis->IOPortBase[1];
2568
2569 PAC97STREAM pStream = ichac97GetStreamFromIdx(pThis, AC97_PORT2IDX(uPortIdx));
2570 PAC97BMREGS pRegs = NULL;
2571
2572 if (pStream) /* Can be NULL, depending on the index (port). */
2573 pRegs = &pStream->Regs;
2574
2575 switch (cbVal)
2576 {
2577 case 1:
2578 {
2579 switch (uPortIdx)
2580 {
2581 /*
2582 * Last Valid Index.
2583 */
2584 case PI_LVI:
2585 case PO_LVI:
2586 case MC_LVI:
2587 {
2588 if ( (pRegs->cr & AC97_CR_RPBM)
2589 && (pRegs->sr & AC97_SR_DCH))
2590 {
2591 pRegs->sr &= ~(AC97_SR_DCH | AC97_SR_CELV);
2592 pRegs->civ = pRegs->piv;
2593 pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2594
2595 ichac97StreamFetchBDLE(pThis, pStream);
2596 }
2597 pRegs->lvi = u32Val % AC97_MAX_BDLE;
2598 Log3Func(("[SD%RU8] LVI <- %#x\n", pStream->u8SD, u32Val));
2599 break;
2600 }
2601
2602 /*
2603 * Control Registers.
2604 */
2605 case PI_CR:
2606 case PO_CR:
2607 case MC_CR:
2608 {
2609 Log3Func(("[SD%RU8] CR <- %#x (cr %#x)\n", pStream->u8SD, u32Val, pRegs->cr));
2610
2611 if (u32Val & AC97_CR_RR) /* Busmaster reset. */
2612 {
2613 Log3Func(("[SD%RU8] Reset\n", pStream->u8SD));
2614
2615 /* Make sure that Run/Pause Bus Master bit (RPBM) is cleared (0). */
2616 Assert((pRegs->cr & AC97_CR_RPBM) == 0);
2617
2618 ichac97StreamEnable(pThis, pStream, false /* Disable */);
2619 ichac97StreamReset(pThis, pStream);
2620
2621 ichac97StreamUpdateSR(pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */
2622 }
2623 else
2624 {
2625 pRegs->cr = u32Val & AC97_CR_VALID_MASK;
2626
2627 if (!(pRegs->cr & AC97_CR_RPBM))
2628 {
2629 Log3Func(("[SD%RU8] Disable\n", pStream->u8SD));
2630
2631 ichac97StreamEnable(pThis, pStream, false /* fEnable */);
2632
2633 pRegs->sr |= AC97_SR_DCH;
2634 }
2635 else
2636 {
2637 Log3Func(("[SD%RU8] Enable\n", pStream->u8SD));
2638
2639 pRegs->civ = pRegs->piv;
2640 pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2641
2642 pRegs->sr &= ~AC97_SR_DCH;
2643
2644 /* Fetch the initial BDLE descriptor. */
2645 ichac97StreamFetchBDLE(pThis, pStream);
2646
2647 ichac97StreamEnable(pThis, pStream, true /* fEnable */);
2648 }
2649 }
2650 break;
2651 }
2652
2653 /*
2654 * Status Registers.
2655 */
2656 case PI_SR:
2657 case PO_SR:
2658 case MC_SR:
2659 {
2660 pRegs->sr |= u32Val & ~(AC97_SR_RO_MASK | AC97_SR_WCLEAR_MASK);
2661 ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
2662 Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8SD, u32Val, pRegs->sr));
2663 break;
2664 }
2665
2666 default:
2667 LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2668 break;
2669 }
2670 break;
2671 }
2672
2673 case 2:
2674 {
2675 switch (uPortIdx)
2676 {
2677 case PI_SR:
2678 case PO_SR:
2679 case MC_SR:
2680 /* Status Register */
2681 pRegs->sr |= u32Val & ~(AC97_SR_RO_MASK | AC97_SR_WCLEAR_MASK);
2682 ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
2683 Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8SD, u32Val, pRegs->sr));
2684 break;
2685 default:
2686 LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2687 break;
2688 }
2689 break;
2690 }
2691
2692 case 4:
2693 {
2694 switch (uPortIdx)
2695 {
2696 case PI_BDBAR:
2697 case PO_BDBAR:
2698 case MC_BDBAR:
2699 /* Buffer Descriptor list Base Address Register */
2700 pRegs->bdbar = u32Val & ~3;
2701 Log3Func(("[SD%RU8] BDBAR <- %#x (bdbar %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->bdbar));
2702 break;
2703 case AC97_GLOB_CNT:
2704 /* Global Control */
2705 if (u32Val & AC97_GC_WR)
2706 ichac97WarmReset(pThis);
2707 if (u32Val & AC97_GC_CR)
2708 ichac97ColdReset(pThis);
2709 if (!(u32Val & (AC97_GC_WR | AC97_GC_CR)))
2710 pThis->glob_cnt = u32Val & AC97_GC_VALID_MASK;
2711 Log3Func(("glob_cnt <- %#x (glob_cnt %#x)\n", u32Val, pThis->glob_cnt));
2712 break;
2713 case AC97_GLOB_STA:
2714 /* Global Status */
2715 pThis->glob_sta &= ~(u32Val & AC97_GS_WCLEAR_MASK);
2716 pThis->glob_sta |= (u32Val & ~(AC97_GS_WCLEAR_MASK | AC97_GS_RO_MASK)) & AC97_GS_VALID_MASK;
2717 Log3Func(("glob_sta <- %#x (glob_sta %#x)\n", u32Val, pThis->glob_sta));
2718 break;
2719 default:
2720 LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2721 break;
2722 }
2723 break;
2724 }
2725
2726 default:
2727 LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2728 break;
2729 }
2730
2731 return VINF_SUCCESS;
2732}
2733
2734/**
2735 * Port I/O Handler for IN operations.
2736 *
2737 * @returns VINF_SUCCESS or VINF_EM_*.
2738 * @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
2739 *
2740 * @param pDevIns The device instance.
2741 * @param pvUser User argument.
2742 * @param uPort Port number used for the IN operation.
2743 * @param pu32Val Where to store the result. This is always a 32-bit
2744 * variable regardless of what @a cbVal might say.
2745 * @param cbVal Number of bytes read.
2746 * @remarks Caller enters the device critical section.
2747 */
2748static DECLCALLBACK(int) ichac97IOPortNAMRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32Val, unsigned cbVal)
2749{
2750 RT_NOREF(pDevIns);
2751 PAC97STATE pThis = (PAC97STATE)pvUser;
2752
2753 int rc = VINF_SUCCESS;
2754
2755 uint32_t index = uPort - pThis->IOPortBase[0];
2756
2757 switch (cbVal)
2758 {
2759 case 1:
2760 {
2761 LogRel2(("AC97: Warning: Unimplemented read (%u byte) port=%#x, idx=%RU32\n", cbVal, uPort, index));
2762 pThis->cas = 0;
2763 *pu32Val = UINT32_MAX;
2764 break;
2765 }
2766
2767 case 2:
2768 {
2769 *pu32Val = UINT32_MAX;
2770 pThis->cas = 0;
2771
2772 switch (index)
2773 {
2774 default:
2775 *pu32Val = ichac97MixerGet(pThis, index);
2776 break;
2777 }
2778 break;
2779 }
2780
2781 case 4:
2782 {
2783 LogRel2(("AC97: Warning: Unimplemented read (%u byte) port=%#x, idx=%RU32\n", cbVal, uPort, index));
2784 pThis->cas = 0;
2785 *pu32Val = UINT32_MAX;
2786 break;
2787 }
2788
2789 default:
2790 {
2791 AssertFailed();
2792 rc = VERR_IOM_IOPORT_UNUSED;
2793 }
2794 }
2795
2796 return rc;
2797}
2798
2799/**
2800 * Port I/O Handler for OUT operations.
2801 *
2802 * @returns VINF_SUCCESS or VINF_EM_*.
2803 *
2804 * @param pDevIns The device instance.
2805 * @param pvUser User argument.
2806 * @param uPort Port number used for the OUT operation.
2807 * @param u32Val The value to output.
2808 * @param cbVal The value size in bytes.
2809 * @remarks Caller enters the device critical section.
2810 */
2811static DECLCALLBACK(int) ichac97IOPortNAMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort,
2812 uint32_t u32Val, unsigned cbVal)
2813{
2814 RT_NOREF(pDevIns);
2815 PAC97STATE pThis = (PAC97STATE)pvUser;
2816
2817 uint32_t uPortIdx = uPort - pThis->IOPortBase[0];
2818
2819 switch (cbVal)
2820 {
2821 case 1:
2822 {
2823 LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
2824 pThis->cas = 0;
2825 break;
2826 }
2827
2828 case 2:
2829 {
2830 pThis->cas = 0;
2831 switch (uPortIdx)
2832 {
2833 case AC97_Reset:
2834 ichac97Reset(pThis->CTX_SUFF(pDevIns));
2835 break;
2836 case AC97_Powerdown_Ctrl_Stat:
2837 u32Val &= ~0xf;
2838 u32Val |= ichac97MixerGet(pThis, uPortIdx) & 0xf;
2839 ichac97MixerSet(pThis, uPortIdx, u32Val);
2840 break;
2841 case AC97_Master_Volume_Mute:
2842 if (pThis->uCodecModel == AC97_CODEC_AD1980)
2843 {
2844 if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_LOSEL)
2845 break; /* Register controls surround (rear), do nothing. */
2846 }
2847 ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
2848 break;
2849 case AC97_Headphone_Volume_Mute:
2850 if (pThis->uCodecModel == AC97_CODEC_AD1980)
2851 {
2852 if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
2853 {
2854 /* Register controls PCM (front) outputs. */
2855 ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
2856 }
2857 }
2858 break;
2859 case AC97_PCM_Out_Volume_Mute:
2860 ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_FRONT, u32Val);
2861 break;
2862 case AC97_Line_In_Volume_Mute:
2863 ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
2864 break;
2865 case AC97_Record_Select:
2866 ichac97MixerRecordSelect(pThis, u32Val);
2867 break;
2868 case AC97_Record_Gain_Mute:
2869 /* Newer Ubuntu guests rely on that when controlling gain and muting
2870 * the recording (capturing) levels. */
2871 ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
2872 break;
2873 case AC97_Record_Gain_Mic_Mute:
2874 /* Ditto; see note above. */
2875 ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_MIC_IN, u32Val);
2876 break;
2877 case AC97_Vendor_ID1:
2878 case AC97_Vendor_ID2:
2879 LogFunc(("Attempt to write vendor ID to %#x\n", u32Val));
2880 break;
2881 case AC97_Extended_Audio_ID:
2882 LogFunc(("Attempt to write extended audio ID to %#x\n", u32Val));
2883 break;
2884 case AC97_Extended_Audio_Ctrl_Stat:
2885 if (!(u32Val & AC97_EACS_VRA))
2886 {
2887 ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 48000);
2888 ichac97StreamReOpen(pThis, &pThis->StreamOut);
2889
2890 ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate, 48000);
2891 ichac97StreamReOpen(pThis, &pThis->StreamLineIn);
2892 }
2893 else
2894 LogRel2(("AC97: Variable rate audio (VRA) is not supported\n"));
2895
2896 if (!(u32Val & AC97_EACS_VRM))
2897 {
2898 ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 48000);
2899 ichac97StreamReOpen(pThis, &pThis->StreamMicIn);
2900 }
2901 else
2902 LogRel2(("AC97: Variable rate microphone audio (VRM) is not supported\n"));
2903
2904 LogFunc(("Setting extended audio control to %#x\n", u32Val));
2905 ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, u32Val);
2906 break;
2907 case AC97_PCM_Front_DAC_Rate:
2908 if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
2909 {
2910 ichac97MixerSet(pThis, uPortIdx, u32Val);
2911 LogFunc(("Set front DAC rate to %RU32\n", u32Val));
2912 ichac97StreamReOpen(pThis, &pThis->StreamOut);
2913 }
2914 else
2915 AssertMsgFailed(("Attempt to set front DAC rate to %RU32, but VRA is not set\n", u32Val));
2916 break;
2917 case AC97_MIC_ADC_Rate:
2918 if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRM)
2919 {
2920 ichac97MixerSet(pThis, uPortIdx, u32Val);
2921 LogFunc(("Set MIC ADC rate to %RU32\n", u32Val));
2922 ichac97StreamReOpen(pThis, &pThis->StreamMicIn);
2923 }
2924 else
2925 AssertMsgFailed(("Attempt to set MIC ADC rate to %RU32, but VRM is not set\n", u32Val));
2926 break;
2927 case AC97_PCM_LR_ADC_Rate:
2928 if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
2929 {
2930 ichac97MixerSet(pThis, uPortIdx, u32Val);
2931 LogFunc(("Set front LR ADC rate to %RU32\n", u32Val));
2932 ichac97StreamReOpen(pThis, &pThis->StreamLineIn);
2933 }
2934 else
2935 AssertMsgFailed(("Attempt to set LR ADC rate to %RU32, but VRA is not set\n", u32Val));
2936 break;
2937 default:
2938 LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
2939 ichac97MixerSet(pThis, uPortIdx, u32Val);
2940 break;
2941 }
2942 break;
2943 }
2944
2945 case 4:
2946 {
2947 LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
2948 pThis->cas = 0;
2949 break;
2950 }
2951
2952 default:
2953 AssertMsgFailed(("Unhandled NAMWrite port=%#x, cbVal=%u u32Val=%#x\n", uPort, cbVal, u32Val));
2954 break;
2955 }
2956
2957 return VINF_SUCCESS;
2958}
2959
2960
2961/**
2962 * @callback_method_impl{FNPCIIOREGIONMAP}
2963 */
2964static DECLCALLBACK(int) ichac97IOPortMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
2965 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
2966{
2967 RT_NOREF(cb, enmType);
2968 PAC97STATE pThis = RT_FROM_MEMBER(pPciDev, AC97STATE, PciDev);
2969 RTIOPORT Port = (RTIOPORT)GCPhysAddress;
2970
2971 Assert(enmType == PCI_ADDRESS_SPACE_IO);
2972 Assert(cb >= 0x20);
2973
2974 if (iRegion > 1) /* We support 2 regions max. at the moment. */
2975 return VERR_INVALID_PARAMETER;
2976
2977 int rc;
2978 if (iRegion == 0)
2979 rc = PDMDevHlpIOPortRegister(pDevIns, Port, 256, pThis,
2980 ichac97IOPortNAMWrite, ichac97IOPortNAMRead,
2981 NULL, NULL, "ICHAC97 NAM");
2982 else
2983 rc = PDMDevHlpIOPortRegister(pDevIns, Port, 64, pThis,
2984 ichac97IOPortNABMWrite, ichac97IOPortNABMRead,
2985 NULL, NULL, "ICHAC97 NABM");
2986 if (RT_FAILURE(rc))
2987 return rc;
2988
2989 pThis->IOPortBase[iRegion] = Port;
2990 return VINF_SUCCESS;
2991}
2992
2993#ifdef IN_RING3
2994/**
2995 * Saves (serializes) an AC'97 stream using SSM.
2996 *
2997 * @returns IPRT status code.
2998 * @param pDevIns Device instance.
2999 * @param pSSM Saved state manager (SSM) handle to use.
3000 * @param pStream AC'97 stream to save.
3001 */
3002static int ichac97SaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
3003{
3004 RT_NOREF(pDevIns);
3005 PAC97BMREGS pRegs = &pStream->Regs;
3006
3007 SSMR3PutU32(pSSM, pRegs->bdbar);
3008 SSMR3PutU8( pSSM, pRegs->civ);
3009 SSMR3PutU8( pSSM, pRegs->lvi);
3010 SSMR3PutU16(pSSM, pRegs->sr);
3011 SSMR3PutU16(pSSM, pRegs->picb);
3012 SSMR3PutU8( pSSM, pRegs->piv);
3013 SSMR3PutU8( pSSM, pRegs->cr);
3014 SSMR3PutS32(pSSM, pRegs->bd_valid);
3015 SSMR3PutU32(pSSM, pRegs->bd.addr);
3016 SSMR3PutU32(pSSM, pRegs->bd.ctl_len);
3017
3018 return VINF_SUCCESS;
3019}
3020
3021/**
3022 * @callback_method_impl{FNSSMDEVSAVEEXEC}
3023 */
3024static DECLCALLBACK(int) ichac97SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3025{
3026 PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3027
3028 LogFlowFuncEnter();
3029
3030 SSMR3PutU32(pSSM, pThis->glob_cnt);
3031 SSMR3PutU32(pSSM, pThis->glob_sta);
3032 SSMR3PutU32(pSSM, pThis->cas);
3033
3034 /** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
3035 /* Note: The order the streams are saved here is critical, so don't touch. */
3036 int rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamLineIn);
3037 AssertRC(rc2);
3038 rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamOut);
3039 AssertRC(rc2);
3040 rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamMicIn);
3041 AssertRC(rc2);
3042
3043 SSMR3PutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3044
3045 uint8_t active[AC97SOUNDSOURCE_LAST_INDEX];
3046
3047 active[AC97SOUNDSOURCE_PI_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamLineIn) ? 1 : 0;
3048 active[AC97SOUNDSOURCE_PO_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamOut) ? 1 : 0;
3049 active[AC97SOUNDSOURCE_MC_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamMicIn) ? 1 : 0;
3050
3051 SSMR3PutMem(pSSM, active, sizeof(active));
3052
3053 LogFlowFuncLeaveRC(VINF_SUCCESS);
3054 return VINF_SUCCESS;
3055}
3056
3057/**
3058 * Loads an AC'97 stream from SSM.
3059 *
3060 * @returns IPRT status code.
3061 * @param pDevIns Device instance.
3062 * @param pSSM Saved state manager (SSM) handle to use.
3063 * @param pStream AC'97 stream to load.
3064 */
3065static int ichac97LoadStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
3066{
3067 RT_NOREF(pDevIns);
3068 PAC97BMREGS pRegs = &pStream->Regs;
3069
3070 SSMR3GetU32(pSSM, &pRegs->bdbar);
3071 SSMR3GetU8( pSSM, &pRegs->civ);
3072 SSMR3GetU8( pSSM, &pRegs->lvi);
3073 SSMR3GetU16(pSSM, &pRegs->sr);
3074 SSMR3GetU16(pSSM, &pRegs->picb);
3075 SSMR3GetU8( pSSM, &pRegs->piv);
3076 SSMR3GetU8( pSSM, &pRegs->cr);
3077 SSMR3GetS32(pSSM, &pRegs->bd_valid);
3078 SSMR3GetU32(pSSM, &pRegs->bd.addr);
3079 SSMR3GetU32(pSSM, &pRegs->bd.ctl_len);
3080
3081 return VINF_SUCCESS;
3082}
3083
3084/**
3085 * @callback_method_impl{FNSSMDEVLOADEXEC}
3086 */
3087static DECLCALLBACK(int) ichac97LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3088{
3089 PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3090
3091 LogRel2(("ichac97LoadExec: uVersion=%RU32, uPass=0x%x\n", uVersion, uPass));
3092
3093 AssertMsgReturn (uVersion == AC97_SSM_VERSION, ("%RU32\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
3094 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
3095
3096 SSMR3GetU32(pSSM, &pThis->glob_cnt);
3097 SSMR3GetU32(pSSM, &pThis->glob_sta);
3098 SSMR3GetU32(pSSM, &pThis->cas);
3099
3100 /** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
3101 /* Note: The order the streams are loaded here is critical, so don't touch. */
3102 int rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamLineIn);
3103 AssertRC(rc2);
3104 rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamOut);
3105 AssertRC(rc2);
3106 rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamMicIn);
3107 AssertRC(rc2);
3108
3109 SSMR3GetMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3110
3111 /** @todo r=andy Stream IDs are hardcoded to certain streams. */
3112 uint8_t uaStrmsActive[AC97SOUNDSOURCE_LAST_INDEX];
3113 SSMR3GetMem(pSSM, uaStrmsActive, sizeof(uaStrmsActive));
3114
3115 ichac97MixerRecordSelect(pThis, ichac97MixerGet(pThis, AC97_Record_Select));
3116# define V_(a, b) ichac97MixerSetVolume(pThis, a, b, ichac97MixerGet(pThis, a))
3117 V_(AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER);
3118 V_(AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT);
3119 V_(AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN);
3120 V_(AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN);
3121# undef V_
3122 if (pThis->uCodecModel == AC97_CODEC_AD1980)
3123 if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
3124 ichac97MixerSetVolume(pThis, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER,
3125 ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute));
3126
3127 /** @todo r=andy Stream IDs are hardcoded to certain streams. */
3128 rc2 = ichac97StreamEnable(pThis, &pThis->StreamLineIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PI_INDEX]));
3129 if (RT_SUCCESS(rc2))
3130 rc2 = ichac97StreamEnable(pThis, &pThis->StreamMicIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_MC_INDEX]));
3131 if (RT_SUCCESS(rc2))
3132 rc2 = ichac97StreamEnable(pThis, &pThis->StreamOut, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PO_INDEX]));
3133
3134 pThis->bup_flag = 0;
3135 pThis->last_samp = 0;
3136
3137 return VINF_SUCCESS;
3138}
3139
3140
3141/**
3142 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
3143 */
3144static DECLCALLBACK(void *) ichac97QueryInterface(struct PDMIBASE *pInterface, const char *pszIID)
3145{
3146 PAC97STATE pThis = RT_FROM_MEMBER(pInterface, AC97STATE, IBase);
3147 Assert(&pThis->IBase == pInterface);
3148
3149 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3150 return NULL;
3151}
3152
3153
3154/**
3155 * Powers off the device.
3156 *
3157 * @param pDevIns Device instance to power off.
3158 */
3159static DECLCALLBACK(void) ichac97PowerOff(PPDMDEVINS pDevIns)
3160{
3161 PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3162
3163 LogRel2(("AC97: Powering off ...\n"));
3164
3165 /* Note: Involves mixer stream / sink destruction, so also do this here
3166 * instead of in ichac97Destruct(). */
3167 ichac97StreamsDestroy(pThis);
3168
3169 /**
3170 * Note: Destroy the mixer while powering off and *not* in ichac97Destruct,
3171 * giving the mixer the chance to release any references held to
3172 * PDM audio streams it maintains.
3173 */
3174 if (pThis->pMixer)
3175 {
3176 AudioMixerDestroy(pThis->pMixer);
3177 pThis->pMixer = NULL;
3178 }
3179}
3180
3181
3182/**
3183 * @interface_method_impl{PDMDEVREG,pfnReset}
3184 *
3185 * @remarks The original sources didn't install a reset handler, but it seems to
3186 * make sense to me so we'll do it.
3187 */
3188static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns)
3189{
3190 PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3191
3192 LogFlowFuncEnter();
3193
3194 /*
3195 * Reset the mixer too. The Windows XP driver seems to rely on
3196 * this. At least it wants to read the vendor id before it resets
3197 * the codec manually.
3198 */
3199 ichac97MixerReset(pThis);
3200
3201 /*
3202 * Reset all streams.
3203 */
3204 ichac97StreamEnable(pThis, &pThis->StreamLineIn, false /* Disable */);
3205 ichac97StreamReset(pThis, &pThis->StreamLineIn);
3206
3207 ichac97StreamEnable(pThis, &pThis->StreamMicIn, false /* Disable */);
3208 ichac97StreamReset(pThis, &pThis->StreamMicIn);
3209
3210 ichac97StreamEnable(pThis, &pThis->StreamOut, false /* Disable */);
3211 ichac97StreamReset(pThis, &pThis->StreamOut);
3212
3213 LogRel(("AC97: Reset\n"));
3214}
3215
3216
3217/**
3218 * @interface_method_impl{PDMDEVREG,pfnDestruct}
3219 */
3220static DECLCALLBACK(int) ichac97Destruct(PPDMDEVINS pDevIns)
3221{
3222 PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3223
3224 LogFlowFuncEnter();
3225
3226 PAC97DRIVER pDrv, pDrvNext;
3227 RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
3228 {
3229 RTListNodeRemove(&pDrv->Node);
3230 RTMemFree(pDrv);
3231 }
3232
3233 /* Sanity. */
3234 Assert(RTListIsEmpty(&pThis->lstDrv));
3235
3236 int rc;
3237#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3238 rc = RTCritSectDelete(&pThis->csTimer);
3239#else
3240 rc = VINF_SUCCESS;
3241#endif
3242
3243 LogFlowFuncLeaveRC(rc);
3244 return rc;
3245}
3246
3247
3248/**
3249 * Attach command, internal version.
3250 *
3251 * This is called to let the device attach to a driver for a specified LUN
3252 * during runtime. This is not called during VM construction, the device
3253 * constructor has to attach to all the available drivers.
3254 *
3255 * @returns VBox status code.
3256 * @param pDevIns The device instance.
3257 * @param pDrv Driver to (re-)use for (re-)attaching to.
3258 * If NULL is specified, a new driver will be created and appended
3259 * to the driver list.
3260 * @param uLUN The logical unit which is being detached.
3261 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3262 */
3263static DECLCALLBACK(int) ichac97AttachInternal(PPDMDEVINS pDevIns, PAC97DRIVER pDrv, unsigned uLUN, uint32_t fFlags)
3264{
3265 RT_NOREF(fFlags);
3266 PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3267
3268 /*
3269 * Attach driver.
3270 */
3271 char *pszDesc;
3272 if (RTStrAPrintf(&pszDesc, "Audio driver port (AC'97) for LUN #%u", uLUN) <= 0)
3273 AssertLogRelFailedReturn(VERR_NO_MEMORY);
3274
3275 PPDMIBASE pDrvBase;
3276 int rc = PDMDevHlpDriverAttach(pDevIns, uLUN,
3277 &pThis->IBase, &pDrvBase, pszDesc);
3278 if (RT_SUCCESS(rc))
3279 {
3280 if (pDrv == NULL)
3281 pDrv = (PAC97DRIVER)RTMemAllocZ(sizeof(AC97DRIVER));
3282 if (pDrv)
3283 {
3284 pDrv->pDrvBase = pDrvBase;
3285 pDrv->pConnector = PDMIBASE_QUERY_INTERFACE(pDrvBase, PDMIAUDIOCONNECTOR);
3286 AssertMsg(pDrv->pConnector != NULL, ("Configuration error: LUN #%u has no host audio interface, rc=%Rrc\n", uLUN, rc));
3287 pDrv->pAC97State = pThis;
3288 pDrv->uLUN = uLUN;
3289
3290 /*
3291 * For now we always set the driver at LUN 0 as our primary
3292 * host backend. This might change in the future.
3293 */
3294 if (pDrv->uLUN == 0)
3295 pDrv->fFlags |= PDMAUDIODRVFLAGS_PRIMARY;
3296
3297 LogFunc(("LUN#%RU8: pCon=%p, drvFlags=0x%x\n", uLUN, pDrv->pConnector, pDrv->fFlags));
3298
3299 /* Attach to driver list if not attached yet. */
3300 if (!pDrv->fAttached)
3301 {
3302 RTListAppend(&pThis->lstDrv, &pDrv->Node);
3303 pDrv->fAttached = true;
3304 }
3305 }
3306 else
3307 rc = VERR_NO_MEMORY;
3308 }
3309 else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3310 LogFunc(("No attached driver for LUN #%u\n", uLUN));
3311
3312 if (RT_FAILURE(rc))
3313 {
3314 /* Only free this string on failure;
3315 * must remain valid for the live of the driver instance. */
3316 RTStrFree(pszDesc);
3317 }
3318
3319 LogFunc(("iLUN=%u, fFlags=0x%x, rc=%Rrc\n", uLUN, fFlags, rc));
3320 return rc;
3321}
3322
3323
3324/**
3325 * Attach command.
3326 *
3327 * This is called to let the device attach to a driver for a specified LUN
3328 * during runtime. This is not called during VM construction, the device
3329 * constructor has to attach to all the available drivers.
3330 *
3331 * @returns VBox status code.
3332 * @param pDevIns The device instance.
3333 * @param uLUN The logical unit which is being detached.
3334 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3335 */
3336static DECLCALLBACK(int) ichac97Attach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
3337{
3338 return ichac97AttachInternal(pDevIns, NULL /* pDrv */, uLUN, fFlags);
3339}
3340
3341static DECLCALLBACK(void) ichac97Detach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
3342{
3343 RT_NOREF(pDevIns, uLUN, fFlags);
3344 LogFunc(("iLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
3345}
3346
3347/**
3348 * Re-attach.
3349 *
3350 * @returns VBox status code.
3351 * @param pThis Device instance.
3352 * @param pDrv Driver instance used for attaching to.
3353 * If NULL is specified, a new driver will be created and appended
3354 * to the driver list.
3355 * @param uLUN The logical unit which is being re-detached.
3356 * @param pszDriver Driver name.
3357 */
3358static int ichac97Reattach(PAC97STATE pThis, PAC97DRIVER pDrv, uint8_t uLUN, const char *pszDriver)
3359{
3360 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3361 AssertPtrReturn(pszDriver, VERR_INVALID_POINTER);
3362
3363 PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
3364 PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
3365 PCFGMNODE pDev0 = CFGMR3GetChild(pRoot, "Devices/ichac97/0/");
3366
3367 /* Remove LUN branch. */
3368 CFGMR3RemoveNode(CFGMR3GetChildF(pDev0, "LUN#%u/", uLUN));
3369
3370 if (pDrv)
3371 {
3372 /* Re-use a driver instance => detach the driver before. */
3373 int rc = PDMDevHlpDriverDetach(pThis->pDevInsR3, PDMIBASE_2_PDMDRV(pDrv->pDrvBase), 0 /* fFlags */);
3374 if (RT_FAILURE(rc))
3375 return rc;
3376 }
3377
3378#define RC_CHECK() if (RT_FAILURE(rc)) { AssertReleaseRC(rc); break; }
3379
3380 int rc;
3381 do
3382 {
3383 PCFGMNODE pLunL0;
3384 rc = CFGMR3InsertNodeF(pDev0, &pLunL0, "LUN#%u/", uLUN); RC_CHECK();
3385 rc = CFGMR3InsertString(pLunL0, "Driver", "AUDIO"); RC_CHECK();
3386 rc = CFGMR3InsertNode(pLunL0, "Config/", NULL); RC_CHECK();
3387
3388 PCFGMNODE pLunL1, pLunL2;
3389 rc = CFGMR3InsertNode (pLunL0, "AttachedDriver/", &pLunL1); RC_CHECK();
3390 rc = CFGMR3InsertNode (pLunL1, "Config/", &pLunL2); RC_CHECK();
3391 rc = CFGMR3InsertString(pLunL1, "Driver", pszDriver); RC_CHECK();
3392
3393 rc = CFGMR3InsertString(pLunL2, "AudioDriver", pszDriver); RC_CHECK();
3394
3395 } while (0);
3396
3397 if (RT_SUCCESS(rc))
3398 rc = ichac97AttachInternal(pThis->pDevInsR3, pDrv, uLUN, 0 /* fFlags */);
3399
3400 LogFunc(("pThis=%p, uLUN=%u, pszDriver=%s, rc=%Rrc\n", pThis, uLUN, pszDriver, rc));
3401
3402#undef RC_CHECK
3403
3404 return rc;
3405}
3406
3407/**
3408 * @interface_method_impl{PDMDEVREG,pfnConstruct}
3409 */
3410static DECLCALLBACK(int) ichac97Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3411{
3412 RT_NOREF(iInstance);
3413 PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3414
3415 /* NB: This must be done *before* any possible failure (and running the destructor). */
3416 RTListInit(&pThis->lstDrv);
3417
3418 Assert(iInstance == 0);
3419 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3420
3421 /*
3422 * Validations.
3423 */
3424 if (!CFGMR3AreValuesValid(pCfg,
3425 "Codec\0"
3426 "TimerHz\0"))
3427 return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3428 N_("Invalid configuration for the AC'97 device"));
3429
3430 /*
3431 * Read config data.
3432 */
3433 char szCodec[20];
3434 int rc = CFGMR3QueryStringDef(pCfg, "Codec", &szCodec[0], sizeof(szCodec), "STAC9700");
3435 if (RT_FAILURE(rc))
3436 return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3437 N_("AC'97 configuration error: Querying \"Codec\" as string failed"));
3438
3439#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3440 uint16_t uTimerHz;
3441 rc = CFGMR3QueryU16Def(pCfg, "TimerHz", &uTimerHz, AC97_TIMER_HZ /* Default value, if not set. */);
3442 if (RT_FAILURE(rc))
3443 return PDMDEV_SET_ERROR(pDevIns, rc,
3444 N_("AC'97 configuration error: failed to read Hertz (Hz) rate as unsigned integer"));
3445#endif
3446
3447 /*
3448 * The AD1980 codec (with corresponding PCI subsystem vendor ID) is whitelisted
3449 * in the Linux kernel; Linux makes no attempt to measure the data rate and assumes
3450 * 48 kHz rate, which is exactly what we need. Same goes for AD1981B.
3451 */
3452 if (!strcmp(szCodec, "STAC9700"))
3453 pThis->uCodecModel = AC97_CODEC_STAC9700;
3454 else if (!strcmp(szCodec, "AD1980"))
3455 pThis->uCodecModel = AC97_CODEC_AD1980;
3456 else if (!strcmp(szCodec, "AD1981B"))
3457 pThis->uCodecModel = AC97_CODEC_AD1981B;
3458 else
3459 {
3460 return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS,
3461 N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"),
3462 szCodec);
3463 }
3464
3465 /*
3466 * Initialize data (most of it anyway).
3467 */
3468 pThis->pDevInsR3 = pDevIns;
3469 /* IBase */
3470 pThis->IBase.pfnQueryInterface = ichac97QueryInterface;
3471
3472 /* PCI Device (the assertions will be removed later) */
3473 PCIDevSetVendorId (&pThis->PciDev, 0x8086); /* 00 ro - intel. */ Assert(pThis->PciDev.abConfig[0x00] == 0x86); Assert(pThis->PciDev.abConfig[0x01] == 0x80);
3474 PCIDevSetDeviceId (&pThis->PciDev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */ Assert(pThis->PciDev.abConfig[0x02] == 0x15); Assert(pThis->PciDev.abConfig[0x03] == 0x24);
3475 PCIDevSetCommand (&pThis->PciDev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert(pThis->PciDev.abConfig[0x04] == 0x00); Assert(pThis->PciDev.abConfig[0x05] == 0x00);
3476 PCIDevSetStatus (&pThis->PciDev, VBOX_PCI_STATUS_DEVSEL_MEDIUM | VBOX_PCI_STATUS_FAST_BACK); /* 06 rwc?,ro? - pcists. */ Assert(pThis->PciDev.abConfig[0x06] == 0x80); Assert(pThis->PciDev.abConfig[0x07] == 0x02);
3477 PCIDevSetRevisionId (&pThis->PciDev, 0x01); /* 08 ro - rid. */ Assert(pThis->PciDev.abConfig[0x08] == 0x01);
3478 PCIDevSetClassProg (&pThis->PciDev, 0x00); /* 09 ro - pi. */ Assert(pThis->PciDev.abConfig[0x09] == 0x00);
3479 PCIDevSetClassSub (&pThis->PciDev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert(pThis->PciDev.abConfig[0x0a] == 0x01);
3480 PCIDevSetClassBase (&pThis->PciDev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ Assert(pThis->PciDev.abConfig[0x0b] == 0x04);
3481 PCIDevSetHeaderType (&pThis->PciDev, 0x00); /* 0e ro - headtyp. */ Assert(pThis->PciDev.abConfig[0x0e] == 0x00);
3482 PCIDevSetBaseAddress (&pThis->PciDev, 0, /* 10 rw - nambar - native audio mixer base. */
3483 true /* fIoSpace */, false /* fPrefetchable */, false /* f64Bit */, 0x00000000); Assert(pThis->PciDev.abConfig[0x10] == 0x01); Assert(pThis->PciDev.abConfig[0x11] == 0x00); Assert(pThis->PciDev.abConfig[0x12] == 0x00); Assert(pThis->PciDev.abConfig[0x13] == 0x00);
3484 PCIDevSetBaseAddress (&pThis->PciDev, 1, /* 14 rw - nabmbar - native audio bus mastering. */
3485 true /* fIoSpace */, false /* fPrefetchable */, false /* f64Bit */, 0x00000000); Assert(pThis->PciDev.abConfig[0x14] == 0x01); Assert(pThis->PciDev.abConfig[0x15] == 0x00); Assert(pThis->PciDev.abConfig[0x16] == 0x00); Assert(pThis->PciDev.abConfig[0x17] == 0x00);
3486 PCIDevSetInterruptLine (&pThis->PciDev, 0x00); /* 3c rw. */ Assert(pThis->PciDev.abConfig[0x3c] == 0x00);
3487 PCIDevSetInterruptPin (&pThis->PciDev, 0x01); /* 3d ro - INTA#. */ Assert(pThis->PciDev.abConfig[0x3d] == 0x01);
3488
3489 if (pThis->uCodecModel == AC97_CODEC_AD1980)
3490 {
3491 PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
3492 PCIDevSetSubSystemId (&pThis->PciDev, 0x0177); /* 2e ro. */
3493 }
3494 else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
3495 {
3496 PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
3497 PCIDevSetSubSystemId (&pThis->PciDev, 0x01ad); /* 2e ro. */
3498 }
3499 else
3500 {
3501 PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x8086); /* 2c ro - Intel.) */
3502 PCIDevSetSubSystemId (&pThis->PciDev, 0x0000); /* 2e ro. */
3503 }
3504
3505 /*
3506 * Register the PCI device, it's I/O regions, the timer and the
3507 * saved state item.
3508 */
3509 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
3510 if (RT_FAILURE(rc))
3511 return rc;
3512
3513 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 256, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
3514 if (RT_FAILURE(rc))
3515 return rc;
3516
3517 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 64, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
3518 if (RT_FAILURE(rc))
3519 return rc;
3520
3521 rc = PDMDevHlpSSMRegister(pDevIns, AC97_SSM_VERSION, sizeof(*pThis), ichac97SaveExec, ichac97LoadExec);
3522 if (RT_FAILURE(rc))
3523 return rc;
3524
3525#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
3526 LogRel(("AC97: Asynchronous I/O enabled\n"));
3527#endif
3528
3529 /*
3530 * Attach driver.
3531 */
3532 uint8_t uLUN;
3533 for (uLUN = 0; uLUN < UINT8_MAX; ++uLUN)
3534 {
3535 LogFunc(("Trying to attach driver for LUN #%RU8 ...\n", uLUN));
3536 rc = ichac97AttachInternal(pDevIns, NULL /* pDrv */, uLUN, 0 /* fFlags */);
3537 if (RT_FAILURE(rc))
3538 {
3539 if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3540 rc = VINF_SUCCESS;
3541 else if (rc == VERR_AUDIO_BACKEND_INIT_FAILED)
3542 {
3543 ichac97Reattach(pThis, NULL /* pDrv */, uLUN, "NullAudio");
3544 PDMDevHlpVMSetRuntimeError(pDevIns, 0 /*fFlags*/, "HostAudioNotResponding",
3545 N_("Host audio backend initialization has failed. Selecting the NULL audio backend "
3546 "with the consequence that no sound is audible"));
3547 /* Attaching to the NULL audio backend will never fail. */
3548 rc = VINF_SUCCESS;
3549 }
3550 break;
3551 }
3552 }
3553
3554 LogFunc(("cLUNs=%RU8, rc=%Rrc\n", uLUN, rc));
3555
3556 if (RT_SUCCESS(rc))
3557 {
3558 rc = AudioMixerCreate("AC'97 Mixer", 0 /* uFlags */, &pThis->pMixer);
3559 if (RT_SUCCESS(rc))
3560 {
3561 rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Line In", AUDMIXSINKDIR_INPUT, &pThis->pSinkLineIn);
3562 AssertRC(rc);
3563 rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Microphone In", AUDMIXSINKDIR_INPUT, &pThis->pSinkMicIn);
3564 AssertRC(rc);
3565 rc = AudioMixerCreateSink(pThis->pMixer, "[Playback] PCM Output", AUDMIXSINKDIR_OUTPUT, &pThis->pSinkOut);
3566 AssertRC(rc);
3567 }
3568 }
3569
3570 if (RT_SUCCESS(rc))
3571 {
3572 /*
3573 * Create all hardware streams.
3574 */
3575 rc = ichac97StreamCreate(pThis, &pThis->StreamLineIn, AC97SOUNDSOURCE_PI_INDEX);
3576 if (RT_SUCCESS(rc))
3577 {
3578 rc = ichac97StreamCreate(pThis, &pThis->StreamMicIn, AC97SOUNDSOURCE_MC_INDEX);
3579 if (RT_SUCCESS(rc))
3580 rc = ichac97StreamCreate(pThis, &pThis->StreamOut, AC97SOUNDSOURCE_PO_INDEX);
3581 }
3582
3583#ifdef VBOX_WITH_AUDIO_AC97_ONETIME_INIT
3584 PAC97DRIVER pDrv;
3585 RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
3586 {
3587 /*
3588 * Only primary drivers are critical for the VM to run. Everything else
3589 * might not worth showing an own error message box in the GUI.
3590 */
3591 if (!(pDrv->fFlags & PDMAUDIODRVFLAGS_PRIMARY))
3592 continue;
3593
3594 PPDMIAUDIOCONNECTOR pCon = pDrv->pConnector;
3595 AssertPtr(pCon);
3596
3597 bool fValidLineIn = AudioMixerStreamIsValid(pDrv->LineIn.pMixStrm);
3598 bool fValidMicIn = AudioMixerStreamIsValid(pDrv->MicIn.pMixStrm);
3599 bool fValidOut = AudioMixerStreamIsValid(pDrv->Out.pMixStrm);
3600
3601 if ( !fValidLineIn
3602 && !fValidMicIn
3603 && !fValidOut)
3604 {
3605 LogRel(("AC97: Falling back to NULL backend (no sound audible)\n"));
3606
3607 ichac97Reset(pDevIns);
3608 ichac97Reattach(pThis, pDrv, pDrv->uLUN, "NullAudio");
3609
3610 PDMDevHlpVMSetRuntimeError(pDevIns, 0 /*fFlags*/, "HostAudioNotResponding",
3611 N_("No audio devices could be opened. Selecting the NULL audio backend "
3612 "with the consequence that no sound is audible"));
3613 }
3614 else
3615 {
3616 bool fWarn = false;
3617
3618 PDMAUDIOBACKENDCFG backendCfg;
3619 int rc2 = pCon->pfnGetConfig(pCon, &backendCfg);
3620 if (RT_SUCCESS(rc2))
3621 {
3622 if (backendCfg.cMaxStreamsIn)
3623 {
3624 /* If the audio backend supports two or more input streams at once,
3625 * warn if one of our two inputs (microphone-in and line-in) failed to initialize. */
3626 if (backendCfg.cMaxStreamsIn >= 2)
3627 fWarn = !fValidLineIn || !fValidMicIn;
3628 /* If the audio backend only supports one input stream at once (e.g. pure ALSA, and
3629 * *not* ALSA via PulseAudio plugin!), only warn if both of our inputs failed to initialize.
3630 * One of the two simply is not in use then. */
3631 else if (backendCfg.cMaxStreamsIn == 1)
3632 fWarn = !fValidLineIn && !fValidMicIn;
3633 /* Don't warn if our backend is not able of supporting any input streams at all. */
3634 }
3635
3636 if ( !fWarn
3637 && backendCfg.cMaxStreamsOut)
3638 {
3639 fWarn = !fValidOut;
3640 }
3641 }
3642 else
3643 {
3644 LogRel(("AC97: Unable to retrieve audio backend configuration for LUN #%RU8, rc=%Rrc\n", pDrv->uLUN, rc2));
3645 fWarn = true;
3646 }
3647
3648 if (fWarn)
3649 {
3650 char szMissingStreams[255] = "";
3651 size_t len = 0;
3652 if (!fValidLineIn)
3653 {
3654 LogRel(("AC97: WARNING: Unable to open PCM line input for LUN #%RU8!\n", pDrv->uLUN));
3655 len = RTStrPrintf(szMissingStreams, sizeof(szMissingStreams), "PCM Input");
3656 }
3657 if (!fValidMicIn)
3658 {
3659 LogRel(("AC97: WARNING: Unable to open PCM microphone input for LUN #%RU8!\n", pDrv->uLUN));
3660 len += RTStrPrintf(szMissingStreams + len,
3661 sizeof(szMissingStreams) - len, len ? ", PCM Microphone" : "PCM Microphone");
3662 }
3663 if (!fValidOut)
3664 {
3665 LogRel(("AC97: WARNING: Unable to open PCM output for LUN #%RU8!\n", pDrv->uLUN));
3666 len += RTStrPrintf(szMissingStreams + len,
3667 sizeof(szMissingStreams) - len, len ? ", PCM Output" : "PCM Output");
3668 }
3669
3670 PDMDevHlpVMSetRuntimeError(pDevIns, 0 /*fFlags*/, "HostAudioNotResponding",
3671 N_("Some AC'97 audio streams (%s) could not be opened. Guest applications generating audio "
3672 "output or depending on audio input may hang. Make sure your host audio device "
3673 "is working properly. Check the logfile for error messages of the audio "
3674 "subsystem"), szMissingStreams);
3675 }
3676 }
3677 }
3678#endif /* VBOX_WITH_AUDIO_AC97_ONETIME_INIT */
3679 }
3680
3681 if (RT_SUCCESS(rc))
3682 ichac97Reset(pDevIns);
3683
3684#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3685 if (RT_SUCCESS(rc))
3686 {
3687 rc = RTCritSectInit(&pThis->csTimer);
3688 if (RT_SUCCESS(rc))
3689 {
3690 /* Create the emulation timer. */
3691 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, ichac97Timer, pThis,
3692 TMTIMER_FLAGS_NO_CRIT_SECT, "DevIchAc97", &pThis->pTimer);
3693 AssertRCReturn(rc, rc);
3694
3695 if (RT_SUCCESS(rc))
3696 {
3697 pThis->cTimerTicks = TMTimerGetFreq(pThis->pTimer) / uTimerHz;
3698 pThis->uTimerTS = TMTimerGet(pThis->pTimer);
3699 LogFunc(("Timer ticks=%RU64 (%RU16 Hz)\n", pThis->cTimerTicks, uTimerHz));
3700 }
3701 }
3702 }
3703#else /* !VBOX_WITH_AUDIO_AC97_CALLBACKS */
3704 if (RT_SUCCESS(rc))
3705 {
3706 PAC97DRIVER pDrv;
3707 RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
3708 {
3709 /* Only register primary driver.
3710 * The device emulation does the output multiplexing then. */
3711 if (!(pDrv->fFlags & PDMAUDIODRVFLAGS_PRIMARY))
3712 continue;
3713
3714 PDMAUDIOCALLBACK AudioCallbacks[2];
3715
3716 AC97CALLBACKCTX Ctx = { pThis, pDrv };
3717
3718 AudioCallbacks[0].enmType = PDMAUDIOCALLBACKTYPE_INPUT;
3719 AudioCallbacks[0].pfnCallback = ac97CallbackInput;
3720 AudioCallbacks[0].pvCtx = &Ctx;
3721 AudioCallbacks[0].cbCtx = sizeof(AC97CALLBACKCTX);
3722
3723 AudioCallbacks[1].enmType = PDMAUDIOCALLBACKTYPE_OUTPUT;
3724 AudioCallbacks[1].pfnCallback = ac97CallbackOutput;
3725 AudioCallbacks[1].pvCtx = &Ctx;
3726 AudioCallbacks[1].cbCtx = sizeof(AC97CALLBACKCTX);
3727
3728 rc = pDrv->pConnector->pfnRegisterCallbacks(pDrv->pConnector, AudioCallbacks, RT_ELEMENTS(AudioCallbacks));
3729 if (RT_FAILURE(rc))
3730 break;
3731 }
3732 }
3733#endif /* VBOX_WITH_AUDIO_AC97_CALLBACKS */
3734
3735#ifdef VBOX_WITH_STATISTICS
3736 if (RT_SUCCESS(rc))
3737 {
3738 /*
3739 * Register statistics.
3740 */
3741 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, "/Devices/AC97/Timer", STAMUNIT_TICKS_PER_CALL, "Profiling ichac97Timer.");
3742 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatIn, STAMTYPE_PROFILE, "/Devices/AC97/Input", STAMUNIT_TICKS_PER_CALL, "Profiling input.");
3743 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatOut, STAMTYPE_PROFILE, "/Devices/AC97/Output", STAMUNIT_TICKS_PER_CALL, "Profiling output.");
3744 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, "/Devices/AC97/BytesRead" , STAMUNIT_BYTES, "Bytes read from AC97 emulation.");
3745 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, "/Devices/AC97/BytesWritten", STAMUNIT_BYTES, "Bytes written to AC97 emulation.");
3746 }
3747#endif
3748
3749#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
3750 RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMARead.pcm");
3751 RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMAWrite.pcm");
3752 RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamRead.pcm");
3753 RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamWrite.pcm");
3754#endif
3755
3756 LogFlowFuncLeaveRC(rc);
3757 return rc;
3758}
3759
3760/**
3761 * The device registration structure.
3762 */
3763const PDMDEVREG g_DeviceICHAC97 =
3764{
3765 /* u32Version */
3766 PDM_DEVREG_VERSION,
3767 /* szName */
3768 "ichac97",
3769 /* szRCMod */
3770 "",
3771 /* szR0Mod */
3772 "",
3773 /* pszDescription */
3774 "ICH AC'97 Audio Controller",
3775 /* fFlags */
3776 PDM_DEVREG_FLAGS_DEFAULT_BITS,
3777 /* fClass */
3778 PDM_DEVREG_CLASS_AUDIO,
3779 /* cMaxInstances */
3780 1,
3781 /* cbInstance */
3782 sizeof(AC97STATE),
3783 /* pfnConstruct */
3784 ichac97Construct,
3785 /* pfnDestruct */
3786 ichac97Destruct,
3787 /* pfnRelocate */
3788 NULL,
3789 /* pfnMemSetup */
3790 NULL,
3791 /* pfnPowerOn */
3792 NULL,
3793 /* pfnReset */
3794 ichac97Reset,
3795 /* pfnSuspend */
3796 NULL,
3797 /* pfnResume */
3798 NULL,
3799 /* pfnAttach */
3800 ichac97Attach,
3801 /* pfnDetach */
3802 ichac97Detach,
3803 /* pfnQueryInterface. */
3804 NULL,
3805 /* pfnInitComplete */
3806 NULL,
3807 /* pfnPowerOff */
3808 ichac97PowerOff,
3809 /* pfnSoftReset */
3810 NULL,
3811 /* u32VersionEnd */
3812 PDM_DEVREG_VERSION
3813};
3814
3815#endif /* !IN_RING3 */
3816#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
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