DevIchAc97.cpp@ 88466

Last change on this file since 88466 was 88357, checked in by vboxsync, 4 years ago
Audio: Moved PDMAUDIOFILE and associated stuff out of pdmaudioifs.h and into AudioHlp.h, renaming the typedefs & defines. bugref:9890
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1	/* $Id: DevIchAc97.cpp 88357 2021-04-04 22:58:35Z vboxsync $ */
2	/** @file
3	* DevIchAc97 - VBox ICH AC97 Audio Controller.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_AC97
23	#include <VBox/log.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <VBox/vmm/pdmaudioifs.h>
26	#include <VBox/vmm/pdmaudioinline.h>
27
28	#include <iprt/assert.h>
29	#ifdef IN_RING3
30	# ifdef DEBUG
31	# include <iprt/file.h>
32	# endif
33	# include <iprt/mem.h>
34	# include <iprt/semaphore.h>
35	# include <iprt/string.h>
36	# include <iprt/uuid.h>
37	#endif
38
39	#include "VBoxDD.h"
40
41	#include "AudioMixBuffer.h"
42	#include "AudioMixer.h"
43	#include "AudioHlp.h"
44
45
46	/*********************************************************************************************************************************
47	* Defined Constants And Macros *
48	*********************************************************************************************************************************/
49
50	/** Current saved state version. */
51	#define AC97_SAVED_STATE_VERSION 1
52
53	/** Default timer frequency (in Hz). */
54	#define AC97_TIMER_HZ_DEFAULT 100
55
56	/** Maximum number of streams we support. */
57	#define AC97_MAX_STREAMS 3
58
59	/** Maximum FIFO size (in bytes). */
60	#define AC97_FIFO_MAX 256
61
62	#define AC97_SR_FIFOE RT_BIT(4) /*< rwc, FIFO error. /
63	#define AC97_SR_BCIS RT_BIT(3) /*< rwc, Buffer completion interrupt status. /
64	#define AC97_SR_LVBCI RT_BIT(2) /*< rwc, Last valid buffer completion interrupt. /
65	#define AC97_SR_CELV RT_BIT(1) /*< ro, Current equals last valid. /
66	#define AC97_SR_DCH RT_BIT(0) /*< ro, Controller halted. /
67	#define AC97_SR_VALID_MASK (RT_BIT(5) - 1)
68	#define AC97_SR_WCLEAR_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
69	#define AC97_SR_RO_MASK (AC97_SR_DCH \| AC97_SR_CELV)
70	#define AC97_SR_INT_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
71
72	#define AC97_CR_IOCE RT_BIT(4) /*< rw, Interrupt On Completion Enable. /
73	#define AC97_CR_FEIE RT_BIT(3) /*< rw FIFO Error Interrupt Enable. /
74	#define AC97_CR_LVBIE RT_BIT(2) /*< rw Last Valid Buffer Interrupt Enable. /
75	#define AC97_CR_RR RT_BIT(1) /*< rw Reset Registers. /
76	#define AC97_CR_RPBM RT_BIT(0) /*< rw Run/Pause Bus Master. /
77	#define AC97_CR_VALID_MASK (RT_BIT(5) - 1)
78	#define AC97_CR_DONT_CLEAR_MASK (AC97_CR_IOCE \| AC97_CR_FEIE \| AC97_CR_LVBIE)
79
80	#define AC97_GC_WR 4 /*< rw Warm reset. /
81	#define AC97_GC_CR 2 /*< rw Cold reset. /
82	#define AC97_GC_VALID_MASK (RT_BIT(6) - 1)
83
84	#define AC97_GS_MD3 RT_BIT(17) /*< rw /
85	#define AC97_GS_AD3 RT_BIT(16) /*< rw /
86	#define AC97_GS_RCS RT_BIT(15) /*< rwc /
87	#define AC97_GS_B3S12 RT_BIT(14) /*< ro /
88	#define AC97_GS_B2S12 RT_BIT(13) /*< ro /
89	#define AC97_GS_B1S12 RT_BIT(12) /*< ro /
90	#define AC97_GS_S1R1 RT_BIT(11) /*< rwc /
91	#define AC97_GS_S0R1 RT_BIT(10) /*< rwc /
92	#define AC97_GS_S1CR RT_BIT(9) /*< ro /
93	#define AC97_GS_S0CR RT_BIT(8) /*< ro /
94	#define AC97_GS_MINT RT_BIT(7) /*< ro /
95	#define AC97_GS_POINT RT_BIT(6) /*< ro /
96	#define AC97_GS_PIINT RT_BIT(5) /*< ro /
97	#define AC97_GS_RSRVD (RT_BIT(4) \| RT_BIT(3))
98	#define AC97_GS_MOINT RT_BIT(2) /*< ro /
99	#define AC97_GS_MIINT RT_BIT(1) /*< ro /
100	#define AC97_GS_GSCI RT_BIT(0) /*< rwc /
101	#define AC97_GS_RO_MASK ( AC97_GS_B3S12 \
102	\| AC97_GS_B2S12 \
103	\| AC97_GS_B1S12 \
104	\| AC97_GS_S1CR \
105	\| AC97_GS_S0CR \
106	\| AC97_GS_MINT \
107	\| AC97_GS_POINT \
108	\| AC97_GS_PIINT \
109	\| AC97_GS_RSRVD \
110	\| AC97_GS_MOINT \
111	\| AC97_GS_MIINT)
112	#define AC97_GS_VALID_MASK (RT_BIT(18) - 1)
113	#define AC97_GS_WCLEAR_MASK (AC97_GS_RCS \| AC97_GS_S1R1 \| AC97_GS_S0R1 \| AC97_GS_GSCI)
114
115	/** @name Buffer Descriptor (BD).
116	* @{ */
117	#define AC97_BD_IOC RT_BIT(31) /*< Interrupt on Completion. /
118	#define AC97_BD_BUP RT_BIT(30) /*< Buffer Underrun Policy. /
119
120	#define AC97_BD_LEN_MASK 0xFFFF /*< Mask for the BDL buffer length. /
121
122	#define AC97_MAX_BDLE 32 /*< Maximum number of BDLEs. /
123	/** @} */
124
125	/** @name Extended Audio ID Register (EAID).
126	* @{ */
127	#define AC97_EAID_VRA RT_BIT(0) /*< Variable Rate Audio. /
128	#define AC97_EAID_VRM RT_BIT(3) /*< Variable Rate Mic Audio. /
129	#define AC97_EAID_REV0 RT_BIT(10) /*< AC'97 revision compliance. /
130	#define AC97_EAID_REV1 RT_BIT(11) /*< AC'97 revision compliance. /
131	/** @} */
132
133	/** @name Extended Audio Control and Status Register (EACS).
134	* @{ */
135	#define AC97_EACS_VRA RT_BIT(0) /*< Variable Rate Audio (4.2.1.1). /
136	#define AC97_EACS_VRM RT_BIT(3) /*< Variable Rate Mic Audio (4.2.1.1). /
137	/** @} */
138
139	/** @name Baseline Audio Register Set (BARS).
140	* @{ */
141	#define AC97_BARS_VOL_MASK 0x1f /*< Volume mask for the Baseline Audio Register Set (5.7.2). /
142	#define AC97_BARS_GAIN_MASK 0x0f /*< Gain mask for the Baseline Audio Register Set. /
143	#define AC97_BARS_VOL_MUTE_SHIFT 15 /*< Mute bit shift for the Baseline Audio Register Set (5.7.2). /
144	/** @} */
145
146	/** AC'97 uses 1.5dB steps, we use 0.375dB steps: 1 AC'97 step equals 4 PDM steps. */
147	#define AC97_DB_FACTOR 4
148
149	/** @name Recording inputs?
150	* @{ */
151	#define AC97_REC_MIC UINT8_C(0)
152	#define AC97_REC_CD UINT8_C(1)
153	#define AC97_REC_VIDEO UINT8_C(2)
154	#define AC97_REC_AUX UINT8_C(3)
155	#define AC97_REC_LINE_IN UINT8_C(4)
156	#define AC97_REC_STEREO_MIX UINT8_C(5)
157	#define AC97_REC_MONO_MIX UINT8_C(6)
158	#define AC97_REC_PHONE UINT8_C(7)
159	#define AC97_REC_MASK UINT8_C(7)
160	/** @} */
161
162	/** @name Mixer registers / NAM BAR registers?
163	* @{ */
164	#define AC97_Reset 0x00
165	#define AC97_Master_Volume_Mute 0x02
166	#define AC97_Headphone_Volume_Mute 0x04 /*< Also known as AUX, see table 16, section 5.7. /
167	#define AC97_Master_Volume_Mono_Mute 0x06
168	#define AC97_Master_Tone_RL 0x08
169	#define AC97_PC_BEEP_Volume_Mute 0x0a
170	#define AC97_Phone_Volume_Mute 0x0c
171	#define AC97_Mic_Volume_Mute 0x0e
172	#define AC97_Line_In_Volume_Mute 0x10
173	#define AC97_CD_Volume_Mute 0x12
174	#define AC97_Video_Volume_Mute 0x14
175	#define AC97_Aux_Volume_Mute 0x16
176	#define AC97_PCM_Out_Volume_Mute 0x18
177	#define AC97_Record_Select 0x1a
178	#define AC97_Record_Gain_Mute 0x1c
179	#define AC97_Record_Gain_Mic_Mute 0x1e
180	#define AC97_General_Purpose 0x20
181	#define AC97_3D_Control 0x22
182	#define AC97_AC_97_RESERVED 0x24
183	#define AC97_Powerdown_Ctrl_Stat 0x26
184	#define AC97_Extended_Audio_ID 0x28
185	#define AC97_Extended_Audio_Ctrl_Stat 0x2a
186	#define AC97_PCM_Front_DAC_Rate 0x2c
187	#define AC97_PCM_Surround_DAC_Rate 0x2e
188	#define AC97_PCM_LFE_DAC_Rate 0x30
189	#define AC97_PCM_LR_ADC_Rate 0x32
190	#define AC97_MIC_ADC_Rate 0x34
191	#define AC97_6Ch_Vol_C_LFE_Mute 0x36
192	#define AC97_6Ch_Vol_L_R_Surround_Mute 0x38
193	#define AC97_Vendor_Reserved 0x58
194	#define AC97_AD_Misc 0x76
195	#define AC97_Vendor_ID1 0x7c
196	#define AC97_Vendor_ID2 0x7e
197	/** @} */
198
199	/** @name Analog Devices miscellaneous regiter bits used in AD1980.
200	* @{ */
201	#define AC97_AD_MISC_LOSEL RT_BIT(5) /*< Surround (rear) goes to line out outputs. /
202	#define AC97_AD_MISC_HPSEL RT_BIT(10) /*< PCM (front) goes to headphone outputs. /
203	/** @} */
204
205
206	/** @name BUP flag values.
207	* @{ */
208	#define BUP_SET RT_BIT_32(0)
209	#define BUP_LAST RT_BIT_32(1)
210	/** @} */
211
212	/** @name AC'97 source indices.
213	* @note The order of these indices is fixed (also applies for saved states) for
214	* the moment. So make sure you know what you're done when altering this!
215	* @{
216	*/
217	#define AC97SOUNDSOURCE_PI_INDEX 0 /*< PCM in /
218	#define AC97SOUNDSOURCE_PO_INDEX 1 /*< PCM out /
219	#define AC97SOUNDSOURCE_MC_INDEX 2 /*< Mic in /
220	#define AC97SOUNDSOURCE_MAX 3 /*< Max sound sources. /
221	/** @} */
222
223	/** Port number (offset into NABM BAR) to stream index. */
224	#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
225	/** Port number (offset into NABM BAR) to stream index, but no masking. */
226	#define AC97_PORT2IDX_UNMASKED(a_idx) ( ((a_idx) >> 4) )
227
228	/** @name Stream offsets
229	* @{ */
230	#define AC97_NABM_OFF_BDBAR 0x0 /*< Buffer Descriptor Base Address /
231	#define AC97_NABM_OFF_CIV 0x4 /*< Current Index Value /
232	#define AC97_NABM_OFF_LVI 0x5 /*< Last Valid Index /
233	#define AC97_NABM_OFF_SR 0x6 /*< Status Register /
234	#define AC97_NABM_OFF_PICB 0x8 /*< Position in Current Buffer /
235	#define AC97_NABM_OFF_PIV 0xa /*< Prefetched Index Value /
236	#define AC97_NABM_OFF_CR 0xb /*< Control Register /
237	#define AC97_NABM_OFF_MASK 0xf /*< Mask for getting the the per-stream register. /
238	/** @} */
239
240
241	/** @name PCM in NABM BAR registers (0x00..0x0f).
242	* @{ */
243	#define PI_BDBAR (AC97SOUNDSOURCE_PI_INDEX * 0x10 + 0x0) /*< PCM in: Buffer Descriptor Base Address /
244	#define PI_CIV (AC97SOUNDSOURCE_PI_INDEX * 0x10 + 0x4) /*< PCM in: Current Index Value /
245	#define PI_LVI (AC97SOUNDSOURCE_PI_INDEX * 0x10 + 0x5) /*< PCM in: Last Valid Index /
246	#define PI_SR (AC97SOUNDSOURCE_PI_INDEX * 0x10 + 0x6) /*< PCM in: Status Register /
247	#define PI_PICB (AC97SOUNDSOURCE_PI_INDEX * 0x10 + 0x8) /*< PCM in: Position in Current Buffer /
248	#define PI_PIV (AC97SOUNDSOURCE_PI_INDEX * 0x10 + 0xa) /*< PCM in: Prefetched Index Value /
249	#define PI_CR (AC97SOUNDSOURCE_PI_INDEX * 0x10 + 0xb) /*< PCM in: Control Register /
250	/** @} */
251
252	/** @name PCM out NABM BAR registers (0x10..0x1f).
253	* @{ */
254	#define PO_BDBAR (AC97SOUNDSOURCE_PO_INDEX * 0x10 + 0x0) /*< PCM out: Buffer Descriptor Base Address /
255	#define PO_CIV (AC97SOUNDSOURCE_PO_INDEX * 0x10 + 0x4) /*< PCM out: Current Index Value /
256	#define PO_LVI (AC97SOUNDSOURCE_PO_INDEX * 0x10 + 0x5) /*< PCM out: Last Valid Index /
257	#define PO_SR (AC97SOUNDSOURCE_PO_INDEX * 0x10 + 0x6) /*< PCM out: Status Register /
258	#define PO_PICB (AC97SOUNDSOURCE_PO_INDEX * 0x10 + 0x8) /*< PCM out: Position in Current Buffer /
259	#define PO_PIV (AC97SOUNDSOURCE_PO_INDEX * 0x10 + 0xa) /*< PCM out: Prefetched Index Value /
260	#define PO_CR (AC97SOUNDSOURCE_PO_INDEX * 0x10 + 0xb) /*< PCM out: Control Register /
261	/** @} */
262
263	/** @name Mic in NABM BAR registers (0x20..0x2f).
264	* @{ */
265	#define MC_BDBAR (AC97SOUNDSOURCE_MC_INDEX * 0x10 + 0x0) /*< PCM in: Buffer Descriptor Base Address /
266	#define MC_CIV (AC97SOUNDSOURCE_MC_INDEX * 0x10 + 0x4) /*< PCM in: Current Index Value /
267	#define MC_LVI (AC97SOUNDSOURCE_MC_INDEX * 0x10 + 0x5) /*< PCM in: Last Valid Index /
268	#define MC_SR (AC97SOUNDSOURCE_MC_INDEX * 0x10 + 0x6) /*< PCM in: Status Register /
269	#define MC_PICB (AC97SOUNDSOURCE_MC_INDEX * 0x10 + 0x8) /*< PCM in: Position in Current Buffer /
270	#define MC_PIV (AC97SOUNDSOURCE_MC_INDEX * 0x10 + 0xa) /*< PCM in: Prefetched Index Value /
271	#define MC_CR (AC97SOUNDSOURCE_MC_INDEX * 0x10 + 0xb) /*< PCM in: Control Register /
272	/** @} */
273
274	/** @name Misc NABM BAR registers.
275	* @{ */
276	/** NABMBAR: Global Control Register.
277	* @note This is kind of in the MIC IN area. */
278	#define AC97_GLOB_CNT 0x2c
279	/** NABMBAR: Global Status. */
280	#define AC97_GLOB_STA 0x30
281	/** Codec Access Semaphore Register. */
282	#define AC97_CAS 0x34
283	/** @} */
284
285
286	/*********************************************************************************************************************************
287	* Structures and Typedefs *
288	*********************************************************************************************************************************/
289	/** The ICH AC'97 (Intel) controller (shared). */
290	typedef struct AC97STATE *PAC97STATE;
291	/** The ICH AC'97 (Intel) controller (ring-3). */
292	typedef struct AC97STATER3 *PAC97STATER3;
293
294	/**
295	* Buffer Descriptor List Entry (BDLE).
296	*/
297	typedef struct AC97BDLE
298	{
299	/** Location of data buffer (bits 31:1). */
300	uint32_t addr;
301	/** Flags (bits 31 + 30) and length (bits 15:0) of data buffer (in audio samples). */
302	uint32_t ctl_len;
303	} AC97BDLE;
304	AssertCompileSize(AC97BDLE, 8);
305	/** Pointer to BDLE. */
306	typedef AC97BDLE *PAC97BDLE;
307
308	/**
309	* Bus master register set for an audio stream.
310	*/
311	typedef struct AC97BMREGS
312	{
313	uint32_t bdbar; /*< rw 0, Buffer Descriptor List: BAR (Base Address Register). /
314	uint8_t civ; /*< ro 0, Current index value. /
315	uint8_t lvi; /*< rw 0, Last valid index. /
316	uint16_t sr; /*< rw 1, Status register. /
317	uint16_t picb; /*< ro 0, Position in current buffer (in samples). /
318	uint8_t piv; /*< ro 0, Prefetched index value. /
319	uint8_t cr; /*< rw 0, Control register. /
320	int32_t bd_valid; /*< Whether current BDLE is initialized or not. /
321	AC97BDLE bd; /*< Current Buffer Descriptor List Entry (BDLE). /
322	} AC97BMREGS;
323	AssertCompileSizeAlignment(AC97BMREGS, 8);
324	/** Pointer to the BM registers of an audio stream. */
325	typedef AC97BMREGS *PAC97BMREGS;
326
327	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
328	/**
329	* Asynchronous I/O state for an AC'97 stream.
330	*/
331	typedef struct AC97STREAMSTATEAIO
332	{
333	/** Thread handle for the actual I/O thread. */
334	RTTHREAD Thread;
335	/** Event for letting the thread know there is some data to process. */
336	RTSEMEVENT Event;
337	/** Critical section for synchronizing access. */
338	RTCRITSECT CritSect;
339	/** Started indicator. */
340	volatile bool fStarted;
341	/** Shutdown indicator. */
342	volatile bool fShutdown;
343	/** Whether the thread should do any data processing or not. */
344	volatile bool fEnabled;
345	bool afPadding[5];
346	} AC97STREAMSTATEAIO;
347	/** Pointer to the async I/O state for an AC'97 stream. */
348	typedef AC97STREAMSTATEAIO *PAC97STREAMSTATEAIO;
349	#endif
350
351
352	/**
353	* The internal state of an AC'97 stream.
354	*/
355	typedef struct AC97STREAMSTATE
356	{
357	/** Criticial section for this stream. */
358	RTCRITSECT CritSect;
359	/** Circular buffer (FIFO) for holding DMA'ed data. */
360	R3PTRTYPE(PRTCIRCBUF) pCircBuf;
361	#if HC_ARCH_BITS == 32
362	uint32_t Padding;
363	#endif
364	/** The stream's current configuration. */
365	PDMAUDIOSTREAMCFG Cfg; //+108
366	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
367	/** Asynchronous I/O state members. */
368	AC97STREAMSTATEAIO AIO;
369	#endif
370	/** Timestamp of the last DMA data transfer. */
371	uint64_t tsTransferLast;
372	/** Timestamp of the next DMA data transfer.
373	* Next for determining the next scheduling window.
374	* Can be 0 if no next transfer is scheduled. */
375	uint64_t tsTransferNext;
376	/** Transfer chunk size (in bytes) of a transfer period. */
377	uint32_t cbTransferChunk;
378	/** The stream's timer Hz rate.
379	* This value can can be different from the device's default Hz rate,
380	* depending on the rate the stream expects (e.g. for 5.1 speaker setups).
381	* Set in R3StreamInit(). */
382	uint16_t uTimerHz;
383	uint8_t Padding3[2];
384	/** (Virtual) clock ticks per transfer. */
385	uint64_t cTransferTicks;
386	/** Timestamp (in ns) of last stream update. */
387	uint64_t tsLastUpdateNs;
388	} AC97STREAMSTATE;
389	AssertCompileSizeAlignment(AC97STREAMSTATE, 8);
390	/** Pointer to internal state of an AC'97 stream. */
391	typedef AC97STREAMSTATE *PAC97STREAMSTATE;
392
393	/**
394	* Runtime configurable debug stuff for an AC'97 stream.
395	*/
396	typedef struct AC97STREAMDEBUGRT
397	{
398	/** Whether debugging is enabled or not. */
399	bool fEnabled;
400	uint8_t Padding[7];
401	/** File for dumping stream reads / writes.
402	* For input streams, this dumps data being written to the device FIFO,
403	* whereas for output streams this dumps data being read from the device FIFO. */
404	R3PTRTYPE(PAUDIOHLPFILE) pFileStream;
405	/** File for dumping DMA reads / writes.
406	* For input streams, this dumps data being written to the device DMA,
407	* whereas for output streams this dumps data being read from the device DMA. */
408	R3PTRTYPE(PAUDIOHLPFILE) pFileDMA;
409	} AC97STREAMDEBUGRT;
410
411	/**
412	* Debug stuff for an AC'97 stream.
413	*/
414	typedef struct AC97STREAMDEBUG
415	{
416	/** Runtime debug stuff. */
417	AC97STREAMDEBUGRT Runtime;
418	} AC97STREAMDEBUG;
419
420	/**
421	* The shared AC'97 stream state.
422	*/
423	typedef struct AC97STREAM
424	{
425	/** Stream number (SDn). */
426	uint8_t u8SD;
427	uint8_t abPadding0[7];
428	/** Bus master registers of this stream. */
429	AC97BMREGS Regs;
430	/** The timer for pumping data thru the attached LUN drivers. */
431	TMTIMERHANDLE hTimer;
432	} AC97STREAM;
433	AssertCompileSizeAlignment(AC97STREAM, 8);
434	/** Pointer to a shared AC'97 stream state. */
435	typedef AC97STREAM *PAC97STREAM;
436
437
438	/**
439	* The ring-3 AC'97 stream state.
440	*/
441	typedef struct AC97STREAMR3
442	{
443	/** Stream number (SDn). */
444	uint8_t u8SD;
445	uint8_t abPadding0[7];
446	/** Internal state of this stream. */
447	AC97STREAMSTATE State;
448	/** Debug stuff. */
449	AC97STREAMDEBUG Dbg;
450	} AC97STREAMR3;
451	AssertCompileSizeAlignment(AC97STREAMR3, 8);
452	/** Pointer to an AC'97 stream state for ring-3. */
453	typedef AC97STREAMR3 *PAC97STREAMR3;
454
455
456	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
457	/**
458	* Asynchronous I/O thread context (arguments).
459	*/
460	typedef struct AC97STREAMTHREADCTX
461	{
462	/** The AC'97 device state (shared). */
463	PAC97STATE pThis;
464	/** The AC'97 device state (ring-3). */
465	PAC97STATER3 pThisCC;
466	/** The AC'97 stream state (shared). */
467	PAC97STREAM pStream;
468	/** The AC'97 stream state (ring-3). */
469	PAC97STREAMR3 pStreamCC;
470	} AC97STREAMTHREADCTX;
471	/** Pointer to the context for an async I/O thread. */
472	typedef AC97STREAMTHREADCTX *PAC97STREAMTHREADCTX;
473	#endif
474
475	/**
476	* A driver stream (host backend).
477	*
478	* Each driver has its own instances of audio mixer streams, which then
479	* can go into the same (or even different) audio mixer sinks.
480	*/
481	typedef struct AC97DRIVERSTREAM
482	{
483	/** Associated mixer stream handle. */
484	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
485	} AC97DRIVERSTREAM;
486	/** Pointer to a driver stream. */
487	typedef AC97DRIVERSTREAM *PAC97DRIVERSTREAM;
488
489	/**
490	* A host backend driver (LUN).
491	*/
492	typedef struct AC97DRIVER
493	{
494	/** Node for storing this driver in our device driver list of AC97STATE. */
495	RTLISTNODER3 Node;
496	/** Driver flags. */
497	PDMAUDIODRVFLAGS fFlags;
498	/** LUN # to which this driver has been assigned. */
499	uint8_t uLUN;
500	/** Whether this driver is in an attached state or not. */
501	bool fAttached;
502	uint8_t abPadding[2];
503	/** Pointer to the description string passed to PDMDevHlpDriverAttach(). */
504	R3PTRTYPE(char *) pszDesc;
505	/** Pointer to attached driver base interface. */
506	R3PTRTYPE(PPDMIBASE) pDrvBase;
507	/** Audio connector interface to the underlying host backend. */
508	R3PTRTYPE(PPDMIAUDIOCONNECTOR) pConnector;
509	/** Driver stream for line input. */
510	AC97DRIVERSTREAM LineIn;
511	/** Driver stream for mic input. */
512	AC97DRIVERSTREAM MicIn;
513	/** Driver stream for output. */
514	AC97DRIVERSTREAM Out;
515	} AC97DRIVER;
516	/** Pointer to a host backend driver (LUN). */
517	typedef AC97DRIVER *PAC97DRIVER;
518
519	/**
520	* Debug settings.
521	*/
522	typedef struct AC97STATEDEBUG
523	{
524	/** Whether debugging is enabled or not. */
525	bool fEnabled;
526	bool afAlignment[7];
527	/** Path where to dump the debug output to.
528	* Can be NULL, in which the system's temporary directory will be used then. */
529	R3PTRTYPE(char *) pszOutPath;
530	} AC97STATEDEBUG;
531
532
533	/* Codec models. */
534	typedef enum AC97CODEC
535	{
536	AC97CODEC_INVALID = 0, /*< Customary illegal zero value. /
537	AC97CODEC_STAC9700, /*< SigmaTel STAC9700 /
538	AC97CODEC_AD1980, /*< Analog Devices AD1980 /
539	AC97CODEC_AD1981B, /*< Analog Devices AD1981B /
540	AC97CODEC_32BIT_HACK = 0x7fffffff
541	} AC97CODEC;
542
543
544	/**
545	* The shared AC'97 device state.
546	*/
547	typedef struct AC97STATE
548	{
549	/** Critical section protecting the AC'97 state. */
550	PDMCRITSECT CritSect;
551	/** Global Control (Bus Master Control Register). */
552	uint32_t glob_cnt;
553	/** Global Status (Bus Master Control Register). */
554	uint32_t glob_sta;
555	/** Codec Access Semaphore Register (Bus Master Control Register). */
556	uint32_t cas;
557	uint32_t last_samp;
558	uint8_t mixer_data[256];
559	/** Array of AC'97 streams (parallel to AC97STATER3::aStreams). */
560	AC97STREAM aStreams[AC97_MAX_STREAMS];
561	/** The device timer Hz rate. Defaults to AC97_TIMER_HZ_DEFAULT_DEFAULT. */
562	uint16_t uTimerHz;
563	uint16_t au16Padding1[3];
564	uint8_t silence[128];
565	uint32_t bup_flag;
566	/** Codec model. */
567	AC97CODEC enmCodecModel;
568
569	/** PCI region \#0: NAM I/O ports. */
570	IOMIOPORTHANDLE hIoPortsNam;
571	/** PCI region \#0: NANM I/O ports. */
572	IOMIOPORTHANDLE hIoPortsNabm;
573
574	STAMCOUNTER StatUnimplementedNabmReads;
575	STAMCOUNTER StatUnimplementedNabmWrites;
576	#ifdef VBOX_WITH_STATISTICS
577	STAMPROFILE StatTimer;
578	STAMPROFILE StatIn;
579	STAMPROFILE StatOut;
580	STAMCOUNTER StatBytesRead;
581	STAMCOUNTER StatBytesWritten;
582	#endif
583	} AC97STATE;
584	AssertCompileMemberAlignment(AC97STATE, aStreams, 8);
585	AssertCompileMemberAlignment(AC97STATE, StatUnimplementedNabmReads, 8);
586	#ifdef VBOX_WITH_STATISTICS
587	AssertCompileMemberAlignment(AC97STATE, StatTimer, 8);
588	AssertCompileMemberAlignment(AC97STATE, StatBytesRead, 8);
589	AssertCompileMemberAlignment(AC97STATE, StatBytesWritten, 8);
590	#endif
591
592
593	/**
594	* The ring-3 AC'97 device state.
595	*/
596	typedef struct AC97STATER3
597	{
598	/** Array of AC'97 streams (parallel to AC97STATE:aStreams). */
599	AC97STREAMR3 aStreams[AC97_MAX_STREAMS];
600	/** R3 pointer to the device instance. */
601	PPDMDEVINSR3 pDevIns;
602	/** List of associated LUN drivers (AC97DRIVER). */
603	RTLISTANCHORR3 lstDrv;
604	/** The device's software mixer. */
605	R3PTRTYPE(PAUDIOMIXER) pMixer;
606	/** Audio sink for PCM output. */
607	R3PTRTYPE(PAUDMIXSINK) pSinkOut;
608	/** Audio sink for line input. */
609	R3PTRTYPE(PAUDMIXSINK) pSinkLineIn;
610	/** Audio sink for microphone input. */
611	R3PTRTYPE(PAUDMIXSINK) pSinkMicIn;
612	/** The base interface for LUN\#0. */
613	PDMIBASE IBase;
614	/** Debug settings. */
615	AC97STATEDEBUG Dbg;
616	} AC97STATER3;
617	AssertCompileMemberAlignment(AC97STATER3, aStreams, 8);
618	/** Pointer to the ring-3 AC'97 device state. */
619	typedef AC97STATER3 *PAC97STATER3;
620
621
622	/**
623	* Acquires the AC'97 lock.
624	*/
625	#define DEVAC97_LOCK(a_pDevIns, a_pThis) \
626	do { \
627	int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \
628	AssertRC(rcLock); \
629	} while (0)
630
631	/**
632	* Acquires the AC'97 lock or returns.
633	*/
634	# define DEVAC97_LOCK_RETURN(a_pDevIns, a_pThis, a_rcBusy) \
635	do { \
636	int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, a_rcBusy); \
637	if (rcLock == VINF_SUCCESS) \
638	break; \
639	AssertRC(rcLock); \
640	return rcLock; \
641	} while (0)
642
643	/** Retrieves an attribute from a specific audio stream in RC. */
644	#define DEVAC97_CTX_SUFF_SD(a_Var, a_SD) CTX_SUFF(a_Var)[a_SD]
645
646	/**
647	* Releases the AC'97 lock.
648	*/
649	#define DEVAC97_UNLOCK(a_pDevIns, a_pThis) \
650	do { PDMDevHlpCritSectLeave((a_pDevIns), &(a_pThis)->CritSect); } while (0)
651
652	/**
653	* Acquires the TM lock and AC'97 lock, returns on failure.
654	*
655	* @todo r=bird: Isn't this overkill for ring-0, only ring-3 access the timer
656	* from what I can tell (ichac97R3StreamTransferCalcNext,
657	* ichac97R3TimerSet, timer callback and state load).
658	*/
659	#define DEVAC97_LOCK_BOTH_RETURN(a_pDevIns, a_pThis, a_pStream, a_rcBusy) \
660	do { \
661	VBOXSTRICTRC rcLock = PDMDevHlpTimerLockClock2((a_pDevIns), (a_pStream)->hTimer, &(a_pThis)->CritSect, (a_rcBusy)); \
662	if (RT_LIKELY(rcLock == VINF_SUCCESS)) \
663	{ /* likely */ } \
664	else \
665	{ \
666	AssertRC(VBOXSTRICTRC_VAL(rcLock)); \
667	return rcLock; \
668	} \
669	} while (0)
670
671	/**
672	* Releases the AC'97 lock and TM lock.
673	*/
674	#define DEVAC97_UNLOCK_BOTH(a_pDevIns, a_pThis, a_pStream) \
675	PDMDevHlpTimerUnlockClock2((a_pDevIns), (a_pStream)->hTimer, &(a_pThis)->CritSect)
676
677	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
678
679
680	/*********************************************************************************************************************************
681	* Internal Functions *
682	*********************************************************************************************************************************/
683	#ifdef IN_RING3
684	static int ichac97R3StreamOpen(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STATER3 pThisCC, PAC97STREAM pStream,
685	PAC97STREAMR3 pStreamCC, bool fForce);
686	static int ichac97R3StreamClose(PAC97STREAM pStream);
687	static void ichac97R3StreamLock(PAC97STREAMR3 pStreamCC);
688	static void ichac97R3StreamUnlock(PAC97STREAMR3 pStreamCC);
689	static uint32_t ichac97R3StreamGetUsed(PAC97STREAMR3 pStreamCC);
690	static uint32_t ichac97R3StreamGetFree(PAC97STREAMR3 pStreamCC);
691	static int ichac97R3StreamTransfer(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream,
692	PAC97STREAMR3 pStreamCC, uint32_t cbToProcessMax);
693	static void ichac97R3StreamUpdate(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STATER3 pThisCC, PAC97STREAM pStream,
694	PAC97STREAMR3 pStreamCC, bool fInTimer);
695
696	static DECLCALLBACK(void) ichac97R3Reset(PPDMDEVINS pDevIns);
697
698	static void ichac97R3MixerRemoveDrvStreams(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, PAUDMIXSINK pMixSink,
699	PDMAUDIODIR enmDir, PDMAUDIODSTSRCUNION dstSrc);
700
701	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
702	static int ichac97R3StreamAsyncIOCreate(PAC97STATE pThis, PAC97STATER3 pThisCC, PAC97STREAM pStream, PAC97STREAMR3 pStreamCC);
703	static int ichac97R3StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAMR3 pStreamCC);
704	static void ichac97R3StreamAsyncIOLock(PAC97STREAMR3 pStreamCC);
705	static void ichac97R3StreamAsyncIOUnlock(PAC97STREAMR3 pStreamCC);
706	/static void ichac97R3StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable); Unused /
707	# endif
708
709	DECLINLINE(PDMAUDIODIR) ichac97GetDirFromSD(uint8_t uSD);
710	DECLINLINE(void) ichac97R3TimerSet(PPDMDEVINS pDevIns, PAC97STREAM pStream, uint64_t cTicksToDeadline);
711	#endif /* IN_RING3 */
712
713
714	/*********************************************************************************************************************************
715	* Global Variables *
716	*********************************************************************************************************************************/
717	#ifdef IN_RING3
718	/** NABM I/O port descriptions. */
719	static const IOMIOPORTDESC g_aNabmPorts[] =
720	{
721	{ "PCM IN - BDBAR", "PCM IN - BDBAR", NULL, NULL },
722	{ "", NULL, NULL, NULL },
723	{ "", NULL, NULL, NULL },
724	{ "", NULL, NULL, NULL },
725	{ "PCM IN - CIV", "PCM IN - CIV", NULL, NULL },
726	{ "PCM IN - LVI", "PCM IN - LIV", NULL, NULL },
727	{ "PCM IN - SR", "PCM IN - SR", NULL, NULL },
728	{ "", NULL, NULL, NULL },
729	{ "PCM IN - PICB", "PCM IN - PICB", NULL, NULL },
730	{ "", NULL, NULL, NULL },
731	{ "PCM IN - PIV", "PCM IN - PIV", NULL, NULL },
732	{ "PCM IN - CR", "PCM IN - CR", NULL, NULL },
733	{ "", NULL, NULL, NULL },
734	{ "", NULL, NULL, NULL },
735	{ "", NULL, NULL, NULL },
736	{ "", NULL, NULL, NULL },
737
738	{ "PCM OUT - BDBAR", "PCM OUT - BDBAR", NULL, NULL },
739	{ "", NULL, NULL, NULL },
740	{ "", NULL, NULL, NULL },
741	{ "", NULL, NULL, NULL },
742	{ "PCM OUT - CIV", "PCM OUT - CIV", NULL, NULL },
743	{ "PCM OUT - LVI", "PCM OUT - LIV", NULL, NULL },
744	{ "PCM OUT - SR", "PCM OUT - SR", NULL, NULL },
745	{ "", NULL, NULL, NULL },
746	{ "PCM OUT - PICB", "PCM OUT - PICB", NULL, NULL },
747	{ "", NULL, NULL, NULL },
748	{ "PCM OUT - PIV", "PCM OUT - PIV", NULL, NULL },
749	{ "PCM OUT - CR", "PCM IN - CR", NULL, NULL },
750	{ "", NULL, NULL, NULL },
751	{ "", NULL, NULL, NULL },
752	{ "", NULL, NULL, NULL },
753	{ "", NULL, NULL, NULL },
754
755	{ "MIC IN - BDBAR", "MIC IN - BDBAR", NULL, NULL },
756	{ "", NULL, NULL, NULL },
757	{ "", NULL, NULL, NULL },
758	{ "", NULL, NULL, NULL },
759	{ "MIC IN - CIV", "MIC IN - CIV", NULL, NULL },
760	{ "MIC IN - LVI", "MIC IN - LIV", NULL, NULL },
761	{ "MIC IN - SR", "MIC IN - SR", NULL, NULL },
762	{ "", NULL, NULL, NULL },
763	{ "MIC IN - PICB", "MIC IN - PICB", NULL, NULL },
764	{ "", NULL, NULL, NULL },
765	{ "MIC IN - PIV", "MIC IN - PIV", NULL, NULL },
766	{ "MIC IN - CR", "MIC IN - CR", NULL, NULL },
767	{ "GLOB CNT", "GLOB CNT", NULL, NULL },
768	{ "", NULL, NULL, NULL },
769	{ "", NULL, NULL, NULL },
770	{ "", NULL, NULL, NULL },
771
772	{ "GLOB STA", "GLOB STA", NULL, NULL },
773	{ "", NULL, NULL, NULL },
774	{ "", NULL, NULL, NULL },
775	{ "", NULL, NULL, NULL },
776	{ "CAS", "CAS", NULL, NULL },
777	{ NULL, NULL, NULL, NULL },
778	};
779
780	/** @name Source indices
781	* @{ */
782	#define AC97SOUNDSOURCE_PI_INDEX 0 /*< PCM in /
783	#define AC97SOUNDSOURCE_PO_INDEX 1 /*< PCM out /
784	#define AC97SOUNDSOURCE_MC_INDEX 2 /*< Mic in /
785	#define AC97SOUNDSOURCE_MAX 3 /*< Max sound sources. /
786	/** @} */
787
788	/** Port number (offset into NABM BAR) to stream index. */
789	#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
790	/** Port number (offset into NABM BAR) to stream index, but no masking. */
791	#define AC97_PORT2IDX_UNMASKED(a_idx) ( ((a_idx) >> 4) )
792
793	/** @name Stream offsets
794	* @{ */
795	#define AC97_NABM_OFF_BDBAR 0x0 /*< Buffer Descriptor Base Address /
796	#define AC97_NABM_OFF_CIV 0x4 /*< Current Index Value /
797	#define AC97_NABM_OFF_LVI 0x5 /*< Last Valid Index /
798	#define AC97_NABM_OFF_SR 0x6 /*< Status Register /
799	#define AC97_NABM_OFF_PICB 0x8 /*< Position in Current Buffer /
800	#define AC97_NABM_OFF_PIV 0xa /*< Prefetched Index Value /
801	#define AC97_NABM_OFF_CR 0xb /*< Control Register /
802	#define AC97_NABM_OFF_MASK 0xf /*< Mask for getting the the per-stream register. /
803	/** @} */
804
805	#endif
806
807
808
809	static void ichac97WarmReset(PAC97STATE pThis)
810	{
811	NOREF(pThis);
812	}
813
814	static void ichac97ColdReset(PAC97STATE pThis)
815	{
816	NOREF(pThis);
817	}
818
819
820	#ifdef IN_RING3
821
822	/**
823	* Retrieves the audio mixer sink of a corresponding AC'97 stream index.
824	*
825	* @returns Pointer to audio mixer sink if found, or NULL if not found / invalid.
826	* @param pThisCC The ring-3 AC'97 state.
827	* @param uIndex Stream index to get audio mixer sink for.
828	*/
829	DECLINLINE(PAUDMIXSINK) ichac97R3IndexToSink(PAC97STATER3 pThisCC, uint8_t uIndex)
830	{
831	switch (uIndex)
832	{
833	case AC97SOUNDSOURCE_PI_INDEX: return pThisCC->pSinkLineIn;
834	case AC97SOUNDSOURCE_PO_INDEX: return pThisCC->pSinkOut;
835	case AC97SOUNDSOURCE_MC_INDEX: return pThisCC->pSinkMicIn;
836	default:
837	AssertMsgFailedReturn(("Wrong index %RU8\n", uIndex), NULL);
838	}
839	}
840
841	/**
842	* Fetches the current BDLE (Buffer Descriptor List Entry) of an AC'97 audio stream.
843	*
844	* @returns VBox status code.
845	* @param pDevIns The device instance.
846	* @param pStream AC'97 stream to fetch BDLE for.
847	*
848	* @remark Uses CIV as BDLE index.
849	*/
850	static void ichac97R3StreamFetchBDLE(PPDMDEVINS pDevIns, PAC97STREAM pStream)
851	{
852	PAC97BMREGS pRegs = &pStream->Regs;
853
854	AC97BDLE BDLE;
855	PDMDevHlpPCIPhysRead(pDevIns, pRegs->bdbar + pRegs->civ * sizeof(AC97BDLE), &BDLE, sizeof(AC97BDLE));
856	pRegs->bd_valid = 1;
857	# ifndef RT_LITTLE_ENDIAN
858	# error "Please adapt the code (audio buffers are little endian)!"
859	# else
860	pRegs->bd.addr = RT_H2LE_U32(BDLE.addr & ~3);
861	pRegs->bd.ctl_len = RT_H2LE_U32(BDLE.ctl_len);
862	# endif
863	pRegs->picb = pRegs->bd.ctl_len & AC97_BD_LEN_MASK;
864	LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes), bup=%RTbool, ioc=%RTbool\n",
865	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16,
866	pRegs->bd.ctl_len & AC97_BD_LEN_MASK,
867	(pRegs->bd.ctl_len & AC97_BD_LEN_MASK) << 1, /** @todo r=andy Assumes 16bit samples. */
868	RT_BOOL(pRegs->bd.ctl_len & AC97_BD_BUP),
869	RT_BOOL(pRegs->bd.ctl_len & AC97_BD_IOC)));
870	}
871
872	#endif /* IN_RING3 */
873
874	/**
875	* Updates the status register (SR) of an AC'97 audio stream.
876	*
877	* @param pDevIns The device instance.
878	* @param pThis The shared AC'97 state.
879	* @param pStream AC'97 stream to update SR for.
880	* @param new_sr New value for status register (SR).
881	*/
882	static void ichac97StreamUpdateSR(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
883	{
884	PAC97BMREGS pRegs = &pStream->Regs;
885
886	bool fSignal = false;
887	int iIRQL = 0;
888
889	uint32_t new_mask = new_sr & AC97_SR_INT_MASK;
890	uint32_t old_mask = pRegs->sr & AC97_SR_INT_MASK;
891
892	if (new_mask ^ old_mask)
893	{
894	/** @todo Is IRQ deasserted when only one of status bits is cleared? */
895	if (!new_mask)
896	{
897	fSignal = true;
898	iIRQL = 0;
899	}
900	else if ((new_mask & AC97_SR_LVBCI) && (pRegs->cr & AC97_CR_LVBIE))
901	{
902	fSignal = true;
903	iIRQL = 1;
904	}
905	else if ((new_mask & AC97_SR_BCIS) && (pRegs->cr & AC97_CR_IOCE))
906	{
907	fSignal = true;
908	iIRQL = 1;
909	}
910	}
911
912	pRegs->sr = new_sr;
913
914	LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n",
915	pRegs->sr & AC97_SR_BCIS, pRegs->sr & AC97_SR_LVBCI, pRegs->sr, fSignal, iIRQL));
916
917	if (fSignal)
918	{
919	static uint32_t const s_aMasks[] = { AC97_GS_PIINT, AC97_GS_POINT, AC97_GS_MINT };
920	Assert(pStream->u8SD < AC97_MAX_STREAMS);
921	if (iIRQL)
922	pThis->glob_sta \|= s_aMasks[pStream->u8SD];
923	else
924	pThis->glob_sta &= ~s_aMasks[pStream->u8SD];
925
926	LogFlowFunc(("Setting IRQ level=%d\n", iIRQL));
927	PDMDevHlpPCISetIrq(pDevIns, 0, iIRQL);
928	}
929	}
930
931	/**
932	* Writes a new value to a stream's status register (SR).
933	*
934	* @param pDevIns The device instance.
935	* @param pThis The shared AC'97 device state.
936	* @param pStream Stream to update SR for.
937	* @param u32Val New value to set the stream's SR to.
938	*/
939	static void ichac97StreamWriteSR(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t u32Val)
940	{
941	PAC97BMREGS pRegs = &pStream->Regs;
942
943	Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8SD, u32Val, pRegs->sr));
944
945	pRegs->sr \|= u32Val & ~(AC97_SR_RO_MASK \| AC97_SR_WCLEAR_MASK);
946	ichac97StreamUpdateSR(pDevIns, pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
947	}
948
949	#ifdef IN_RING3
950
951	/**
952	* Returns whether an AC'97 stream is enabled or not.
953	*
954	* @returns VBox status code.
955	* @param pThisCC The ring-3 AC'97 device state.
956	* @param pStream Stream to return status for.
957	*/
958	static bool ichac97R3StreamIsEnabled(PAC97STATER3 pThisCC, PAC97STREAM pStream)
959	{
960	PAUDMIXSINK pSink = ichac97R3IndexToSink(pThisCC, pStream->u8SD);
961	bool fIsEnabled = RT_BOOL(AudioMixerSinkGetStatus(pSink) & AUDMIXSINK_STS_RUNNING);
962
963	LogFunc(("[SD%RU8] fIsEnabled=%RTbool\n", pStream->u8SD, fIsEnabled));
964	return fIsEnabled;
965	}
966
967	/**
968	* Enables or disables an AC'97 audio stream.
969	*
970	* @returns VBox status code.
971	* @param pDevIns The device instance.
972	* @param pThis The shared AC'97 state.
973	* @param pThisCC The ring-3 AC'97 state.
974	* @param pStream The AC'97 stream to enable or disable (shared
975	* state).
976	* @param pStreamCC The ring-3 stream state (matching to @a pStream).
977	* @param fEnable Whether to enable or disable the stream.
978	*
979	*/
980	static int ichac97R3StreamEnable(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STATER3 pThisCC,
981	PAC97STREAM pStream, PAC97STREAMR3 pStreamCC, bool fEnable)
982	{
983	ichac97R3StreamLock(pStreamCC);
984
985	int rc = VINF_SUCCESS;
986
987	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
988	if (fEnable)
989	rc = ichac97R3StreamAsyncIOCreate(pThis, pThisCC, pStream, pStreamCC);
990	if (RT_SUCCESS(rc))
991	ichac97R3StreamAsyncIOLock(pStreamCC);
992	# endif
993
994	if (fEnable)
995	{
996	if (pStreamCC->State.pCircBuf)
997	RTCircBufReset(pStreamCC->State.pCircBuf);
998
999	rc = ichac97R3StreamOpen(pDevIns, pThis, pThisCC, pStream, pStreamCC, false /* fForce */);
1000
1001	if (RT_LIKELY(!pStreamCC->Dbg.Runtime.fEnabled))
1002	{ /* likely */ }
1003	else
1004	{
1005	if (!AudioHlpFileIsOpen(pStreamCC->Dbg.Runtime.pFileStream))
1006	{
1007	int rc2 = AudioHlpFileOpen(pStreamCC->Dbg.Runtime.pFileStream, AUDIOHLPFILE_DEFAULT_OPEN_FLAGS,
1008	&pStreamCC->State.Cfg.Props);
1009	AssertRC(rc2);
1010	}
1011
1012	if (!AudioHlpFileIsOpen(pStreamCC->Dbg.Runtime.pFileDMA))
1013	{
1014	int rc2 = AudioHlpFileOpen(pStreamCC->Dbg.Runtime.pFileDMA, AUDIOHLPFILE_DEFAULT_OPEN_FLAGS,
1015	&pStreamCC->State.Cfg.Props);
1016	AssertRC(rc2);
1017	}
1018	}
1019	}
1020	else
1021	rc = ichac97R3StreamClose(pStream);
1022
1023	if (RT_SUCCESS(rc))
1024	{
1025	/* First, enable or disable the stream and the stream's sink, if any. */
1026	rc = AudioMixerSinkCtl(ichac97R3IndexToSink(pThisCC, pStream->u8SD),
1027	fEnable ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE);
1028	}
1029
1030	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1031	ichac97R3StreamAsyncIOUnlock(pStreamCC);
1032	# endif
1033
1034	/* Make sure to leave the lock before (eventually) starting the timer. */
1035	ichac97R3StreamUnlock(pStreamCC);
1036
1037	LogFunc(("[SD%RU8] fEnable=%RTbool, rc=%Rrc\n", pStream->u8SD, fEnable, rc));
1038	return rc;
1039	}
1040
1041	/**
1042	* Resets an AC'97 stream.
1043	*
1044	* @param pThis The shared AC'97 state.
1045	* @param pStream The AC'97 stream to reset (shared).
1046	* @param pStreamCC The AC'97 stream to reset (ring-3).
1047	*/
1048	static void ichac97R3StreamReset(PAC97STATE pThis, PAC97STREAM pStream, PAC97STREAMR3 pStreamCC)
1049	{
1050	ichac97R3StreamLock(pStreamCC);
1051
1052	LogFunc(("[SD%RU8]\n", pStream->u8SD));
1053
1054	if (pStreamCC->State.pCircBuf)
1055	RTCircBufReset(pStreamCC->State.pCircBuf);
1056
1057	PAC97BMREGS pRegs = &pStream->Regs;
1058
1059	pRegs->bdbar = 0;
1060	pRegs->civ = 0;
1061	pRegs->lvi = 0;
1062
1063	pRegs->picb = 0;
1064	pRegs->piv = 0;
1065	pRegs->cr = pRegs->cr & AC97_CR_DONT_CLEAR_MASK;
1066	pRegs->bd_valid = 0;
1067
1068	RT_ZERO(pThis->silence);
1069
1070	ichac97R3StreamUnlock(pStreamCC);
1071	}
1072
1073	/**
1074	* Creates an AC'97 audio stream.
1075	*
1076	* @returns VBox status code.
1077	* @param pThisCC The ring-3 AC'97 state.
1078	* @param pStream The AC'97 stream to create (shared).
1079	* @param pStreamCC The AC'97 stream to create (ring-3).
1080	* @param u8SD Stream descriptor number to assign.
1081	*/
1082	static int ichac97R3StreamCreate(PAC97STATER3 pThisCC, PAC97STREAM pStream, PAC97STREAMR3 pStreamCC, uint8_t u8SD)
1083	{
1084	LogFunc(("[SD%RU8] pStream=%p\n", u8SD, pStream));
1085
1086	AssertReturn(u8SD < AC97_MAX_STREAMS, VERR_INVALID_PARAMETER);
1087	pStream->u8SD = u8SD;
1088	pStreamCC->u8SD = u8SD;
1089
1090	int rc = RTCritSectInit(&pStreamCC->State.CritSect);
1091	AssertRCReturn(rc, rc);
1092
1093	pStreamCC->Dbg.Runtime.fEnabled = pThisCC->Dbg.fEnabled;
1094
1095	if (RT_LIKELY(!pStreamCC->Dbg.Runtime.fEnabled))
1096	{ /* likely */ }
1097	else
1098	{
1099	char szFile[64];
1100
1101	if (ichac97GetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
1102	RTStrPrintf(szFile, sizeof(szFile), "ac97StreamWriteSD%RU8", pStream->u8SD);
1103	else
1104	RTStrPrintf(szFile, sizeof(szFile), "ac97StreamReadSD%RU8", pStream->u8SD);
1105
1106	char szPath[RTPATH_MAX];
1107	int rc2 = AudioHlpFileNameGet(szPath, sizeof(szPath), pThisCC->Dbg.pszOutPath, szFile,
1108	0 /* uInst */, AUDIOHLPFILETYPE_WAV, AUDIOHLPFILENAME_FLAGS_NONE);
1109	AssertRC(rc2);
1110	rc2 = AudioHlpFileCreate(AUDIOHLPFILETYPE_WAV, szPath, AUDIOHLPFILE_FLAGS_NONE, &pStreamCC->Dbg.Runtime.pFileStream);
1111	AssertRC(rc2);
1112
1113	if (ichac97GetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
1114	RTStrPrintf(szFile, sizeof(szFile), "ac97DMAWriteSD%RU8", pStream->u8SD);
1115	else
1116	RTStrPrintf(szFile, sizeof(szFile), "ac97DMAReadSD%RU8", pStream->u8SD);
1117
1118	rc2 = AudioHlpFileNameGet(szPath, sizeof(szPath), pThisCC->Dbg.pszOutPath, szFile,
1119	0 /* uInst */, AUDIOHLPFILETYPE_WAV, AUDIOHLPFILENAME_FLAGS_NONE);
1120	AssertRC(rc2);
1121
1122	rc2 = AudioHlpFileCreate(AUDIOHLPFILETYPE_WAV, szPath, AUDIOHLPFILE_FLAGS_NONE, &pStreamCC->Dbg.Runtime.pFileDMA);
1123	AssertRC(rc2);
1124
1125	/* Delete stale debugging files from a former run. */
1126	AudioHlpFileDelete(pStreamCC->Dbg.Runtime.pFileStream);
1127	AudioHlpFileDelete(pStreamCC->Dbg.Runtime.pFileDMA);
1128	}
1129
1130	return rc;
1131	}
1132
1133	/**
1134	* Destroys an AC'97 audio stream.
1135	*
1136	* @returns VBox status code.
1137	* @param pThis The shared AC'97 state.
1138	* @param pStream The AC'97 stream to destroy (shared).
1139	* @param pStreamCC The AC'97 stream to destroy (ring-3).
1140	*/
1141	static void ichac97R3StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream, PAC97STREAMR3 pStreamCC)
1142	{
1143	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
1144
1145	ichac97R3StreamClose(pStream);
1146
1147	int rc2 = RTCritSectDelete(&pStreamCC->State.CritSect);
1148	AssertRC(rc2);
1149
1150	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1151	rc2 = ichac97R3StreamAsyncIODestroy(pThis, pStreamCC);
1152	AssertRC(rc2);
1153	# else
1154	RT_NOREF(pThis);
1155	# endif
1156
1157	if (RT_LIKELY(!pStreamCC->Dbg.Runtime.fEnabled))
1158	{ /* likely */ }
1159	else
1160	{
1161	AudioHlpFileDestroy(pStreamCC->Dbg.Runtime.pFileStream);
1162	pStreamCC->Dbg.Runtime.pFileStream = NULL;
1163
1164	AudioHlpFileDestroy(pStreamCC->Dbg.Runtime.pFileDMA);
1165	pStreamCC->Dbg.Runtime.pFileDMA = NULL;
1166	}
1167
1168	if (pStreamCC->State.pCircBuf)
1169	{
1170	RTCircBufDestroy(pStreamCC->State.pCircBuf);
1171	pStreamCC->State.pCircBuf = NULL;
1172	}
1173
1174	LogFlowFuncLeave();
1175	}
1176
1177	/**
1178	* Destroys all AC'97 audio streams of the device.
1179	*
1180	* @param pDevIns The device AC'97 instance.
1181	* @param pThis The shared AC'97 state.
1182	* @param pThisCC The ring-3 AC'97 state.
1183	*/
1184	static void ichac97R3StreamsDestroy(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STATER3 pThisCC)
1185	{
1186	LogFlowFuncEnter();
1187
1188	/*
1189	* Destroy all AC'97 streams.
1190	*/
1191	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
1192	ichac97R3StreamDestroy(pThis, &pThis->aStreams[i], &pThisCC->aStreams[i]);
1193
1194	/*
1195	* Destroy all sinks.
1196	*/
1197
1198	PDMAUDIODSTSRCUNION dstSrc;
1199	if (pThisCC->pSinkLineIn)
1200	{
1201	dstSrc.enmSrc = PDMAUDIORECSRC_LINE;
1202	ichac97R3MixerRemoveDrvStreams(pDevIns, pThisCC, pThisCC->pSinkLineIn, PDMAUDIODIR_IN, dstSrc);
1203
1204	AudioMixerSinkDestroy(pThisCC->pSinkLineIn, pDevIns);
1205	pThisCC->pSinkLineIn = NULL;
1206	}
1207
1208	if (pThisCC->pSinkMicIn)
1209	{
1210	dstSrc.enmSrc = PDMAUDIORECSRC_MIC;
1211	ichac97R3MixerRemoveDrvStreams(pDevIns, pThisCC, pThisCC->pSinkMicIn, PDMAUDIODIR_IN, dstSrc);
1212
1213	AudioMixerSinkDestroy(pThisCC->pSinkMicIn, pDevIns);
1214	pThisCC->pSinkMicIn = NULL;
1215	}
1216
1217	if (pThisCC->pSinkOut)
1218	{
1219	dstSrc.enmDst = PDMAUDIOPLAYBACKDST_FRONT;
1220	ichac97R3MixerRemoveDrvStreams(pDevIns, pThisCC, pThisCC->pSinkOut, PDMAUDIODIR_OUT, dstSrc);
1221
1222	AudioMixerSinkDestroy(pThisCC->pSinkOut, pDevIns);
1223	pThisCC->pSinkOut = NULL;
1224	}
1225	}
1226
1227	/**
1228	* Writes audio data from a mixer sink into an AC'97 stream's DMA buffer.
1229	*
1230	* @returns VBox status code.
1231	* @param pDstStreamCC The AC'97 stream to write to (ring-3).
1232	* @param pSrcMixSink Mixer sink to get audio data to write from.
1233	* @param cbToWrite Number of bytes to write.
1234	* @param pcbWritten Number of bytes written. Optional.
1235	*/
1236	static int ichac97R3StreamWrite(PAC97STREAMR3 pDstStreamCC, PAUDMIXSINK pSrcMixSink, uint32_t cbToWrite, uint32_t *pcbWritten)
1237	{
1238	AssertPtrReturn(pSrcMixSink, VERR_INVALID_POINTER);
1239	AssertReturn(cbToWrite > 0, VERR_INVALID_PARAMETER);
1240	/* pcbWritten is optional. */
1241
1242	PRTCIRCBUF pCircBuf = pDstStreamCC->State.pCircBuf;
1243	AssertPtr(pCircBuf);
1244
1245	uint32_t cbRead = 0;
1246
1247	void *pvDst;
1248	size_t cbDst;
1249	RTCircBufAcquireWriteBlock(pCircBuf, cbToWrite, &pvDst, &cbDst);
1250
1251	if (cbDst)
1252	{
1253	int rc2 = AudioMixerSinkRead(pSrcMixSink, AUDMIXOP_COPY, pvDst, (uint32_t)cbDst, &cbRead);
1254	AssertRC(rc2);
1255
1256	if (RT_LIKELY(!pDstStreamCC->Dbg.Runtime.fEnabled))
1257	{ /* likely */ }
1258	else
1259	AudioHlpFileWrite(pDstStreamCC->Dbg.Runtime.pFileStream, pvDst, cbRead, 0 /* fFlags */);
1260	}
1261
1262	RTCircBufReleaseWriteBlock(pCircBuf, cbRead);
1263
1264	if (pcbWritten)
1265	*pcbWritten = cbRead;
1266
1267	return VINF_SUCCESS;
1268	}
1269
1270	/**
1271	* Reads audio data from an AC'97 stream's DMA buffer and writes into a specified mixer sink.
1272	*
1273	* @returns VBox status code.
1274	* @param pSrcStreamCC AC'97 stream to read audio data from (ring-3).
1275	* @param pDstMixSink Mixer sink to write audio data to.
1276	* @param cbToRead Number of bytes to read.
1277	* @param pcbRead Number of bytes read. Optional.
1278	*/
1279	static int ichac97R3StreamRead(PAC97STREAMR3 pSrcStreamCC, PAUDMIXSINK pDstMixSink, uint32_t cbToRead, uint32_t *pcbRead)
1280	{
1281	AssertPtrReturn(pDstMixSink, VERR_INVALID_POINTER);
1282	AssertReturn(cbToRead > 0, VERR_INVALID_PARAMETER);
1283	/* pcbRead is optional. */
1284
1285	PRTCIRCBUF pCircBuf = pSrcStreamCC->State.pCircBuf;
1286	AssertPtr(pCircBuf);
1287
1288	void *pvSrc;
1289	size_t cbSrc;
1290
1291	int rc = VINF_SUCCESS;
1292
1293	uint32_t cbReadTotal = 0;
1294	uint32_t cbLeft = RT_MIN(cbToRead, (uint32_t)RTCircBufUsed(pCircBuf));
1295
1296	while (cbLeft)
1297	{
1298	uint32_t cbWritten = 0;
1299
1300	RTCircBufAcquireReadBlock(pCircBuf, cbLeft, &pvSrc, &cbSrc);
1301
1302	if (cbSrc)
1303	{
1304	if (RT_LIKELY(!pSrcStreamCC->Dbg.Runtime.fEnabled))
1305	{ /* likely */ }
1306	else
1307	AudioHlpFileWrite(pSrcStreamCC->Dbg.Runtime.pFileStream, pvSrc, cbSrc, 0 /* fFlags */);
1308
1309	rc = AudioMixerSinkWrite(pDstMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
1310	AssertRC(rc);
1311
1312	Assert(cbSrc >= cbWritten);
1313	Log3Func(("[SD%RU8] %RU32/%zu bytes read\n", pSrcStreamCC->u8SD, cbWritten, cbSrc));
1314	}
1315
1316	RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
1317
1318	if ( !cbWritten /* Nothing written? */
1319	\|\| RT_FAILURE(rc))
1320	break;
1321
1322	Assert(cbLeft >= cbWritten);
1323	cbLeft -= cbWritten;
1324
1325	cbReadTotal += cbWritten;
1326	}
1327
1328	if (pcbRead)
1329	*pcbRead = cbReadTotal;
1330
1331	return rc;
1332	}
1333
1334	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1335
1336	/**
1337	* Asynchronous I/O thread for an AC'97 stream.
1338	* This will do the heavy lifting work for us as soon as it's getting notified by another thread.
1339	*
1340	* @returns VBox status code.
1341	* @param hThreadSelf Thread handle.
1342	* @param pvUser User argument. Must be of type PAC97STREAMTHREADCTX.
1343	*/
1344	static DECLCALLBACK(int) ichac97R3StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
1345	{
1346	PAC97STREAMTHREADCTX pCtx = (PAC97STREAMTHREADCTX)pvUser;
1347	AssertPtr(pCtx);
1348
1349	PAC97STATE pThis = pCtx->pThis;
1350	AssertPtr(pThis);
1351
1352	PAC97STATER3 pThisCC = pCtx->pThisCC;
1353	AssertPtr(pThisCC);
1354
1355	PAC97STREAM pStream = pCtx->pStream;
1356	AssertPtr(pStream);
1357
1358	PAC97STREAMR3 pStreamCC = pCtx->pStreamCC;
1359	AssertPtr(pStreamCC);
1360
1361	PAC97STREAMSTATEAIO pAIO = &pStreamCC->State.AIO;
1362
1363	ASMAtomicXchgBool(&pAIO->fStarted, true);
1364
1365	RTThreadUserSignal(hThreadSelf);
1366
1367	LogFunc(("[SD%RU8] Started\n", pStream->u8SD));
1368
1369	for (;;)
1370	{
1371	Log2Func(("[SD%RU8] Waiting ...\n", pStream->u8SD));
1372
1373	int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1374	if (RT_FAILURE(rc2))
1375	break;
1376
1377	if (ASMAtomicReadBool(&pAIO->fShutdown))
1378	break;
1379
1380	rc2 = RTCritSectEnter(&pAIO->CritSect);
1381	if (RT_SUCCESS(rc2))
1382	{
1383	if (!pAIO->fEnabled)
1384	{
1385	RTCritSectLeave(&pAIO->CritSect);
1386	continue;
1387	}
1388
1389	ichac97R3StreamUpdate(pThisCC->pDevIns, pThis, pThisCC, pStream, pStreamCC, false /* fInTimer */);
1390
1391	int rc3 = RTCritSectLeave(&pAIO->CritSect);
1392	AssertRC(rc3);
1393	}
1394
1395	AssertRC(rc2);
1396	}
1397
1398	LogFunc(("[SD%RU8] Ended\n", pStream->u8SD));
1399
1400	ASMAtomicXchgBool(&pAIO->fStarted, false);
1401
1402	RTMemFree(pCtx);
1403	pCtx = NULL;
1404
1405	return VINF_SUCCESS;
1406	}
1407
1408	/**
1409	* Creates the async I/O thread for a specific AC'97 audio stream.
1410	*
1411	* @returns VBox status code.
1412	* @param pThis The shared AC'97 state (shared).
1413	* @param pThisCC The shared AC'97 state (ring-3).
1414	* @param pStream AC'97 audio stream to create the async I/O thread for (shared).
1415	* @param pStreamCC AC'97 audio stream to create the async I/O thread for (ring-3).
1416	*/
1417	static int ichac97R3StreamAsyncIOCreate(PAC97STATE pThis, PAC97STATER3 pThisCC, PAC97STREAM pStream, PAC97STREAMR3 pStreamCC)
1418	{
1419	PAC97STREAMSTATEAIO pAIO = &pStreamCC->State.AIO;
1420
1421	int rc;
1422
1423	if (!ASMAtomicReadBool(&pAIO->fStarted))
1424	{
1425	pAIO->fShutdown = false;
1426	pAIO->fEnabled = true; /* Enabled by default. */
1427
1428	rc = RTSemEventCreate(&pAIO->Event);
1429	if (RT_SUCCESS(rc))
1430	{
1431	rc = RTCritSectInit(&pAIO->CritSect);
1432	if (RT_SUCCESS(rc))
1433	{
1434	/** @todo r=bird:
1435	* Why aren't this code using the PDM threads (PDMDevHlpThreadCreate)?
1436	* They would help you with managing stuff like VM suspending, resuming
1437	* and powering off.
1438	*
1439	* Finally, just create the threads at construction time. */
1440	PAC97STREAMTHREADCTX pCtx = (PAC97STREAMTHREADCTX)RTMemAllocZ(sizeof(AC97STREAMTHREADCTX));
1441	if (pCtx)
1442	{
1443	pCtx->pStream = pStream;
1444	pCtx->pStreamCC = pStreamCC;
1445	pCtx->pThis = pThis;
1446	pCtx->pThisCC = pThisCC;
1447
1448	rc = RTThreadCreateF(&pAIO->Thread, ichac97R3StreamAsyncIOThread, pCtx,
1449	0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "ac97AIO%RU8", pStreamCC->u8SD);
1450	if (RT_SUCCESS(rc))
1451	rc = RTThreadUserWait(pAIO->Thread, 30 * 1000 /* 30s timeout */);
1452	}
1453	else
1454	rc = VERR_NO_MEMORY;
1455	}
1456	}
1457	}
1458	else
1459	rc = VINF_SUCCESS;
1460
1461	LogFunc(("[SD%RU8] Returning %Rrc\n", pStreamCC->u8SD, rc));
1462	return rc;
1463	}
1464
1465	/**
1466	* Lets the stream's async I/O thread know that there is some data to process.
1467	*
1468	* @returns VBox status code.
1469	* @param pStreamCC The AC'97 stream to notify async I/O thread
1470	* for (ring-3).
1471	*/
1472	static int ichac97R3StreamAsyncIONotify(PAC97STREAMR3 pStreamCC)
1473	{
1474	LogFunc(("[SD%RU8]\n", pStreamCC->u8SD));
1475	return RTSemEventSignal(pStreamCC->State.AIO.Event);
1476	}
1477
1478	/**
1479	* Destroys the async I/O thread of a specific AC'97 audio stream.
1480	*
1481	* @returns VBox status code.
1482	* @param pThis The shared AC'97 state.
1483	* @param pStreamCC AC'97 audio stream to destroy the async I/O thread for.
1484	*/
1485	static int ichac97R3StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAMR3 pStreamR3)
1486	{
1487	RT_NOREF(pThis);
1488
1489	PAC97STREAMSTATEAIO pAIO = &pStreamR3->State.AIO;
1490
1491	if (!ASMAtomicReadBool(&pAIO->fStarted))
1492	return VINF_SUCCESS;
1493
1494	ASMAtomicWriteBool(&pAIO->fShutdown, true);
1495
1496	int rc = ichac97R3StreamAsyncIONotify(pStreamR3);
1497	AssertRC(rc);
1498
1499	int rcThread;
1500	rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
1501	LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
1502
1503	if (RT_SUCCESS(rc))
1504	{
1505	rc = RTCritSectDelete(&pAIO->CritSect);
1506	AssertRC(rc);
1507
1508	rc = RTSemEventDestroy(pAIO->Event);
1509	AssertRC(rc);
1510
1511	pAIO->fStarted = false;
1512	pAIO->fShutdown = false;
1513	pAIO->fEnabled = false;
1514	}
1515
1516	LogFunc(("[SD%RU8] Returning %Rrc\n", pStreamR3->u8SD, rc));
1517	return rc;
1518	}
1519
1520	/**
1521	* Locks the async I/O thread of a specific AC'97 audio stream.
1522	*
1523	* @param pStreamCC AC'97 stream to lock async I/O thread for.
1524	*/
1525	static void ichac97R3StreamAsyncIOLock(PAC97STREAMR3 pStreamCC)
1526	{
1527	PAC97STREAMSTATEAIO pAIO = &pStreamCC->State.AIO;
1528
1529	if (!ASMAtomicReadBool(&pAIO->fStarted))
1530	return;
1531
1532	int rc2 = RTCritSectEnter(&pAIO->CritSect);
1533	AssertRC(rc2);
1534	}
1535
1536	/**
1537	* Unlocks the async I/O thread of a specific AC'97 audio stream.
1538	*
1539	* @param pStreamCC AC'97 stream to unlock async I/O thread for.
1540	*/
1541	static void ichac97R3StreamAsyncIOUnlock(PAC97STREAMR3 pStreamCC)
1542	{
1543	PAC97STREAMSTATEAIO pAIO = &pStreamCC->State.AIO;
1544
1545	if (!ASMAtomicReadBool(&pAIO->fStarted))
1546	return;
1547
1548	int rc2 = RTCritSectLeave(&pAIO->CritSect);
1549	AssertRC(rc2);
1550	}
1551
1552	#if 0 /* Unused */
1553	/**
1554	* Enables (resumes) or disables (pauses) the async I/O thread.
1555	*
1556	* @param pStream AC'97 stream to enable/disable async I/O thread for.
1557	* @param fEnable Whether to enable or disable the I/O thread.
1558	*
1559	* @remarks Does not do locking.
1560	*/
1561	static void ichac97R3StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable)
1562	{
1563	PAC97STREAMSTATEAIO pAIO = &pStreamCC->State.AIO;
1564	ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
1565	}
1566	#endif
1567	# endif /* VBOX_WITH_AUDIO_AC97_ASYNC_IO */
1568
1569	# ifdef LOG_ENABLED
1570	static void ichac97R3BDLEDumpAll(PPDMDEVINS pDevIns, uint64_t u64BDLBase, uint16_t cBDLE)
1571	{
1572	LogFlowFunc(("BDLEs @ 0x%x (%RU16):\n", u64BDLBase, cBDLE));
1573	if (!u64BDLBase)
1574	return;
1575
1576	uint32_t cbBDLE = 0;
1577	for (uint16_t i = 0; i < cBDLE; i++)
1578	{
1579	AC97BDLE BDLE;
1580	PDMDevHlpPCIPhysRead(pDevIns, u64BDLBase + i * sizeof(AC97BDLE), &BDLE, sizeof(AC97BDLE));
1581
1582	# ifndef RT_LITTLE_ENDIAN
1583	# error "Please adapt the code (audio buffers are little endian)!"
1584	# else
1585	BDLE.addr = RT_H2LE_U32(BDLE.addr & ~3);
1586	BDLE.ctl_len = RT_H2LE_U32(BDLE.ctl_len);
1587	#endif
1588	LogFunc(("\t#%03d BDLE(adr:0x%llx, size:%RU32 [%RU32 bytes], bup:%RTbool, ioc:%RTbool)\n",
1589	i, BDLE.addr,
1590	BDLE.ctl_len & AC97_BD_LEN_MASK,
1591	(BDLE.ctl_len & AC97_BD_LEN_MASK) << 1, /** @todo r=andy Assumes 16bit samples. */
1592	RT_BOOL(BDLE.ctl_len & AC97_BD_BUP),
1593	RT_BOOL(BDLE.ctl_len & AC97_BD_IOC)));
1594
1595	cbBDLE += (BDLE.ctl_len & AC97_BD_LEN_MASK) << 1; /** @todo r=andy Ditto. */
1596	}
1597
1598	LogFlowFunc(("Total: %RU32 bytes\n", cbBDLE));
1599	}
1600	# endif /* LOG_ENABLED */
1601
1602	/**
1603	* Updates an AC'97 stream by doing its required data transfers.
1604	* The host sink(s) set the overall pace.
1605	*
1606	* This routine is called by both, the synchronous and the asynchronous
1607	* (VBOX_WITH_AUDIO_AC97_ASYNC_IO), implementations.
1608	*
1609	* When running synchronously, the device DMA transfers and the mixer sink
1610	* processing is within the device timer.
1611	*
1612	* When running asynchronously, only the device DMA transfers are done in the
1613	* device timer, whereas the mixer sink processing then is done in the stream's
1614	* own async I/O thread. This thread also will call this function
1615	* (with fInTimer set to @c false).
1616	*
1617	* @param pDevIns The device instance.
1618	* @param pThis The shared AC'97 state.
1619	* @param pThisCC The ring-3 AC'97 state.
1620	* @param pStream The AC'97 stream to update (shared).
1621	* @param pStreamCC The AC'97 stream to update (ring-3).
1622	* @param fInTimer Whether to this function was called from the timer
1623	* context or an asynchronous I/O stream thread (if supported).
1624	*/
1625	static void ichac97R3StreamUpdate(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STATER3 pThisCC,
1626	PAC97STREAM pStream, PAC97STREAMR3 pStreamCC, bool fInTimer)
1627	{
1628	RT_NOREF(fInTimer);
1629
1630	PAUDMIXSINK pSink = ichac97R3IndexToSink(pThisCC, pStream->u8SD);
1631	AssertPtr(pSink);
1632
1633	if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
1634	return;
1635
1636	int rc2;
1637
1638	if (pStreamCC->State.Cfg.enmDir == PDMAUDIODIR_OUT) /* Output (SDO). */
1639	{
1640	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1641	if (fInTimer)
1642	# endif
1643	{
1644	const uint32_t cbStreamFree = ichac97R3StreamGetFree(pStreamCC);
1645	if (cbStreamFree)
1646	{
1647	Log3Func(("[SD%RU8] PICB=%zu (%RU64ms), cbFree=%zu (%RU64ms), cbTransferChunk=%zu (%RU64ms)\n",
1648	pStream->u8SD,
1649	(pStream->Regs.picb << 1), PDMAudioPropsBytesToMilli(&pStreamCC->State.Cfg.Props, pStream->Regs.picb << 1),
1650	cbStreamFree, PDMAudioPropsBytesToMilli(&pStreamCC->State.Cfg.Props, cbStreamFree),
1651	pStreamCC->State.cbTransferChunk, PDMAudioPropsBytesToMilli(&pStreamCC->State.Cfg.Props, pStreamCC->State.cbTransferChunk)));
1652
1653	/* Do the DMA transfer. */
1654	rc2 = ichac97R3StreamTransfer(pDevIns, pThis, pStream, pStreamCC,
1655	RT_MIN(pStreamCC->State.cbTransferChunk, cbStreamFree));
1656	AssertRC(rc2);
1657
1658	pStreamCC->State.tsLastUpdateNs = RTTimeNanoTS();
1659	}
1660	}
1661
1662	Log3Func(("[SD%RU8] fInTimer=%RTbool\n", pStream->u8SD, fInTimer));
1663
1664	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1665	rc2 = ichac97R3StreamAsyncIONotify(pStreamCC);
1666	AssertRC(rc2);
1667	# endif
1668
1669	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1670	if (!fInTimer) /* In async I/O thread */
1671	{
1672	# endif
1673	const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
1674	const uint32_t cbStreamReadable = ichac97R3StreamGetUsed(pStreamCC);
1675	const uint32_t cbToReadFromStream = RT_MIN(cbStreamReadable, cbSinkWritable);
1676
1677	Log3Func(("[SD%RU8] cbSinkWritable=%RU32, cbStreamReadable=%RU32\n", pStream->u8SD, cbSinkWritable, cbStreamReadable));
1678
1679	if (cbToReadFromStream)
1680	{
1681	/* Read (guest output) data and write it to the stream's sink. */
1682	rc2 = ichac97R3StreamRead(pStreamCC, pSink, cbToReadFromStream, NULL /* pcbRead */);
1683	AssertRC(rc2);
1684	}
1685	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1686	}
1687	#endif
1688	/* When running synchronously, update the associated sink here.
1689	* Otherwise this will be done in the async I/O thread. */
1690	rc2 = AudioMixerSinkUpdate(pSink);
1691	AssertRC(rc2);
1692	}
1693	else /* Input (SDI). */
1694	{
1695	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1696	if (!fInTimer)
1697	{
1698	# endif
1699	rc2 = AudioMixerSinkUpdate(pSink);
1700	AssertRC(rc2);
1701
1702	/* Is the sink ready to be read (host input data) from? If so, by how much? */
1703	uint32_t cbSinkReadable = AudioMixerSinkGetReadable(pSink);
1704
1705	/* How much (guest input) data is available for writing at the moment for the AC'97 stream? */
1706	uint32_t cbStreamFree = ichac97R3StreamGetFree(pStreamCC);
1707
1708	Log3Func(("[SD%RU8] cbSinkReadable=%RU32, cbStreamFree=%RU32\n", pStream->u8SD, cbSinkReadable, cbStreamFree));
1709
1710	/* Do not read more than the sink can provide at the moment.
1711	* The host sets the overall pace. */
1712	if (cbSinkReadable > cbStreamFree)
1713	cbSinkReadable = cbStreamFree;
1714
1715	if (cbSinkReadable)
1716	{
1717	/* Write (guest input) data to the stream which was read from stream's sink before. */
1718	rc2 = ichac97R3StreamWrite(pStreamCC, pSink, cbSinkReadable, NULL /* pcbWritten */);
1719	AssertRC(rc2);
1720	}
1721	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1722	}
1723	else /* fInTimer */
1724	{
1725	# endif
1726
1727	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1728	const uint64_t tsNowNs = RTTimeNanoTS();
1729	if (tsNowNs - pStreamCC->State.tsLastUpdateNs >= pStreamCC->State.Cfg.Device.cMsSchedulingHint * RT_NS_1MS)
1730	{
1731	rc2 = ichac97R3StreamAsyncIONotify(pStreamCC);
1732	AssertRC(rc2);
1733
1734	pStreamCC->State.tsLastUpdateNs = tsNowNs;
1735	}
1736	# endif
1737
1738	const uint32_t cbStreamUsed = ichac97R3StreamGetUsed(pStreamCC);
1739	if (cbStreamUsed)
1740	{
1741	/* When running synchronously, do the DMA data transfers here.
1742	* Otherwise this will be done in the stream's async I/O thread. */
1743	rc2 = ichac97R3StreamTransfer(pDevIns, pThis, pStream, pStreamCC, cbStreamUsed);
1744	AssertRC(rc2);
1745	}
1746	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1747	}
1748	# endif
1749	}
1750	}
1751
1752	#endif /* IN_RING3 */
1753
1754	/**
1755	* Sets a AC'97 mixer control to a specific value.
1756	*
1757	* @returns VBox status code.
1758	* @param pThis The shared AC'97 state.
1759	* @param uMixerIdx Mixer control to set value for.
1760	* @param uVal Value to set.
1761	*/
1762	static void ichac97MixerSet(PAC97STATE pThis, uint8_t uMixerIdx, uint16_t uVal)
1763	{
1764	AssertMsgReturnVoid(uMixerIdx + 2U <= sizeof(pThis->mixer_data),
1765	("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1766
1767	LogRel2(("AC97: Setting mixer index #%RU8 to %RU16 (%RU8 %RU8)\n",
1768	uMixerIdx, uVal, RT_HI_U8(uVal), RT_LO_U8(uVal)));
1769
1770	pThis->mixer_data[uMixerIdx + 0] = RT_LO_U8(uVal);
1771	pThis->mixer_data[uMixerIdx + 1] = RT_HI_U8(uVal);
1772	}
1773
1774	/**
1775	* Gets a value from a specific AC'97 mixer control.
1776	*
1777	* @returns Retrieved mixer control value.
1778	* @param pThis The shared AC'97 state.
1779	* @param uMixerIdx Mixer control to get value for.
1780	*/
1781	static uint16_t ichac97MixerGet(PAC97STATE pThis, uint32_t uMixerIdx)
1782	{
1783	AssertMsgReturn(uMixerIdx + 2U <= sizeof(pThis->mixer_data),
1784	("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)),
1785	UINT16_MAX);
1786	return RT_MAKE_U16(pThis->mixer_data[uMixerIdx + 0], pThis->mixer_data[uMixerIdx + 1]);
1787	}
1788
1789	#ifdef IN_RING3
1790
1791	/**
1792	* Retrieves a specific driver stream of a AC'97 driver.
1793	*
1794	* @returns Pointer to driver stream if found, or NULL if not found.
1795	* @param pDrv Driver to retrieve driver stream for.
1796	* @param enmDir Stream direction to retrieve.
1797	* @param dstSrc Stream destination / source to retrieve.
1798	*/
1799	static PAC97DRIVERSTREAM ichac97R3MixerGetDrvStream(PAC97DRIVER pDrv, PDMAUDIODIR enmDir, PDMAUDIODSTSRCUNION dstSrc)
1800	{
1801	PAC97DRIVERSTREAM pDrvStream = NULL;
1802
1803	if (enmDir == PDMAUDIODIR_IN)
1804	{
1805	LogFunc(("enmRecSource=%d\n", dstSrc.enmSrc));
1806
1807	switch (dstSrc.enmSrc)
1808	{
1809	case PDMAUDIORECSRC_LINE:
1810	pDrvStream = &pDrv->LineIn;
1811	break;
1812	case PDMAUDIORECSRC_MIC:
1813	pDrvStream = &pDrv->MicIn;
1814	break;
1815	default:
1816	AssertFailed();
1817	break;
1818	}
1819	}
1820	else if (enmDir == PDMAUDIODIR_OUT)
1821	{
1822	LogFunc(("enmPlaybackDest=%d\n", dstSrc.enmDst));
1823
1824	switch (dstSrc.enmDst)
1825	{
1826	case PDMAUDIOPLAYBACKDST_FRONT:
1827	pDrvStream = &pDrv->Out;
1828	break;
1829	default:
1830	AssertFailed();
1831	break;
1832	}
1833	}
1834	else
1835	AssertFailed();
1836
1837	return pDrvStream;
1838	}
1839
1840	/**
1841	* Adds a driver stream to a specific mixer sink.
1842	*
1843	* @returns VBox status code.
1844	* @param pDevIns The device instance.
1845	* @param pMixSink Mixer sink to add driver stream to.
1846	* @param pCfg Stream configuration to use.
1847	* @param pDrv Driver stream to add.
1848	*/
1849	static int ichac97R3MixerAddDrvStream(PPDMDEVINS pDevIns, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg, PAC97DRIVER pDrv)
1850	{
1851	AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1852
1853	PPDMAUDIOSTREAMCFG pStreamCfg = PDMAudioStrmCfgDup(pCfg);
1854	if (!pStreamCfg)
1855	return VERR_NO_MEMORY;
1856
1857	if (!RTStrPrintf(pStreamCfg->szName, sizeof(pStreamCfg->szName), "%s", pCfg->szName))
1858	{
1859	PDMAudioStrmCfgFree(pStreamCfg);
1860	return VERR_BUFFER_OVERFLOW;
1861	}
1862
1863	LogFunc(("[LUN#%RU8] %s\n", pDrv->uLUN, pStreamCfg->szName));
1864
1865	int rc;
1866
1867	PAC97DRIVERSTREAM pDrvStream = ichac97R3MixerGetDrvStream(pDrv, pStreamCfg->enmDir, pStreamCfg->u);
1868	if (pDrvStream)
1869	{
1870	AssertMsg(pDrvStream->pMixStrm == NULL, ("[LUN#%RU8] Driver stream already present when it must not\n", pDrv->uLUN));
1871
1872	PAUDMIXSTREAM pMixStrm;
1873	rc = AudioMixerSinkCreateStream(pMixSink, pDrv->pConnector, pStreamCfg, 0 /* fFlags */, pDevIns, &pMixStrm);
1874	LogFlowFunc(("LUN#%RU8: Created stream \"%s\" for sink, rc=%Rrc\n", pDrv->uLUN, pStreamCfg->szName, rc));
1875	if (RT_SUCCESS(rc))
1876	{
1877	rc = AudioMixerSinkAddStream(pMixSink, pMixStrm);
1878	LogFlowFunc(("LUN#%RU8: Added stream \"%s\" to sink, rc=%Rrc\n", pDrv->uLUN, pStreamCfg->szName, rc));
1879	if (RT_SUCCESS(rc))
1880	{
1881	/* If this is an input stream, always set the latest (added) stream
1882	* as the recording source. */
1883	/** @todo Make the recording source dynamic (CFGM?). */
1884	if (pStreamCfg->enmDir == PDMAUDIODIR_IN)
1885	{
1886	PDMAUDIOBACKENDCFG Cfg;
1887	rc = pDrv->pConnector->pfnGetConfig(pDrv->pConnector, &Cfg);
1888	if (RT_SUCCESS(rc))
1889	{
1890	if (Cfg.cMaxStreamsIn) /* At least one input source available? */
1891	{
1892	rc = AudioMixerSinkSetRecordingSource(pMixSink, pMixStrm);
1893	LogFlowFunc(("LUN#%RU8: Recording source for '%s' -> '%s', rc=%Rrc\n",
1894	pDrv->uLUN, pStreamCfg->szName, Cfg.szName, rc));
1895
1896	if (RT_SUCCESS(rc))
1897	LogRel2(("AC97: Set recording source for '%s' to '%s'\n", pStreamCfg->szName, Cfg.szName));
1898	}
1899	else
1900	LogRel(("AC97: Backend '%s' currently is not offering any recording source for '%s'\n",
1901	Cfg.szName, pStreamCfg->szName));
1902	}
1903	else if (RT_FAILURE(rc))
1904	LogFunc(("LUN#%RU8: Unable to retrieve backend configuratio for '%s', rc=%Rrc\n",
1905	pDrv->uLUN, pStreamCfg->szName, rc));
1906	}
1907	/** @todo r=bird: see below. */
1908	if (RT_FAILURE(rc))
1909	AudioMixerSinkRemoveStream(pMixSink, pMixStrm);
1910	}
1911	/** @todo r=bird: I've added this destroy stuff here, because if it looks as if
1912	* you just drop the stream if the AudioMixerSinkAddStream fails for some
1913	* reason. This is definitely true if AudioMixerSinkSetRecordingSource fails
1914	* above, because it leads to duplicate statistics when starting XP with ICH97
1915	* and VRDP enabled. Looks like the VRDP line-in fails with
1916	* VERR_AUDIO_STREAM_NOT_READY when configured for 8000HZ, then it asserts in
1917	* STAM when 48000Hz is configured right afterwards. */
1918	if (RT_FAILURE(rc))
1919	AudioMixerStreamDestroy(pMixStrm, pDevIns);
1920	}
1921
1922	if (RT_SUCCESS(rc))
1923	pDrvStream->pMixStrm = pMixStrm;
1924	}
1925	else
1926	rc = VERR_INVALID_PARAMETER;
1927
1928	PDMAudioStrmCfgFree(pStreamCfg);
1929
1930	LogFlowFuncLeaveRC(rc);
1931	return rc;
1932	}
1933
1934	/**
1935	* Adds all current driver streams to a specific mixer sink.
1936	*
1937	* @returns VBox status code.
1938	* @param pDevIns The device instance.
1939	* @param pThisCC The ring-3 AC'97 state.
1940	* @param pMixSink Mixer sink to add stream to.
1941	* @param pCfg Stream configuration to use.
1942	*/
1943	static int ichac97R3MixerAddDrvStreams(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg)
1944	{
1945	AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1946
1947	if (!AudioHlpStreamCfgIsValid(pCfg))
1948	return VERR_INVALID_PARAMETER;
1949
1950	int rc = AudioMixerSinkSetFormat(pMixSink, &pCfg->Props);
1951	if (RT_FAILURE(rc))
1952	return rc;
1953
1954	PAC97DRIVER pDrv;
1955	RTListForEach(&pThisCC->lstDrv, pDrv, AC97DRIVER, Node)
1956	{
1957	int rc2 = ichac97R3MixerAddDrvStream(pDevIns, pMixSink, pCfg, pDrv);
1958	if (RT_FAILURE(rc2))
1959	LogFunc(("Attaching stream failed with %Rrc\n", rc2));
1960
1961	/* Do not pass failure to rc here, as there might be drivers which aren't
1962	* configured / ready yet. */
1963	}
1964
1965	LogFlowFuncLeaveRC(rc);
1966	return rc;
1967	}
1968
1969	/**
1970	* Adds a specific AC'97 driver to the driver chain.
1971	*
1972	* @returns VBox status code.
1973	* @param pDevIns The device instance.
1974	* @param pThisCC The ring-3 AC'97 device state.
1975	* @param pDrv The AC'97 driver to add.
1976	*/
1977	static int ichac97R3MixerAddDrv(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, PAC97DRIVER pDrv)
1978	{
1979	int rc = VINF_SUCCESS;
1980
1981	if (AudioHlpStreamCfgIsValid(&pThisCC->aStreams[AC97SOUNDSOURCE_PI_INDEX].State.Cfg))
1982	rc = ichac97R3MixerAddDrvStream(pDevIns, pThisCC->pSinkLineIn,
1983	&pThisCC->aStreams[AC97SOUNDSOURCE_PI_INDEX].State.Cfg, pDrv);
1984
1985	if (AudioHlpStreamCfgIsValid(&pThisCC->aStreams[AC97SOUNDSOURCE_PO_INDEX].State.Cfg))
1986	{
1987	int rc2 = ichac97R3MixerAddDrvStream(pDevIns, pThisCC->pSinkOut,
1988	&pThisCC->aStreams[AC97SOUNDSOURCE_PO_INDEX].State.Cfg, pDrv);
1989	if (RT_SUCCESS(rc))
1990	rc = rc2;
1991	}
1992
1993	if (AudioHlpStreamCfgIsValid(&pThisCC->aStreams[AC97SOUNDSOURCE_MC_INDEX].State.Cfg))
1994	{
1995	int rc2 = ichac97R3MixerAddDrvStream(pDevIns, pThisCC->pSinkMicIn,
1996	&pThisCC->aStreams[AC97SOUNDSOURCE_MC_INDEX].State.Cfg, pDrv);
1997	if (RT_SUCCESS(rc))
1998	rc = rc2;
1999	}
2000
2001	return rc;
2002	}
2003
2004	/**
2005	* Removes a specific AC'97 driver from the driver chain and destroys its
2006	* associated streams.
2007	*
2008	* @param pDevIns The device instance.
2009	* @param pThisCC The ring-3 AC'97 device state.
2010	* @param pDrv AC'97 driver to remove.
2011	*/
2012	static void ichac97R3MixerRemoveDrv(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, PAC97DRIVER pDrv)
2013	{
2014	if (pDrv->MicIn.pMixStrm)
2015	{
2016	if (AudioMixerSinkGetRecordingSource(pThisCC->pSinkMicIn) == pDrv->MicIn.pMixStrm)
2017	AudioMixerSinkSetRecordingSource(pThisCC->pSinkMicIn, NULL);
2018
2019	AudioMixerSinkRemoveStream(pThisCC->pSinkMicIn, pDrv->MicIn.pMixStrm);
2020	AudioMixerStreamDestroy(pDrv->MicIn.pMixStrm, pDevIns);
2021	pDrv->MicIn.pMixStrm = NULL;
2022	}
2023
2024	if (pDrv->LineIn.pMixStrm)
2025	{
2026	if (AudioMixerSinkGetRecordingSource(pThisCC->pSinkLineIn) == pDrv->LineIn.pMixStrm)
2027	AudioMixerSinkSetRecordingSource(pThisCC->pSinkLineIn, NULL);
2028
2029	AudioMixerSinkRemoveStream(pThisCC->pSinkLineIn, pDrv->LineIn.pMixStrm);
2030	AudioMixerStreamDestroy(pDrv->LineIn.pMixStrm, pDevIns);
2031	pDrv->LineIn.pMixStrm = NULL;
2032	}
2033
2034	if (pDrv->Out.pMixStrm)
2035	{
2036	AudioMixerSinkRemoveStream(pThisCC->pSinkOut, pDrv->Out.pMixStrm);
2037	AudioMixerStreamDestroy(pDrv->Out.pMixStrm, pDevIns);
2038	pDrv->Out.pMixStrm = NULL;
2039	}
2040
2041	RTListNodeRemove(&pDrv->Node);
2042	}
2043
2044	/**
2045	* Removes a driver stream from a specific mixer sink.
2046	*
2047	* @param pDevIns The device instance.
2048	* @param pMixSink Mixer sink to remove audio streams from.
2049	* @param enmDir Stream direction to remove.
2050	* @param dstSrc Stream destination / source to remove.
2051	* @param pDrv Driver stream to remove.
2052	*/
2053	static void ichac97R3MixerRemoveDrvStream(PPDMDEVINS pDevIns, PAUDMIXSINK pMixSink, PDMAUDIODIR enmDir,
2054	PDMAUDIODSTSRCUNION dstSrc, PAC97DRIVER pDrv)
2055	{
2056	PAC97DRIVERSTREAM pDrvStream = ichac97R3MixerGetDrvStream(pDrv, enmDir, dstSrc);
2057	if (pDrvStream)
2058	{
2059	if (pDrvStream->pMixStrm)
2060	{
2061	AudioMixerSinkRemoveStream(pMixSink, pDrvStream->pMixStrm);
2062
2063	AudioMixerStreamDestroy(pDrvStream->pMixStrm, pDevIns);
2064	pDrvStream->pMixStrm = NULL;
2065	}
2066	}
2067	}
2068
2069	/**
2070	* Removes all driver streams from a specific mixer sink.
2071	*
2072	* @param pDevIns The device instance.
2073	* @param pThisCC The ring-3 AC'97 state.
2074	* @param pMixSink Mixer sink to remove audio streams from.
2075	* @param enmDir Stream direction to remove.
2076	* @param dstSrc Stream destination / source to remove.
2077	*/
2078	static void ichac97R3MixerRemoveDrvStreams(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, PAUDMIXSINK pMixSink,
2079	PDMAUDIODIR enmDir, PDMAUDIODSTSRCUNION dstSrc)
2080	{
2081	AssertPtrReturnVoid(pMixSink);
2082
2083	PAC97DRIVER pDrv;
2084	RTListForEach(&pThisCC->lstDrv, pDrv, AC97DRIVER, Node)
2085	{
2086	ichac97R3MixerRemoveDrvStream(pDevIns, pMixSink, enmDir, dstSrc, pDrv);
2087	}
2088	}
2089
2090	/**
2091	* Calculates and returns the ticks for a specified amount of bytes.
2092	*
2093	* @returns Calculated ticks
2094	* @param pDevIns The device instance.
2095	* @param pStream AC'97 stream to calculate ticks for (shared).
2096	* @param pStreamCC AC'97 stream to calculate ticks for (ring-3).
2097	* @param cbBytes Bytes to calculate ticks for.
2098	*/
2099	static uint64_t ichac97R3StreamTransferCalcNext(PPDMDEVINS pDevIns, PAC97STREAM pStream, PAC97STREAMR3 pStreamCC, uint32_t cbBytes)
2100	{
2101	if (!cbBytes)
2102	return 0;
2103
2104	const uint64_t usBytes = PDMAudioPropsBytesToMicro(&pStreamCC->State.Cfg.Props, cbBytes);
2105	const uint64_t cTransferTicks = PDMDevHlpTimerFromMicro(pDevIns, pStream->hTimer, usBytes);
2106
2107	Log3Func(("[SD%RU8] Timer %uHz, cbBytes=%RU32 -> usBytes=%RU64, cTransferTicks=%RU64\n",
2108	pStream->u8SD, pStreamCC->State.uTimerHz, cbBytes, usBytes, cTransferTicks));
2109
2110	return cTransferTicks;
2111	}
2112
2113	/**
2114	* Updates the next transfer based on a specific amount of bytes.
2115	*
2116	* @param pDevIns The device instance.
2117	* @param pStream The AC'97 stream to update (shared).
2118	* @param pStreamCC The AC'97 stream to update (ring-3).
2119	* @param cbBytes Bytes to update next transfer for.
2120	*/
2121	static void ichac97R3StreamTransferUpdate(PPDMDEVINS pDevIns, PAC97STREAM pStream, PAC97STREAMR3 pStreamCC, uint32_t cbBytes)
2122	{
2123	if (!cbBytes)
2124	return;
2125
2126	/* Calculate the bytes we need to transfer to / from the stream's DMA per iteration.
2127	* This is bound to the device's Hz rate and thus to the (virtual) timing the device expects. */
2128	pStreamCC->State.cbTransferChunk = cbBytes;
2129
2130	/* Update the transfer ticks. */
2131	pStreamCC->State.cTransferTicks = ichac97R3StreamTransferCalcNext(pDevIns, pStream, pStreamCC,
2132	pStreamCC->State.cbTransferChunk);
2133	Assert(pStreamCC->State.cTransferTicks); /* Paranoia. */
2134	}
2135
2136	/**
2137	* Opens an AC'97 stream with its current mixer settings.
2138	*
2139	* This will open an AC'97 stream with 2 (stereo) channels, 16-bit samples and
2140	* the last set sample rate in the AC'97 mixer for this stream.
2141	*
2142	* @returns VBox status code.
2143	* @param pDevIns The device instance.
2144	* @param pThis The shared AC'97 device state (shared).
2145	* @param pThisCC The shared AC'97 device state (ring-3).
2146	* @param pStream The AC'97 stream to open (shared).
2147	* @param pStreamCC The AC'97 stream to open (ring-3).
2148	* @param fForce Whether to force re-opening the stream or not.
2149	* Otherwise re-opening only will happen if the PCM properties have changed.
2150	*/
2151	static int ichac97R3StreamOpen(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STATER3 pThisCC, PAC97STREAM pStream,
2152	PAC97STREAMR3 pStreamCC, bool fForce)
2153	{
2154	int rc = VINF_SUCCESS;
2155	PAUDMIXSINK pMixSink;
2156	PDMAUDIOSTREAMCFG Cfg;
2157	RT_ZERO(Cfg);
2158	switch (pStream->u8SD)
2159	{
2160	case AC97SOUNDSOURCE_PI_INDEX:
2161	{
2162	PDMAudioPropsInit(&Cfg.Props, 2 /16-bit/, true /signed/, 2 /stereo/,
2163	ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate));
2164	Cfg.enmDir = PDMAUDIODIR_IN;
2165	Cfg.u.enmSrc = PDMAUDIORECSRC_LINE;
2166	Cfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
2167	RTStrCopy(Cfg.szName, sizeof(Cfg.szName), "Line-In");
2168
2169	pMixSink = pThisCC->pSinkLineIn;
2170	break;
2171	}
2172
2173	case AC97SOUNDSOURCE_MC_INDEX:
2174	{
2175	PDMAudioPropsInit(&Cfg.Props, 2 /16-bit/, true /signed/, 2 /stereo/,
2176	ichac97MixerGet(pThis, AC97_MIC_ADC_Rate));
2177	Cfg.enmDir = PDMAUDIODIR_IN;
2178	Cfg.u.enmSrc = PDMAUDIORECSRC_MIC;
2179	Cfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
2180	RTStrCopy(Cfg.szName, sizeof(Cfg.szName), "Mic-In");
2181
2182	pMixSink = pThisCC->pSinkMicIn;
2183	break;
2184	}
2185
2186	case AC97SOUNDSOURCE_PO_INDEX:
2187	{
2188	PDMAudioPropsInit(&Cfg.Props, 2 /16-bit/, true /signed/, 2 /stereo/,
2189	ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate));
2190	Cfg.enmDir = PDMAUDIODIR_OUT;
2191	Cfg.u.enmDst = PDMAUDIOPLAYBACKDST_FRONT;
2192	Cfg.enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
2193	RTStrCopy(Cfg.szName, sizeof(Cfg.szName), "Output");
2194
2195	pMixSink = pThisCC->pSinkOut;
2196	break;
2197	}
2198
2199	default:
2200	rc = VERR_NOT_SUPPORTED;
2201	pMixSink = NULL;
2202	break;
2203	}
2204
2205	if (RT_SUCCESS(rc))
2206	{
2207	/* Only (re-)create the stream (and driver chain) if we really have to.
2208	* Otherwise avoid this and just reuse it, as this costs performance. */
2209	if ( !PDMAudioStrmCfgMatchesProps(&Cfg, &pStreamCC->State.Cfg.Props)
2210	\|\| fForce)
2211	{
2212	LogRel2(("AC97: (Re-)Opening stream '%s' (%RU32Hz, %RU8 channels, %s%RU8)\n", Cfg.szName, Cfg.Props.uHz,
2213	PDMAudioPropsChannels(&Cfg.Props), Cfg.Props.fSigned ? "S" : "U", PDMAudioPropsSampleBits(&Cfg.Props)));
2214
2215	LogFlowFunc(("[SD%RU8] uHz=%RU32\n", pStream->u8SD, Cfg.Props.uHz));
2216
2217	if (Cfg.Props.uHz)
2218	{
2219	Assert(Cfg.enmDir != PDMAUDIODIR_UNKNOWN);
2220
2221	/*
2222	* Set the stream's timer Hz rate, based on the PCM properties Hz rate.
2223	*/
2224	if (pThis->uTimerHz == AC97_TIMER_HZ_DEFAULT) /* Make sure that we don't have any custom Hz rate set we want to enforce */
2225	{
2226	if (Cfg.Props.uHz > 44100) /* E.g. 48000 Hz. */
2227	pStreamCC->State.uTimerHz = 200;
2228	else /* Just take the global Hz rate otherwise. */
2229	pStreamCC->State.uTimerHz = pThis->uTimerHz;
2230	}
2231	else
2232	pStreamCC->State.uTimerHz = pThis->uTimerHz;
2233
2234	/* Set scheduling hint (if available). */
2235	if (pStreamCC->State.uTimerHz)
2236	Cfg.Device.cMsSchedulingHint = 1000 /* ms */ / pStreamCC->State.uTimerHz;
2237
2238	if (pStreamCC->State.pCircBuf)
2239	{
2240	RTCircBufDestroy(pStreamCC->State.pCircBuf);
2241	pStreamCC->State.pCircBuf = NULL;
2242	}
2243
2244	rc = RTCircBufCreate(&pStreamCC->State.pCircBuf, PDMAudioPropsMilliToBytes(&Cfg.Props, 100 /ms/)); /** @todo Make this configurable. */
2245	if (RT_SUCCESS(rc))
2246	{
2247	ichac97R3MixerRemoveDrvStreams(pDevIns, pThisCC, pMixSink, Cfg.enmDir, Cfg.u);
2248
2249	rc = ichac97R3MixerAddDrvStreams(pDevIns, pThisCC, pMixSink, &Cfg);
2250	if (RT_SUCCESS(rc))
2251	rc = PDMAudioStrmCfgCopy(&pStreamCC->State.Cfg, &Cfg);
2252	}
2253	}
2254	}
2255	else
2256	LogFlowFunc(("[SD%RU8] Skipping (re-)creation\n", pStream->u8SD));
2257	}
2258
2259	LogFlowFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
2260	return rc;
2261	}
2262
2263	/**
2264	* Closes an AC'97 stream.
2265	*
2266	* @returns VBox status code.
2267	* @param pStream The AC'97 stream to close (shared).
2268	*/
2269	static int ichac97R3StreamClose(PAC97STREAM pStream)
2270	{
2271	RT_NOREF(pStream);
2272	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
2273	return VINF_SUCCESS;
2274	}
2275
2276	/**
2277	* Re-opens (that is, closes and opens again) an AC'97 stream on the backend
2278	* side with the current AC'97 mixer settings for this stream.
2279	*
2280	* @returns VBox status code.
2281	* @param pDevIns The device instance.
2282	* @param pThis The shared AC'97 device state.
2283	* @param pThisCC The ring-3 AC'97 device state.
2284	* @param pStream The AC'97 stream to re-open (shared).
2285	* @param pStreamCC The AC'97 stream to re-open (ring-3).
2286	* @param fForce Whether to force re-opening the stream or not.
2287	* Otherwise re-opening only will happen if the PCM properties have changed.
2288	*/
2289	static int ichac97R3StreamReOpen(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STATER3 pThisCC,
2290	PAC97STREAM pStream, PAC97STREAMR3 pStreamCC, bool fForce)
2291	{
2292	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
2293	Assert(pStream->u8SD == pStreamCC->u8SD);
2294	Assert(pStream - &pThis->aStreams[0] == pStream->u8SD);
2295	Assert(pStreamCC - &pThisCC->aStreams[0] == pStream->u8SD);
2296
2297	int rc = ichac97R3StreamClose(pStream);
2298	if (RT_SUCCESS(rc))
2299	rc = ichac97R3StreamOpen(pDevIns, pThis, pThisCC, pStream, pStreamCC, fForce);
2300
2301	return rc;
2302	}
2303
2304	/**
2305	* Locks an AC'97 stream for serialized access.
2306	*
2307	* @returns VBox status code.
2308	* @param pStreamCC The AC'97 stream to lock (ring-3).
2309	*/
2310	static void ichac97R3StreamLock(PAC97STREAMR3 pStreamCC)
2311	{
2312	int rc2 = RTCritSectEnter(&pStreamCC->State.CritSect);
2313	AssertRC(rc2);
2314	}
2315
2316	/**
2317	* Unlocks a formerly locked AC'97 stream.
2318	*
2319	* @returns VBox status code.
2320	* @param pStreamCC The AC'97 stream to unlock (ring-3).
2321	*/
2322	static void ichac97R3StreamUnlock(PAC97STREAMR3 pStreamCC)
2323	{
2324	int rc2 = RTCritSectLeave(&pStreamCC->State.CritSect);
2325	AssertRC(rc2);
2326	}
2327
2328	/**
2329	* Retrieves the available size of (buffered) audio data (in bytes) of a given AC'97 stream.
2330	*
2331	* @returns Available data (in bytes).
2332	* @param pStreamCC The AC'97 stream to retrieve size for (ring-3).
2333	*/
2334	static uint32_t ichac97R3StreamGetUsed(PAC97STREAMR3 pStreamCC)
2335	{
2336	if (!pStreamCC->State.pCircBuf)
2337	return 0;
2338
2339	return (uint32_t)RTCircBufUsed(pStreamCC->State.pCircBuf);
2340	}
2341
2342	/**
2343	* Retrieves the free size of audio data (in bytes) of a given AC'97 stream.
2344	*
2345	* @returns Free data (in bytes).
2346	* @param pStreamCC AC'97 stream to retrieve size for (ring-3).
2347	*/
2348	static uint32_t ichac97R3StreamGetFree(PAC97STREAMR3 pStreamCC)
2349	{
2350	if (!pStreamCC->State.pCircBuf)
2351	return 0;
2352
2353	return (uint32_t)RTCircBufFree(pStreamCC->State.pCircBuf);
2354	}
2355
2356	/**
2357	* Sets the volume of a specific AC'97 mixer control.
2358	*
2359	* This currently only supports attenuation -- gain support is currently not implemented.
2360	*
2361	* @returns VBox status code.
2362	* @param pThis The shared AC'97 state.
2363	* @param pThisCC The ring-3 AC'97 state.
2364	* @param index AC'97 mixer index to set volume for.
2365	* @param enmMixerCtl Corresponding audio mixer sink.
2366	* @param uVal Volume value to set.
2367	*/
2368	static int ichac97R3MixerSetVolume(PAC97STATE pThis, PAC97STATER3 pThisCC, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
2369	{
2370	/*
2371	* From AC'97 SoundMax Codec AD1981A/AD1981B:
2372	* "Because AC '97 defines 6-bit volume registers, to maintain compatibility whenever the
2373	* D5 or D13 bits are set to 1, their respective lower five volume bits are automatically
2374	* set to 1 by the Codec logic. On readback, all lower 5 bits will read ones whenever
2375	* these bits are set to 1."
2376	*
2377	* Linux ALSA depends on this behavior to detect that only 5 bits are used for volume
2378	* control and the optional 6th bit is not used. Note that this logic only applies to the
2379	* master volume controls.
2380	*/
2381	if (index == AC97_Master_Volume_Mute \|\| index == AC97_Headphone_Volume_Mute \|\| index == AC97_Master_Volume_Mono_Mute)
2382	{
2383	if (uVal & RT_BIT(5)) /* D5 bit set? */
2384	uVal \|= RT_BIT(4) \| RT_BIT(3) \| RT_BIT(2) \| RT_BIT(1) \| RT_BIT(0);
2385	if (uVal & RT_BIT(13)) /* D13 bit set? */
2386	uVal \|= RT_BIT(12) \| RT_BIT(11) \| RT_BIT(10) \| RT_BIT(9) \| RT_BIT(8);
2387	}
2388
2389	const bool fCtlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
2390	uint8_t uCtlAttLeft = (uVal >> 8) & AC97_BARS_VOL_MASK;
2391	uint8_t uCtlAttRight = uVal & AC97_BARS_VOL_MASK;
2392
2393	/* For the master and headphone volume, 0 corresponds to 0dB attenuation. For the other
2394	* volume controls, 0 means 12dB gain and 8 means unity gain.
2395	*/
2396	if (index != AC97_Master_Volume_Mute && index != AC97_Headphone_Volume_Mute)
2397	{
2398	# ifndef VBOX_WITH_AC97_GAIN_SUPPORT
2399	/* NB: Currently there is no gain support, only attenuation. */
2400	uCtlAttLeft = uCtlAttLeft < 8 ? 0 : uCtlAttLeft - 8;
2401	uCtlAttRight = uCtlAttRight < 8 ? 0 : uCtlAttRight - 8;
2402	# endif
2403	}
2404	Assert(uCtlAttLeft <= 255 / AC97_DB_FACTOR);
2405	Assert(uCtlAttRight <= 255 / AC97_DB_FACTOR);
2406
2407	LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
2408	LogFunc(("uCtlAttLeft=%RU8, uCtlAttRight=%RU8 ", uCtlAttLeft, uCtlAttRight));
2409
2410	/*
2411	* For AC'97 volume controls, each additional step means -1.5dB attenuation with
2412	* zero being maximum. In contrast, we're internally using 255 (PDMAUDIO_VOLUME_MAX)
2413	* steps, each -0.375dB, where 0 corresponds to -96dB and 255 corresponds to 0dB.
2414	*/
2415	uint8_t lVol = PDMAUDIO_VOLUME_MAX - uCtlAttLeft * AC97_DB_FACTOR;
2416	uint8_t rVol = PDMAUDIO_VOLUME_MAX - uCtlAttRight * AC97_DB_FACTOR;
2417
2418	Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCtlMuted, lVol, rVol));
2419
2420	int rc = VINF_SUCCESS;
2421
2422	if (pThisCC->pMixer) /* Device can be in reset state, so no mixer available. */
2423	{
2424	PDMAUDIOVOLUME Vol = { fCtlMuted, lVol, rVol };
2425	PAUDMIXSINK pSink = NULL;
2426
2427	switch (enmMixerCtl)
2428	{
2429	case PDMAUDIOMIXERCTL_VOLUME_MASTER:
2430	rc = AudioMixerSetMasterVolume(pThisCC->pMixer, &Vol);
2431	break;
2432
2433	case PDMAUDIOMIXERCTL_FRONT:
2434	pSink = pThisCC->pSinkOut;
2435	break;
2436
2437	case PDMAUDIOMIXERCTL_MIC_IN:
2438	case PDMAUDIOMIXERCTL_LINE_IN:
2439	/* These are recognized but do nothing. */
2440	break;
2441
2442	default:
2443	AssertFailed();
2444	rc = VERR_NOT_SUPPORTED;
2445	break;
2446	}
2447
2448	if (pSink)
2449	rc = AudioMixerSinkSetVolume(pSink, &Vol);
2450	}
2451
2452	ichac97MixerSet(pThis, index, uVal);
2453
2454	if (RT_FAILURE(rc))
2455	LogFlowFunc(("Failed with %Rrc\n", rc));
2456
2457	return rc;
2458	}
2459
2460	/**
2461	* Sets the gain of a specific AC'97 recording control.
2462	*
2463	* NB: gain support is currently not implemented in PDM audio.
2464	*
2465	* @returns VBox status code.
2466	* @param pThis The shared AC'97 state.
2467	* @param pThisCC The ring-3 AC'97 state.
2468	* @param index AC'97 mixer index to set volume for.
2469	* @param enmMixerCtl Corresponding audio mixer sink.
2470	* @param uVal Volume value to set.
2471	*/
2472	static int ichac97R3MixerSetGain(PAC97STATE pThis, PAC97STATER3 pThisCC, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
2473	{
2474	/*
2475	* For AC'97 recording controls, each additional step means +1.5dB gain with
2476	* zero being 0dB gain and 15 being +22.5dB gain.
2477	*/
2478	const bool fCtlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
2479	uint8_t uCtlGainLeft = (uVal >> 8) & AC97_BARS_GAIN_MASK;
2480	uint8_t uCtlGainRight = uVal & AC97_BARS_GAIN_MASK;
2481
2482	Assert(uCtlGainLeft <= 255 / AC97_DB_FACTOR);
2483	Assert(uCtlGainRight <= 255 / AC97_DB_FACTOR);
2484
2485	LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
2486	LogFunc(("uCtlGainLeft=%RU8, uCtlGainRight=%RU8 ", uCtlGainLeft, uCtlGainRight));
2487
2488	uint8_t lVol = PDMAUDIO_VOLUME_MAX + uCtlGainLeft * AC97_DB_FACTOR;
2489	uint8_t rVol = PDMAUDIO_VOLUME_MAX + uCtlGainRight * AC97_DB_FACTOR;
2490
2491	/* We do not currently support gain. Since AC'97 does not support attenuation
2492	* for the recording input, the best we can do is set the maximum volume.
2493	*/
2494	# ifndef VBOX_WITH_AC97_GAIN_SUPPORT
2495	/* NB: Currently there is no gain support, only attenuation. Since AC'97 does not
2496	* support attenuation for the recording inputs, the best we can do is set the
2497	* maximum volume.
2498	*/
2499	lVol = rVol = PDMAUDIO_VOLUME_MAX;
2500	# endif
2501
2502	Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCtlMuted, lVol, rVol));
2503
2504	int rc = VINF_SUCCESS;
2505
2506	if (pThisCC->pMixer) /* Device can be in reset state, so no mixer available. */
2507	{
2508	PDMAUDIOVOLUME Vol = { fCtlMuted, lVol, rVol };
2509	PAUDMIXSINK pSink = NULL;
2510
2511	switch (enmMixerCtl)
2512	{
2513	case PDMAUDIOMIXERCTL_MIC_IN:
2514	pSink = pThisCC->pSinkMicIn;
2515	break;
2516
2517	case PDMAUDIOMIXERCTL_LINE_IN:
2518	pSink = pThisCC->pSinkLineIn;
2519	break;
2520
2521	default:
2522	AssertFailed();
2523	rc = VERR_NOT_SUPPORTED;
2524	break;
2525	}
2526
2527	if (pSink) {
2528	rc = AudioMixerSinkSetVolume(pSink, &Vol);
2529	/* There is only one AC'97 recording gain control. If line in
2530	* is changed, also update the microphone. If the optional dedicated
2531	* microphone is changed, only change that.
2532	* NB: The codecs we support do not have the dedicated microphone control.
2533	*/
2534	if ((pSink == pThisCC->pSinkLineIn) && pThisCC->pSinkMicIn)
2535	rc = AudioMixerSinkSetVolume(pSink, &Vol);
2536	}
2537	}
2538
2539	ichac97MixerSet(pThis, index, uVal);
2540
2541	if (RT_FAILURE(rc))
2542	LogFlowFunc(("Failed with %Rrc\n", rc));
2543
2544	return rc;
2545	}
2546
2547	/**
2548	* Converts an AC'97 recording source index to a PDM audio recording source.
2549	*
2550	* @returns PDM audio recording source.
2551	* @param uIdx AC'97 index to convert.
2552	*/
2553	static PDMAUDIORECSRC ichac97R3IdxToRecSource(uint8_t uIdx)
2554	{
2555	switch (uIdx)
2556	{
2557	case AC97_REC_MIC: return PDMAUDIORECSRC_MIC;
2558	case AC97_REC_CD: return PDMAUDIORECSRC_CD;
2559	case AC97_REC_VIDEO: return PDMAUDIORECSRC_VIDEO;
2560	case AC97_REC_AUX: return PDMAUDIORECSRC_AUX;
2561	case AC97_REC_LINE_IN: return PDMAUDIORECSRC_LINE;
2562	case AC97_REC_PHONE: return PDMAUDIORECSRC_PHONE;
2563	default:
2564	break;
2565	}
2566
2567	LogFlowFunc(("Unknown record source %d, using MIC\n", uIdx));
2568	return PDMAUDIORECSRC_MIC;
2569	}
2570
2571	/**
2572	* Converts a PDM audio recording source to an AC'97 recording source index.
2573	*
2574	* @returns AC'97 recording source index.
2575	* @param enmRecSrc PDM audio recording source to convert.
2576	*/
2577	static uint8_t ichac97R3RecSourceToIdx(PDMAUDIORECSRC enmRecSrc)
2578	{
2579	switch (enmRecSrc)
2580	{
2581	case PDMAUDIORECSRC_MIC: return AC97_REC_MIC;
2582	case PDMAUDIORECSRC_CD: return AC97_REC_CD;
2583	case PDMAUDIORECSRC_VIDEO: return AC97_REC_VIDEO;
2584	case PDMAUDIORECSRC_AUX: return AC97_REC_AUX;
2585	case PDMAUDIORECSRC_LINE: return AC97_REC_LINE_IN;
2586	case PDMAUDIORECSRC_PHONE: return AC97_REC_PHONE;
2587	/* no default */
2588	case PDMAUDIORECSRC_UNKNOWN:
2589	case PDMAUDIORECSRC_END:
2590	case PDMAUDIORECSRC_32BIT_HACK:
2591	break;
2592	}
2593
2594	LogFlowFunc(("Unknown audio recording source %d using MIC\n", enmRecSrc));
2595	return AC97_REC_MIC;
2596	}
2597
2598	/**
2599	* Returns the audio direction of a specified stream descriptor.
2600	*
2601	* @return Audio direction.
2602	*/
2603	DECLINLINE(PDMAUDIODIR) ichac97GetDirFromSD(uint8_t uSD)
2604	{
2605	switch (uSD)
2606	{
2607	case AC97SOUNDSOURCE_PI_INDEX: return PDMAUDIODIR_IN;
2608	case AC97SOUNDSOURCE_PO_INDEX: return PDMAUDIODIR_OUT;
2609	case AC97SOUNDSOURCE_MC_INDEX: return PDMAUDIODIR_IN;
2610	}
2611
2612	AssertFailed();
2613	return PDMAUDIODIR_UNKNOWN;
2614	}
2615
2616	#endif /* IN_RING3 */
2617
2618	#ifdef IN_RING3
2619
2620	/**
2621	* Performs an AC'97 mixer record select to switch to a different recording
2622	* source.
2623	*
2624	* @param pThis The shared AC'97 state.
2625	* @param val AC'97 recording source index to set.
2626	*/
2627	static void ichac97R3MixerRecordSelect(PAC97STATE pThis, uint32_t val)
2628	{
2629	uint8_t rs = val & AC97_REC_MASK;
2630	uint8_t ls = (val >> 8) & AC97_REC_MASK;
2631
2632	const PDMAUDIORECSRC ars = ichac97R3IdxToRecSource(rs);
2633	const PDMAUDIORECSRC als = ichac97R3IdxToRecSource(ls);
2634
2635	rs = ichac97R3RecSourceToIdx(ars);
2636	ls = ichac97R3RecSourceToIdx(als);
2637
2638	LogRel(("AC97: Record select to left=%s, right=%s\n", PDMAudioRecSrcGetName(ars), PDMAudioRecSrcGetName(als)));
2639
2640	ichac97MixerSet(pThis, AC97_Record_Select, rs \| (ls << 8));
2641	}
2642
2643	/**
2644	* Resets the AC'97 mixer.
2645	*
2646	* @returns VBox status code.
2647	* @param pThis The shared AC'97 state.
2648	* @param pThisCC The ring-3 AC'97 state.
2649	*/
2650	static int ichac97R3MixerReset(PAC97STATE pThis, PAC97STATER3 pThisCC)
2651	{
2652	LogFlowFuncEnter();
2653
2654	RT_ZERO(pThis->mixer_data);
2655
2656	/* Note: Make sure to reset all registers first before bailing out on error. */
2657
2658	ichac97MixerSet(pThis, AC97_Reset , 0x0000); /* 6940 */
2659	ichac97MixerSet(pThis, AC97_Master_Volume_Mono_Mute , 0x8000);
2660	ichac97MixerSet(pThis, AC97_PC_BEEP_Volume_Mute , 0x0000);
2661
2662	ichac97MixerSet(pThis, AC97_Phone_Volume_Mute , 0x8008);
2663	ichac97MixerSet(pThis, AC97_Mic_Volume_Mute , 0x8008);
2664	ichac97MixerSet(pThis, AC97_CD_Volume_Mute , 0x8808);
2665	ichac97MixerSet(pThis, AC97_Aux_Volume_Mute , 0x8808);
2666	ichac97MixerSet(pThis, AC97_Record_Gain_Mic_Mute , 0x8000);
2667	ichac97MixerSet(pThis, AC97_General_Purpose , 0x0000);
2668	ichac97MixerSet(pThis, AC97_3D_Control , 0x0000);
2669	ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f);
2670
2671	/* Configure Extended Audio ID (EAID) + Control & Status (EACS) registers. */
2672	const uint16_t fEAID = AC97_EAID_REV1 \| AC97_EACS_VRA \| AC97_EACS_VRM; /* Our hardware is AC'97 rev2.3 compliant. */
2673	const uint16_t fEACS = AC97_EACS_VRA \| AC97_EACS_VRM; /* Variable Rate PCM Audio (VRA) + Mic-In (VRM) capable. */
2674
2675	LogRel(("AC97: Mixer reset (EAID=0x%x, EACS=0x%x)\n", fEAID, fEACS));
2676
2677	ichac97MixerSet(pThis, AC97_Extended_Audio_ID, fEAID);
2678	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, fEACS);
2679	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80 /* 48000 Hz by default */);
2680	ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80 /* 48000 Hz by default */);
2681	ichac97MixerSet(pThis, AC97_PCM_LFE_DAC_Rate , 0xbb80 /* 48000 Hz by default */);
2682	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate , 0xbb80 /* 48000 Hz by default */);
2683	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80 /* 48000 Hz by default */);
2684
2685	if (pThis->enmCodecModel == AC97CODEC_AD1980)
2686	{
2687	/* Analog Devices 1980 (AD1980) */
2688	ichac97MixerSet(pThis, AC97_Reset , 0x0010); /* Headphones. */
2689	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
2690	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5370);
2691	ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000);
2692	}
2693	else if (pThis->enmCodecModel == AC97CODEC_AD1981B)
2694	{
2695	/* Analog Devices 1981B (AD1981B) */
2696	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
2697	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5374);
2698	}
2699	else
2700	{
2701	/* Sigmatel 9700 (STAC9700) */
2702	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x8384);
2703	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x7600); /* 7608 */
2704	}
2705	ichac97R3MixerRecordSelect(pThis, 0);
2706
2707	/* The default value is 8000h, which corresponds to 0 dB attenuation with mute on. */
2708	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, 0x8000);
2709
2710	/* The default value for stereo registers is 8808h, which corresponds to 0 dB gain with mute on.*/
2711	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, 0x8808);
2712	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8808);
2713	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8008);
2714
2715	/* The default for record controls is 0 dB gain with mute on. */
2716	ichac97R3MixerSetGain(pThis, pThisCC, AC97_Record_Gain_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8000);
2717	ichac97R3MixerSetGain(pThis, pThisCC, AC97_Record_Gain_Mic_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8000);
2718
2719	return VINF_SUCCESS;
2720	}
2721
2722	# if 0 /* Unused */
2723	static void ichac97R3WriteBUP(PAC97STATE pThis, uint32_t cbElapsed)
2724	{
2725	LogFlowFunc(("cbElapsed=%RU32\n", cbElapsed));
2726
2727	if (!(pThis->bup_flag & BUP_SET))
2728	{
2729	if (pThis->bup_flag & BUP_LAST)
2730	{
2731	unsigned int i;
2732	uint32_t p = (uint32_t)pThis->silence;
2733	for (i = 0; i < sizeof(pThis->silence) / 4; i++) /** @todo r=andy Assumes 16-bit samples, stereo. */
2734	*p++ = pThis->last_samp;
2735	}
2736	else
2737	RT_ZERO(pThis->silence);
2738
2739	pThis->bup_flag \|= BUP_SET;
2740	}
2741
2742	while (cbElapsed)
2743	{
2744	uint32_t cbToWrite = RT_MIN(cbElapsed, (uint32_t)sizeof(pThis->silence));
2745	uint32_t cbWrittenToStream;
2746
2747	int rc2 = AudioMixerSinkWrite(pThisCC->pSinkOut, AUDMIXOP_COPY,
2748	pThis->silence, cbToWrite, &cbWrittenToStream);
2749	if (RT_SUCCESS(rc2))
2750	{
2751	if (cbWrittenToStream < cbToWrite) /* Lagging behind? */
2752	LogFlowFunc(("Warning: Only written %RU32 / %RU32 bytes, expect lags\n", cbWrittenToStream, cbToWrite));
2753	}
2754
2755	/* Always report all data as being written;
2756	* backends who were not able to catch up have to deal with it themselves. */
2757	Assert(cbElapsed >= cbToWrite);
2758	cbElapsed -= cbToWrite;
2759	}
2760	}
2761	# endif /* Unused */
2762
2763	/**
2764	* @callback_method_impl{FNTMTIMERDEV,
2765	* Timer callback which handles the audio data transfers on a periodic basis.}
2766	*/
2767	static DECLCALLBACK(void) ichac97R3Timer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2768	{
2769	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
2770	STAM_PROFILE_START(&pThis->StatTimer, a);
2771	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
2772	PAC97STREAM pStream = (PAC97STREAM)pvUser;
2773	PAC97STREAMR3 pStreamCC = &RT_SAFE_SUBSCRIPT8(pThisCC->aStreams, pStream->u8SD);
2774	Assert(hTimer == pStream->hTimer); RT_NOREF(hTimer);
2775
2776	Assert(pStream - &pThis->aStreams[0] == pStream->u8SD);
2777	Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect));
2778	Assert(PDMDevHlpTimerIsLockOwner(pDevIns, pStream->hTimer));
2779
2780	ichac97R3StreamUpdate(pDevIns, pThis, pThisCC, pStream, pStreamCC, true /* fInTimer */);
2781
2782	PAUDMIXSINK pSink = ichac97R3IndexToSink(pThisCC, pStream->u8SD);
2783	if (pSink && AudioMixerSinkIsActive(pSink))
2784	{
2785	ichac97R3StreamTransferUpdate(pDevIns, pStream, pStreamCC, pStream->Regs.picb << 1); /** @todo r=andy Assumes 16-bit samples. */
2786	ichac97R3TimerSet(pDevIns, pStream, pStreamCC->State.cTransferTicks);
2787	}
2788
2789	STAM_PROFILE_STOP(&pThis->StatTimer, a);
2790	}
2791
2792
2793	/**
2794	* Sets the virtual device timer to a new expiration time.
2795	*
2796	* @param pDevIns The device instance.
2797	* @param pStream AC'97 stream to set timer for.
2798	* @param cTicksToDeadline The number of ticks to the new deadline.
2799	*
2800	* @remarks This used to be more complicated a long time ago...
2801	*/
2802	DECLINLINE(void) ichac97R3TimerSet(PPDMDEVINS pDevIns, PAC97STREAM pStream, uint64_t cTicksToDeadline)
2803	{
2804	int rc = PDMDevHlpTimerSetRelative(pDevIns, pStream->hTimer, cTicksToDeadline, NULL /pu64Now/);
2805	AssertRC(rc);
2806	}
2807
2808
2809	/**
2810	* Transfers data of an AC'97 stream according to its usage (input / output).
2811	*
2812	* For an SDO (output) stream this means reading DMA data from the device to
2813	* the AC'97 stream's internal FIFO buffer.
2814	*
2815	* For an SDI (input) stream this is reading audio data from the AC'97 stream's
2816	* internal FIFO buffer and writing it as DMA data to the device.
2817	*
2818	* @returns VBox status code.
2819	* @param pDevIns The device instance.
2820	* @param pThis The shared AC'97 state.
2821	* @param pStream The AC'97 stream to update (shared).
2822	* @param pStreamCC The AC'97 stream to update (ring-3).
2823	* @param cbToProcessMax Maximum of data (in bytes) to process.
2824	*/
2825	static int ichac97R3StreamTransfer(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream,
2826	PAC97STREAMR3 pStreamCC, uint32_t cbToProcessMax)
2827	{
2828	if (!cbToProcessMax)
2829	return VINF_SUCCESS;
2830
2831	#ifdef VBOX_STRICT
2832	const unsigned cbFrame = PDMAudioPropsBytesPerFrame(&pStreamCC->State.Cfg.Props);
2833	#endif
2834
2835	/* Make sure to only process an integer number of audio frames. */
2836	Assert(cbToProcessMax % cbFrame == 0);
2837
2838	ichac97R3StreamLock(pStreamCC);
2839
2840	PAC97BMREGS pRegs = &pStream->Regs;
2841
2842	if (pRegs->sr & AC97_SR_DCH) /* Controller halted? */
2843	{
2844	if (pRegs->cr & AC97_CR_RPBM) /* Bus master operation starts. */
2845	{
2846	switch (pStream->u8SD)
2847	{
2848	case AC97SOUNDSOURCE_PO_INDEX:
2849	/ichac97R3WriteBUP(pThis, cbToProcess);/
2850	break;
2851
2852	default:
2853	break;
2854	}
2855	}
2856
2857	ichac97R3StreamUnlock(pStreamCC);
2858	return VINF_SUCCESS;
2859	}
2860
2861	/* BCIS flag still set? Skip iteration. */
2862	if (pRegs->sr & AC97_SR_BCIS)
2863	{
2864	Log3Func(("[SD%RU8] BCIS set\n", pStream->u8SD));
2865
2866	ichac97R3StreamUnlock(pStreamCC);
2867	return VINF_SUCCESS;
2868	}
2869
2870	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToProcessMax); /** @todo r=andy Assumes 16bit samples. */
2871	uint32_t cbProcessedTotal = 0;
2872
2873	PRTCIRCBUF pCircBuf = pStreamCC->State.pCircBuf;
2874	AssertPtr(pCircBuf);
2875
2876	int rc = VINF_SUCCESS;
2877
2878	Log3Func(("[SD%RU8] cbToProcessMax=%RU32, cbLeft=%RU32\n", pStream->u8SD, cbToProcessMax, cbLeft));
2879
2880	while (cbLeft)
2881	{
2882	if (!pRegs->picb) /* Got a new buffer descriptor, that is, the position is 0? */
2883	{
2884	Log3Func(("Fresh buffer descriptor %RU8 is empty, addr=%#x, len=%#x, skipping\n",
2885	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len));
2886	if (pRegs->civ == pRegs->lvi)
2887	{
2888	pRegs->sr \|= AC97_SR_DCH; /** @todo r=andy Also set CELV? */
2889	pThis->bup_flag = 0;
2890
2891	rc = VINF_EOF;
2892	break;
2893	}
2894
2895	pRegs->sr &= ~AC97_SR_CELV;
2896	pRegs->civ = pRegs->piv;
2897	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2898
2899	ichac97R3StreamFetchBDLE(pDevIns, pStream);
2900	continue;
2901	}
2902
2903	uint32_t cbChunk = cbLeft;
2904
2905	switch (pStream->u8SD)
2906	{
2907	case AC97SOUNDSOURCE_PO_INDEX: /* Output */
2908	{
2909	void *pvDst;
2910	size_t cbDst;
2911
2912	RTCircBufAcquireWriteBlock(pCircBuf, cbChunk, &pvDst, &cbDst);
2913
2914	if (cbDst)
2915	{
2916	int rc2 = PDMDevHlpPCIPhysRead(pDevIns, pRegs->bd.addr, (uint8_t *)pvDst, cbDst);
2917	AssertRC(rc2);
2918
2919	if (RT_LIKELY(!pStreamCC->Dbg.Runtime.fEnabled))
2920	{ /* likely */ }
2921	else
2922	AudioHlpFileWrite(pStreamCC->Dbg.Runtime.pFileDMA, pvDst, cbDst, 0 /* fFlags */);
2923	}
2924
2925	RTCircBufReleaseWriteBlock(pCircBuf, cbDst);
2926
2927	cbChunk = (uint32_t)cbDst; /* Update the current chunk size to what really has been written. */
2928	break;
2929	}
2930
2931	case AC97SOUNDSOURCE_PI_INDEX: /* Input */
2932	case AC97SOUNDSOURCE_MC_INDEX: /* Input */
2933	{
2934	void *pvSrc;
2935	size_t cbSrc;
2936
2937	RTCircBufAcquireReadBlock(pCircBuf, cbChunk, &pvSrc, &cbSrc);
2938
2939	if (cbSrc)
2940	{
2941	int rc2 = PDMDevHlpPCIPhysWrite(pDevIns, pRegs->bd.addr, (uint8_t *)pvSrc, cbSrc);
2942	AssertRC(rc2);
2943
2944	if (RT_LIKELY(!pStreamCC->Dbg.Runtime.fEnabled))
2945	{ /* likely */ }
2946	else
2947	AudioHlpFileWrite(pStreamCC->Dbg.Runtime.pFileDMA, pvSrc, cbSrc, 0 /* fFlags */);
2948	}
2949
2950	RTCircBufReleaseReadBlock(pCircBuf, cbSrc);
2951
2952	cbChunk = (uint32_t)cbSrc; /* Update the current chunk size to what really has been read. */
2953	break;
2954	}
2955
2956	default:
2957	AssertMsgFailed(("Stream #%RU8 not supported\n", pStream->u8SD));
2958	rc = VERR_NOT_SUPPORTED;
2959	break;
2960	}
2961
2962	if (RT_FAILURE(rc))
2963	break;
2964
2965	if (cbChunk)
2966	{
2967	cbProcessedTotal += cbChunk;
2968	Assert(cbProcessedTotal <= cbToProcessMax);
2969	Assert(cbLeft >= cbChunk);
2970	cbLeft -= cbChunk;
2971	Assert((cbChunk & 1) == 0); /* Else the following shift won't work */
2972
2973	pRegs->picb -= (cbChunk >> 1); /** @todo r=andy Assumes 16bit samples. */
2974	pRegs->bd.addr += cbChunk;
2975	}
2976
2977	LogFlowFunc(("[SD%RU8] cbChunk=%RU32, cbLeft=%RU32, cbTotal=%RU32, rc=%Rrc\n",
2978	pStream->u8SD, cbChunk, cbLeft, cbProcessedTotal, rc));
2979
2980	if (!pRegs->picb)
2981	{
2982	uint32_t new_sr = pRegs->sr & ~AC97_SR_CELV;
2983
2984	if (pRegs->bd.ctl_len & AC97_BD_IOC)
2985	{
2986	new_sr \|= AC97_SR_BCIS;
2987	}
2988
2989	if (pRegs->civ == pRegs->lvi)
2990	{
2991	/* Did we run out of data? */
2992	LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi));
2993
2994	new_sr \|= AC97_SR_LVBCI \| AC97_SR_DCH \| AC97_SR_CELV;
2995	pThis->bup_flag = (pRegs->bd.ctl_len & AC97_BD_BUP) ? BUP_LAST : 0;
2996
2997	rc = VINF_EOF;
2998	}
2999	else
3000	{
3001	pRegs->civ = pRegs->piv;
3002	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
3003	ichac97R3StreamFetchBDLE(pDevIns, pStream);
3004	}
3005
3006	ichac97StreamUpdateSR(pDevIns, pThis, pStream, new_sr);
3007	}
3008
3009	if (/* All data processed? */
3010	rc == VINF_EOF
3011	/* ... or an error occurred? */
3012	\|\| RT_FAILURE(rc))
3013	{
3014	break;
3015	}
3016	}
3017
3018	ichac97R3StreamUnlock(pStreamCC);
3019
3020	LogFlowFuncLeaveRC(rc);
3021	return rc;
3022	}
3023
3024	#endif /* IN_RING3 */
3025
3026
3027	/**
3028	* @callback_method_impl{FNIOMIOPORTNEWIN}
3029	*/
3030	static DECLCALLBACK(VBOXSTRICTRC)
3031	ichac97IoPortNabmRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb)
3032	{
3033	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3034	RT_NOREF(pvUser);
3035
3036	DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ);
3037
3038	/* Get the index of the NABMBAR port. */
3039	if ( AC97_PORT2IDX_UNMASKED(offPort) < AC97_MAX_STREAMS
3040	&& offPort != AC97_GLOB_CNT)
3041	{
3042	PAC97STREAM pStream = &pThis->aStreams[AC97_PORT2IDX(offPort)];
3043	PAC97BMREGS pRegs = &pStream->Regs;
3044
3045	switch (cb)
3046	{
3047	case 1:
3048	switch (offPort & AC97_NABM_OFF_MASK)
3049	{
3050	case AC97_NABM_OFF_CIV:
3051	/* Current Index Value Register */
3052	*pu32 = pRegs->civ;
3053	Log3Func(("CIV[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3054	break;
3055	case AC97_NABM_OFF_LVI:
3056	/* Last Valid Index Register */
3057	*pu32 = pRegs->lvi;
3058	Log3Func(("LVI[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3059	break;
3060	case AC97_NABM_OFF_PIV:
3061	/* Prefetched Index Value Register */
3062	*pu32 = pRegs->piv;
3063	Log3Func(("PIV[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3064	break;
3065	case AC97_NABM_OFF_CR:
3066	/* Control Register */
3067	*pu32 = pRegs->cr;
3068	Log3Func(("CR[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3069	break;
3070	case AC97_NABM_OFF_SR:
3071	/* Status Register (lower part) */
3072	*pu32 = RT_LO_U8(pRegs->sr);
3073	Log3Func(("SRb[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3074	break;
3075	default:
3076	*pu32 = UINT32_MAX;
3077	LogFunc(("U nabm readb %#x -> %#x\n", offPort, UINT32_MAX));
3078	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmReads);
3079	break;
3080	}
3081	break;
3082
3083	case 2:
3084	switch (offPort & AC97_NABM_OFF_MASK)
3085	{
3086	case AC97_NABM_OFF_SR:
3087	/* Status Register */
3088	*pu32 = pRegs->sr;
3089	Log3Func(("SR[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3090	break;
3091	case AC97_NABM_OFF_PICB:
3092	/* Position in Current Buffer */
3093	*pu32 = pRegs->picb;
3094	Log3Func(("PICB[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3095	break;
3096	default:
3097	*pu32 = UINT32_MAX;
3098	LogFunc(("U nabm readw %#x -> %#x\n", offPort, UINT32_MAX));
3099	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmReads);
3100	break;
3101	}
3102	break;
3103
3104	case 4:
3105	switch (offPort & AC97_NABM_OFF_MASK)
3106	{
3107	case AC97_NABM_OFF_BDBAR:
3108	/* Buffer Descriptor Base Address Register */
3109	*pu32 = pRegs->bdbar;
3110	Log3Func(("BMADDR[%d] -> %#x\n", AC97_PORT2IDX(offPort), *pu32));
3111	break;
3112	case AC97_NABM_OFF_CIV:
3113	/* 32-bit access: Current Index Value Register +
3114	* Last Valid Index Register +
3115	* Status Register */
3116	pu32 = pRegs->civ \| (pRegs->lvi << 8) \| (pRegs->sr << 16); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
3117	Log3Func(("CIV LVI SR[%d] -> %#x, %#x, %#x\n",
3118	AC97_PORT2IDX(offPort), pRegs->civ, pRegs->lvi, pRegs->sr));
3119	break;
3120	case AC97_NABM_OFF_PICB:
3121	/* 32-bit access: Position in Current Buffer Register +
3122	* Prefetched Index Value Register +
3123	* Control Register */
3124	pu32 = pRegs->picb \| (pRegs->piv << 16) \| (pRegs->cr << 24); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
3125	Log3Func(("PICB PIV CR[%d] -> %#x %#x %#x %#x\n",
3126	AC97_PORT2IDX(offPort), *pu32, pRegs->picb, pRegs->piv, pRegs->cr));
3127	break;
3128
3129	default:
3130	*pu32 = UINT32_MAX;
3131	LogFunc(("U nabm readl %#x -> %#x\n", offPort, UINT32_MAX));
3132	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmReads);
3133	break;
3134	}
3135	break;
3136
3137	default:
3138	DEVAC97_UNLOCK(pDevIns, pThis);
3139	AssertFailed();
3140	return VERR_IOM_IOPORT_UNUSED;
3141	}
3142	}
3143	else
3144	{
3145	switch (cb)
3146	{
3147	case 1:
3148	switch (offPort)
3149	{
3150	case AC97_CAS:
3151	/* Codec Access Semaphore Register */
3152	Log3Func(("CAS %d\n", pThis->cas));
3153	*pu32 = pThis->cas;
3154	pThis->cas = 1;
3155	break;
3156	default:
3157	*pu32 = UINT32_MAX;
3158	LogFunc(("U nabm readb %#x -> %#x\n", offPort, UINT32_MAX));
3159	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmReads);
3160	break;
3161	}
3162	break;
3163
3164	case 2:
3165	*pu32 = UINT32_MAX;
3166	LogFunc(("U nabm readw %#x -> %#x\n", offPort, UINT32_MAX));
3167	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmReads);
3168	break;
3169
3170	case 4:
3171	switch (offPort)
3172	{
3173	case AC97_GLOB_CNT:
3174	/* Global Control */
3175	*pu32 = pThis->glob_cnt;
3176	Log3Func(("glob_cnt -> %#x\n", *pu32));
3177	break;
3178	case AC97_GLOB_STA:
3179	/* Global Status */
3180	*pu32 = pThis->glob_sta \| AC97_GS_S0CR;
3181	Log3Func(("glob_sta -> %#x\n", *pu32));
3182	break;
3183	default:
3184	*pu32 = UINT32_MAX;
3185	LogFunc(("U nabm readl %#x -> %#x\n", offPort, UINT32_MAX));
3186	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmReads);
3187	break;
3188	}
3189	break;
3190
3191	default:
3192	DEVAC97_UNLOCK(pDevIns, pThis);
3193	AssertFailed();
3194	return VERR_IOM_IOPORT_UNUSED;
3195	}
3196	}
3197
3198	DEVAC97_UNLOCK(pDevIns, pThis);
3199	return VINF_SUCCESS;
3200	}
3201
3202	/**
3203	* @callback_method_impl{FNIOMIOPORTNEWOUT}
3204	*/
3205	static DECLCALLBACK(VBOXSTRICTRC)
3206	ichac97IoPortNabmWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
3207	{
3208	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3209	#ifdef IN_RING3
3210	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
3211	#endif
3212	RT_NOREF(pvUser);
3213
3214	VBOXSTRICTRC rc = VINF_SUCCESS;
3215	if ( AC97_PORT2IDX_UNMASKED(offPort) < AC97_MAX_STREAMS
3216	&& offPort != AC97_GLOB_CNT)
3217	{
3218	#ifdef IN_RING3
3219	PAC97STREAMR3 pStreamCC = &pThisCC->aStreams[AC97_PORT2IDX(offPort)];
3220	#endif
3221	PAC97STREAM pStream = &pThis->aStreams[AC97_PORT2IDX(offPort)];
3222	PAC97BMREGS pRegs = &pStream->Regs;
3223
3224	DEVAC97_LOCK_BOTH_RETURN(pDevIns, pThis, pStream, VINF_IOM_R3_IOPORT_WRITE);
3225	switch (cb)
3226	{
3227	case 1:
3228	switch (offPort & AC97_NABM_OFF_MASK)
3229	{
3230	/*
3231	* Last Valid Index.
3232	*/
3233	case AC97_NABM_OFF_LVI:
3234	if ( (pRegs->cr & AC97_CR_RPBM)
3235	&& (pRegs->sr & AC97_SR_DCH))
3236	{
3237	#ifdef IN_RING3
3238	pRegs->sr &= ~(AC97_SR_DCH \| AC97_SR_CELV);
3239	pRegs->civ = pRegs->piv;
3240	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
3241	#else
3242	rc = VINF_IOM_R3_IOPORT_WRITE;
3243	#endif
3244	}
3245	pRegs->lvi = u32 % AC97_MAX_BDLE;
3246	Log3Func(("[SD%RU8] LVI <- %#x\n", pStream->u8SD, u32));
3247	break;
3248
3249	/*
3250	* Control Registers.
3251	*/
3252	case AC97_NABM_OFF_CR:
3253	#ifdef IN_RING3
3254	Log3Func(("[SD%RU8] CR <- %#x (cr %#x)\n", pStream->u8SD, u32, pRegs->cr));
3255	if (u32 & AC97_CR_RR) /* Busmaster reset. */
3256	{
3257	Log3Func(("[SD%RU8] Reset\n", pStream->u8SD));
3258
3259	/* Make sure that Run/Pause Bus Master bit (RPBM) is cleared (0). */
3260	Assert((pRegs->cr & AC97_CR_RPBM) == 0);
3261
3262	ichac97R3StreamEnable(pDevIns, pThis, pThisCC, pStream, pStreamCC, false /* fEnable */);
3263	ichac97R3StreamReset(pThis, pStream, pStreamCC);
3264
3265	ichac97StreamUpdateSR(pDevIns, pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */
3266	}
3267	else
3268	{
3269	pRegs->cr = u32 & AC97_CR_VALID_MASK;
3270
3271	if (!(pRegs->cr & AC97_CR_RPBM))
3272	{
3273	Log3Func(("[SD%RU8] Disable\n", pStream->u8SD));
3274
3275	ichac97R3StreamEnable(pDevIns, pThis, pThisCC, pStream, pStreamCC, false /* fEnable */);
3276
3277	pRegs->sr \|= AC97_SR_DCH;
3278	}
3279	else
3280	{
3281	Log3Func(("[SD%RU8] Enable\n", pStream->u8SD));
3282
3283	pRegs->civ = pRegs->piv;
3284	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
3285
3286	pRegs->sr &= ~AC97_SR_DCH;
3287
3288	/* Fetch the initial BDLE descriptor. */
3289	ichac97R3StreamFetchBDLE(pDevIns, pStream);
3290	# ifdef LOG_ENABLED
3291	ichac97R3BDLEDumpAll(pDevIns, pStream->Regs.bdbar, pStream->Regs.lvi + 1);
3292	# endif
3293	ichac97R3StreamEnable(pDevIns, pThis, pThisCC, pStream, pStreamCC, true /* fEnable */);
3294
3295	/* Arm the timer for this stream. */
3296	/** @todo r=bird: This function returns bool, not VBox status! */
3297	ichac97R3TimerSet(pDevIns, pStream, pStreamCC->State.cTransferTicks);
3298	}
3299	}
3300	#else /* !IN_RING3 */
3301	rc = VINF_IOM_R3_IOPORT_WRITE;
3302	#endif
3303	break;
3304
3305	/*
3306	* Status Registers.
3307	*/
3308	case AC97_NABM_OFF_SR:
3309	ichac97StreamWriteSR(pDevIns, pThis, pStream, u32);
3310	break;
3311
3312	default:
3313	LogRel2(("AC97: Warning: Unimplemented NABMWrite offPort=%#x <- %#x LB 1\n", offPort, u32));
3314	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmWrites);
3315	break;
3316	}
3317	break;
3318
3319	case 2:
3320	switch (offPort & AC97_NABM_OFF_MASK)
3321	{
3322	case AC97_NABM_OFF_SR:
3323	ichac97StreamWriteSR(pDevIns, pThis, pStream, u32);
3324	break;
3325	default:
3326	LogRel2(("AC97: Warning: Unimplemented NABMWrite offPort=%#x <- %#x LB 2\n", offPort, u32));
3327	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmWrites);
3328	break;
3329	}
3330	break;
3331
3332	case 4:
3333	switch (offPort & AC97_NABM_OFF_MASK)
3334	{
3335	case AC97_NABM_OFF_BDBAR:
3336	/* Buffer Descriptor list Base Address Register */
3337	pRegs->bdbar = u32 & ~3;
3338	Log3Func(("[SD%RU8] BDBAR <- %#x (bdbar %#x)\n", AC97_PORT2IDX(offPort), u32, pRegs->bdbar));
3339	break;
3340	default:
3341	LogRel2(("AC97: Warning: Unimplemented NABMWrite offPort=%#x <- %#x LB 4\n", offPort, u32));
3342	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmWrites);
3343	break;
3344	}
3345	break;
3346
3347	default:
3348	AssertMsgFailed(("offPort=%#x <- %#x LB %u\n", offPort, u32, cb));
3349	break;
3350	}
3351	DEVAC97_UNLOCK_BOTH(pDevIns, pThis, pStream);
3352	}
3353	else
3354	{
3355	switch (cb)
3356	{
3357	case 1:
3358	LogRel2(("AC97: Warning: Unimplemented NABMWrite offPort=%#x <- %#x LB 1\n", offPort, u32));
3359	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmWrites);
3360	break;
3361
3362	case 2:
3363	LogRel2(("AC97: Warning: Unimplemented NABMWrite offPort=%#x <- %#x LB 2\n", offPort, u32));
3364	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmWrites);
3365	break;
3366
3367	case 4:
3368	switch (offPort)
3369	{
3370	case AC97_GLOB_CNT:
3371	/* Global Control */
3372	DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE);
3373	if (u32 & AC97_GC_WR)
3374	ichac97WarmReset(pThis);
3375	if (u32 & AC97_GC_CR)
3376	ichac97ColdReset(pThis);
3377	if (!(u32 & (AC97_GC_WR \| AC97_GC_CR)))
3378	pThis->glob_cnt = u32 & AC97_GC_VALID_MASK;
3379	Log3Func(("glob_cnt <- %#x (glob_cnt %#x)\n", u32, pThis->glob_cnt));
3380	DEVAC97_UNLOCK(pDevIns, pThis);
3381	break;
3382	case AC97_GLOB_STA:
3383	/* Global Status */
3384	DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE);
3385	pThis->glob_sta &= ~(u32 & AC97_GS_WCLEAR_MASK);
3386	pThis->glob_sta \|= (u32 & ~(AC97_GS_WCLEAR_MASK \| AC97_GS_RO_MASK)) & AC97_GS_VALID_MASK;
3387	Log3Func(("glob_sta <- %#x (glob_sta %#x)\n", u32, pThis->glob_sta));
3388	DEVAC97_UNLOCK(pDevIns, pThis);
3389	break;
3390	default:
3391	LogRel2(("AC97: Warning: Unimplemented NABMWrite offPort=%#x <- %#x LB 4\n", offPort, u32));
3392	STAM_REL_COUNTER_INC(&pThis->StatUnimplementedNabmWrites);
3393	break;
3394	}
3395	break;
3396
3397	default:
3398	AssertMsgFailed(("offPort=%#x <- %#x LB %u\n", offPort, u32, cb));
3399	break;
3400	}
3401	}
3402
3403	return rc;
3404	}
3405
3406	/**
3407	* @callback_method_impl{FNIOMIOPORTNEWIN}
3408	*/
3409	static DECLCALLBACK(VBOXSTRICTRC)
3410	ichac97IoPortNamRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb)
3411	{
3412	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3413	RT_NOREF(pvUser);
3414	Assert(offPort < 256);
3415
3416	DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ);
3417
3418	VBOXSTRICTRC rc = VINF_SUCCESS;
3419	switch (cb)
3420	{
3421	case 1:
3422	{
3423	LogRel2(("AC97: Warning: Unimplemented read (1 byte) offPort=%#x\n", offPort));
3424	pThis->cas = 0;
3425	*pu32 = UINT32_MAX;
3426	break;
3427	}
3428
3429	case 2:
3430	{
3431	pThis->cas = 0;
3432	*pu32 = ichac97MixerGet(pThis, offPort);
3433	break;
3434	}
3435
3436	case 4:
3437	{
3438	LogRel2(("AC97: Warning: Unimplemented read (4 bytes) offPort=%#x\n", offPort));
3439	pThis->cas = 0;
3440	*pu32 = UINT32_MAX;
3441	break;
3442	}
3443
3444	default:
3445	{
3446	AssertFailed();
3447	rc = VERR_IOM_IOPORT_UNUSED;
3448	}
3449	}
3450
3451	DEVAC97_UNLOCK(pDevIns, pThis);
3452	return rc;
3453	}
3454
3455	/**
3456	* @callback_method_impl{FNIOMIOPORTNEWOUT}
3457	*/
3458	static DECLCALLBACK(VBOXSTRICTRC)
3459	ichac97IoPortNamWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
3460	{
3461	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3462	#ifdef IN_RING3
3463	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
3464	#endif
3465	RT_NOREF(pvUser);
3466
3467	DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE);
3468
3469	VBOXSTRICTRC rc = VINF_SUCCESS;
3470	switch (cb)
3471	{
3472	case 1:
3473	{
3474	LogRel2(("AC97: Warning: Unimplemented NAMWrite (1 byte) offPort=%#x <- %#x\n", offPort, u32));
3475	pThis->cas = 0;
3476	break;
3477	}
3478
3479	case 2:
3480	{
3481	pThis->cas = 0;
3482	switch (offPort)
3483	{
3484	case AC97_Reset:
3485	#ifdef IN_RING3
3486	ichac97R3Reset(pDevIns);
3487	#else
3488	rc = VINF_IOM_R3_IOPORT_WRITE;
3489	#endif
3490	break;
3491	case AC97_Powerdown_Ctrl_Stat:
3492	u32 &= ~0xf;
3493	u32 \|= ichac97MixerGet(pThis, offPort) & 0xf;
3494	ichac97MixerSet(pThis, offPort, u32);
3495	break;
3496	case AC97_Master_Volume_Mute:
3497	if (pThis->enmCodecModel == AC97CODEC_AD1980)
3498	{
3499	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_LOSEL)
3500	break; /* Register controls surround (rear), do nothing. */
3501	}
3502	#ifdef IN_RING3
3503	ichac97R3MixerSetVolume(pThis, pThisCC, offPort, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32);
3504	#else
3505	rc = VINF_IOM_R3_IOPORT_WRITE;
3506	#endif
3507	break;
3508	case AC97_Headphone_Volume_Mute:
3509	if (pThis->enmCodecModel == AC97CODEC_AD1980)
3510	{
3511	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
3512	{
3513	/* Register controls PCM (front) outputs. */
3514	#ifdef IN_RING3
3515	ichac97R3MixerSetVolume(pThis, pThisCC, offPort, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32);
3516	#else
3517	rc = VINF_IOM_R3_IOPORT_WRITE;
3518	#endif
3519	}
3520	}
3521	break;
3522	case AC97_PCM_Out_Volume_Mute:
3523	#ifdef IN_RING3
3524	ichac97R3MixerSetVolume(pThis, pThisCC, offPort, PDMAUDIOMIXERCTL_FRONT, u32);
3525	#else
3526	rc = VINF_IOM_R3_IOPORT_WRITE;
3527	#endif
3528	break;
3529	case AC97_Line_In_Volume_Mute:
3530	#ifdef IN_RING3
3531	ichac97R3MixerSetVolume(pThis, pThisCC, offPort, PDMAUDIOMIXERCTL_LINE_IN, u32);
3532	#else
3533	rc = VINF_IOM_R3_IOPORT_WRITE;
3534	#endif
3535	break;
3536	case AC97_Record_Select:
3537	#ifdef IN_RING3
3538	ichac97R3MixerRecordSelect(pThis, u32);
3539	#else
3540	rc = VINF_IOM_R3_IOPORT_WRITE;
3541	#endif
3542	break;
3543	case AC97_Record_Gain_Mute:
3544	#ifdef IN_RING3
3545	/* Newer Ubuntu guests rely on that when controlling gain and muting
3546	* the recording (capturing) levels. */
3547	ichac97R3MixerSetGain(pThis, pThisCC, offPort, PDMAUDIOMIXERCTL_LINE_IN, u32);
3548	#else
3549	rc = VINF_IOM_R3_IOPORT_WRITE;
3550	#endif
3551	break;
3552	case AC97_Record_Gain_Mic_Mute:
3553	#ifdef IN_RING3
3554	/* Ditto; see note above. */
3555	ichac97R3MixerSetGain(pThis, pThisCC, offPort, PDMAUDIOMIXERCTL_MIC_IN, u32);
3556	#else
3557	rc = VINF_IOM_R3_IOPORT_WRITE;
3558	#endif
3559	break;
3560	case AC97_Vendor_ID1:
3561	case AC97_Vendor_ID2:
3562	LogFunc(("Attempt to write vendor ID to %#x\n", u32));
3563	break;
3564	case AC97_Extended_Audio_ID:
3565	LogFunc(("Attempt to write extended audio ID to %#x\n", u32));
3566	break;
3567	case AC97_Extended_Audio_Ctrl_Stat:
3568	#ifdef IN_RING3
3569	/*
3570	* Handle VRA bits.
3571	*/
3572	if (!(u32 & AC97_EACS_VRA)) /* Check if VRA bit is not set. */
3573	{
3574	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 0xbb80); /* Set default (48000 Hz). */
3575	ichac97R3StreamReOpen(pDevIns, pThis, pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX],
3576	&pThisCC->aStreams[AC97SOUNDSOURCE_PO_INDEX], true /* fForce */);
3577
3578	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate, 0xbb80); /* Set default (48000 Hz). */
3579	ichac97R3StreamReOpen(pDevIns, pThis, pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX],
3580	&pThisCC->aStreams[AC97SOUNDSOURCE_PI_INDEX], true /* fForce */);
3581	}
3582	else
3583	LogRel2(("AC97: Variable rate audio (VRA) is not supported\n"));
3584
3585	/*
3586	* Handle VRM bits.
3587	*/
3588	if (!(u32 & AC97_EACS_VRM)) /* Check if VRM bit is not set. */
3589	{
3590	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 0xbb80); /* Set default (48000 Hz). */
3591	ichac97R3StreamReOpen(pDevIns, pThis, pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX],
3592	&pThisCC->aStreams[AC97SOUNDSOURCE_MC_INDEX], true /* fForce */);
3593	}
3594	else
3595	LogRel2(("AC97: Variable rate microphone audio (VRM) is not supported\n"));
3596
3597	LogRel2(("AC97: Setting extended audio control to %#x\n", u32));
3598	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, u32);
3599	#else /* !IN_RING3 */
3600	rc = VINF_IOM_R3_IOPORT_WRITE;
3601	#endif
3602	break;
3603	case AC97_PCM_Front_DAC_Rate: /* Output slots 3, 4, 6. */
3604	#ifdef IN_RING3
3605	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
3606	{
3607	LogRel2(("AC97: Setting front DAC rate to 0x%x\n", u32));
3608	ichac97MixerSet(pThis, offPort, u32);
3609	ichac97R3StreamReOpen(pDevIns, pThis, pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX],
3610	&pThisCC->aStreams[AC97SOUNDSOURCE_PO_INDEX], true /* fForce */);
3611	}
3612	else
3613	LogRel2(("AC97: Setting front DAC rate (0x%x) when VRA is not set is forbidden, ignoring\n", u32));
3614	#else
3615	rc = VINF_IOM_R3_IOPORT_WRITE;
3616	#endif
3617	break;
3618	case AC97_MIC_ADC_Rate: /* Input slot 6. */
3619	#ifdef IN_RING3
3620	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRM)
3621	{
3622	LogRel2(("AC97: Setting microphone ADC rate to 0x%x\n", u32));
3623	ichac97MixerSet(pThis, offPort, u32);
3624	ichac97R3StreamReOpen(pDevIns, pThis, pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX],
3625	&pThisCC->aStreams[AC97SOUNDSOURCE_MC_INDEX], true /* fForce */);
3626	}
3627	else
3628	LogRel2(("AC97: Setting microphone ADC rate (0x%x) when VRM is not set is forbidden, ignoring\n", u32));
3629	#else
3630	rc = VINF_IOM_R3_IOPORT_WRITE;
3631	#endif
3632	break;
3633	case AC97_PCM_LR_ADC_Rate: /* Input slots 3, 4. */
3634	#ifdef IN_RING3
3635	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
3636	{
3637	LogRel2(("AC97: Setting line-in ADC rate to 0x%x\n", u32));
3638	ichac97MixerSet(pThis, offPort, u32);
3639	ichac97R3StreamReOpen(pDevIns, pThis, pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX],
3640	&pThisCC->aStreams[AC97SOUNDSOURCE_PI_INDEX], true /* fForce */);
3641	}
3642	else
3643	LogRel2(("AC97: Setting line-in ADC rate (0x%x) when VRA is not set is forbidden, ignoring\n", u32));
3644	#else
3645	rc = VINF_IOM_R3_IOPORT_WRITE;
3646	#endif
3647	break;
3648	default:
3649	LogRel2(("AC97: Warning: Unimplemented NAMWrite (2 bytes) offPort=%#x <- %#x\n", offPort, u32));
3650	ichac97MixerSet(pThis, offPort, u32);
3651	break;
3652	}
3653	break;
3654	}
3655
3656	case 4:
3657	{
3658	LogRel2(("AC97: Warning: Unimplemented 4 byte NAMWrite: offPort=%#x <- %#x\n", offPort, u32));
3659	pThis->cas = 0;
3660	break;
3661	}
3662
3663	default:
3664	AssertMsgFailed(("Unhandled NAMWrite offPort=%#x, cb=%u u32=%#x\n", offPort, cb, u32));
3665	break;
3666	}
3667
3668	DEVAC97_UNLOCK(pDevIns, pThis);
3669	return rc;
3670	}
3671
3672	#ifdef IN_RING3
3673
3674	/**
3675	* Saves (serializes) an AC'97 stream using SSM.
3676	*
3677	* @param pDevIns Device instance.
3678	* @param pSSM Saved state manager (SSM) handle to use.
3679	* @param pStream AC'97 stream to save.
3680	*/
3681	static void ichac97R3SaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
3682	{
3683	PAC97BMREGS pRegs = &pStream->Regs;
3684	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
3685
3686	pHlp->pfnSSMPutU32(pSSM, pRegs->bdbar);
3687	pHlp->pfnSSMPutU8( pSSM, pRegs->civ);
3688	pHlp->pfnSSMPutU8( pSSM, pRegs->lvi);
3689	pHlp->pfnSSMPutU16(pSSM, pRegs->sr);
3690	pHlp->pfnSSMPutU16(pSSM, pRegs->picb);
3691	pHlp->pfnSSMPutU8( pSSM, pRegs->piv);
3692	pHlp->pfnSSMPutU8( pSSM, pRegs->cr);
3693	pHlp->pfnSSMPutS32(pSSM, pRegs->bd_valid);
3694	pHlp->pfnSSMPutU32(pSSM, pRegs->bd.addr);
3695	pHlp->pfnSSMPutU32(pSSM, pRegs->bd.ctl_len);
3696	}
3697
3698	/**
3699	* @callback_method_impl{FNSSMDEVSAVEEXEC}
3700	*/
3701	static DECLCALLBACK(int) ichac97R3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3702	{
3703	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3704	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
3705	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
3706	LogFlowFuncEnter();
3707
3708	pHlp->pfnSSMPutU32(pSSM, pThis->glob_cnt);
3709	pHlp->pfnSSMPutU32(pSSM, pThis->glob_sta);
3710	pHlp->pfnSSMPutU32(pSSM, pThis->cas);
3711
3712	/*
3713	* The order that the streams are saved here is fixed, so don't change.
3714	*/
3715	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
3716	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3717	ichac97R3SaveStream(pDevIns, pSSM, &pThis->aStreams[i]);
3718
3719	pHlp->pfnSSMPutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3720
3721	/* The stream order is against fixed and set in stone. */
3722	uint8_t afActiveStrms[AC97SOUNDSOURCE_MAX];
3723	afActiveStrms[AC97SOUNDSOURCE_PI_INDEX] = ichac97R3StreamIsEnabled(pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_PI_INDEX]);
3724	afActiveStrms[AC97SOUNDSOURCE_PO_INDEX] = ichac97R3StreamIsEnabled(pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_PO_INDEX]);
3725	afActiveStrms[AC97SOUNDSOURCE_MC_INDEX] = ichac97R3StreamIsEnabled(pThisCC, &pThis->aStreams[AC97SOUNDSOURCE_MC_INDEX]);
3726	AssertCompile(RT_ELEMENTS(afActiveStrms) == 3);
3727	pHlp->pfnSSMPutMem(pSSM, afActiveStrms, sizeof(afActiveStrms));
3728
3729	LogFlowFuncLeaveRC(VINF_SUCCESS);
3730	return VINF_SUCCESS;
3731	}
3732
3733	/**
3734	* Loads an AC'97 stream from SSM.
3735	*
3736	* @returns VBox status code.
3737	* @param pDevIns The device instance.
3738	* @param pSSM Saved state manager (SSM) handle to use.
3739	* @param pStream AC'97 stream to load.
3740	*/
3741	static int ichac97R3LoadStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
3742	{
3743	PAC97BMREGS pRegs = &pStream->Regs;
3744	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
3745
3746	pHlp->pfnSSMGetU32(pSSM, &pRegs->bdbar);
3747	pHlp->pfnSSMGetU8( pSSM, &pRegs->civ);
3748	pHlp->pfnSSMGetU8( pSSM, &pRegs->lvi);
3749	pHlp->pfnSSMGetU16(pSSM, &pRegs->sr);
3750	pHlp->pfnSSMGetU16(pSSM, &pRegs->picb);
3751	pHlp->pfnSSMGetU8( pSSM, &pRegs->piv);
3752	pHlp->pfnSSMGetU8( pSSM, &pRegs->cr);
3753	pHlp->pfnSSMGetS32(pSSM, &pRegs->bd_valid);
3754	pHlp->pfnSSMGetU32(pSSM, &pRegs->bd.addr);
3755	return pHlp->pfnSSMGetU32(pSSM, &pRegs->bd.ctl_len);
3756	}
3757
3758	/**
3759	* @callback_method_impl{FNSSMDEVLOADEXEC}
3760	*/
3761	static DECLCALLBACK(int) ichac97R3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3762	{
3763	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3764	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
3765	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
3766
3767	LogRel2(("ichac97LoadExec: uVersion=%RU32, uPass=0x%x\n", uVersion, uPass));
3768
3769	AssertMsgReturn (uVersion == AC97_SAVED_STATE_VERSION, ("%RU32\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
3770	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
3771
3772	pHlp->pfnSSMGetU32(pSSM, &pThis->glob_cnt);
3773	pHlp->pfnSSMGetU32(pSSM, &pThis->glob_sta);
3774	pHlp->pfnSSMGetU32(pSSM, &pThis->cas);
3775
3776	/*
3777	* The order the streams are loaded here is critical (defined by
3778	* AC97SOUNDSOURCE_XX_INDEX), so don't touch!
3779	*/
3780	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3781	{
3782	int rc2 = ichac97R3LoadStream(pDevIns, pSSM, &pThis->aStreams[i]);
3783	AssertRCReturn(rc2, rc2);
3784	}
3785
3786	pHlp->pfnSSMGetMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3787
3788	ichac97R3MixerRecordSelect(pThis, ichac97MixerGet(pThis, AC97_Record_Select));
3789	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER,
3790	ichac97MixerGet(pThis, AC97_Master_Volume_Mute));
3791	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT,
3792	ichac97MixerGet(pThis, AC97_PCM_Out_Volume_Mute));
3793	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN,
3794	ichac97MixerGet(pThis, AC97_Line_In_Volume_Mute));
3795	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN,
3796	ichac97MixerGet(pThis, AC97_Mic_Volume_Mute));
3797	ichac97R3MixerSetGain(pThis, pThisCC, AC97_Record_Gain_Mic_Mute, PDMAUDIOMIXERCTL_MIC_IN,
3798	ichac97MixerGet(pThis, AC97_Record_Gain_Mic_Mute));
3799	ichac97R3MixerSetGain(pThis, pThisCC, AC97_Record_Gain_Mute, PDMAUDIOMIXERCTL_LINE_IN,
3800	ichac97MixerGet(pThis, AC97_Record_Gain_Mute));
3801	if (pThis->enmCodecModel == AC97CODEC_AD1980)
3802	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
3803	ichac97R3MixerSetVolume(pThis, pThisCC, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER,
3804	ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute));
3805
3806	/*
3807	* Again the stream order is set is stone.
3808	*/
3809	uint8_t afActiveStrms[AC97SOUNDSOURCE_MAX];
3810	int rc2 = pHlp->pfnSSMGetMem(pSSM, afActiveStrms, sizeof(afActiveStrms));
3811	AssertRCReturn(rc2, rc2);
3812
3813	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3814	{
3815	const bool fEnable = RT_BOOL(afActiveStrms[i]);
3816	const PAC97STREAM pStream = &pThis->aStreams[i];
3817	const PAC97STREAMR3 pStreamCC = &pThisCC->aStreams[i];
3818
3819	rc2 = ichac97R3StreamEnable(pDevIns, pThis, pThisCC, pStream, pStreamCC, fEnable);
3820	AssertRC(rc2);
3821	if ( fEnable
3822	&& RT_SUCCESS(rc2))
3823	{
3824	/* Re-arm the timer for this stream. */
3825	/** @todo r=aeichner This causes a VM hang upon saved state resume when NetBSD is used as a guest
3826	* Stopping the timer if cTransferTicks is 0 is a workaround but needs further investigation,
3827	* see @bugref{9759} for more information. */
3828	if (pStreamCC->State.cTransferTicks)
3829	ichac97R3TimerSet(pDevIns, pStream, pStreamCC->State.cTransferTicks);
3830	else
3831	PDMDevHlpTimerStop(pDevIns, pStream->hTimer);
3832	}
3833
3834	/* Keep going. */
3835	}
3836
3837	pThis->bup_flag = 0;
3838	pThis->last_samp = 0;
3839
3840	return VINF_SUCCESS;
3841	}
3842
3843
3844	/**
3845	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3846	*/
3847	static DECLCALLBACK(void ) ichac97R3QueryInterface(struct PDMIBASE pInterface, const char *pszIID)
3848	{
3849	PAC97STATER3 pThisCC = RT_FROM_MEMBER(pInterface, AC97STATER3, IBase);
3850	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThisCC->IBase);
3851	return NULL;
3852	}
3853
3854
3855	/**
3856	* Powers off the device.
3857	*
3858	* @param pDevIns Device instance to power off.
3859	*/
3860	static DECLCALLBACK(void) ichac97R3PowerOff(PPDMDEVINS pDevIns)
3861	{
3862	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3863	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
3864
3865	LogRel2(("AC97: Powering off ...\n"));
3866
3867	/* Note: Involves mixer stream / sink destruction, so also do this here
3868	* instead of in ichac97R3Destruct(). */
3869	ichac97R3StreamsDestroy(pDevIns, pThis, pThisCC);
3870
3871	/*
3872	* Note: Destroy the mixer while powering off and not in ichac97R3Destruct,
3873	* giving the mixer the chance to release any references held to
3874	* PDM audio streams it maintains.
3875	*/
3876	if (pThisCC->pMixer)
3877	{
3878	AudioMixerDestroy(pThisCC->pMixer, pDevIns);
3879	pThisCC->pMixer = NULL;
3880	}
3881	}
3882
3883
3884	/**
3885	* @interface_method_impl{PDMDEVREG,pfnReset}
3886	*
3887	* @remarks The original sources didn't install a reset handler, but it seems to
3888	* make sense to me so we'll do it.
3889	*/
3890	static DECLCALLBACK(void) ichac97R3Reset(PPDMDEVINS pDevIns)
3891	{
3892	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
3893	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
3894
3895	LogRel(("AC97: Reset\n"));
3896
3897	/*
3898	* Reset the mixer too. The Windows XP driver seems to rely on
3899	* this. At least it wants to read the vendor id before it resets
3900	* the codec manually.
3901	*/
3902	ichac97R3MixerReset(pThis, pThisCC);
3903
3904	/*
3905	* Reset all streams.
3906	*/
3907	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
3908	{
3909	ichac97R3StreamEnable(pDevIns, pThis, pThisCC, &pThis->aStreams[i], &pThisCC->aStreams[i], false /* fEnable */);
3910	ichac97R3StreamReset(pThis, &pThis->aStreams[i], &pThisCC->aStreams[i]);
3911	}
3912
3913	/*
3914	* Reset mixer sinks.
3915	*
3916	* Do the reset here instead of in ichac97R3StreamReset();
3917	* the mixer sink(s) might still have data to be processed when an audio stream gets reset.
3918	*/
3919	AudioMixerSinkReset(pThisCC->pSinkLineIn);
3920	AudioMixerSinkReset(pThisCC->pSinkMicIn);
3921	AudioMixerSinkReset(pThisCC->pSinkOut);
3922	}
3923
3924
3925	/**
3926	* Attach command, internal version.
3927	*
3928	* This is called to let the device attach to a driver for a specified LUN
3929	* during runtime. This is not called during VM construction, the device
3930	* constructor has to attach to all the available drivers.
3931	*
3932	* @returns VBox status code.
3933	* @param pDevIns The device instance.
3934	* @param pThisCC The ring-3 AC'97 device state.
3935	* @param iLun The logical unit which is being attached.
3936	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3937	* @param ppDrv Attached driver instance on success. Optional.
3938	*/
3939	static int ichac97R3AttachInternal(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, unsigned iLun, uint32_t fFlags, PAC97DRIVER *ppDrv)
3940	{
3941	RT_NOREF(fFlags);
3942
3943	/*
3944	* Attach driver.
3945	*/
3946	char *pszDesc;
3947	if (RTStrAPrintf(&pszDesc, "Audio driver port (AC'97) for LUN #%u", iLun) <= 0)
3948	AssertLogRelFailedReturn(VERR_NO_MEMORY);
3949
3950	PPDMIBASE pDrvBase;
3951	int rc = PDMDevHlpDriverAttach(pDevIns, iLun, &pThisCC->IBase, &pDrvBase, pszDesc);
3952	if (RT_SUCCESS(rc))
3953	{
3954	PAC97DRIVER pDrv = (PAC97DRIVER)RTMemAllocZ(sizeof(AC97DRIVER));
3955	if (pDrv)
3956	{
3957	pDrv->pDrvBase = pDrvBase;
3958	pDrv->pConnector = PDMIBASE_QUERY_INTERFACE(pDrvBase, PDMIAUDIOCONNECTOR);
3959	AssertMsg(pDrv->pConnector != NULL, ("Configuration error: LUN #%u has no host audio interface, rc=%Rrc\n", iLun, rc));
3960	pDrv->uLUN = iLun;
3961	pDrv->pszDesc = pszDesc;
3962
3963	/*
3964	* For now we always set the driver at LUN 0 as our primary
3965	* host backend. This might change in the future.
3966	*/
3967	if (iLun == 0)
3968	pDrv->fFlags \|= PDMAUDIODRVFLAGS_PRIMARY;
3969
3970	LogFunc(("LUN#%u: pCon=%p, drvFlags=0x%x\n", iLun, pDrv->pConnector, pDrv->fFlags));
3971
3972	/* Attach to driver list if not attached yet. */
3973	if (!pDrv->fAttached)
3974	{
3975	RTListAppend(&pThisCC->lstDrv, &pDrv->Node);
3976	pDrv->fAttached = true;
3977	}
3978
3979	if (ppDrv)
3980	*ppDrv = pDrv;
3981	}
3982	else
3983	rc = VERR_NO_MEMORY;
3984	}
3985	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3986	LogFunc(("No attached driver for LUN #%u\n", iLun));
3987
3988	if (RT_FAILURE(rc))
3989	{
3990	/* Only free this string on failure;
3991	* must remain valid for the live of the driver instance. */
3992	RTStrFree(pszDesc);
3993	}
3994
3995	LogFunc(("iLun=%u, fFlags=0x%x, rc=%Rrc\n", iLun, fFlags, rc));
3996	return rc;
3997	}
3998
3999	/**
4000	* Detach command, internal version.
4001	*
4002	* This is called to let the device detach from a driver for a specified LUN
4003	* during runtime.
4004	*
4005	* @returns VBox status code.
4006	* @param pDevIns The device instance.
4007	* @param pThisCC The ring-3 AC'97 device state.
4008	* @param pDrv Driver to detach from device.
4009	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
4010	*/
4011	static int ichac97R3DetachInternal(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, PAC97DRIVER pDrv, uint32_t fFlags)
4012	{
4013	RT_NOREF(fFlags);
4014
4015	/* First, remove the driver from our list and destory it's associated streams.
4016	* This also will un-set the driver as a recording source (if associated). */
4017	ichac97R3MixerRemoveDrv(pDevIns, pThisCC, pDrv);
4018
4019	/* Next, search backwards for a capable (attached) driver which now will be the
4020	* new recording source. */
4021	PDMAUDIODSTSRCUNION dstSrc;
4022	PAC97DRIVER pDrvCur;
4023	RTListForEachReverse(&pThisCC->lstDrv, pDrvCur, AC97DRIVER, Node)
4024	{
4025	if (!pDrvCur->pConnector)
4026	continue;
4027
4028	PDMAUDIOBACKENDCFG Cfg;
4029	int rc2 = pDrvCur->pConnector->pfnGetConfig(pDrvCur->pConnector, &Cfg);
4030	if (RT_FAILURE(rc2))
4031	continue;
4032
4033	dstSrc.enmSrc = PDMAUDIORECSRC_MIC;
4034	PAC97DRIVERSTREAM pDrvStrm = ichac97R3MixerGetDrvStream(pDrvCur, PDMAUDIODIR_IN, dstSrc);
4035	if ( pDrvStrm
4036	&& pDrvStrm->pMixStrm)
4037	{
4038	rc2 = AudioMixerSinkSetRecordingSource(pThisCC->pSinkMicIn, pDrvStrm->pMixStrm);
4039	if (RT_SUCCESS(rc2))
4040	LogRel2(("AC97: Set new recording source for 'Mic In' to '%s'\n", Cfg.szName));
4041	}
4042
4043	dstSrc.enmSrc = PDMAUDIORECSRC_LINE;
4044	pDrvStrm = ichac97R3MixerGetDrvStream(pDrvCur, PDMAUDIODIR_IN, dstSrc);
4045	if ( pDrvStrm
4046	&& pDrvStrm->pMixStrm)
4047	{
4048	rc2 = AudioMixerSinkSetRecordingSource(pThisCC->pSinkLineIn, pDrvStrm->pMixStrm);
4049	if (RT_SUCCESS(rc2))
4050	LogRel2(("AC97: Set new recording source for 'Line In' to '%s'\n", Cfg.szName));
4051	}
4052	}
4053
4054	LogFunc(("uLUN=%u, fFlags=0x%x\n", pDrv->uLUN, fFlags));
4055	return VINF_SUCCESS;
4056	}
4057
4058	/**
4059	* @interface_method_impl{PDMDEVREGR3,pfnAttach}
4060	*/
4061	static DECLCALLBACK(int) ichac97R3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
4062	{
4063	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
4064	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
4065
4066	LogFunc(("iLUN=%u, fFlags=0x%x\n", iLUN, fFlags));
4067
4068	DEVAC97_LOCK(pDevIns, pThis);
4069
4070	PAC97DRIVER pDrv;
4071	int rc2 = ichac97R3AttachInternal(pDevIns, pThisCC, iLUN, fFlags, &pDrv);
4072	if (RT_SUCCESS(rc2))
4073	rc2 = ichac97R3MixerAddDrv(pDevIns, pThisCC, pDrv);
4074
4075	if (RT_FAILURE(rc2))
4076	LogFunc(("Failed with %Rrc\n", rc2));
4077
4078	DEVAC97_UNLOCK(pDevIns, pThis);
4079
4080	return VINF_SUCCESS;
4081	}
4082
4083	/**
4084	* @interface_method_impl{PDMDEVREG,pfnDetach}
4085	*/
4086	static DECLCALLBACK(void) ichac97R3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
4087	{
4088	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
4089	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
4090
4091	LogFunc(("iLUN=%u, fFlags=0x%x\n", iLUN, fFlags));
4092
4093	DEVAC97_LOCK(pDevIns, pThis);
4094
4095	PAC97DRIVER pDrv, pDrvNext;
4096	RTListForEachSafe(&pThisCC->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
4097	{
4098	if (pDrv->uLUN == iLUN)
4099	{
4100	int rc2 = ichac97R3DetachInternal(pDevIns, pThisCC, pDrv, fFlags);
4101	if (RT_SUCCESS(rc2))
4102	{
4103	RTStrFree(pDrv->pszDesc);
4104	RTMemFree(pDrv);
4105	pDrv = NULL;
4106	}
4107
4108	break;
4109	}
4110	}
4111
4112	DEVAC97_UNLOCK(pDevIns, pThis);
4113	}
4114
4115	/**
4116	* Replaces a driver with a the NullAudio drivers.
4117	*
4118	* @returns VBox status code.
4119	* @param pDevIns The device instance.
4120	* @param pThisCC The ring-3 AC'97 device state.
4121	* @param iLun The logical unit which is being replaced.
4122	*/
4123	static int ichac97R3ReconfigLunWithNullAudio(PPDMDEVINS pDevIns, PAC97STATER3 pThisCC, unsigned iLun)
4124	{
4125	int rc = PDMDevHlpDriverReconfigure2(pDevIns, iLun, "AUDIO", "NullAudio");
4126	if (RT_SUCCESS(rc))
4127	rc = ichac97R3AttachInternal(pDevIns, pThisCC, iLun, 0 /* fFlags /, NULL / ppDrv */);
4128	LogFunc(("pThisCC=%p, iLun=%u, rc=%Rrc\n", pThisCC, iLun, rc));
4129	return rc;
4130	}
4131
4132	/**
4133	* @interface_method_impl{PDMDEVREG,pfnDestruct}
4134	*/
4135	static DECLCALLBACK(int) ichac97R3Destruct(PPDMDEVINS pDevIns)
4136	{
4137	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns); /* this shall come first */
4138	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
4139
4140	LogFlowFuncEnter();
4141
4142	PAC97DRIVER pDrv, pDrvNext;
4143	RTListForEachSafe(&pThisCC->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
4144	{
4145	RTListNodeRemove(&pDrv->Node);
4146	RTMemFree(pDrv->pszDesc);
4147	RTMemFree(pDrv);
4148	}
4149
4150	/* Sanity. */
4151	Assert(RTListIsEmpty(&pThisCC->lstDrv));
4152
4153	return VINF_SUCCESS;
4154	}
4155
4156	/**
4157	* @interface_method_impl{PDMDEVREG,pfnConstruct}
4158	*/
4159	static DECLCALLBACK(int) ichac97R3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
4160	{
4161	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns); /* this shall come first */
4162	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
4163	PAC97STATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAC97STATER3);
4164	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
4165	Assert(iInstance == 0); RT_NOREF(iInstance);
4166
4167	/*
4168	* Initialize data so we can run the destructor without scewing up.
4169	*/
4170	pThisCC->pDevIns = pDevIns;
4171	pThisCC->IBase.pfnQueryInterface = ichac97R3QueryInterface;
4172	RTListInit(&pThisCC->lstDrv);
4173
4174	/*
4175	* Validate and read configuration.
4176	*/
4177	PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "Codec\|TimerHz\|DebugEnabled\|DebugPathOut", "");
4178
4179	char szCodec[20];
4180	int rc = pHlp->pfnCFGMQueryStringDef(pCfg, "Codec", &szCodec[0], sizeof(szCodec), "STAC9700");
4181	if (RT_FAILURE(rc))
4182	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4183	N_("AC'97 configuration error: Querying \"Codec\" as string failed"));
4184
4185	rc = pHlp->pfnCFGMQueryU16Def(pCfg, "TimerHz", &pThis->uTimerHz, AC97_TIMER_HZ_DEFAULT /* Default value, if not set. */);
4186	if (RT_FAILURE(rc))
4187	return PDMDEV_SET_ERROR(pDevIns, rc,
4188	N_("AC'97 configuration error: failed to read Hertz (Hz) rate as unsigned integer"));
4189
4190	if (pThis->uTimerHz != AC97_TIMER_HZ_DEFAULT)
4191	LogRel(("AC97: Using custom device timer rate (%RU16Hz)\n", pThis->uTimerHz));
4192
4193	rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "DebugEnabled", &pThisCC->Dbg.fEnabled, false);
4194	if (RT_FAILURE(rc))
4195	return PDMDEV_SET_ERROR(pDevIns, rc,
4196	N_("AC97 configuration error: failed to read debugging enabled flag as boolean"));
4197
4198	rc = pHlp->pfnCFGMQueryStringAllocDef(pCfg, "DebugPathOut", &pThisCC->Dbg.pszOutPath, NULL);
4199	if (RT_FAILURE(rc))
4200	return PDMDEV_SET_ERROR(pDevIns, rc,
4201	N_("AC97 configuration error: failed to read debugging output path flag as string"));
4202
4203	if (pThisCC->Dbg.fEnabled)
4204	LogRel2(("AC97: Debug output will be saved to '%s'\n", pThisCC->Dbg.pszOutPath));
4205
4206	/*
4207	* The AD1980 codec (with corresponding PCI subsystem vendor ID) is whitelisted
4208	* in the Linux kernel; Linux makes no attempt to measure the data rate and assumes
4209	* 48 kHz rate, which is exactly what we need. Same goes for AD1981B.
4210	*/
4211	if (!strcmp(szCodec, "STAC9700"))
4212	pThis->enmCodecModel = AC97CODEC_STAC9700;
4213	else if (!strcmp(szCodec, "AD1980"))
4214	pThis->enmCodecModel = AC97CODEC_AD1980;
4215	else if (!strcmp(szCodec, "AD1981B"))
4216	pThis->enmCodecModel = AC97CODEC_AD1981B;
4217	else
4218	return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS,
4219	N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"), szCodec);
4220
4221	LogRel(("AC97: Using codec '%s'\n", szCodec));
4222
4223	/*
4224	* Use an own critical section for the device instead of the default
4225	* one provided by PDM. This allows fine-grained locking in combination
4226	* with TM when timer-specific stuff is being called in e.g. the MMIO handlers.
4227	*/
4228	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, RT_SRC_POS, "AC'97");
4229	AssertRCReturn(rc, rc);
4230
4231	rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
4232	AssertRCReturn(rc, rc);
4233
4234	/*
4235	* Initialize data (most of it anyway).
4236	*/
4237	/* PCI Device */
4238	PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
4239	PCIDevSetVendorId(pPciDev, 0x8086); /* 00 ro - intel. */ Assert(pPciDev->abConfig[0x00] == 0x86); Assert(pPciDev->abConfig[0x01] == 0x80);
4240	PCIDevSetDeviceId(pPciDev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */ Assert(pPciDev->abConfig[0x02] == 0x15); Assert(pPciDev->abConfig[0x03] == 0x24);
4241	PCIDevSetCommand(pPciDev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert(pPciDev->abConfig[0x04] == 0x00); Assert(pPciDev->abConfig[0x05] == 0x00);
4242	PCIDevSetStatus(pPciDev, VBOX_PCI_STATUS_DEVSEL_MEDIUM \| VBOX_PCI_STATUS_FAST_BACK); /* 06 rwc?,ro? - pcists. */ Assert(pPciDev->abConfig[0x06] == 0x80); Assert(pPciDev->abConfig[0x07] == 0x02);
4243	PCIDevSetRevisionId(pPciDev, 0x01); /* 08 ro - rid. */ Assert(pPciDev->abConfig[0x08] == 0x01);
4244	PCIDevSetClassProg(pPciDev, 0x00); /* 09 ro - pi. */ Assert(pPciDev->abConfig[0x09] == 0x00);
4245	PCIDevSetClassSub(pPciDev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert(pPciDev->abConfig[0x0a] == 0x01);
4246	PCIDevSetClassBase(pPciDev, 0x04); /* 0b ro - bcc; 04 == multimedia.*/Assert(pPciDev->abConfig[0x0b] == 0x04);
4247	PCIDevSetHeaderType(pPciDev, 0x00); /* 0e ro - headtyp. */ Assert(pPciDev->abConfig[0x0e] == 0x00);
4248	PCIDevSetBaseAddress(pPciDev, 0, /* 10 rw - nambar - native audio mixer base. */
4249	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pPciDev->abConfig[0x10] == 0x01); Assert(pPciDev->abConfig[0x11] == 0x00); Assert(pPciDev->abConfig[0x12] == 0x00); Assert(pPciDev->abConfig[0x13] == 0x00);
4250	PCIDevSetBaseAddress(pPciDev, 1, /* 14 rw - nabmbar - native audio bus mastering. */
4251	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pPciDev->abConfig[0x14] == 0x01); Assert(pPciDev->abConfig[0x15] == 0x00); Assert(pPciDev->abConfig[0x16] == 0x00); Assert(pPciDev->abConfig[0x17] == 0x00);
4252	PCIDevSetInterruptLine(pPciDev, 0x00); /* 3c rw. */ Assert(pPciDev->abConfig[0x3c] == 0x00);
4253	PCIDevSetInterruptPin(pPciDev, 0x01); /* 3d ro - INTA#. */ Assert(pPciDev->abConfig[0x3d] == 0x01);
4254
4255	if (pThis->enmCodecModel == AC97CODEC_AD1980)
4256	{
4257	PCIDevSetSubSystemVendorId(pPciDev, 0x1028); /* 2c ro - Dell.) */
4258	PCIDevSetSubSystemId(pPciDev, 0x0177); /* 2e ro. */
4259	}
4260	else if (pThis->enmCodecModel == AC97CODEC_AD1981B)
4261	{
4262	PCIDevSetSubSystemVendorId(pPciDev, 0x1028); /* 2c ro - Dell.) */
4263	PCIDevSetSubSystemId(pPciDev, 0x01ad); /* 2e ro. */
4264	}
4265	else
4266	{
4267	PCIDevSetSubSystemVendorId(pPciDev, 0x8086); /* 2c ro - Intel.) */
4268	PCIDevSetSubSystemId(pPciDev, 0x0000); /* 2e ro. */
4269	}
4270
4271	/*
4272	* Register the PCI device and associated I/O regions.
4273	*/
4274	rc = PDMDevHlpPCIRegister(pDevIns, pPciDev);
4275	if (RT_FAILURE(rc))
4276	return rc;
4277
4278	rc = PDMDevHlpPCIIORegionCreateIo(pDevIns, 0 /iPciRegion/, 256 /cPorts/,
4279	ichac97IoPortNamWrite, ichac97IoPortNamRead, NULL /pvUser/,
4280	"ICHAC97 NAM", NULL /paExtDescs/, &pThis->hIoPortsNam);
4281	AssertRCReturn(rc, rc);
4282
4283	rc = PDMDevHlpPCIIORegionCreateIo(pDevIns, 1 /iPciRegion/, 64 /cPorts/,
4284	ichac97IoPortNabmWrite, ichac97IoPortNabmRead, NULL /pvUser/,
4285	"ICHAC97 NABM", g_aNabmPorts, &pThis->hIoPortsNabm);
4286	AssertRCReturn(rc, rc);
4287
4288	/*
4289	* Saved state.
4290	*/
4291	rc = PDMDevHlpSSMRegister(pDevIns, AC97_SAVED_STATE_VERSION, sizeof(*pThis), ichac97R3SaveExec, ichac97R3LoadExec);
4292	if (RT_FAILURE(rc))
4293	return rc;
4294
4295	# ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
4296	LogRel(("AC97: Asynchronous I/O enabled\n"));
4297	# endif
4298
4299	/*
4300	* Attach drivers. We ASSUME they are configured consecutively without any
4301	* gaps, so we stop when we hit the first LUN w/o a driver configured.
4302	*/
4303	for (unsigned iLun = 0; ; iLun++)
4304	{
4305	AssertBreak(iLun < UINT8_MAX);
4306	LogFunc(("Trying to attach driver for LUN#%u ...\n", iLun));
4307	rc = ichac97R3AttachInternal(pDevIns, pThisCC, iLun, 0 /* fFlags /, NULL / ppDrv */);
4308	if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4309	{
4310	LogFunc(("cLUNs=%u\n", iLun));
4311	break;
4312	}
4313	if (rc == VERR_AUDIO_BACKEND_INIT_FAILED)
4314	{
4315	ichac97R3ReconfigLunWithNullAudio(pDevIns, pThisCC, iLun); /* Pretend attaching to the NULL audio backend will never fail. */
4316	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
4317	N_("Host audio backend initialization has failed. "
4318	"Selecting the NULL audio backend with the consequence that no sound is audible"));
4319	}
4320	else
4321	AssertLogRelMsgReturn(RT_SUCCESS(rc), ("LUN#%u: rc=%Rrc\n", iLun, rc), rc);
4322	}
4323
4324	uint32_t fMixer = AUDMIXER_FLAGS_NONE;
4325	if (pThisCC->Dbg.fEnabled)
4326	fMixer \|= AUDMIXER_FLAGS_DEBUG;
4327
4328	rc = AudioMixerCreate("AC'97 Mixer", 0 /* uFlags */, &pThisCC->pMixer);
4329	AssertRCReturn(rc, rc);
4330
4331	rc = AudioMixerCreateSink(pThisCC->pMixer, "Line In",
4332	AUDMIXSINKDIR_INPUT, pDevIns, &pThisCC->pSinkLineIn);
4333	AssertRCReturn(rc, rc);
4334	rc = AudioMixerCreateSink(pThisCC->pMixer, "Microphone In",
4335	AUDMIXSINKDIR_INPUT, pDevIns, &pThisCC->pSinkMicIn);
4336	AssertRCReturn(rc, rc);
4337	rc = AudioMixerCreateSink(pThisCC->pMixer, "PCM Output",
4338	AUDMIXSINKDIR_OUTPUT, pDevIns, &pThisCC->pSinkOut);
4339	AssertRCReturn(rc, rc);
4340
4341	/*
4342	* Create all hardware streams.
4343	*/
4344	AssertCompile(RT_ELEMENTS(pThis->aStreams) == AC97_MAX_STREAMS);
4345	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
4346	{
4347	rc = ichac97R3StreamCreate(pThisCC, &pThis->aStreams[i], &pThisCC->aStreams[i], i /* SD# */);
4348	AssertRCReturn(rc, rc);
4349	}
4350
4351	/*
4352	* Create the emulation timers (one per stream).
4353	*
4354	* We must the critical section for the timers as the device has a
4355	* noop section associated with it.
4356	*
4357	* Note: Use TMCLOCK_VIRTUAL_SYNC here, as the guest's AC'97 driver
4358	* relies on exact (virtual) DMA timing and uses DMA Position Buffers
4359	* instead of the LPIB registers.
4360	*/
4361	/** @todo r=bird: The need to use virtual sync is perhaps because TM
4362	* doesn't schedule regular TMCLOCK_VIRTUAL timers as accurately as it
4363	* should (VT-x preemption timer, etc). Hope to address that before
4364	* long. @bugref{9943}. */
4365	static const char * const s_apszNames[] = { "AC97 PI", "AC97 PO", "AC97 MC" };
4366	AssertCompile(RT_ELEMENTS(s_apszNames) == AC97_MAX_STREAMS);
4367	for (unsigned i = 0; i < AC97_MAX_STREAMS; i++)
4368	{
4369	rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, ichac97R3Timer, &pThis->aStreams[i],
4370	TMTIMER_FLAGS_NO_CRIT_SECT \| TMTIMER_FLAGS_RING0, s_apszNames[i], &pThis->aStreams[i].hTimer);
4371	AssertRCReturn(rc, rc);
4372
4373	rc = PDMDevHlpTimerSetCritSect(pDevIns, pThis->aStreams[i].hTimer, &pThis->CritSect);
4374	AssertRCReturn(rc, rc);
4375	}
4376
4377
4378	# ifdef VBOX_WITH_AUDIO_AC97_ONETIME_INIT
4379	PAC97DRIVER pDrv;
4380	RTListForEach(&pThisCC->lstDrv, pDrv, AC97DRIVER, Node)
4381	{
4382	/*
4383	* Only primary drivers are critical for the VM to run. Everything else
4384	* might not worth showing an own error message box in the GUI.
4385	*/
4386	if (!(pDrv->fFlags & PDMAUDIODRVFLAGS_PRIMARY))
4387	continue;
4388
4389	PPDMIAUDIOCONNECTOR pCon = pDrv->pConnector;
4390	AssertPtr(pCon);
4391
4392	bool fValidLineIn = AudioMixerStreamIsValid(pDrv->LineIn.pMixStrm);
4393	bool fValidMicIn = AudioMixerStreamIsValid(pDrv->MicIn.pMixStrm);
4394	bool fValidOut = AudioMixerStreamIsValid(pDrv->Out.pMixStrm);
4395
4396	if ( !fValidLineIn
4397	&& !fValidMicIn
4398	&& !fValidOut)
4399	{
4400	LogRel(("AC97: Falling back to NULL backend (no sound audible)\n"));
4401	ichac97R3Reset(pDevIns);
4402	ichac97R3ReconfigLunWithNullAudio(pdEvIns, pThsiCC, iLun);
4403	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
4404	N_("No audio devices could be opened. "
4405	"Selecting the NULL audio backend with the consequence that no sound is audible"));
4406	}
4407	else
4408	{
4409	bool fWarn = false;
4410
4411	PDMAUDIOBACKENDCFG backendCfg;
4412	int rc2 = pCon->pfnGetConfig(pCon, &backendCfg);
4413	if (RT_SUCCESS(rc2))
4414	{
4415	if (backendCfg.cMaxStreamsIn)
4416	{
4417	/* If the audio backend supports two or more input streams at once,
4418	* warn if one of our two inputs (microphone-in and line-in) failed to initialize. */
4419	if (backendCfg.cMaxStreamsIn >= 2)
4420	fWarn = !fValidLineIn \|\| !fValidMicIn;
4421	/* If the audio backend only supports one input stream at once (e.g. pure ALSA, and
4422	* not ALSA via PulseAudio plugin!), only warn if both of our inputs failed to initialize.
4423	* One of the two simply is not in use then. */
4424	else if (backendCfg.cMaxStreamsIn == 1)
4425	fWarn = !fValidLineIn && !fValidMicIn;
4426	/* Don't warn if our backend is not able of supporting any input streams at all. */
4427	}
4428
4429	if ( !fWarn
4430	&& backendCfg.cMaxStreamsOut)
4431	{
4432	fWarn = !fValidOut;
4433	}
4434	}
4435	else
4436	{
4437	LogRel(("AC97: Unable to retrieve audio backend configuration for LUN #%RU8, rc=%Rrc\n", pDrv->uLUN, rc2));
4438	fWarn = true;
4439	}
4440
4441	if (fWarn)
4442	{
4443	char szMissingStreams[255] = "";
4444	size_t len = 0;
4445	if (!fValidLineIn)
4446	{
4447	LogRel(("AC97: WARNING: Unable to open PCM line input for LUN #%RU8!\n", pDrv->uLUN));
4448	len = RTStrPrintf(szMissingStreams, sizeof(szMissingStreams), "PCM Input");
4449	}
4450	if (!fValidMicIn)
4451	{
4452	LogRel(("AC97: WARNING: Unable to open PCM microphone input for LUN #%RU8!\n", pDrv->uLUN));
4453	len += RTStrPrintf(szMissingStreams + len,
4454	sizeof(szMissingStreams) - len, len ? ", PCM Microphone" : "PCM Microphone");
4455	}
4456	if (!fValidOut)
4457	{
4458	LogRel(("AC97: WARNING: Unable to open PCM output for LUN #%RU8!\n", pDrv->uLUN));
4459	len += RTStrPrintf(szMissingStreams + len,
4460	sizeof(szMissingStreams) - len, len ? ", PCM Output" : "PCM Output");
4461	}
4462
4463	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
4464	N_("Some AC'97 audio streams (%s) could not be opened. Guest applications generating audio "
4465	"output or depending on audio input may hang. Make sure your host audio device "
4466	"is working properly. Check the logfile for error messages of the audio "
4467	"subsystem"), szMissingStreams);
4468	}
4469	}
4470	}
4471	# endif /* VBOX_WITH_AUDIO_AC97_ONETIME_INIT */
4472
4473	ichac97R3Reset(pDevIns);
4474
4475	/*
4476	* Register statistics.
4477	*/
4478	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatUnimplementedNabmReads, STAMTYPE_COUNTER, "UnimplementedNabmReads", STAMUNIT_OCCURENCES, "Unimplemented NABM register reads.");
4479	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatUnimplementedNabmWrites, STAMTYPE_COUNTER, "UnimplementedNabmWrites", STAMUNIT_OCCURENCES, "Unimplemented NABM register writes.");
4480	# ifdef VBOX_WITH_STATISTICS
4481	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, "Timer", STAMUNIT_TICKS_PER_CALL, "Profiling ichac97Timer.");
4482	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatIn, STAMTYPE_PROFILE, "Input", STAMUNIT_TICKS_PER_CALL, "Profiling input.");
4483	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatOut, STAMTYPE_PROFILE, "Output", STAMUNIT_TICKS_PER_CALL, "Profiling output.");
4484	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, "BytesRead" , STAMUNIT_BYTES, "Bytes read from AC97 emulation.");
4485	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, "BytesWritten", STAMUNIT_BYTES, "Bytes written to AC97 emulation.");
4486	# endif
4487
4488	LogFlowFuncLeaveRC(VINF_SUCCESS);
4489	return VINF_SUCCESS;
4490	}
4491
4492	#else /* !IN_RING3 */
4493
4494	/**
4495	* @callback_method_impl{PDMDEVREGR0,pfnConstruct}
4496	*/
4497	static DECLCALLBACK(int) ichac97RZConstruct(PPDMDEVINS pDevIns)
4498	{
4499	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
4500	PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
4501
4502	int rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
4503	AssertRCReturn(rc, rc);
4504
4505	rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsNam, ichac97IoPortNamWrite, ichac97IoPortNamRead, NULL /pvUser/);
4506	AssertRCReturn(rc, rc);
4507	rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsNabm, ichac97IoPortNabmWrite, ichac97IoPortNabmRead, NULL /pvUser/);
4508	AssertRCReturn(rc, rc);
4509
4510	return VINF_SUCCESS;
4511	}
4512
4513	#endif /* !IN_RING3 */
4514
4515	/**
4516	* The device registration structure.
4517	*/
4518	const PDMDEVREG g_DeviceICHAC97 =
4519	{
4520	/* .u32Version = */ PDM_DEVREG_VERSION,
4521	/* .uReserved0 = */ 0,
4522	/* .szName = */ "ichac97",
4523	/* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RZ \| PDM_DEVREG_FLAGS_NEW_STYLE,
4524	/* .fClass = */ PDM_DEVREG_CLASS_AUDIO,
4525	/* .cMaxInstances = */ 1,
4526	/* .uSharedVersion = */ 42,
4527	/* .cbInstanceShared = */ sizeof(AC97STATE),
4528	/* .cbInstanceCC = */ CTX_EXPR(sizeof(AC97STATER3), 0, 0),
4529	/* .cbInstanceRC = */ 0,
4530	/* .cMaxPciDevices = */ 1,
4531	/* .cMaxMsixVectors = */ 0,
4532	/* .pszDescription = */ "ICH AC'97 Audio Controller",
4533	#if defined(IN_RING3)
4534	/* .pszRCMod = */ "VBoxDDRC.rc",
4535	/* .pszR0Mod = */ "VBoxDDR0.r0",
4536	/* .pfnConstruct = */ ichac97R3Construct,
4537	/* .pfnDestruct = */ ichac97R3Destruct,
4538	/* .pfnRelocate = */ NULL,
4539	/* .pfnMemSetup = */ NULL,
4540	/* .pfnPowerOn = */ NULL,
4541	/* .pfnReset = */ ichac97R3Reset,
4542	/* .pfnSuspend = */ NULL,
4543	/* .pfnResume = */ NULL,
4544	/* .pfnAttach = */ ichac97R3Attach,
4545	/* .pfnDetach = */ ichac97R3Detach,
4546	/* .pfnQueryInterface = */ NULL,
4547	/* .pfnInitComplete = */ NULL,
4548	/* .pfnPowerOff = */ ichac97R3PowerOff,
4549	/* .pfnSoftReset = */ NULL,
4550	/* .pfnReserved0 = */ NULL,
4551	/* .pfnReserved1 = */ NULL,
4552	/* .pfnReserved2 = */ NULL,
4553	/* .pfnReserved3 = */ NULL,
4554	/* .pfnReserved4 = */ NULL,
4555	/* .pfnReserved5 = */ NULL,
4556	/* .pfnReserved6 = */ NULL,
4557	/* .pfnReserved7 = */ NULL,
4558	#elif defined(IN_RING0)
4559	/* .pfnEarlyConstruct = */ NULL,
4560	/* .pfnConstruct = */ ichac97RZConstruct,
4561	/* .pfnDestruct = */ NULL,
4562	/* .pfnFinalDestruct = */ NULL,
4563	/* .pfnRequest = */ NULL,
4564	/* .pfnReserved0 = */ NULL,
4565	/* .pfnReserved1 = */ NULL,
4566	/* .pfnReserved2 = */ NULL,
4567	/* .pfnReserved3 = */ NULL,
4568	/* .pfnReserved4 = */ NULL,
4569	/* .pfnReserved5 = */ NULL,
4570	/* .pfnReserved6 = */ NULL,
4571	/* .pfnReserved7 = */ NULL,
4572	#elif defined(IN_RC)
4573	/* .pfnConstruct = */ ichac97RZConstruct,
4574	/* .pfnReserved0 = */ NULL,
4575	/* .pfnReserved1 = */ NULL,
4576	/* .pfnReserved2 = */ NULL,
4577	/* .pfnReserved3 = */ NULL,
4578	/* .pfnReserved4 = */ NULL,
4579	/* .pfnReserved5 = */ NULL,
4580	/* .pfnReserved6 = */ NULL,
4581	/* .pfnReserved7 = */ NULL,
4582	#else
4583	# error "Not in IN_RING3, IN_RING0 or IN_RC!"
4584	#endif
4585	/* .u32VersionEnd = */ PDM_DEVREG_VERSION
4586	};
4587
4588	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
4589

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source: vbox/trunk/src/VBox/Devices/Audio/DevIchAc97.cpp@ 88466

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