VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevIchHdaCodec.cpp@ 56728

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1/* $Id: DevIchHdaCodec.cpp 56728 2015-07-01 09:23:27Z vboxsync $ */
2/** @file
3 * DevIchHdaCodec - VBox ICH Intel HD Audio Codec.
4 *
5 * Implemented against "Intel I/O Controller Hub 6 (ICH6) High Definition
6 * Audio / AC '97 - Programmer's Reference Manual (PRM)", document number
7 * 302349-003.
8 */
9
10/*
11 * Copyright (C) 2006-2015 Oracle Corporation
12 *
13 * This file is part of VirtualBox Open Source Edition (OSE), as
14 * available from http://www.virtualbox.org. This file is free software;
15 * you can redistribute it and/or modify it under the terms of the GNU
16 * General Public License (GPL) as published by the Free Software
17 * Foundation, in version 2 as it comes in the "COPYING" file of the
18 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
19 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_DEV_HDA_CODEC
27#include <VBox/vmm/pdmdev.h>
28#include <VBox/vmm/pdmaudioifs.h>
29#include <iprt/assert.h>
30#include <iprt/uuid.h>
31#include <iprt/string.h>
32#include <iprt/mem.h>
33#include <iprt/asm.h>
34#include <iprt/cpp/utils.h>
35
36#include "VBoxDD.h"
37#include "DevIchHdaCodec.h"
38
39
40/*******************************************************************************
41* Defined Constants And Macros *
42*******************************************************************************/
43/* PRM 5.3.1 */
44/** Codec address mask. */
45#define CODEC_CAD_MASK 0xF0000000
46/** Codec address shift. */
47#define CODEC_CAD_SHIFT 28
48#define CODEC_DIRECT_MASK RT_BIT(27)
49/** Node ID mask. */
50#define CODEC_NID_MASK 0x07F00000
51/** Node ID shift. */
52#define CODEC_NID_SHIFT 20
53#define CODEC_VERBDATA_MASK 0x000FFFFF
54#define CODEC_VERB_4BIT_CMD 0x000FFFF0
55#define CODEC_VERB_4BIT_DATA 0x0000000F
56#define CODEC_VERB_8BIT_CMD 0x000FFF00
57#define CODEC_VERB_8BIT_DATA 0x000000FF
58#define CODEC_VERB_16BIT_CMD 0x000F0000
59#define CODEC_VERB_16BIT_DATA 0x0000FFFF
60
61#define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT)
62#define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)
63#define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)
64#define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)
65#define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))
66#define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))
67#define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))
68#define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))
69#define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)
70#define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)
71#define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)
72
73#define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)
74#define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)
75#define CODEC_VERB_GET_AMP_INDEX 0x7
76
77/* HDA spec 7.3.3.7 NoteA */
78#define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)
79#define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)
80#define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))
81
82/* HDA spec 7.3.3.7 NoteC */
83#define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15)
84#define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14)
85#define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13)
86#define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12)
87#define CODEC_VERB_SET_AMP_INDEX (0x7 << 8)
88#define CODEC_VERB_SET_AMP_MUTE RT_BIT(7)
89/** Note: 7-bit value [6:0]. */
90#define CODEC_VERB_SET_AMP_GAIN 0x7F
91
92#define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)
93#define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)
94#define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)
95#define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)
96#define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)
97#define CODEC_SET_AMP_MUTE(cmd) ((cmd) & CODEC_VERB_SET_AMP_MUTE)
98#define CODEC_SET_AMP_GAIN(cmd) ((cmd) & CODEC_VERB_SET_AMP_GAIN)
99
100/* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */
101/* VendorID (7.3.4.1) */
102#define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))
103#define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)
104#define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)
105/* RevisionID (7.3.4.2)*/
106#define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID))
107/* Subordinate node count (7.3.4.3)*/
108#define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))
109#define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)
110#define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)
111/*
112 * Function Group Type (7.3.4.4)
113 * 0 & [0x3-0x7f] are reserved types
114 * [0x80 - 0xff] are vendor defined function groups
115 */
116#define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))
117#define CODEC_F00_05_UNSOL RT_BIT(8)
118#define CODEC_F00_05_AFG (0x1)
119#define CODEC_F00_05_MFG (0x2)
120#define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))
121#define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)
122/* Audio Function Group capabilities (7.3.4.5) */
123#define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))
124#define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)
125
126/* Widget Capabilities (7.3.4.6) */
127#define CODEC_MAKE_F00_09(type, delay, chanel_count) \
128 ( (((type) & 0xF) << 20) \
129 | (((delay) & 0xF) << 16) \
130 | (((chanel_count) & 0xF) << 13))
131/* note: types 0x8-0xe are reserved */
132#define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)
133#define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)
134#define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)
135#define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)
136#define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)
137#define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)
138#define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)
139#define CODEC_F00_09_TYPE_BEEP_GEN (0x7)
140#define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)
141
142#define CODEC_F00_09_CAP_CP RT_BIT(12)
143#define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)
144#define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)
145#define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)
146#define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)
147#define CODEC_F00_09_CAP_UNSOL RT_BIT(7)
148#define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)
149#define CODEC_F00_09_CAP_STRIPE RT_BIT(5)
150#define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)
151#define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)
152#define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)
153#define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)
154#define CODEC_F00_09_CAP_LSB RT_BIT(0)
155
156#define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)
157
158#define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))
159#define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))
160#define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))
161#define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))
162#define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))
163#define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))
164#define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))
165#define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))
166#define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))
167#define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))
168#define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))
169#define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))
170#define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))
171
172/* Supported PCM size, rates (7.3.4.7) */
173#define CODEC_F00_0A_32_BIT RT_BIT(19)
174#define CODEC_F00_0A_24_BIT RT_BIT(18)
175#define CODEC_F00_0A_16_BIT RT_BIT(17)
176#define CODEC_F00_0A_8_BIT RT_BIT(16)
177
178#define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)
179#define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)
180#define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)
181#define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)
182#define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)
183#define CODEC_F00_0A_48KHZ RT_BIT(6)
184#define CODEC_F00_0A_44_1KHZ RT_BIT(5)
185/* 2/3 * 48kHz */
186#define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)
187/* 1/2 * 44.1kHz */
188#define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)
189/* 1/3 * 48kHz */
190#define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)
191/* 1/4 * 44.1kHz */
192#define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)
193/* 1/6 * 48kHz */
194#define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)
195
196/* Supported streams formats (7.3.4.8) */
197#define CODEC_F00_0B_AC3 RT_BIT(2)
198#define CODEC_F00_0B_FLOAT32 RT_BIT(1)
199#define CODEC_F00_0B_PCM RT_BIT(0)
200
201/* Pin Capabilities (7.3.4.9)*/
202#define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)
203#define CODEC_F00_0C_CAP_HBR RT_BIT(27)
204#define CODEC_F00_0C_CAP_DP RT_BIT(24)
205#define CODEC_F00_0C_CAP_EAPD RT_BIT(16)
206#define CODEC_F00_0C_CAP_HDMI RT_BIT(7)
207#define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)
208#define CODEC_F00_0C_CAP_INPUT RT_BIT(5)
209#define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)
210#define CODEC_F00_0C_CAP_HP RT_BIT(3)
211#define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2)
212#define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)
213#define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)
214
215#define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27))
216#define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24))
217#define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16))
218#define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7))
219#define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6))
220#define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5))
221#define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4))
222#define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3))
223#define CODEC_F00_0C_IS_CAP_PRESENSE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2))
224#define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1))
225#define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0))
226
227/* Input Amplifier capabilities (7.3.4.10) */
228#define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \
229 ( (((mute_cap) & 0x1) << 31) \
230 | (((step_size) & 0xFF) << 16) \
231 | (((num_steps) & 0xFF) << 8) \
232 | ((offset) & 0xFF))
233
234#define CODEC_F00_0D_CAP_MUTE RT_BIT(7)
235
236#define CODEC_F00_0D_IS_CAP_MUTE(f00_0d) ( ( f00_0d) & RT_BIT(31))
237#define CODEC_F00_0D_STEP_SIZE(f00_0d) ((( f00_0d) & (0x7F << 16)) >> 16)
238#define CODEC_F00_0D_NUM_STEPS(f00_0d) ((((f00_0d) & (0x7F << 8)) >> 8) + 1)
239#define CODEC_F00_0D_OFFSET(f00_0d) ( (f00_0d) & 0x7F)
240
241/* Output Amplifier capabilities (7.3.4.10) */
242#define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D
243
244#define CODEC_F00_12_IS_CAP_MUTE(f00_12) CODEC_F00_0D_IS_CAP_MUTE(f00_12)
245#define CODEC_F00_12_STEP_SIZE(f00_12) CODEC_F00_0D_STEP_SIZE(f00_12)
246#define CODEC_F00_12_NUM_STEPS(f00_12) CODEC_F00_0D_NUM_STEPS(f00_12)
247#define CODEC_F00_12_OFFSET(f00_12) CODEC_F00_0D_OFFSET(f00_12)
248
249/* Connection list lenght (7.3.4.11) */
250#define CODEC_MAKE_F00_0E(long_form, length) \
251 ( (((long_form) & 0x1) << 7) \
252 | ((length) & 0x7F))
253/* Indicates short-form NIDs. */
254#define CODEC_F00_0E_LIST_NID_SHORT 0
255/* Indicates long-form NIDs. */
256#define CODEC_F00_0E_LIST_NID_LONG 1
257#define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7))
258#define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F)
259/* Supported Power States (7.3.4.12) */
260#define CODEC_F00_0F_EPSS RT_BIT(31)
261#define CODEC_F00_0F_CLKSTOP RT_BIT(30)
262#define CODEC_F00_0F_S3D3 RT_BIT(29)
263#define CODEC_F00_0F_D3COLD RT_BIT(4)
264#define CODEC_F00_0F_D3 RT_BIT(3)
265#define CODEC_F00_0F_D2 RT_BIT(2)
266#define CODEC_F00_0F_D1 RT_BIT(1)
267#define CODEC_F00_0F_D0 RT_BIT(0)
268
269/* Processing capabilities 7.3.4.13 */
270#define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))
271#define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)
272#define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)
273
274/* CP/IO Count (7.3.4.14) */
275#define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \
276 ( (((wake) & 0x1) << 31) \
277 | (((unsol) & 0x1) << 30) \
278 | (((numgpi) & 0xFF) << 16) \
279 | (((numgpo) & 0xFF) << 8) \
280 | ((numgpio) & 0xFF))
281
282/* Processing States (7.3.3.4) */
283#define CODEC_F03_OFF (0)
284#define CODEC_F03_ON RT_BIT(0)
285#define CODEC_F03_BENING RT_BIT(1)
286/* Power States (7.3.3.10) */
287#define CODEC_MAKE_F05(reset, stopok, error, act, set) \
288 ( (((reset) & 0x1) << 10) \
289 | (((stopok) & 0x1) << 9) \
290 | (((error) & 0x1) << 8) \
291 | (((act) & 0x7) << 4) \
292 | ((set) & 0x7))
293#define CODEC_F05_D3COLD (4)
294#define CODEC_F05_D3 (3)
295#define CODEC_F05_D2 (2)
296#define CODEC_F05_D1 (1)
297#define CODEC_F05_D0 (0)
298
299#define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)
300#define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)
301#define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)
302#define CODEC_F05_ACT(value) (((value) & 0x7) >> 4)
303#define CODEC_F05_SET(value) (((value) & 0x7))
304
305#define CODEC_F05_GE(p0, p1) ((p0) <= (p1))
306#define CODEC_F05_LE(p0, p1) ((p0) >= (p1))
307
308/* Pin Widged Control (7.3.3.13) */
309#define CODEC_F07_VREF_HIZ (0)
310#define CODEC_F07_VREF_50 (0x1)
311#define CODEC_F07_VREF_GROUND (0x2)
312#define CODEC_F07_VREF_80 (0x4)
313#define CODEC_F07_VREF_100 (0x5)
314#define CODEC_F07_IN_ENABLE RT_BIT(5)
315#define CODEC_F07_OUT_ENABLE RT_BIT(6)
316#define CODEC_F07_OUT_H_ENABLE RT_BIT(7)
317
318/* Unsolicited enabled (7.3.3.14) */
319#define CODEC_MAKE_F08(enable, tag) ((((enable) & 1) << 7) | ((tag) & 0x3F))
320
321/* Converter formats (7.3.3.8) and (3.7.1) */
322#define CODEC_MAKE_A(fNonPCM, f44_1BaseRate, mult, div, bits, chan) \
323 ( (((fNonPCM) & 0x1) << 15) \
324 | (((f44_1BaseRate) & 0x1) << 14) \
325 | (((mult) & 0x7) << 11) \
326 | (((div) & 0x7) << 8) \
327 | (((bits) & 0x7) << 4) \
328 | ((chan) & 0xF))
329
330#define CODEC_A_TYPE RT_BIT(15)
331#define CODEC_A_TYPE_PCM (0)
332#define CODEC_A_TYPE_NON_PCM (1)
333
334#define CODEC_A_BASE RT_BIT(14)
335#define CODEC_A_BASE_48KHZ (0)
336#define CODEC_A_BASE_44KHZ (1)
337
338#define CODEC_A_MULT_1X (0)
339#define CODEC_A_MULT_2X (1)
340#define CODEC_A_MULT_3X (2)
341#define CODEC_A_MULT_4X (3)
342
343#define CODEC_A_DIV_1X (0)
344#define CODEC_A_DIV_2X (1)
345#define CODEC_A_DIV_3X (2)
346#define CODEC_A_DIV_4X (3)
347#define CODEC_A_DIV_5X (4)
348#define CODEC_A_DIV_6X (5)
349#define CODEC_A_DIV_7X (6)
350#define CODEC_A_DIV_8X (7)
351
352#define CODEC_A_8_BIT (0)
353#define CODEC_A_16_BIT (1)
354#define CODEC_A_20_BIT (2)
355#define CODEC_A_24_BIT (3)
356#define CODEC_A_32_BIT (4)
357
358#define CODEC_A_CHAN_MONO (0)
359#define CODEC_A_CHAN_STEREO (1)
360
361/* Pin Sense (7.3.3.15) */
362#define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \
363( (((fPresent) & 0x1) << 31) \
364 | (((impedance) & 0x7FFFFFFF)))
365#define CODEC_F09_ANALOG_NA 0x7FFFFFFF
366#define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \
367( (((fPresent) & 0x1) << 31) \
368 | (((fELDValid) & 0x1) << 30))
369
370#define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1))
371#define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2))
372#define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1))
373#define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0))
374/* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */
375/* Configuration's port connection */
376#define CODEC_F1C_PORT_MASK (0x3)
377#define CODEC_F1C_PORT_SHIFT (30)
378
379#define CODEC_F1C_PORT_COMPLEX (0x0)
380#define CODEC_F1C_PORT_NO_PHYS (0x1)
381#define CODEC_F1C_PORT_FIXED (0x2)
382#define CODEC_F1C_BOTH (0x3)
383
384/* Configuration default: connection */
385#define CODEC_F1C_PORT_MASK (0x3)
386#define CODEC_F1C_PORT_SHIFT (30)
387
388/* Connected to a jack (1/8", ATAPI, ...). */
389#define CODEC_F1C_PORT_COMPLEX (0x0)
390/* No physical connection. */
391#define CODEC_F1C_PORT_NO_PHYS (0x1)
392/* Fixed function device (integrated speaker, integrated mic, ...). */
393#define CODEC_F1C_PORT_FIXED (0x2)
394/* Both, a jack and an internal device are attached. */
395#define CODEC_F1C_BOTH (0x3)
396
397/* Configuration default: Location */
398#define CODEC_F1C_LOCATION_MASK (0x3F)
399#define CODEC_F1C_LOCATION_SHIFT (24)
400
401/* [4:5] bits of location region means chassis attachment */
402#define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)
403#define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)
404#define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)
405#define CODEC_F1C_LOCATION_OTHER RT_BIT(5)
406
407/* [0:3] bits of location region means geometry location attachment */
408#define CODEC_F1C_LOCATION_NA (0)
409#define CODEC_F1C_LOCATION_REAR (0x1)
410#define CODEC_F1C_LOCATION_FRONT (0x2)
411#define CODEC_F1C_LOCATION_LEFT (0x3)
412#define CODEC_F1C_LOCATION_RIGTH (0x4)
413#define CODEC_F1C_LOCATION_TOP (0x5)
414#define CODEC_F1C_LOCATION_BOTTOM (0x6)
415#define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)
416#define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)
417#define CODEC_F1C_LOCATION_SPECIAL_2 (0x9)
418
419/* Configuration default: Device type */
420#define CODEC_F1C_DEVICE_MASK (0xF)
421#define CODEC_F1C_DEVICE_SHIFT (20)
422#define CODEC_F1C_DEVICE_LINE_OUT (0)
423#define CODEC_F1C_DEVICE_SPEAKER (0x1)
424#define CODEC_F1C_DEVICE_HP (0x2)
425#define CODEC_F1C_DEVICE_CD (0x3)
426#define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)
427#define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)
428#define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)
429#define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)
430#define CODEC_F1C_DEVICE_LINE_IN (0x8)
431#define CODEC_F1C_DEVICE_AUX (0x9)
432#define CODEC_F1C_DEVICE_MIC (0xA)
433#define CODEC_F1C_DEVICE_PHONE (0xB)
434#define CODEC_F1C_DEVICE_SPDIF_IN (0xC)
435#define CODEC_F1C_DEVICE_RESERVED (0xE)
436#define CODEC_F1C_DEVICE_OTHER (0xF)
437
438/* Configuration default: Connection type */
439#define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)
440#define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)
441
442#define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)
443#define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)
444#define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)
445#define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)
446#define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)
447#define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)
448#define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)
449#define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)
450#define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)
451#define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)
452#define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)
453#define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)
454#define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)
455
456/* Configuration's color */
457#define CODEC_F1C_COLOR_MASK (0xF)
458#define CODEC_F1C_COLOR_SHIFT (12)
459#define CODEC_F1C_COLOR_UNKNOWN (0)
460#define CODEC_F1C_COLOR_BLACK (0x1)
461#define CODEC_F1C_COLOR_GREY (0x2)
462#define CODEC_F1C_COLOR_BLUE (0x3)
463#define CODEC_F1C_COLOR_GREEN (0x4)
464#define CODEC_F1C_COLOR_RED (0x5)
465#define CODEC_F1C_COLOR_ORANGE (0x6)
466#define CODEC_F1C_COLOR_YELLOW (0x7)
467#define CODEC_F1C_COLOR_PURPLE (0x8)
468#define CODEC_F1C_COLOR_PINK (0x9)
469#define CODEC_F1C_COLOR_RESERVED_0 (0xA)
470#define CODEC_F1C_COLOR_RESERVED_1 (0xB)
471#define CODEC_F1C_COLOR_RESERVED_2 (0xC)
472#define CODEC_F1C_COLOR_RESERVED_3 (0xD)
473#define CODEC_F1C_COLOR_WHITE (0xE)
474#define CODEC_F1C_COLOR_OTHER (0xF)
475
476/* Configuration's misc */
477#define CODEC_F1C_MISC_MASK (0xF)
478#define CODEC_F1C_MISC_SHIFT (8)
479#define CODEC_F1C_MISC_JACK_DETECT (0)
480#define CODEC_F1C_MISC_RESERVED_0 (1)
481#define CODEC_F1C_MISC_RESERVED_1 (2)
482#define CODEC_F1C_MISC_RESERVED_2 (3)
483
484/* Configuration default: Association */
485#define CODEC_F1C_ASSOCIATION_MASK (0xF)
486#define CODEC_F1C_ASSOCIATION_SHIFT (4)
487
488/* Reserved; don't use. */
489#define CODEC_F1C_ASSOCIATION_INVALID 0x0
490#define CODEC_F1C_ASSOCIATION_GROUP_0 0x1
491#define CODEC_F1C_ASSOCIATION_GROUP_1 0x2
492#define CODEC_F1C_ASSOCIATION_GROUP_2 0x3
493#define CODEC_F1C_ASSOCIATION_GROUP_3 0x4
494#define CODEC_F1C_ASSOCIATION_GROUP_4 0x5
495#define CODEC_F1C_ASSOCIATION_GROUP_5 0x6
496#define CODEC_F1C_ASSOCIATION_GROUP_6 0x7
497#define CODEC_F1C_ASSOCIATION_GROUP_7 0x8
498#define CODEC_F1C_ASSOCIATION_GROUP_15 0xF
499
500/* Configuration default: Association Sequence */
501#define CODEC_F1C_SEQ_MASK (0xF)
502#define CODEC_F1C_SEQ_SHIFT (0)
503
504/* Implementation identification (7.3.3.30) */
505#define CODEC_MAKE_F20(bmid, bsku, aid) \
506 ( (((bmid) & 0xFFFF) << 16) \
507 | (((bsku) & 0xFF) << 8) \
508 | (((aid) & 0xFF)) \
509 )
510
511/* macro definition helping in filling the configuration registers. */
512#define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \
513 ( ((port_connectivity) << CODEC_F1C_PORT_SHIFT) \
514 | ((location) << CODEC_F1C_LOCATION_SHIFT) \
515 | ((device) << CODEC_F1C_DEVICE_SHIFT) \
516 | ((connection_type) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \
517 | ((color) << CODEC_F1C_COLOR_SHIFT) \
518 | ((misc) << CODEC_F1C_MISC_SHIFT) \
519 | ((association) << CODEC_F1C_ASSOCIATION_SHIFT) \
520 | ((sequence)))
521
522
523/*******************************************************************************
524* Structures and Typedefs *
525*******************************************************************************/
526/** The F00 parameter length (in dwords). */
527#define CODECNODE_F00_PARAM_LENGTH 20
528/** The F02 parameter length (in dwords). */
529#define CODECNODE_F02_PARAM_LENGTH 16
530
531/**
532 * Common (or core) codec node structure.
533 */
534typedef struct CODECCOMMONNODE
535{
536 /** Node id - 7 bit format */
537 uint8_t id;
538 /** The node name. */
539 char const *pszName;
540 /* PRM 5.3.6 */
541 uint32_t au32F00_param[CODECNODE_F00_PARAM_LENGTH];
542 uint32_t au32F02_param[CODECNODE_F02_PARAM_LENGTH];
543} CODECCOMMONNODE;
544typedef CODECCOMMONNODE *PCODECCOMMONNODE;
545AssertCompile(CODECNODE_F00_PARAM_LENGTH == 20); /* saved state */
546AssertCompile(CODECNODE_F02_PARAM_LENGTH == 16); /* saved state */
547
548/**
549 * Compile time assertion on the expected node size.
550 */
551#define AssertNodeSize(a_Node, a_cParams) \
552 AssertCompile((a_cParams) <= (60 + 6)); /* the max size - saved state */ \
553 AssertCompile( sizeof(a_Node) - sizeof(CODECCOMMONNODE) \
554 == (((a_cParams) * sizeof(uint32_t) + sizeof(void *) - 1) & ~(sizeof(void *) - 1)) )
555
556typedef struct ROOTCODECNODE
557{
558 CODECCOMMONNODE node;
559} ROOTCODECNODE, *PROOTCODECNODE;
560AssertNodeSize(ROOTCODECNODE, 0);
561
562#define AMPLIFIER_SIZE 60
563typedef uint32_t AMPLIFIER[AMPLIFIER_SIZE];
564#define AMPLIFIER_IN 0
565#define AMPLIFIER_OUT 1
566#define AMPLIFIER_LEFT 1
567#define AMPLIFIER_RIGHT 0
568#define AMPLIFIER_REGISTER(amp, inout, side, index) ((amp)[30*(inout) + 15*(side) + (index)])
569typedef struct DACNODE
570{
571 CODECCOMMONNODE node;
572 uint32_t u32F0d_param;
573 uint32_t u32F04_param;
574 uint32_t u32F05_param;
575 uint32_t u32F06_param;
576 uint32_t u32F0c_param;
577
578 uint32_t u32A_param;
579 AMPLIFIER B_params;
580
581} DACNODE, *PDACNODE;
582AssertNodeSize(DACNODE, 6 + 60);
583
584typedef struct ADCNODE
585{
586 CODECCOMMONNODE node;
587 uint32_t u32F03_param;
588 uint32_t u32F05_param;
589 uint32_t u32F06_param;
590 uint32_t u32F09_param;
591
592 uint32_t u32A_param;
593 uint32_t u32F01_param;
594 AMPLIFIER B_params;
595} ADCNODE, *PADCNODE;
596AssertNodeSize(DACNODE, 6 + 60);
597
598typedef struct SPDIFOUTNODE
599{
600 CODECCOMMONNODE node;
601 uint32_t u32F05_param;
602 uint32_t u32F06_param;
603 uint32_t u32F09_param;
604 uint32_t u32F0d_param;
605
606 uint32_t u32A_param;
607 AMPLIFIER B_params;
608} SPDIFOUTNODE, *PSPDIFOUTNODE;
609AssertNodeSize(SPDIFOUTNODE, 5 + 60);
610
611typedef struct SPDIFINNODE
612{
613 CODECCOMMONNODE node;
614 uint32_t u32F05_param;
615 uint32_t u32F06_param;
616 uint32_t u32F09_param;
617 uint32_t u32F0d_param;
618
619 uint32_t u32A_param;
620 AMPLIFIER B_params;
621} SPDIFINNODE, *PSPDIFINNODE;
622AssertNodeSize(SPDIFINNODE, 5 + 60);
623
624typedef struct AFGCODECNODE
625{
626 CODECCOMMONNODE node;
627 uint32_t u32F05_param;
628 uint32_t u32F08_param;
629 uint32_t u32F20_param;
630 uint32_t u32F17_param;
631} AFGCODECNODE, *PAFGCODECNODE;
632AssertNodeSize(AFGCODECNODE, 4);
633
634typedef struct PORTNODE
635{
636 CODECCOMMONNODE node;
637 uint32_t u32F07_param;
638 uint32_t u32F08_param;
639 uint32_t u32F09_param;
640 uint32_t u32F01_param;
641 uint32_t u32F1c_param;
642 AMPLIFIER B_params;
643} PORTNODE, *PPORTNODE;
644AssertNodeSize(PORTNODE, 5 + 60);
645
646typedef struct DIGOUTNODE
647{
648 CODECCOMMONNODE node;
649 uint32_t u32F01_param;
650 uint32_t u32F08_param;
651 uint32_t u32F07_param;
652 uint32_t u32F09_param;
653 uint32_t u32F1c_param;
654} DIGOUTNODE, *PDIGOUTNODE;
655AssertNodeSize(DIGOUTNODE, 5);
656
657typedef struct DIGINNODE
658{
659 CODECCOMMONNODE node;
660 uint32_t u32F05_param;
661 uint32_t u32F07_param;
662 uint32_t u32F08_param;
663 uint32_t u32F09_param;
664 uint32_t u32F0c_param;
665 uint32_t u32F1c_param;
666 uint32_t u32F1e_param;
667} DIGINNODE, *PDIGINNODE;
668AssertNodeSize(DIGINNODE, 7);
669
670typedef struct ADCMUXNODE
671{
672 CODECCOMMONNODE node;
673 uint32_t u32F01_param;
674
675 uint32_t u32A_param;
676 AMPLIFIER B_params;
677} ADCMUXNODE, *PADCMUXNODE;
678AssertNodeSize(ADCMUXNODE, 2 + 60);
679
680typedef struct PCBEEPNODE
681{
682 CODECCOMMONNODE node;
683 uint32_t u32F07_param;
684 uint32_t u32F0a_param;
685
686 uint32_t u32A_param;
687 AMPLIFIER B_params;
688 uint32_t u32F1c_param;
689} PCBEEPNODE, *PPCBEEPNODE;
690AssertNodeSize(PCBEEPNODE, 3 + 60 + 1);
691
692typedef struct CDNODE
693{
694 CODECCOMMONNODE node;
695 uint32_t u32F07_param;
696 uint32_t u32F1c_param;
697} CDNODE, *PCDNODE;
698AssertNodeSize(CDNODE, 2);
699
700typedef struct VOLUMEKNOBNODE
701{
702 CODECCOMMONNODE node;
703 uint32_t u32F08_param;
704 uint32_t u32F0f_param;
705} VOLUMEKNOBNODE, *PVOLUMEKNOBNODE;
706AssertNodeSize(VOLUMEKNOBNODE, 2);
707
708typedef struct ADCVOLNODE
709{
710 CODECCOMMONNODE node;
711 uint32_t u32F0c_param;
712 uint32_t u32F01_param;
713 uint32_t u32A_params;
714 AMPLIFIER B_params;
715} ADCVOLNODE, *PADCVOLNODE;
716AssertNodeSize(ADCVOLNODE, 3 + 60);
717
718typedef struct RESNODE
719{
720 CODECCOMMONNODE node;
721 uint32_t u32F05_param;
722 uint32_t u32F06_param;
723 uint32_t u32F07_param;
724 uint32_t u32F1c_param;
725} RESNODE, *PRESNODE;
726AssertNodeSize(RESNODE, 4);
727
728/**
729 * Used for the saved state.
730 */
731typedef struct CODECSAVEDSTATENODE
732{
733 CODECCOMMONNODE Core;
734 uint32_t au32Params[60 + 6];
735} CODECSAVEDSTATENODE;
736AssertNodeSize(CODECSAVEDSTATENODE, 60 + 6);
737
738typedef union CODECNODE
739{
740 CODECCOMMONNODE node;
741 ROOTCODECNODE root;
742 AFGCODECNODE afg;
743 DACNODE dac;
744 ADCNODE adc;
745 SPDIFOUTNODE spdifout;
746 SPDIFINNODE spdifin;
747 PORTNODE port;
748 DIGOUTNODE digout;
749 DIGINNODE digin;
750 ADCMUXNODE adcmux;
751 PCBEEPNODE pcbeep;
752 CDNODE cdnode;
753 VOLUMEKNOBNODE volumeKnob;
754 ADCVOLNODE adcvol;
755 RESNODE reserved;
756 CODECSAVEDSTATENODE SavedState;
757} CODECNODE, *PCODECNODE;
758AssertNodeSize(CODECNODE, 60 + 6);
759/*******************************************************************************
760* Global Variables *
761*******************************************************************************/
762/* STAC9220 - Nodes IDs / names. */
763#define STAC9220_NID_ROOT 0x0 /* Root node */
764#define STAC9220_NID_AFG 0x1 /* Audio Configuration Group */
765#define STAC9220_NID_DAC0 0x2 /* Out */
766#define STAC9220_NID_DAC1 0x3 /* Out */
767#define STAC9220_NID_DAC2 0x4 /* Out */
768#define STAC9220_NID_DAC3 0x5 /* Out */
769#define STAC9220_NID_ADC0 0x6 /* In */
770#define STAC9220_NID_ADC1 0x7 /* In */
771#define STAC9220_NID_SPDIF_OUT 0x8 /* Out */
772#define STAC9220_NID_SPDIF_IN 0x9 /* In */
773#define STAC9220_NID_PIN_HEADPHONE0 0xA /* In, Out */
774#define STAC9220_NID_PIN_B 0xB /* In, Out */
775#define STAC9220_NID_PIN_C 0xC /* In, Out */
776#define STAC9220_NID_PIN_HEADPHONE1 0xD /* In, Out */
777#define STAC9220_NID_PIN_E 0xE /* In */
778#define STAC9220_NID_PIN_F 0xF /* In, Out */
779#define STAC9220_NID_PIN_SPDIF_OUT 0x10 /* Out */
780#define STAC9220_NID_PIN_SPDIF_IN 0x11 /* In */
781#define STAC9220_NID_ADC0_MUX 0x12 /* In */
782#define STAC9220_NID_ADC1_MUX 0x13 /* In */
783#define STAC9220_NID_PCBEEP 0x14 /* Out */
784#define STAC9220_NID_PIN_CD 0x15 /* In */
785#define STAC9220_NID_VOL_KNOB 0x16
786#define STAC9220_NID_AMP_ADC0 0x17 /* In */
787#define STAC9220_NID_AMP_ADC1 0x18 /* In */
788/* STAC9221. */
789#define STAC9221_NID_ADAT_OUT 0x19 /* Out */
790#define STAC9221_NID_I2S_OUT 0x1A /* Out */
791#define STAC9221_NID_PIN_I2S_OUT 0x1B /* Out */
792
793#if 1
794/* STAC9220 - Referenced thru STAC9220WIDGET in the constructor below. */
795static uint8_t const g_abStac9220Ports[] = { 0x0A, 0xB, 0xC, 0xD, 0xE, 0xF, 0};
796static uint8_t const g_abStac9220Dacs[] = { 0x02, 0x3, 0x4, 0x5, 0};
797static uint8_t const g_abStac9220Adcs[] = { 0x06, 0x7, 0};
798static uint8_t const g_abStac9220SpdifOuts[] = { 0x08, 0 };
799static uint8_t const g_abStac9220SpdifIns[] = { 0x09, 0 };
800static uint8_t const g_abStac9220DigOutPins[] = { 0x10, 0 };
801static uint8_t const g_abStac9220DigInPins[] = { 0x11, 0 };
802static uint8_t const g_abStac9220AdcVols[] = { 0x17, 0x18, 0};
803static uint8_t const g_abStac9220AdcMuxs[] = { 0x12, 0x13, 0};
804static uint8_t const g_abStac9220Pcbeeps[] = { 0x14, 0 };
805static uint8_t const g_abStac9220Cds[] = { 0x15, 0 };
806static uint8_t const g_abStac9220VolKnobs[] = { 0x16, 0 };
807static uint8_t const g_abStac9220Reserveds[] = { 0x09, 0x19, 0x1a, 0x1b, 0 };
808#else /** @todo Enable this after 5.0 -- needs more testing first. */
809static uint8_t const g_abStac9220Ports[] = { STAC9220_NID_PIN_HEADPHONE0, STAC9220_NID_PIN_B, STAC9220_NID_PIN_C, STAC9220_NID_PIN_HEADPHONE1, STAC9220_NID_PIN_E, STAC9220_NID_PIN_F, 0};
810static uint8_t const g_abStac9220Dacs[] = { STAC9220_NID_DAC0, STAC9220_NID_DAC1, STAC9220_NID_DAC2, STAC9220_NID_DAC3, 0};
811static uint8_t const g_abStac9220Adcs[] = { STAC9220_NID_ADC0, STAC9220_NID_ADC1, 0};
812static uint8_t const g_abStac9220SpdifOuts[] = { STAC9220_NID_SPDIF_OUT, 0 };
813static uint8_t const g_abStac9220SpdifIns[] = { STAC9220_NID_SPDIF_IN, 0 };
814static uint8_t const g_abStac9220DigOutPins[] = { STAC9220_NID_PIN_SPDIF_OUT, 0 };
815static uint8_t const g_abStac9220DigInPins[] = { STAC9220_NID_PIN_SPDIF_IN, 0 };
816static uint8_t const g_abStac9220AdcVols[] = { STAC9220_NID_AMP_ADC0, STAC9220_NID_AMP_ADC1, 0};
817static uint8_t const g_abStac9220AdcMuxs[] = { STAC9220_NID_ADC0_MUX, STAC9220_NID_ADC1_MUX, 0};
818static uint8_t const g_abStac9220Pcbeeps[] = { STAC9220_NID_PCBEEP, 0 };
819static uint8_t const g_abStac9220Cds[] = { STAC9220_NID_PIN_CD, 0 };
820static uint8_t const g_abStac9220VolKnobs[] = { STAC9220_NID_VOL_KNOB, 0 };
821/* STAC 9221. */
822/** @todo Is STAC9220_NID_SPDIF_IN really correct for reserved nodes? */
823static uint8_t const g_abStac9220Reserveds[] = { STAC9220_NID_SPDIF_IN, STAC9221_NID_ADAT_OUT, STAC9221_NID_I2S_OUT, STAC9221_NID_PIN_I2S_OUT, 0 };
824#endif
825
826/** SSM description of a CODECNODE. */
827static SSMFIELD const g_aCodecNodeFields[] =
828{
829 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.id),
830 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 3),
831 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
832 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
833 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
834 SSMFIELD_ENTRY_TERM()
835};
836
837/** Backward compatibility with v1 of the CODECNODE. */
838static SSMFIELD const g_aCodecNodeFieldsV1[] =
839{
840 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.id),
841 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 7),
842 SSMFIELD_ENTRY_OLD_HCPTR(Core.name),
843 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
844 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
845 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
846 SSMFIELD_ENTRY_TERM()
847};
848
849
850
851
852static DECLCALLBACK(void) stac9220DbgNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
853{
854 for (int i = 1; i < 12; i++)
855 {
856 PCODECNODE pNode = &pThis->paNodes[i];
857 AMPLIFIER *pAmp = &pNode->dac.B_params;
858
859 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) & 0x7f;
860 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) & 0x7f;
861
862 pHlp->pfnPrintf(pHlp, "0x%x: lVol=%RU8, rVol=%RU8\n", i, lVol, rVol);
863 }
864}
865
866
867static int stac9220ResetNode(PHDACODEC pThis, uint8_t nodenum, PCODECNODE pNode)
868{
869 pNode->node.id = nodenum;
870 pNode->node.au32F00_param[0xF] = 0; /* Power statest Supported: are the same as AFG reports */
871 switch (nodenum)
872 {
873 /* Root Node*/
874 case 0:
875 pNode->node.au32F00_param[0x02] = CODEC_MAKE_F00_02(0x1, 0x0, 0x34, 0x1); /* rev id */
876 break;
877 case 1:
878 pNode->node.au32F00_param[0x08] = CODEC_MAKE_F00_08(1, 0xd, 0xd);
879 pNode->node.au32F00_param[0x0C] = CODEC_MAKE_F00_0C(0x17)
880 | CODEC_F00_0C_CAP_BALANCED_IO
881 | CODEC_F00_0C_CAP_INPUT
882 | CODEC_F00_0C_CAP_PRESENSE_DETECT
883 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
884 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//(17 << 8)|RT_BIT(6)|RT_BIT(5)|RT_BIT(2)|RT_BIT(1)|RT_BIT(0);
885 pNode->node.au32F00_param[0x0B] = CODEC_F00_0B_PCM;
886 pNode->node.au32F00_param[0x0D] = CODEC_MAKE_F00_0D(1, 0x5, 0xE, 0);//RT_BIT(31)|(0x5 << 16)|(0xE)<<8;
887 pNode->node.au32F00_param[0x12] = RT_BIT(31)|(0x2 << 16)|(0x7f << 8)|0x7f;
888 pNode->node.au32F00_param[0x11] = CODEC_MAKE_F00_11(1, 1, 0, 0, 4);//0xc0000004;
889 pNode->node.au32F00_param[0x0F] = CODEC_F00_0F_D3|CODEC_F00_0F_D2|CODEC_F00_0F_D1|CODEC_F00_0F_D0;
890 pNode->afg.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D2, CODEC_F05_D2);//0x2 << 4| 0x2; /* PS-Act: D3, PS->Set D3 */
891 pNode->afg.u32F08_param = 0;
892 pNode->afg.u32F17_param = 0;
893 break;
894 case 2:
895 case 3:
896 case 4:
897 case 5:
898 memset(pNode->dac.B_params, 0, AMPLIFIER_SIZE);
899 pNode->dac.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//RT_BIT(14)|(0x1 << 4)|0x1; /* 441000Hz/16bit/2ch */
900
901 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) = 0x7F | RT_BIT(7);
902 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) = 0x7F | RT_BIT(7);
903
904 pNode->dac.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 0xD, 0)
905 | CODEC_F00_09_CAP_L_R_SWAP
906 | CODEC_F00_09_CAP_POWER_CTRL
907 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
908 | CODEC_F00_09_CAP_LSB;//(0xD << 16) | RT_BIT(11) | RT_BIT(10) | RT_BIT(2) | RT_BIT(0);
909 pNode->dac.u32F0c_param = 0;
910 pNode->dac.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3, Set: D3 */
911 break;
912 case 6:
913 pNode->node.au32F02_param[0] = 0x17;
914 goto adc_init;
915 case 7:
916 pNode->node.au32F02_param[0] = 0x18;
917 adc_init:
918 pNode->adc.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//RT_BIT(14)|(0x1 << 3)|0x1; /* 441000Hz/16bit/2ch */
919 pNode->adc.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0);
920 pNode->adc.u32F03_param = RT_BIT(0);
921 pNode->adc.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 Set: D3 */
922 pNode->adc.u32F06_param = 0;
923 pNode->adc.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 0xD, 0)
924 | CODEC_F00_09_CAP_POWER_CTRL
925 | CODEC_F00_09_CAP_CONNECTION_LIST
926 | CODEC_F00_09_CAP_PROC_WIDGET
927 | CODEC_F00_09_CAP_LSB;//RT_BIT(20)| (0xd << 16) | RT_BIT(10) | RT_BIT(8) | RT_BIT(6)| RT_BIT(0);
928 break;
929 case 8:
930 pNode->spdifout.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//(1<<14)|(0x1<<4) | 0x1;
931 pNode->spdifout.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 0x4, 0)
932 | CODEC_F00_09_CAP_DIGITAL
933 | CODEC_F00_09_CAP_FMT_OVERRIDE
934 | CODEC_F00_09_CAP_LSB;//(4 << 16) | RT_BIT(9)|RT_BIT(4)|0x1;
935 pNode->node.au32F00_param[0xa] = pThis->paNodes[1].node.au32F00_param[0xA];
936 pNode->spdifout.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
937 pNode->spdifout.u32F06_param = 0;
938 pNode->spdifout.u32F0d_param = 0;
939 break;
940 case 9:
941 pNode->spdifin.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//(0x1<<4) | 0x1;
942 pNode->spdifin.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 0x4, 0)
943 | CODEC_F00_09_CAP_DIGITAL
944 | CODEC_F00_09_CAP_CONNECTION_LIST
945 | CODEC_F00_09_CAP_FMT_OVERRIDE
946 | CODEC_F00_09_CAP_LSB;//(0x1 << 20)|(4 << 16) | RT_BIT(9)| RT_BIT(8)|RT_BIT(4)|0x1;
947 pNode->node.au32F00_param[0xA] = pThis->paNodes[1].node.au32F00_param[0xA];
948 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0);
949 pNode->node.au32F02_param[0] = 0x11;
950 pNode->spdifin.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
951 pNode->spdifin.u32F06_param = 0;
952 pNode->spdifin.u32F0d_param = 0;
953 break;
954 case 0xA:
955 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
956 | CODEC_F00_0C_CAP_INPUT
957 | CODEC_F00_0C_CAP_OUTPUT
958 | CODEC_F00_0C_CAP_HP
959 | CODEC_F00_0C_CAP_PRESENSE_DETECT
960 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
961 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x173f;
962 pNode->node.au32F02_param[0] = 0x2;
963 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE
964 | CODEC_F07_OUT_ENABLE;
965 pNode->port.u32F08_param = 0;
966 if (!pThis->fInReset)
967 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
968 CODEC_F1C_LOCATION_FRONT,
969 CODEC_F1C_DEVICE_HP,
970 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
971 CODEC_F1C_COLOR_GREEN,
972 CODEC_F1C_MISC_JACK_DETECT,
973 0x2, 0);//RT_MAKE_U32_FROM_U8(0x20, 0x40, 0x21, 0x02);
974 goto port_init;
975 case 0xB:
976 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
977 | CODEC_F00_0C_CAP_INPUT
978 | CODEC_F00_0C_CAP_OUTPUT
979 | CODEC_F00_0C_CAP_PRESENSE_DETECT
980 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
981 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x1737;
982 pNode->node.au32F02_param[0] = 0x4;
983 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
984 if (!pThis->fInReset)
985 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
986 CODEC_F1C_LOCATION_INTERNAL|CODEC_F1C_LOCATION_REAR,
987 CODEC_F1C_DEVICE_SPEAKER,
988 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
989 CODEC_F1C_COLOR_BLACK,
990 CODEC_F1C_MISC_JACK_DETECT,
991 0x1, 0x1);//RT_MAKE_U32_FROM_U8(0x11, 0x60, 0x11, 0x01);
992 goto port_init;
993 case 0xC:
994 pNode->node.au32F02_param[0] = 0x3;
995 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
996 | CODEC_F00_0C_CAP_INPUT
997 | CODEC_F00_0C_CAP_OUTPUT
998 | CODEC_F00_0C_CAP_PRESENSE_DETECT
999 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
1000 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x1737;
1001 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1002 if (!pThis->fInReset)
1003 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1004 CODEC_F1C_LOCATION_REAR,
1005 CODEC_F1C_DEVICE_SPEAKER,
1006 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1007 CODEC_F1C_COLOR_GREEN,
1008 0x0, 0x1, 0x0);//RT_MAKE_U32_FROM_U8(0x10, 0x40, 0x11, 0x01);
1009 goto port_init;
1010 case 0xD:
1011 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1012 | CODEC_F00_0C_CAP_INPUT
1013 | CODEC_F00_0C_CAP_OUTPUT
1014 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1015 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
1016 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x1737;
1017 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1018 pNode->node.au32F02_param[0] = 0x2;
1019 if (!pThis->fInReset)
1020 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1021 CODEC_F1C_LOCATION_FRONT,
1022 CODEC_F1C_DEVICE_MIC,
1023 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1024 CODEC_F1C_COLOR_PINK,
1025 0x0, 0x5, 0x0);//RT_MAKE_U32_FROM_U8(0x50, 0x90, 0xA1, 0x02); /* Microphone */
1026 port_init:
1027 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1, CODEC_F09_ANALOG_NA);//RT_BIT(31)|0x7fffffff;
1028 pNode->port.u32F08_param = 0;
1029 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0)
1030 | CODEC_F00_09_CAP_CONNECTION_LIST
1031 | CODEC_F00_09_CAP_UNSOL
1032 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(8)|RT_BIT(7)|RT_BIT(0);
1033 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//0x1;
1034 break;
1035 case 0xE:
1036 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0)
1037 | CODEC_F00_09_CAP_UNSOL
1038 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(7)|RT_BIT(0);
1039 pNode->port.u32F08_param = 0;
1040 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1041 | CODEC_F00_0C_CAP_OUTPUT
1042 | CODEC_F00_0C_CAP_PRESENSE_DETECT;//0x34;
1043 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1044 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(0, CODEC_F09_ANALOG_NA);//0x7fffffff;
1045 if (!pThis->fInReset)
1046 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1047 CODEC_F1C_LOCATION_REAR,
1048 CODEC_F1C_DEVICE_LINE_OUT,
1049 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1050 CODEC_F1C_COLOR_BLUE,
1051 0x0, 0x4, 0x0);//0x01013040; /* Line Out */
1052 break;
1053 case 0xF:
1054 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0x0)
1055 | CODEC_F00_09_CAP_CONNECTION_LIST
1056 | CODEC_F00_09_CAP_UNSOL
1057 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1058 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(8)|RT_BIT(7)|RT_BIT(2)|RT_BIT(0);
1059 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1060 | CODEC_F00_0C_CAP_OUTPUT
1061 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1062 /* | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
1063 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE */;//0x37;
1064 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//0x1;
1065 pNode->port.u32F08_param = 0;
1066 pNode->port.u32F07_param = CODEC_F07_OUT_ENABLE
1067 | CODEC_F07_IN_ENABLE;
1068 if (!pThis->fInReset)
1069 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1070 CODEC_F1C_LOCATION_INTERNAL,
1071 CODEC_F1C_DEVICE_SPEAKER,
1072 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1073 CODEC_F1C_COLOR_ORANGE,
1074 0x0, 0x1, 0x2);//RT_MAKE_U32_FROM_U8(0x12, 0x60, 0x11, 0x01);
1075 pNode->node.au32F02_param[0] = 0x5;
1076 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(0, CODEC_F09_ANALOG_NA);//0x7fffffff;
1077 break;
1078 case 0x10:
1079 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0x0)
1080 | CODEC_F00_09_CAP_DIGITAL
1081 | CODEC_F00_09_CAP_CONNECTION_LIST
1082 | CODEC_F00_09_CAP_LSB;//(4<<20)|RT_BIT(9)|RT_BIT(8)|RT_BIT(0);
1083 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;//RT_BIT(4);
1084 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 0x3);
1085 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0x08, 0x17, 0x19, 0);
1086 if (!pThis->fInReset)
1087 pNode->digout.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1088 CODEC_F1C_LOCATION_REAR,
1089 CODEC_F1C_DEVICE_SPDIF_OUT,
1090 CODEC_F1C_CONNECTION_TYPE_DIN,
1091 CODEC_F1C_COLOR_BLACK,
1092 0x0, 0x3, 0x0);//RT_MAKE_U32_FROM_U8(0x30, 0x10, 0x45, 0x01);
1093 break;
1094 case 0x11:
1095 pNode->node.au32F00_param[9] = (4 << 20) | (3 << 16) | RT_BIT(10) | RT_BIT(9) | RT_BIT(7) | RT_BIT(0);
1096 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_EAPD
1097 | CODEC_F00_0C_CAP_INPUT
1098 | CODEC_F00_0C_CAP_PRESENSE_DETECT;//RT_BIT(16)| RT_BIT(5)|RT_BIT(2);
1099 pNode->digin.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 -> D3 */
1100 pNode->digin.u32F07_param = 0;
1101 pNode->digin.u32F08_param = 0;
1102 pNode->digin.u32F09_param = 0;
1103 pNode->digin.u32F0c_param = 0;
1104 if (!pThis->fInReset)
1105 pNode->digin.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1106 CODEC_F1C_LOCATION_REAR,
1107 CODEC_F1C_DEVICE_SPDIF_IN,
1108 CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL,
1109 CODEC_F1C_COLOR_BLACK,
1110 0x0, 0x6, 0x0);//(0x1 << 24) | (0xc5 << 16) | (0x10 << 8) | 0x60;
1111 break;
1112 case 0x12:
1113 pNode->adcmux.u32F01_param = 0;
1114 goto adcmux_init;
1115 case 0x13:
1116 pNode->adcmux.u32F01_param = 1;
1117 adcmux_init:
1118 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0x0, 0)
1119 | CODEC_F00_09_CAP_CONNECTION_LIST
1120 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1121 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1122 | CODEC_F00_09_CAP_LSB;//(3<<20)|RT_BIT(8)|RT_BIT(3)|RT_BIT(2)|RT_BIT(0);
1123 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x7);
1124 pNode->node.au32F00_param[0x12] = (0x27 << 16)|(0x4 << 8);
1125 /* STAC 9220 v10 6.21-22.{4,5} both(left and right) out amplefiers inited with 0*/
1126 memset(pNode->adcmux.B_params, 0, AMPLIFIER_SIZE);
1127 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0xe, 0x15, 0xf, 0xb);
1128 pNode->node.au32F02_param[4] = RT_MAKE_U32_FROM_U8(0xc, 0xd, 0xa, 0x0);
1129 break;
1130 case 0x14:
1131 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_BEEP_GEN, 0, 0)
1132 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1133 | CODEC_F00_09_CAP_OUT_AMP_PRESENT;//(7 << 20) | RT_BIT(3) | RT_BIT(2);
1134 pNode->node.au32F00_param[0x12] = (0x17 << 16)|(0x3 << 8)| 0x3;
1135 pNode->pcbeep.u32F0a_param = 0;
1136 memset(pNode->pcbeep.B_params, 0, AMPLIFIER_SIZE);
1137 break;
1138 case 0x15:
1139 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1140 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(0);
1141 pNode->node.au32F00_param[0xc] = CODEC_F00_0C_CAP_INPUT;//RT_BIT(5);
1142 if (!pThis->fInReset)
1143 pNode->cdnode.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_FIXED,
1144 CODEC_F1C_LOCATION_INTERNAL,
1145 CODEC_F1C_DEVICE_CD,
1146 CODEC_F1C_CONNECTION_TYPE_ATAPI,
1147 CODEC_F1C_COLOR_UNKNOWN,
1148 0x0, 0x7, 0x0);//RT_MAKE_U32_FROM_U8(0x70, 0x0, 0x33, 0x90);
1149 break;
1150 case 0x16:
1151 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VOLUME_KNOB, 0x0, 0x0);//(0x6 << 20);
1152 pNode->node.au32F00_param[0x13] = RT_BIT(7)| 0x7F;
1153 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x4);
1154 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0x2, 0x3, 0x4, 0x5);
1155 pNode->volumeKnob.u32F08_param = 0;
1156 pNode->volumeKnob.u32F0f_param = 0x7f;
1157 break;
1158 case 0x17:
1159 pNode->node.au32F02_param[0] = 0x12;
1160 goto adcvol_init;
1161 case 0x18:
1162 pNode->node.au32F02_param[0] = 0x13;
1163 adcvol_init:
1164 memset(pNode->adcvol.B_params, 0, AMPLIFIER_SIZE);
1165
1166 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0, 0)
1167 | CODEC_F00_09_CAP_L_R_SWAP
1168 | CODEC_F00_09_CAP_CONNECTION_LIST
1169 | CODEC_F00_09_CAP_IN_AMP_PRESENT
1170 | CODEC_F00_09_CAP_LSB;//(0x3 << 20)|RT_BIT(11)|RT_BIT(8)|RT_BIT(1)|RT_BIT(0);
1171 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x1);
1172 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_LEFT, 0) = RT_BIT(7);
1173 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_RIGHT, 0) = RT_BIT(7);
1174 pNode->adcvol.u32F0c_param = 0;
1175 break;
1176 case 0x19:
1177 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VENDOR_DEFINED, 0x3, 0)
1178 | CODEC_F00_09_CAP_DIGITAL
1179 | CODEC_F00_09_CAP_LSB;//(0xF << 20)|(0x3 << 16)|RT_BIT(9)|RT_BIT(0);
1180 break;
1181 case 0x1A:
1182 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 0x3, 0)
1183 | CODEC_F00_09_CAP_DIGITAL
1184 | CODEC_F00_09_CAP_LSB;//(0x3 << 16)|RT_BIT(9)|RT_BIT(0);
1185 break;
1186 case 0x1B:
1187 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1188 | CODEC_F00_09_CAP_DIGITAL
1189 | CODEC_F00_09_CAP_CONNECTION_LIST
1190 | CODEC_F00_09_CAP_LSB;//(0x4 << 20)|RT_BIT(9)|RT_BIT(8)|RT_BIT(0);
1191 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 0x1);
1192 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;//0x10;
1193 pNode->node.au32F02_param[0] = 0x1a;
1194 pNode->reserved.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_NO_PHYS,
1195 CODEC_F1C_LOCATION_NA,
1196 CODEC_F1C_DEVICE_LINE_OUT,
1197 CODEC_F1C_CONNECTION_TYPE_UNKNOWN,
1198 CODEC_F1C_COLOR_UNKNOWN,
1199 0x0, 0x0, 0xf);//0x4000000f;
1200 break;
1201 default:
1202 break;
1203 }
1204 return VINF_SUCCESS;
1205}
1206
1207
1208static int stac9220Construct(PHDACODEC pThis)
1209{
1210 unconst(pThis->cTotalNodes) = 0x1C;
1211 pThis->pfnCodecNodeReset = stac9220ResetNode;
1212 pThis->pfnDbgListNodes = stac9220DbgNodes;
1213 pThis->u16VendorId = 0x8384;
1214 pThis->u16DeviceId = 0x7680;
1215 pThis->u8BSKU = 0x76;
1216 pThis->u8AssemblyId = 0x80;
1217 pThis->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pThis->cTotalNodes);
1218 if (!pThis->paNodes)
1219 return VERR_NO_MEMORY;
1220 pThis->fInReset = false;
1221#define STAC9220WIDGET(type) pThis->au8##type##s = g_abStac9220##type##s
1222 STAC9220WIDGET(Port);
1223 STAC9220WIDGET(Dac);
1224 STAC9220WIDGET(Adc);
1225 STAC9220WIDGET(AdcVol);
1226 STAC9220WIDGET(AdcMux);
1227 STAC9220WIDGET(Pcbeep);
1228 STAC9220WIDGET(SpdifIn);
1229 STAC9220WIDGET(SpdifOut);
1230 STAC9220WIDGET(DigInPin);
1231 STAC9220WIDGET(DigOutPin);
1232 STAC9220WIDGET(Cd);
1233 STAC9220WIDGET(VolKnob);
1234 STAC9220WIDGET(Reserved);
1235#undef STAC9220WIDGET
1236 unconst(pThis->u8AdcVolsLineIn) = 0x17;
1237 unconst(pThis->u8DacLineOut) = 0x2;
1238
1239 return VINF_SUCCESS;
1240}
1241
1242
1243/*
1244 * Some generic predicate functions.
1245 */
1246
1247#define DECLISNODEOFTYPE(type) \
1248 DECLINLINE(int) hdaCodecIs##type##Node(PHDACODEC pThis, uint8_t cNode) \
1249 { \
1250 Assert(pThis->au8##type##s); \
1251 for (int i = 0; pThis->au8##type##s[i] != 0; ++i) \
1252 if (pThis->au8##type##s[i] == cNode) \
1253 return 1; \
1254 return 0; \
1255 }
1256/* hdaCodecIsPortNode */
1257DECLISNODEOFTYPE(Port)
1258/* hdaCodecIsDacNode */
1259DECLISNODEOFTYPE(Dac)
1260/* hdaCodecIsAdcVolNode */
1261DECLISNODEOFTYPE(AdcVol)
1262/* hdaCodecIsAdcNode */
1263DECLISNODEOFTYPE(Adc)
1264/* hdaCodecIsAdcMuxNode */
1265DECLISNODEOFTYPE(AdcMux)
1266/* hdaCodecIsPcbeepNode */
1267DECLISNODEOFTYPE(Pcbeep)
1268/* hdaCodecIsSpdifOutNode */
1269DECLISNODEOFTYPE(SpdifOut)
1270/* hdaCodecIsSpdifInNode */
1271DECLISNODEOFTYPE(SpdifIn)
1272/* hdaCodecIsDigInPinNode */
1273DECLISNODEOFTYPE(DigInPin)
1274/* hdaCodecIsDigOutPinNode */
1275DECLISNODEOFTYPE(DigOutPin)
1276/* hdaCodecIsCdNode */
1277DECLISNODEOFTYPE(Cd)
1278/* hdaCodecIsVolKnobNode */
1279DECLISNODEOFTYPE(VolKnob)
1280/* hdaCodecIsReservedNode */
1281DECLISNODEOFTYPE(Reserved)
1282
1283
1284/*
1285 * Misc helpers.
1286 */
1287static int hdaCodecToAudVolume(PHDACODEC pThis, AMPLIFIER *pAmp, PDMAUDIOMIXERCTL mt)
1288{
1289 uint32_t dir = AMPLIFIER_OUT;
1290 ENMSOUNDSOURCE enmSrc;
1291 switch (mt)
1292 {
1293 case PDMAUDIOMIXERCTL_PCM:
1294 enmSrc = PO_INDEX;
1295 dir = AMPLIFIER_OUT;
1296 break;
1297 case PDMAUDIOMIXERCTL_LINE_IN:
1298 enmSrc = PI_INDEX;
1299 dir = AMPLIFIER_IN;
1300 break;
1301 default:
1302 AssertMsgFailedReturn(("Invalid mixer control %ld\n", mt), VERR_INVALID_PARAMETER);
1303 break;
1304 }
1305
1306 int mute = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & RT_BIT(7);
1307 mute |= AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & RT_BIT(7);
1308 mute >>=7;
1309 mute &= 0x1;
1310 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & 0x7f;
1311 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & 0x7f;
1312
1313 /* The STAC9220 volume controls have 0 to -96dB attenuation range in 128 steps.
1314 * We have 0 to -96dB range in 256 steps. HDA volume setting of 127 must map
1315 * to 255 internally (0dB), while HDA volume setting of 0 (-96dB) should map
1316 * to 1 (rather than zero) internally.
1317 */
1318 lVol = (lVol + 1) * (2 * 255) / 256;
1319 rVol = (rVol + 1) * (2 * 255) / 256;
1320
1321 return pThis->pfnSetVolume(pThis->pHDAState, enmSrc, RT_BOOL(mute), lVol, rVol);
1322}
1323
1324DECLINLINE(void) hdaCodecSetRegister(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset, uint32_t mask)
1325{
1326 Assert((pu32Reg && u8Offset < 32));
1327 *pu32Reg &= ~(mask << u8Offset);
1328 *pu32Reg |= (u32Cmd & mask) << u8Offset;
1329}
1330
1331DECLINLINE(void) hdaCodecSetRegisterU8(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1332{
1333 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_8BIT_DATA);
1334}
1335
1336DECLINLINE(void) hdaCodecSetRegisterU16(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1337{
1338 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_16BIT_DATA);
1339}
1340
1341
1342/*
1343 * Verb processor functions.
1344 */
1345
1346static DECLCALLBACK(int) vrbProcUnimplemented(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1347{
1348 LogFlowFunc(("cmd(raw:%x: cad:%x, d:%c, nid:%x, verb:%x)\n", cmd,
1349 CODEC_CAD(cmd), CODEC_DIRECT(cmd) ? 'N' : 'Y', CODEC_NID(cmd), CODEC_VERBDATA(cmd)));
1350 *pResp = 0;
1351 return VINF_SUCCESS;
1352}
1353
1354static DECLCALLBACK(int) vrbProcBreak(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1355{
1356 int rc;
1357 rc = vrbProcUnimplemented(pThis, cmd, pResp);
1358 *pResp |= CODEC_RESPONSE_UNSOLICITED;
1359 return rc;
1360}
1361
1362/* B-- */
1363static DECLCALLBACK(int) vrbProcGetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1364{
1365 Assert(CODEC_CAD(cmd) == pThis->id);
1366 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1367 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1368 {
1369 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1370 return VINF_SUCCESS;
1371 }
1372 *pResp = 0;
1373 /* HDA spec 7.3.3.7 Note A */
1374 /** @todo: if index out of range response should be 0 */
1375 uint8_t u8Index = CODEC_GET_AMP_DIRECTION(cmd) == AMPLIFIER_OUT? 0 : CODEC_GET_AMP_INDEX(cmd);
1376
1377 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1378 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1379 *pResp = AMPLIFIER_REGISTER(pNode->dac.B_params,
1380 CODEC_GET_AMP_DIRECTION(cmd),
1381 CODEC_GET_AMP_SIDE(cmd),
1382 u8Index);
1383 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1384 *pResp = AMPLIFIER_REGISTER(pNode->adcvol.B_params,
1385 CODEC_GET_AMP_DIRECTION(cmd),
1386 CODEC_GET_AMP_SIDE(cmd),
1387 u8Index);
1388 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1389 *pResp = AMPLIFIER_REGISTER(pNode->adcmux.B_params,
1390 CODEC_GET_AMP_DIRECTION(cmd),
1391 CODEC_GET_AMP_SIDE(cmd),
1392 u8Index);
1393 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1394 *pResp = AMPLIFIER_REGISTER(pNode->pcbeep.B_params,
1395 CODEC_GET_AMP_DIRECTION(cmd),
1396 CODEC_GET_AMP_SIDE(cmd),
1397 u8Index);
1398 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1399 *pResp = AMPLIFIER_REGISTER(pNode->port.B_params,
1400 CODEC_GET_AMP_DIRECTION(cmd),
1401 CODEC_GET_AMP_SIDE(cmd),
1402 u8Index);
1403 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1404 *pResp = AMPLIFIER_REGISTER(pNode->adc.B_params,
1405 CODEC_GET_AMP_DIRECTION(cmd),
1406 CODEC_GET_AMP_SIDE(cmd),
1407 u8Index);
1408 else
1409 AssertMsgFailedReturn(("access to fields of %x need to be implemented\n", CODEC_NID(cmd)), VINF_SUCCESS);
1410 return VINF_SUCCESS;
1411}
1412
1413/* 3-- */
1414static DECLCALLBACK(int) vrbProcSetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1415{
1416 bool fIsLeft = false;
1417 bool fIsRight = false;
1418 bool fIsOut = false;
1419 bool fIsIn = false;
1420 uint8_t u8Index = 0;
1421 Assert(CODEC_CAD(cmd) == pThis->id);
1422 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1423 {
1424 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1425 return VINF_SUCCESS;
1426 }
1427 *pResp = 0;
1428 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1429 AMPLIFIER *pAmplifier;
1430 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1431 pAmplifier = &pNode->dac.B_params;
1432 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1433 pAmplifier = &pNode->adcvol.B_params;
1434 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1435 pAmplifier = &pNode->adcmux.B_params;
1436 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1437 pAmplifier = &pNode->pcbeep.B_params;
1438 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1439 pAmplifier = &pNode->port.B_params;
1440 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1441 pAmplifier = &pNode->adc.B_params;
1442 else
1443 AssertFailedReturn(VINF_SUCCESS);
1444
1445 fIsOut = CODEC_SET_AMP_IS_OUT_DIRECTION(cmd);
1446 fIsIn = CODEC_SET_AMP_IS_IN_DIRECTION(cmd);
1447 fIsRight = CODEC_SET_AMP_IS_RIGHT_SIDE(cmd);
1448 fIsLeft = CODEC_SET_AMP_IS_LEFT_SIDE(cmd);
1449 u8Index = CODEC_SET_AMP_INDEX(cmd);
1450 if ( (!fIsLeft && !fIsRight)
1451 || (!fIsOut && !fIsIn))
1452 return VINF_SUCCESS;
1453 if (fIsIn)
1454 {
1455 if (fIsLeft)
1456 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_LEFT, u8Index), cmd, 0);
1457 if (fIsRight)
1458 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1459
1460 /** @todo Fix ID of u8AdcVolsLineIn! */
1461 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_LINE_IN);
1462 }
1463 if (fIsOut)
1464 {
1465 if (fIsLeft)
1466 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_LEFT, u8Index), cmd, 0);
1467 if (fIsRight)
1468 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1469
1470 /** @todo Fix ID of u8DacLineOut! */
1471 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_PCM);
1472 }
1473
1474 return VINF_SUCCESS;
1475}
1476
1477static DECLCALLBACK(int) vrbProcGetParameter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1478{
1479 Assert(CODEC_CAD(cmd) == pThis->id);
1480 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1481 {
1482 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1483 return VINF_SUCCESS;
1484 }
1485 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F00_PARAM_LENGTH);
1486 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F00_PARAM_LENGTH)
1487 {
1488 LogFlowFunc(("invalid F00 parameter %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1489 return VINF_SUCCESS;
1490 }
1491 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA];
1492 return VINF_SUCCESS;
1493}
1494
1495/* F01 */
1496static DECLCALLBACK(int) vrbProcGetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1497{
1498 Assert(CODEC_CAD(cmd) == pThis->id);
1499 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1500 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1501 {
1502 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1503 return VINF_SUCCESS;
1504 }
1505 *pResp = 0;
1506 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1507 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1508 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1509 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1510 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1511 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1512 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1513 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1514 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1515 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1516 return VINF_SUCCESS;
1517}
1518
1519/* 701 */
1520static DECLCALLBACK(int) vrbProcSetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1521{
1522 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1523 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1524 {
1525 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1526 return VINF_SUCCESS;
1527 }
1528 *pResp = 0;
1529 uint32_t *pu32Reg;
1530 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1531 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1532 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1533 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1534 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1535 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1536 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1537 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1538 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1539 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1540 else
1541 AssertFailedReturn(VINF_SUCCESS);
1542 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1543 return VINF_SUCCESS;
1544}
1545
1546/* F07 */
1547static DECLCALLBACK(int) vrbProcGetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1548{
1549 Assert(CODEC_CAD(cmd) == pThis->id);
1550 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1551 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1552 {
1553 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1554 return VINF_SUCCESS;
1555 }
1556 *pResp = 0;
1557 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1558 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1559 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1560 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1561 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1562 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1563 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1564 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1565 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1566 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1567 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1568 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1569 else
1570 AssertMsgFailed(("Unsupported"));
1571 return VINF_SUCCESS;
1572}
1573
1574/* 707 */
1575static DECLCALLBACK(int) vrbProcSetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1576{
1577 Assert(CODEC_CAD(cmd) == pThis->id);
1578 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1579 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1580 {
1581 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1582 return VINF_SUCCESS;
1583 }
1584 *pResp = 0;
1585 uint32_t *pu32Reg;
1586 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1587 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1588 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1589 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1590 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1591 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1592 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1593 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1594 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1595 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1596 else if ( hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))
1597 && CODEC_NID(cmd) == 0x1b)
1598 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1599 else
1600 AssertFailedReturn(VINF_SUCCESS);
1601 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1602 return VINF_SUCCESS;
1603}
1604
1605/* F08 */
1606static DECLCALLBACK(int) vrbProcGetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1607{
1608 Assert(CODEC_CAD(cmd) == pThis->id);
1609 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1610 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1611 {
1612 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1613 return VINF_SUCCESS;
1614 }
1615 *pResp = 0;
1616 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1617 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1618 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1619 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1620 else if ((cmd) == 1 /* AFG */)
1621 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1622 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1623 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1624 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1625 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1626 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1627 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1628 else
1629 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)));
1630 return VINF_SUCCESS;
1631}
1632
1633/* 708 */
1634static DECLCALLBACK(int) vrbProcSetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1635{
1636 Assert(CODEC_CAD(cmd) == pThis->id);
1637 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1638 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1639 {
1640 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1641 return VINF_SUCCESS;
1642 }
1643 *pResp = 0;
1644 uint32_t *pu32Reg;
1645 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1646 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1647 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1648 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1649 else if (CODEC_NID(cmd) == 1 /* AFG */)
1650 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1651 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1652 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1653 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1654 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1655 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1656 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1657 else
1658 AssertMsgFailedReturn(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)), VINF_SUCCESS);
1659 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1660 return VINF_SUCCESS;
1661}
1662
1663/* F09 */
1664static DECLCALLBACK(int) vrbProcGetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1665{
1666 Assert(CODEC_CAD(cmd) == pThis->id);
1667 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1668 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1669 {
1670 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1671 return VINF_SUCCESS;
1672 }
1673 *pResp = 0;
1674 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1675 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1676 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1677 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1678 else
1679 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)));
1680 return VINF_SUCCESS;
1681}
1682
1683/* 709 */
1684static DECLCALLBACK(int) vrbProcSetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1685{
1686 Assert(CODEC_CAD(cmd) == pThis->id);
1687 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1688 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1689 {
1690 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1691 return VINF_SUCCESS;
1692 }
1693 *pResp = 0;
1694 uint32_t *pu32Reg;
1695 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1696 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1697 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1698 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1699 else
1700 AssertFailedReturn(VINF_SUCCESS);
1701 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1702 return VINF_SUCCESS;
1703}
1704
1705static DECLCALLBACK(int) vrbProcGetConnectionListEntry(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1706{
1707 Assert(CODEC_CAD(cmd) == pThis->id);
1708 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1709 *pResp = 0;
1710 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1711 {
1712 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1713 return VINF_SUCCESS;
1714 }
1715 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F02_PARAM_LENGTH);
1716 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F02_PARAM_LENGTH)
1717 {
1718 LogFlowFunc(("access to invalid F02 index %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1719 return VINF_SUCCESS;
1720 }
1721 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];
1722 return VINF_SUCCESS;
1723}
1724
1725/* F03 */
1726static DECLCALLBACK(int) vrbProcGetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1727{
1728 Assert(CODEC_CAD(cmd) == pThis->id);
1729 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1730 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1731 {
1732 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1733 return VINF_SUCCESS;
1734 }
1735 *pResp = 0;
1736 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1737 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param;
1738 return VINF_SUCCESS;
1739}
1740
1741/* 703 */
1742static DECLCALLBACK(int) vrbProcSetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1743{
1744 Assert(CODEC_CAD(cmd) == pThis->id);
1745 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1746 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1747 {
1748 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1749 return VINF_SUCCESS;
1750 }
1751 *pResp = 0;
1752 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1753 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0);
1754 return VINF_SUCCESS;
1755}
1756
1757/* F0D */
1758static DECLCALLBACK(int) vrbProcGetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1759{
1760 Assert(CODEC_CAD(cmd) == pThis->id);
1761 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1762 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1763 {
1764 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1765 return VINF_SUCCESS;
1766 }
1767 *pResp = 0;
1768 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1769 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param;
1770 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1771 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param;
1772 return VINF_SUCCESS;
1773}
1774
1775static int codecSetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset, uint64_t *pResp)
1776{
1777 Assert(CODEC_CAD(cmd) == pThis->id);
1778 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1779 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1780 {
1781 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1782 return VINF_SUCCESS;
1783 }
1784 *pResp = 0;
1785 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1786 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);
1787 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1788 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);
1789 return VINF_SUCCESS;
1790}
1791
1792/* 70D */
1793static DECLCALLBACK(int) vrbProcSetDigitalConverter1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1794{
1795 return codecSetDigitalConverter(pThis, cmd, 0, pResp);
1796}
1797
1798/* 70E */
1799static DECLCALLBACK(int) vrbProcSetDigitalConverter2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1800{
1801 return codecSetDigitalConverter(pThis, cmd, 8, pResp);
1802}
1803
1804/* F20 */
1805static DECLCALLBACK(int) vrbProcGetSubId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1806{
1807 Assert(CODEC_CAD(cmd) == pThis->id);
1808 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1809 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1810 {
1811 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1812 return VINF_SUCCESS;
1813 }
1814 if (CODEC_NID(cmd) == 1 /* AFG */)
1815 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
1816 else
1817 *pResp = 0;
1818 return VINF_SUCCESS;
1819}
1820
1821static int codecSetSubIdX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
1822{
1823 Assert(CODEC_CAD(cmd) == pThis->id);
1824 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1825 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1826 {
1827 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1828 return VINF_SUCCESS;
1829 }
1830 uint32_t *pu32Reg;
1831 if (CODEC_NID(cmd) == 0x1 /* AFG */)
1832 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
1833 else
1834 AssertFailedReturn(VINF_SUCCESS);
1835 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
1836 return VINF_SUCCESS;
1837}
1838
1839/* 720 */
1840static DECLCALLBACK(int) vrbProcSetSubId0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1841{
1842 *pResp = 0;
1843 return codecSetSubIdX(pThis, cmd, 0);
1844}
1845
1846/* 721 */
1847static DECLCALLBACK(int) vrbProcSetSubId1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1848{
1849 *pResp = 0;
1850 return codecSetSubIdX(pThis, cmd, 8);
1851}
1852
1853/* 722 */
1854static DECLCALLBACK(int) vrbProcSetSubId2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1855{
1856 *pResp = 0;
1857 return codecSetSubIdX(pThis, cmd, 16);
1858}
1859
1860/* 723 */
1861static DECLCALLBACK(int) vrbProcSetSubId3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1862{
1863 *pResp = 0;
1864 return codecSetSubIdX(pThis, cmd, 24);
1865}
1866
1867static DECLCALLBACK(int) vrbProcReset(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1868{
1869 Assert(CODEC_CAD(cmd) == pThis->id);
1870 Assert(CODEC_NID(cmd) == 1 /* AFG */);
1871 if ( CODEC_NID(cmd) == 1 /* AFG */
1872 && pThis->pfnCodecNodeReset)
1873 {
1874 uint8_t i;
1875 LogFlowFunc(("enters reset\n"));
1876 Assert(pThis->pfnCodecNodeReset);
1877 for (i = 0; i < pThis->cTotalNodes; ++i)
1878 {
1879 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
1880 }
1881 pThis->fInReset = false;
1882 LogFlowFunc(("exits reset\n"));
1883 }
1884 *pResp = 0;
1885 return VINF_SUCCESS;
1886}
1887
1888/* F05 */
1889static DECLCALLBACK(int) vrbProcGetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1890{
1891 Assert(CODEC_CAD(cmd) == pThis->id);
1892 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1893 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1894 {
1895 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1896 return VINF_SUCCESS;
1897 }
1898 *pResp = 0;
1899 if (CODEC_NID(cmd) == 1 /* AFG */)
1900 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
1901 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1902 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
1903 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1904 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
1905 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1906 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
1907 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1908 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
1909 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1910 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
1911 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1912 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
1913 return VINF_SUCCESS;
1914}
1915
1916/* 705 */
1917
1918DECLINLINE(void) codecPropogatePowerState(uint32_t *pu32F05_param)
1919{
1920 Assert(pu32F05_param);
1921 if (!pu32F05_param)
1922 return;
1923 bool fReset = CODEC_F05_IS_RESET(*pu32F05_param);
1924 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32F05_param);
1925 uint8_t u8SetPowerState = CODEC_F05_SET(*pu32F05_param);
1926 *pu32F05_param = CODEC_MAKE_F05(fReset, fStopOk, 0, u8SetPowerState, u8SetPowerState);
1927}
1928
1929static DECLCALLBACK(int) vrbProcSetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1930{
1931 Assert(CODEC_CAD(cmd) == pThis->id);
1932 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1933 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1934 {
1935 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1936 return VINF_SUCCESS;
1937 }
1938 *pResp = 0;
1939 uint32_t *pu32Reg;
1940 if (CODEC_NID(cmd) == 1 /* AFG */)
1941 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
1942 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1943 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
1944 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1945 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
1946 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1947 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
1948 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1949 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
1950 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1951 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
1952 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1953 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
1954 else
1955 AssertFailedReturn(VINF_SUCCESS);
1956
1957 bool fReset = CODEC_F05_IS_RESET(*pu32Reg);
1958 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32Reg);
1959
1960 if (CODEC_NID(cmd) != 1 /* AFG */)
1961 {
1962 /*
1963 * We shouldn't propogate actual power state, which actual for AFG
1964 */
1965 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0,
1966 CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param),
1967 CODEC_F05_SET(cmd));
1968 }
1969
1970 /* Propagate next power state only if AFG is on or verb modifies AFG power state */
1971 if ( CODEC_NID(cmd) == 1 /* AFG */
1972 || !CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param))
1973 {
1974 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, CODEC_F05_SET(cmd), CODEC_F05_SET(cmd));
1975 if ( CODEC_NID(cmd) == 1 /* AFG */
1976 && (CODEC_F05_SET(cmd)) == CODEC_F05_D0)
1977 {
1978 /* now we're powered on AFG and may propogate power states on nodes */
1979 const uint8_t *pu8NodeIndex = &pThis->au8Dacs[0];
1980 while (*(++pu8NodeIndex))
1981 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].dac.u32F05_param);
1982
1983 pu8NodeIndex = &pThis->au8Adcs[0];
1984 while (*(++pu8NodeIndex))
1985 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].adc.u32F05_param);
1986
1987 pu8NodeIndex = &pThis->au8DigInPins[0];
1988 while (*(++pu8NodeIndex))
1989 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].digin.u32F05_param);
1990 }
1991 }
1992 return VINF_SUCCESS;
1993}
1994
1995static DECLCALLBACK(int) vrbProcGetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1996{
1997 Assert(CODEC_CAD(cmd) == pThis->id);
1998 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1999 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2000 {
2001 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2002 return VINF_SUCCESS;
2003 }
2004 *pResp = 0;
2005 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2006 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2007 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2008 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2009 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2010 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2011 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2012 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2013 else if (CODEC_NID(cmd) == 0x1A)
2014 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
2015 return VINF_SUCCESS;
2016}
2017
2018static DECLCALLBACK(int) vrbProcSetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2019{
2020 Assert(CODEC_CAD(cmd) == pThis->id);
2021 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2022 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2023 {
2024 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2025 return VINF_SUCCESS;
2026 }
2027 *pResp = 0;
2028 uint32_t *pu32addr;
2029 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2030 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2031 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2032 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2033 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2034 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2035 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2036 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2037 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2038 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
2039 else
2040 AssertFailedReturn(VINF_SUCCESS);
2041 hdaCodecSetRegisterU8(pu32addr, cmd, 0);
2042 return VINF_SUCCESS;
2043}
2044
2045static DECLCALLBACK(int) vrbProcGetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2046{
2047 Assert(CODEC_CAD(cmd) == pThis->id);
2048 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2049 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2050 {
2051 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2052 return VINF_SUCCESS;
2053 }
2054 *pResp = 0;
2055 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2056 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param;
2057 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2058 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param;
2059 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2060 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param;
2061 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2062 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param;
2063 return VINF_SUCCESS;
2064}
2065
2066static DECLCALLBACK(int) vrbProcSetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2067{
2068 Assert(CODEC_CAD(cmd) == pThis->id);
2069 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2070 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2071 {
2072 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2073 return VINF_SUCCESS;
2074 }
2075 *pResp = 0;
2076 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2077 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0);
2078 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2079 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0);
2080 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2081 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0);
2082 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2083 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0);
2084 return VINF_SUCCESS;
2085}
2086
2087/* F0C */
2088static DECLCALLBACK(int) vrbProcGetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2089{
2090 Assert(CODEC_CAD(cmd) == pThis->id);
2091 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2092 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2093 {
2094 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2095 return VINF_SUCCESS;
2096 }
2097 *pResp = 0;
2098 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2099 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2100 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2101 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2102 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2103 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2104 return VINF_SUCCESS;
2105}
2106
2107/* 70C */
2108static DECLCALLBACK(int) vrbProcSetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2109{
2110 Assert(CODEC_CAD(cmd) == pThis->id);
2111 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2112 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2113 {
2114 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2115 return VINF_SUCCESS;
2116 }
2117
2118 *pResp = 0;
2119 uint32_t *pu32Reg;
2120 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2121 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2122 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2123 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2124 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2125 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2126 else
2127 AssertFailedReturn(VINF_SUCCESS);
2128 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2129
2130 return VINF_SUCCESS;
2131}
2132
2133/* F0F */
2134static DECLCALLBACK(int) vrbProcGetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2135{
2136 Assert(CODEC_CAD(cmd) == pThis->id);
2137 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2138 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2139 {
2140 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2141 return VINF_SUCCESS;
2142 }
2143 *pResp = 0;
2144 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2145 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2146 return VINF_SUCCESS;
2147}
2148
2149/* 70F */
2150static DECLCALLBACK(int) vrbProcSetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2151{
2152 Assert(CODEC_CAD(cmd) == pThis->id);
2153 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2154 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2155 {
2156 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2157 return VINF_SUCCESS;
2158 }
2159 uint32_t *pu32Reg = NULL;
2160 *pResp = 0;
2161 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2162 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2163 Assert(pu32Reg);
2164 if (pu32Reg)
2165 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2166 return VINF_SUCCESS;
2167}
2168
2169/* F17 */
2170static DECLCALLBACK(int) vrbProcGetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2171{
2172 Assert(CODEC_CAD(cmd) == pThis->id);
2173 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2174 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2175 {
2176 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2177 return VINF_SUCCESS;
2178 }
2179 *pResp = 0;
2180 /* note: this is true for ALC885 */
2181 if (CODEC_NID(cmd) == 0x1 /* AFG */)
2182 *pResp = pThis->paNodes[1].afg.u32F17_param;
2183 return VINF_SUCCESS;
2184}
2185
2186/* 717 */
2187static DECLCALLBACK(int) vrbProcSetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2188{
2189 Assert(CODEC_CAD(cmd) == pThis->id);
2190 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2191 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2192 {
2193 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2194 return VINF_SUCCESS;
2195 }
2196 uint32_t *pu32Reg = NULL;
2197 *pResp = 0;
2198 if (CODEC_NID(cmd) == 1 /* AFG */)
2199 pu32Reg = &pThis->paNodes[1].afg.u32F17_param;
2200 Assert(pu32Reg);
2201 if (pu32Reg)
2202 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2203 return VINF_SUCCESS;
2204}
2205
2206/* F1C */
2207static DECLCALLBACK(int) vrbProcGetConfig(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2208{
2209 Assert(CODEC_CAD(cmd) == pThis->id);
2210 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2211 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2212 {
2213 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2214 return VINF_SUCCESS;
2215 }
2216 *pResp = 0;
2217 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2218 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2219 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2220 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2221 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2222 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2223 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2224 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2225 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2226 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2227 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2228 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2229 return VINF_SUCCESS;
2230}
2231
2232static int codecSetConfigX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
2233{
2234 Assert(CODEC_CAD(cmd) == pThis->id);
2235 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2236 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2237 {
2238 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2239 return VINF_SUCCESS;
2240 }
2241 uint32_t *pu32Reg = NULL;
2242 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2243 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2244 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2245 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2246 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2247 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2248 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2249 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2250 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2251 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2252 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2253 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2254 Assert(pu32Reg);
2255 if (pu32Reg)
2256 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
2257 return VINF_SUCCESS;
2258}
2259
2260/* 71C */
2261static DECLCALLBACK(int) vrbProcSetConfig0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2262{
2263 *pResp = 0;
2264 return codecSetConfigX(pThis, cmd, 0);
2265}
2266
2267/* 71D */
2268static DECLCALLBACK(int) vrbProcSetConfig1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2269{
2270 *pResp = 0;
2271 return codecSetConfigX(pThis, cmd, 8);
2272}
2273
2274/* 71E */
2275static DECLCALLBACK(int) vrbProcSetConfig2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2276{
2277 *pResp = 0;
2278 return codecSetConfigX(pThis, cmd, 16);
2279}
2280
2281/* 71E */
2282static DECLCALLBACK(int) vrbProcSetConfig3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2283{
2284 *pResp = 0;
2285 return codecSetConfigX(pThis, cmd, 24);
2286}
2287
2288
2289/**
2290 * HDA codec verb map.
2291 * @todo Any reason not to use binary search here?
2292 */
2293static const CODECVERB g_aCodecVerbs[] =
2294{
2295/* verb | verb mask | callback */
2296/* ----------- -------------------- ----------------------- */
2297 { 0x000F0000, CODEC_VERB_8BIT_CMD , vrbProcGetParameter },
2298 { 0x000F0100, CODEC_VERB_8BIT_CMD , vrbProcGetConSelectCtrl },
2299 { 0x00070100, CODEC_VERB_8BIT_CMD , vrbProcSetConSelectCtrl },
2300 { 0x000F0600, CODEC_VERB_8BIT_CMD , vrbProcGetStreamId },
2301 { 0x00070600, CODEC_VERB_8BIT_CMD , vrbProcSetStreamId },
2302 { 0x000F0700, CODEC_VERB_8BIT_CMD , vrbProcGetPinCtrl },
2303 { 0x00070700, CODEC_VERB_8BIT_CMD , vrbProcSetPinCtrl },
2304 { 0x000F0800, CODEC_VERB_8BIT_CMD , vrbProcGetUnsolicitedEnabled },
2305 { 0x00070800, CODEC_VERB_8BIT_CMD , vrbProcSetUnsolicitedEnabled },
2306 { 0x000F0900, CODEC_VERB_8BIT_CMD , vrbProcGetPinSense },
2307 { 0x00070900, CODEC_VERB_8BIT_CMD , vrbProcSetPinSense },
2308 { 0x000F0200, CODEC_VERB_8BIT_CMD , vrbProcGetConnectionListEntry },
2309 { 0x000F0300, CODEC_VERB_8BIT_CMD , vrbProcGetProcessingState },
2310 { 0x00070300, CODEC_VERB_8BIT_CMD , vrbProcSetProcessingState },
2311 { 0x000F0D00, CODEC_VERB_8BIT_CMD , vrbProcGetDigitalConverter },
2312 { 0x00070D00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter1 },
2313 { 0x00070E00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter2 },
2314 { 0x000F2000, CODEC_VERB_8BIT_CMD , vrbProcGetSubId },
2315 { 0x00072000, CODEC_VERB_8BIT_CMD , vrbProcSetSubId0 },
2316 { 0x00072100, CODEC_VERB_8BIT_CMD , vrbProcSetSubId1 },
2317 { 0x00072200, CODEC_VERB_8BIT_CMD , vrbProcSetSubId2 },
2318 { 0x00072300, CODEC_VERB_8BIT_CMD , vrbProcSetSubId3 },
2319 { 0x0007FF00, CODEC_VERB_8BIT_CMD , vrbProcReset },
2320 { 0x000F0500, CODEC_VERB_8BIT_CMD , vrbProcGetPowerState },
2321 { 0x00070500, CODEC_VERB_8BIT_CMD , vrbProcSetPowerState },
2322 { 0x000F0C00, CODEC_VERB_8BIT_CMD , vrbProcGetEAPD_BTLEnabled },
2323 { 0x00070C00, CODEC_VERB_8BIT_CMD , vrbProcSetEAPD_BTLEnabled },
2324 { 0x000F0F00, CODEC_VERB_8BIT_CMD , vrbProcGetVolumeKnobCtrl },
2325 { 0x00070F00, CODEC_VERB_8BIT_CMD , vrbProcSetVolumeKnobCtrl },
2326 { 0x000F1700, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOUnsolisted },
2327 { 0x00071700, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOUnsolisted },
2328 { 0x000F1C00, CODEC_VERB_8BIT_CMD , vrbProcGetConfig },
2329 { 0x00071C00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig0 },
2330 { 0x00071D00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig1 },
2331 { 0x00071E00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig2 },
2332 { 0x00071F00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig3 },
2333 { 0x000A0000, CODEC_VERB_16BIT_CMD, vrbProcGetConverterFormat },
2334 { 0x00020000, CODEC_VERB_16BIT_CMD, vrbProcSetConverterFormat },
2335 { 0x000B0000, CODEC_VERB_16BIT_CMD, vrbProcGetAmplifier },
2336 { 0x00030000, CODEC_VERB_16BIT_CMD, vrbProcSetAmplifier },
2337};
2338
2339#ifdef DEBUG
2340typedef struct CODECDBGINFO
2341{
2342 /** DBGF info helpers. */
2343 PCDBGFINFOHLP pHlp;
2344 /** Current recursion level. */
2345 uint8_t uLevel;
2346 /** Pointer to codec state. */
2347 PHDACODEC pThis;
2348
2349} CODECDBGINFO, *PCODECDBGINFO;
2350
2351#define CODECDBG_INDENT pInfo->uLevel++;
2352#define CODECDBG_UNINDENT if (pInfo->uLevel) pInfo->uLevel--;
2353
2354#define CODECDBG_PRINT(x, ...) pInfo->pHlp->pfnPrintf(pInfo->pHlp, x);
2355#define CODECDBG_PRINTI(x, ...) codecDbgPrintf(pInfo, x);
2356
2357static void codecDbgPrintfIndentV(PCODECDBGINFO pInfo, uint16_t uIndent, const char *pszFormat, va_list va)
2358{
2359 char *pszValueFormat;
2360 if (RTStrAPrintfV(&pszValueFormat, pszFormat, va))
2361 {
2362 pInfo->pHlp->pfnPrintf(pInfo->pHlp, "%*s%s", uIndent, "", pszValueFormat);
2363 RTStrFree(pszValueFormat);
2364 }
2365}
2366
2367static void codecDbgPrintf(PCODECDBGINFO pInfo, const char *pszFormat, ...)
2368{
2369 va_list va;
2370 va_start(va, pszFormat);
2371 codecDbgPrintfIndentV(pInfo, pInfo->uLevel * 4, pszFormat, va);
2372 va_end(va);
2373}
2374
2375/* Power state */
2376static void codecDbgPrintNodeRegF05(PCODECDBGINFO pInfo, uint32_t u32Reg)
2377{
2378 codecDbgPrintf(pInfo, "Power (F05): fReset=%RTbool, fStopOk=%RTbool, Set=%RU8, Act=%RU8\n",
2379 CODEC_F05_IS_RESET(u32Reg), CODEC_F05_IS_STOPOK(u32Reg), CODEC_F05_SET(u32Reg), CODEC_F05_ACT(u32Reg));
2380}
2381
2382static void codecDbgPrintNodeRegA(PCODECDBGINFO pInfo, uint32_t u32Reg)
2383{
2384 codecDbgPrintf(pInfo, "RegA: %x\n", u32Reg);
2385}
2386
2387static void codecDbgPrintNodeRegF00(PCODECDBGINFO pInfo, uint32_t *paReg00)
2388{
2389 codecDbgPrintf(pInfo, "Parameters (F00):\n");
2390
2391 CODECDBG_INDENT
2392 codecDbgPrintf(pInfo, "Amplifier Caps:\n");
2393 uint32_t uReg = paReg00[0xD];
2394 CODECDBG_INDENT
2395 codecDbgPrintf(pInfo, "Input Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2396 CODEC_F00_0D_NUM_STEPS(uReg),
2397 CODEC_F00_0D_STEP_SIZE(uReg),
2398 CODEC_F00_0D_OFFSET(uReg),
2399 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg)));
2400
2401 uReg = paReg00[0x12];
2402 codecDbgPrintf(pInfo, "Output Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2403 CODEC_F00_12_NUM_STEPS(uReg),
2404 CODEC_F00_12_STEP_SIZE(uReg),
2405 CODEC_F00_12_OFFSET(uReg),
2406 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg)));
2407 CODECDBG_UNINDENT
2408 CODECDBG_UNINDENT
2409}
2410
2411static void codecDbgPrintNodeAmp(PCODECDBGINFO pInfo, uint32_t *paReg, uint8_t uIdx, uint8_t uDir)
2412{
2413#define CODECDBG_AMP(reg, chan) \
2414 codecDbgPrintf(pInfo, "Amp %RU8 %s %s: In=%RTbool, Out=%RTbool, Left=%RTbool, Right=%RTbool, Idx=%RU8, fMute=%RTbool, uGain=%RU8\n", \
2415 uIdx, chan, uDir == AMPLIFIER_IN ? "In" : "Out", \
2416 RT_BOOL(CODEC_SET_AMP_IS_IN_DIRECTION(reg)), RT_BOOL(CODEC_SET_AMP_IS_OUT_DIRECTION(reg)), \
2417 RT_BOOL(CODEC_SET_AMP_IS_LEFT_SIDE(reg)), RT_BOOL(CODEC_SET_AMP_IS_RIGHT_SIDE(reg)), \
2418 CODEC_SET_AMP_INDEX(reg), RT_BOOL(CODEC_SET_AMP_MUTE(reg)), CODEC_SET_AMP_GAIN(reg));
2419
2420 uint32_t regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_LEFT, uIdx);
2421 CODECDBG_AMP(regAmp, "Left");
2422 regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_RIGHT, uIdx);
2423 CODECDBG_AMP(regAmp, "Right");
2424
2425#undef CODECDBG_AMP
2426}
2427
2428static void codecDbgPrintNodeConnections(PCODECDBGINFO pInfo, PCODECNODE pNode)
2429{
2430 if (pNode->node.au32F00_param[0xE] == 0) /* Directly connected to HDA link. */
2431 {
2432 codecDbgPrintf(pInfo, "[HDA LINK]\n");
2433 return;
2434 }
2435}
2436
2437static void codecDbgPrintNode(PCODECDBGINFO pInfo, PCODECNODE pNode)
2438{
2439 codecDbgPrintf(pInfo, "Node 0x%02x (%02RU8): ", pNode->node.id, pNode->node.id);
2440
2441 if (pNode->node.id == STAC9220_NID_ROOT)
2442 {
2443 CODECDBG_PRINT("ROOT\n")
2444 }
2445 else if (pNode->node.id == STAC9220_NID_AFG)
2446 {
2447 CODECDBG_PRINT("AFG\n")
2448 CODECDBG_INDENT
2449 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2450 codecDbgPrintNodeRegF05(pInfo, pNode->afg.u32F05_param);
2451 CODECDBG_UNINDENT
2452 }
2453 else if (hdaCodecIsPortNode(pInfo->pThis, pNode->node.id))
2454 {
2455 CODECDBG_PRINT("PORT\n")
2456 }
2457 else if (hdaCodecIsDacNode(pInfo->pThis, pNode->node.id))
2458 {
2459 CODECDBG_PRINT("DAC\n")
2460 CODECDBG_INDENT
2461 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2462 codecDbgPrintNodeRegF05(pInfo, pNode->dac.u32F05_param);
2463 codecDbgPrintNodeRegA (pInfo, pNode->dac.u32A_param);
2464 codecDbgPrintNodeAmp (pInfo, pNode->dac.B_params, 0, AMPLIFIER_OUT);
2465 CODECDBG_UNINDENT
2466 }
2467 else if (hdaCodecIsAdcVolNode(pInfo->pThis, pNode->node.id))
2468 {
2469 CODECDBG_PRINT("ADC VOLUME\n")
2470 CODECDBG_INDENT
2471 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2472 codecDbgPrintNodeRegA (pInfo, pNode->adcvol.u32A_params);
2473 codecDbgPrintNodeAmp (pInfo, pNode->adcvol.B_params, 0, AMPLIFIER_IN);
2474 CODECDBG_UNINDENT
2475 }
2476 else if (hdaCodecIsAdcNode(pInfo->pThis, pNode->node.id))
2477 {
2478 CODECDBG_PRINT("ADC\n")
2479 CODECDBG_INDENT
2480 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2481 codecDbgPrintNodeRegF05(pInfo, pNode->adc.u32F05_param);
2482 codecDbgPrintNodeRegA (pInfo, pNode->adc.u32A_param);
2483 codecDbgPrintNodeAmp (pInfo, pNode->adc.B_params, 0, AMPLIFIER_IN);
2484 CODECDBG_UNINDENT
2485 }
2486 else if (hdaCodecIsAdcMuxNode(pInfo->pThis, pNode->node.id))
2487 {
2488 CODECDBG_PRINT("ADC MUX\n")
2489 CODECDBG_INDENT
2490 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2491 codecDbgPrintNodeRegA (pInfo, pNode->adcmux.u32A_param);
2492 codecDbgPrintNodeAmp (pInfo, pNode->adcmux.B_params, 0, AMPLIFIER_IN);
2493 CODECDBG_UNINDENT
2494 }
2495 else if (hdaCodecIsPcbeepNode(pInfo->pThis, pNode->node.id))
2496 {
2497 CODECDBG_PRINT("PC BEEP\n")
2498 }
2499 else if (hdaCodecIsSpdifOutNode(pInfo->pThis, pNode->node.id))
2500 {
2501 CODECDBG_PRINT("SPDIF OUT\n")
2502 }
2503 else if (hdaCodecIsSpdifInNode(pInfo->pThis, pNode->node.id))
2504 {
2505 CODECDBG_PRINT("SPDIF IN\n")
2506 }
2507 else if (hdaCodecIsDigInPinNode(pInfo->pThis, pNode->node.id))
2508 {
2509 CODECDBG_PRINT("DIGITAL IN PIN\n")
2510 }
2511 else if (hdaCodecIsDigOutPinNode(pInfo->pThis, pNode->node.id))
2512 {
2513 CODECDBG_PRINT("DIGITAL OUT PIN\n")
2514 }
2515 else if (hdaCodecIsCdNode(pInfo->pThis, pNode->node.id))
2516 {
2517 CODECDBG_PRINT("CD\n")
2518 }
2519 else if (hdaCodecIsVolKnobNode(pInfo->pThis, pNode->node.id))
2520 {
2521 CODECDBG_PRINT("VOLUME KNOB\n")
2522 }
2523 else if (hdaCodecIsReservedNode(pInfo->pThis, pNode->node.id))
2524 {
2525 CODECDBG_PRINT("RESERVED\n")
2526 }
2527 else
2528 CODECDBG_PRINT("UNKNOWN TYPE 0x%x\n", pNode->node.id);
2529}
2530
2531static DECLCALLBACK(void) codecDbgListNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2532{
2533 pHlp->pfnPrintf(pHlp, "HDA LINK\n");
2534
2535 CODECDBGINFO dbgInfo;
2536 dbgInfo.pHlp = pHlp;
2537 dbgInfo.pThis = pThis;
2538 dbgInfo.uLevel = 0;
2539
2540 PCODECDBGINFO pInfo = &dbgInfo;
2541
2542 CODECDBG_INDENT
2543 for (uint8_t i = 0; i < pThis->cTotalNodes; i++)
2544 {
2545 PCODECNODE pNode = &pThis->paNodes[i];
2546 if (pNode->node.au32F00_param[0xE] == 0) /* Start with all nodes connected directly to the HDA (Azalia) link. */
2547 codecDbgPrintNode(&dbgInfo, pNode);
2548 }
2549 CODECDBG_UNINDENT
2550}
2551
2552static DECLCALLBACK(void) codecDbgSelector(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2553{
2554
2555}
2556#endif
2557
2558static int codecLookup(PHDACODEC pThis, uint32_t cmd, PPFNHDACODECVERBPROCESSOR pfn)
2559{
2560 Assert(CODEC_CAD(cmd) == pThis->id);
2561 if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2562 LogFlowFunc(("cmd %x was addressed to reserved node\n", cmd));
2563
2564 if ( CODEC_VERBDATA(cmd) == 0
2565 || CODEC_NID(cmd) >= pThis->cTotalNodes)
2566 {
2567 *pfn = vrbProcUnimplemented;
2568 /// @todo r=michaln: There needs to be a counter to avoid log flooding (see e.g. DevRTC.cpp)
2569 LogFlowFunc(("cmd %x was ignored\n", cmd));
2570 return VINF_SUCCESS;
2571 }
2572
2573 for (int i = 0; i < pThis->cVerbs; ++i)
2574 {
2575 if ((CODEC_VERBDATA(cmd) & pThis->paVerbs[i].mask) == pThis->paVerbs[i].verb)
2576 {
2577 *pfn = pThis->paVerbs[i].pfn;
2578 return VINF_SUCCESS;
2579 }
2580 }
2581
2582 *pfn = vrbProcUnimplemented;
2583 LogFlowFunc(("callback for %x wasn't found\n", CODEC_VERBDATA(cmd)));
2584 return VINF_SUCCESS;
2585}
2586
2587/*
2588 * APIs exposed to DevHDA.
2589 */
2590
2591/**
2592 *
2593 * routines open one of the voices (IN, OUT) with corresponding parameters.
2594 * this routine could be called from HDA on setting/resseting sound format.
2595 *
2596 * @todo Probably passed settings should be verified (if AFG's declared proposed
2597 * format) before enabling.
2598 */
2599int hdaCodecOpenStream(PHDACODEC pThis, ENMSOUNDSOURCE enmSoundSource, PPDMAUDIOSTREAMCFG pCfg)
2600{
2601 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2602
2603 int rc;
2604
2605 switch (enmSoundSource)
2606 {
2607 case PI_INDEX:
2608 rc = pThis->pfnOpenIn(pThis->pHDAState, "hda.in", PDMAUDIORECSOURCE_LINE_IN, pCfg);
2609 break;
2610
2611 case PO_INDEX:
2612 rc = pThis->pfnOpenOut(pThis->pHDAState, "hda.out", pCfg);
2613 break;
2614
2615#ifdef VBOX_WITH_HDA_MIC_IN
2616 case MC_INDEX:
2617 rc = pThis->pfnOpenIn(pThis->pHDAState, "hda.mc", PDMAUDIORECSOURCE_MIC, pCfg);
2618 break;
2619#endif
2620 default:
2621 AssertMsgFailed(("Index %ld not implemented\n", enmSoundSource));
2622 rc = VERR_NOT_IMPLEMENTED;
2623 }
2624
2625 LogFlowFuncLeaveRC(rc);
2626 return rc;
2627}
2628
2629int hdaCodecSaveState(PHDACODEC pThis, PSSMHANDLE pSSM)
2630{
2631 AssertLogRelMsgReturn(pThis->cTotalNodes == 0x1c, ("cTotalNodes=%#x, should be 0x1c", pThis->cTotalNodes),
2632 VERR_INTERNAL_ERROR);
2633 SSMR3PutU32(pSSM, pThis->cTotalNodes);
2634 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
2635 SSMR3PutStructEx(pSSM, &pThis->paNodes[idxNode].SavedState, sizeof(pThis->paNodes[idxNode].SavedState),
2636 0 /*fFlags*/, g_aCodecNodeFields, NULL /*pvUser*/);
2637 return VINF_SUCCESS;
2638}
2639
2640int hdaCodecLoadState(PHDACODEC pThis, PSSMHANDLE pSSM, uint32_t uVersion)
2641{
2642 PCSSMFIELD pFields;
2643 uint32_t fFlags;
2644 switch (uVersion)
2645 {
2646 case HDA_SSM_VERSION_1:
2647 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2648 pFields = g_aCodecNodeFieldsV1;
2649 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
2650 break;
2651
2652 case HDA_SSM_VERSION_2:
2653 case HDA_SSM_VERSION_3:
2654 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2655 pFields = g_aCodecNodeFields;
2656 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
2657 break;
2658
2659 case HDA_SSM_VERSION:
2660 {
2661 uint32_t cNodes;
2662 int rc2 = SSMR3GetU32(pSSM, &cNodes);
2663 AssertRCReturn(rc2, rc2);
2664 if (cNodes != 0x1c)
2665 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
2666 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2667
2668 pFields = g_aCodecNodeFields;
2669 fFlags = 0;
2670 break;
2671 }
2672
2673 default:
2674 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2675 }
2676
2677 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
2678 {
2679 uint8_t idOld = pThis->paNodes[idxNode].SavedState.Core.id;
2680 int rc = SSMR3GetStructEx(pSSM, &pThis->paNodes[idxNode].SavedState,
2681 sizeof(pThis->paNodes[idxNode].SavedState),
2682 fFlags, pFields, NULL);
2683 if (RT_FAILURE(rc))
2684 return rc;
2685 AssertLogRelMsgReturn(idOld == pThis->paNodes[idxNode].SavedState.Core.id,
2686 ("loaded %#x, expected \n", pThis->paNodes[idxNode].SavedState.Core.id, idOld),
2687 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2688 }
2689
2690 /*
2691 * Update stuff after changing the state.
2692 */
2693 if (hdaCodecIsDacNode(pThis, pThis->u8DacLineOut))
2694 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_PCM);
2695 else if (hdaCodecIsSpdifOutNode(pThis, pThis->u8DacLineOut))
2696 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].spdifout.B_params, PDMAUDIOMIXERCTL_PCM);
2697 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
2698
2699 return VINF_SUCCESS;
2700}
2701
2702int hdaCodecDestruct(PHDACODEC pThis)
2703{
2704 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2705
2706 if (pThis->paNodes)
2707 {
2708 RTMemFree(pThis->paNodes);
2709 pThis->paNodes = NULL;
2710 }
2711
2712 return VINF_SUCCESS;
2713}
2714
2715int hdaCodecConstruct(PPDMDEVINS pDevIns, PHDACODEC pThis,
2716 uint16_t uLUN, PCFGMNODE pCfg)
2717{
2718 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
2719 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2720 AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
2721
2722 pThis->id = uLUN;
2723 pThis->paVerbs = &g_aCodecVerbs[0];
2724 pThis->cVerbs = RT_ELEMENTS(g_aCodecVerbs);
2725 pThis->pfnLookup = codecLookup;
2726#ifdef DEBUG
2727 pThis->pfnDbgSelector = codecDbgSelector;
2728 pThis->pfnDbgListNodes = codecDbgListNodes;
2729#endif
2730 int rc = stac9220Construct(pThis);
2731 AssertRC(rc);
2732
2733 /* common root node initializers */
2734 pThis->paNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pThis->u16VendorId, pThis->u16DeviceId);
2735 pThis->paNodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);
2736 /* common AFG node initializers */
2737 pThis->paNodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pThis->cTotalNodes - 2);
2738 pThis->paNodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);
2739 pThis->paNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pThis->u16VendorId, pThis->u8BSKU, pThis->u8AssemblyId);
2740
2741 /* 44.1 kHz. */
2742 PDMAUDIOSTREAMCFG as;
2743 as.uHz = 44100;
2744 as.cChannels = 2;
2745 as.enmFormat = AUD_FMT_S16;
2746 as.enmEndianness = PDMAUDIOHOSTENDIANNESS;
2747
2748 pThis->paNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT;
2749
2750 hdaCodecOpenStream(pThis, PI_INDEX, &as);
2751 hdaCodecOpenStream(pThis, PO_INDEX, &as);
2752#ifdef VBOX_WITH_HDA_MIC_IN
2753 hdaCodecOpenStream(pThis, MC_INDEX, &as);
2754#endif
2755
2756 pThis->paNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ;
2757
2758 uint8_t i;
2759 Assert(pThis->paNodes);
2760 Assert(pThis->pfnCodecNodeReset);
2761
2762 for (i = 0; i < pThis->cTotalNodes; ++i)
2763 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
2764
2765 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_PCM);
2766 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
2767
2768 return VINF_SUCCESS;
2769}
2770
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