VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevIchHdaCodec.cpp@ 56992

Last change on this file since 56992 was 56992, checked in by vboxsync, 9 years ago

Devices: Log & Assertion formatting fixes.
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1/* $Id: DevIchHdaCodec.cpp 56992 2015-07-18 23:01:44Z vboxsync $ */
2/** @file
3 * DevIchHdaCodec - VBox ICH Intel HD Audio Codec.
4 *
5 * Implemented against "Intel I/O Controller Hub 6 (ICH6) High Definition
6 * Audio / AC '97 - Programmer's Reference Manual (PRM)", document number
7 * 302349-003.
8 */
9
10/*
11 * Copyright (C) 2006-2015 Oracle Corporation
12 *
13 * This file is part of VirtualBox Open Source Edition (OSE), as
14 * available from http://www.virtualbox.org. This file is free software;
15 * you can redistribute it and/or modify it under the terms of the GNU
16 * General Public License (GPL) as published by the Free Software
17 * Foundation, in version 2 as it comes in the "COPYING" file of the
18 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
19 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_DEV_HDA_CODEC
27#include <VBox/vmm/pdmdev.h>
28#include <VBox/vmm/pdmaudioifs.h>
29#include <iprt/assert.h>
30#include <iprt/uuid.h>
31#include <iprt/string.h>
32#include <iprt/mem.h>
33#include <iprt/asm.h>
34#include <iprt/cpp/utils.h>
35
36#include "VBoxDD.h"
37#include "DevIchHdaCodec.h"
38
39
40/*******************************************************************************
41* Defined Constants And Macros *
42*******************************************************************************/
43/* PRM 5.3.1 */
44/** Codec address mask. */
45#define CODEC_CAD_MASK 0xF0000000
46/** Codec address shift. */
47#define CODEC_CAD_SHIFT 28
48#define CODEC_DIRECT_MASK RT_BIT(27)
49/** Node ID mask. */
50#define CODEC_NID_MASK 0x07F00000
51/** Node ID shift. */
52#define CODEC_NID_SHIFT 20
53#define CODEC_VERBDATA_MASK 0x000FFFFF
54#define CODEC_VERB_4BIT_CMD 0x000FFFF0
55#define CODEC_VERB_4BIT_DATA 0x0000000F
56#define CODEC_VERB_8BIT_CMD 0x000FFF00
57#define CODEC_VERB_8BIT_DATA 0x000000FF
58#define CODEC_VERB_16BIT_CMD 0x000F0000
59#define CODEC_VERB_16BIT_DATA 0x0000FFFF
60
61#define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT)
62#define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)
63#define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)
64#define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)
65#define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))
66#define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))
67#define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))
68#define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))
69#define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)
70#define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)
71#define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)
72
73#define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)
74#define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)
75#define CODEC_VERB_GET_AMP_INDEX 0x7
76
77/* HDA spec 7.3.3.7 NoteA */
78#define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)
79#define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)
80#define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))
81
82/* HDA spec 7.3.3.7 NoteC */
83#define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15)
84#define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14)
85#define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13)
86#define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12)
87#define CODEC_VERB_SET_AMP_INDEX (0x7 << 8)
88#define CODEC_VERB_SET_AMP_MUTE RT_BIT(7)
89/** Note: 7-bit value [6:0]. */
90#define CODEC_VERB_SET_AMP_GAIN 0x7F
91
92#define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)
93#define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)
94#define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)
95#define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)
96#define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)
97#define CODEC_SET_AMP_MUTE(cmd) ((cmd) & CODEC_VERB_SET_AMP_MUTE)
98#define CODEC_SET_AMP_GAIN(cmd) ((cmd) & CODEC_VERB_SET_AMP_GAIN)
99
100/* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */
101/* VendorID (7.3.4.1) */
102#define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))
103#define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)
104#define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)
105/* RevisionID (7.3.4.2)*/
106#define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID))
107/* Subordinate node count (7.3.4.3)*/
108#define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))
109#define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)
110#define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)
111/*
112 * Function Group Type (7.3.4.4)
113 * 0 & [0x3-0x7f] are reserved types
114 * [0x80 - 0xff] are vendor defined function groups
115 */
116#define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))
117#define CODEC_F00_05_UNSOL RT_BIT(8)
118#define CODEC_F00_05_AFG (0x1)
119#define CODEC_F00_05_MFG (0x2)
120#define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))
121#define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)
122/* Audio Function Group capabilities (7.3.4.5) */
123#define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))
124#define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)
125
126/* Widget Capabilities (7.3.4.6) */
127#define CODEC_MAKE_F00_09(type, delay, chanel_count) \
128 ( (((type) & 0xF) << 20) \
129 | (((delay) & 0xF) << 16) \
130 | (((chanel_count) & 0xF) << 13))
131/* note: types 0x8-0xe are reserved */
132#define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)
133#define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)
134#define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)
135#define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)
136#define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)
137#define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)
138#define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)
139#define CODEC_F00_09_TYPE_BEEP_GEN (0x7)
140#define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)
141
142#define CODEC_F00_09_CAP_CP RT_BIT(12)
143#define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)
144#define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)
145#define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)
146#define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)
147#define CODEC_F00_09_CAP_UNSOL RT_BIT(7)
148#define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)
149#define CODEC_F00_09_CAP_STRIPE RT_BIT(5)
150#define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)
151#define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)
152#define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)
153#define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)
154#define CODEC_F00_09_CAP_LSB RT_BIT(0)
155
156#define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)
157
158#define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))
159#define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))
160#define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))
161#define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))
162#define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))
163#define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))
164#define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))
165#define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))
166#define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))
167#define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))
168#define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))
169#define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))
170#define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))
171
172/* Supported PCM size, rates (7.3.4.7) */
173#define CODEC_F00_0A_32_BIT RT_BIT(19)
174#define CODEC_F00_0A_24_BIT RT_BIT(18)
175#define CODEC_F00_0A_16_BIT RT_BIT(17)
176#define CODEC_F00_0A_8_BIT RT_BIT(16)
177
178#define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)
179#define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)
180#define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)
181#define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)
182#define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)
183#define CODEC_F00_0A_48KHZ RT_BIT(6)
184#define CODEC_F00_0A_44_1KHZ RT_BIT(5)
185/* 2/3 * 48kHz */
186#define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)
187/* 1/2 * 44.1kHz */
188#define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)
189/* 1/3 * 48kHz */
190#define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)
191/* 1/4 * 44.1kHz */
192#define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)
193/* 1/6 * 48kHz */
194#define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)
195
196/* Supported streams formats (7.3.4.8) */
197#define CODEC_F00_0B_AC3 RT_BIT(2)
198#define CODEC_F00_0B_FLOAT32 RT_BIT(1)
199#define CODEC_F00_0B_PCM RT_BIT(0)
200
201/* Pin Capabilities (7.3.4.9)*/
202#define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)
203#define CODEC_F00_0C_CAP_HBR RT_BIT(27)
204#define CODEC_F00_0C_CAP_DP RT_BIT(24)
205#define CODEC_F00_0C_CAP_EAPD RT_BIT(16)
206#define CODEC_F00_0C_CAP_HDMI RT_BIT(7)
207#define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)
208#define CODEC_F00_0C_CAP_INPUT RT_BIT(5)
209#define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)
210#define CODEC_F00_0C_CAP_HP RT_BIT(3)
211#define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2)
212#define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)
213#define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)
214
215#define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27))
216#define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24))
217#define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16))
218#define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7))
219#define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6))
220#define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5))
221#define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4))
222#define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3))
223#define CODEC_F00_0C_IS_CAP_PRESENSE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2))
224#define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1))
225#define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0))
226
227/* Input Amplifier capabilities (7.3.4.10) */
228#define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \
229 ( (((mute_cap) & 0x1) << 31) \
230 | (((step_size) & 0xFF) << 16) \
231 | (((num_steps) & 0xFF) << 8) \
232 | ((offset) & 0xFF))
233
234#define CODEC_F00_0D_CAP_MUTE RT_BIT(7)
235
236#define CODEC_F00_0D_IS_CAP_MUTE(f00_0d) ( ( f00_0d) & RT_BIT(31))
237#define CODEC_F00_0D_STEP_SIZE(f00_0d) ((( f00_0d) & (0x7F << 16)) >> 16)
238#define CODEC_F00_0D_NUM_STEPS(f00_0d) ((((f00_0d) & (0x7F << 8)) >> 8) + 1)
239#define CODEC_F00_0D_OFFSET(f00_0d) ( (f00_0d) & 0x7F)
240
241/* Output Amplifier capabilities (7.3.4.10) */
242#define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D
243
244#define CODEC_F00_12_IS_CAP_MUTE(f00_12) CODEC_F00_0D_IS_CAP_MUTE(f00_12)
245#define CODEC_F00_12_STEP_SIZE(f00_12) CODEC_F00_0D_STEP_SIZE(f00_12)
246#define CODEC_F00_12_NUM_STEPS(f00_12) CODEC_F00_0D_NUM_STEPS(f00_12)
247#define CODEC_F00_12_OFFSET(f00_12) CODEC_F00_0D_OFFSET(f00_12)
248
249/* Connection list lenght (7.3.4.11) */
250#define CODEC_MAKE_F00_0E(long_form, length) \
251 ( (((long_form) & 0x1) << 7) \
252 | ((length) & 0x7F))
253/* Indicates short-form NIDs. */
254#define CODEC_F00_0E_LIST_NID_SHORT 0
255/* Indicates long-form NIDs. */
256#define CODEC_F00_0E_LIST_NID_LONG 1
257#define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7))
258#define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F)
259/* Supported Power States (7.3.4.12) */
260#define CODEC_F00_0F_EPSS RT_BIT(31)
261#define CODEC_F00_0F_CLKSTOP RT_BIT(30)
262#define CODEC_F00_0F_S3D3 RT_BIT(29)
263#define CODEC_F00_0F_D3COLD RT_BIT(4)
264#define CODEC_F00_0F_D3 RT_BIT(3)
265#define CODEC_F00_0F_D2 RT_BIT(2)
266#define CODEC_F00_0F_D1 RT_BIT(1)
267#define CODEC_F00_0F_D0 RT_BIT(0)
268
269/* Processing capabilities 7.3.4.13 */
270#define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))
271#define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)
272#define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)
273
274/* CP/IO Count (7.3.4.14) */
275#define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \
276 ( (((wake) & 0x1) << 31) \
277 | (((unsol) & 0x1) << 30) \
278 | (((numgpi) & 0xFF) << 16) \
279 | (((numgpo) & 0xFF) << 8) \
280 | ((numgpio) & 0xFF))
281
282/* Processing States (7.3.3.4) */
283#define CODEC_F03_OFF (0)
284#define CODEC_F03_ON RT_BIT(0)
285#define CODEC_F03_BENING RT_BIT(1)
286/* Power States (7.3.3.10) */
287#define CODEC_MAKE_F05(reset, stopok, error, act, set) \
288 ( (((reset) & 0x1) << 10) \
289 | (((stopok) & 0x1) << 9) \
290 | (((error) & 0x1) << 8) \
291 | (((act) & 0x7) << 4) \
292 | ((set) & 0x7))
293#define CODEC_F05_D3COLD (4)
294#define CODEC_F05_D3 (3)
295#define CODEC_F05_D2 (2)
296#define CODEC_F05_D1 (1)
297#define CODEC_F05_D0 (0)
298
299#define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)
300#define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)
301#define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)
302#define CODEC_F05_ACT(value) (((value) & 0x7) >> 4)
303#define CODEC_F05_SET(value) (((value) & 0x7))
304
305#define CODEC_F05_GE(p0, p1) ((p0) <= (p1))
306#define CODEC_F05_LE(p0, p1) ((p0) >= (p1))
307
308/* Pin Widged Control (7.3.3.13) */
309#define CODEC_F07_VREF_HIZ (0)
310#define CODEC_F07_VREF_50 (0x1)
311#define CODEC_F07_VREF_GROUND (0x2)
312#define CODEC_F07_VREF_80 (0x4)
313#define CODEC_F07_VREF_100 (0x5)
314#define CODEC_F07_IN_ENABLE RT_BIT(5)
315#define CODEC_F07_OUT_ENABLE RT_BIT(6)
316#define CODEC_F07_OUT_H_ENABLE RT_BIT(7)
317
318/* Unsolicited enabled (7.3.3.14) */
319#define CODEC_MAKE_F08(enable, tag) ((((enable) & 1) << 7) | ((tag) & 0x3F))
320
321/* Converter formats (7.3.3.8) and (3.7.1) */
322#define CODEC_MAKE_A(fNonPCM, f44_1BaseRate, mult, div, bits, chan) \
323 ( (((fNonPCM) & 0x1) << 15) \
324 | (((f44_1BaseRate) & 0x1) << 14) \
325 | (((mult) & 0x7) << 11) \
326 | (((div) & 0x7) << 8) \
327 | (((bits) & 0x7) << 4) \
328 | ((chan) & 0xF))
329
330#define CODEC_A_TYPE RT_BIT(15)
331#define CODEC_A_TYPE_PCM (0)
332#define CODEC_A_TYPE_NON_PCM (1)
333
334#define CODEC_A_BASE RT_BIT(14)
335#define CODEC_A_BASE_48KHZ (0)
336#define CODEC_A_BASE_44KHZ (1)
337
338#define CODEC_A_MULT_1X (0)
339#define CODEC_A_MULT_2X (1)
340#define CODEC_A_MULT_3X (2)
341#define CODEC_A_MULT_4X (3)
342
343#define CODEC_A_DIV_1X (0)
344#define CODEC_A_DIV_2X (1)
345#define CODEC_A_DIV_3X (2)
346#define CODEC_A_DIV_4X (3)
347#define CODEC_A_DIV_5X (4)
348#define CODEC_A_DIV_6X (5)
349#define CODEC_A_DIV_7X (6)
350#define CODEC_A_DIV_8X (7)
351
352#define CODEC_A_8_BIT (0)
353#define CODEC_A_16_BIT (1)
354#define CODEC_A_20_BIT (2)
355#define CODEC_A_24_BIT (3)
356#define CODEC_A_32_BIT (4)
357
358#define CODEC_A_CHAN_MONO (0)
359#define CODEC_A_CHAN_STEREO (1)
360
361/* Pin Sense (7.3.3.15) */
362#define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \
363( (((fPresent) & 0x1) << 31) \
364 | (((impedance) & 0x7FFFFFFF)))
365#define CODEC_F09_ANALOG_NA 0x7FFFFFFF
366#define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \
367( (((fPresent) & 0x1) << 31) \
368 | (((fELDValid) & 0x1) << 30))
369
370#define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1))
371#define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2))
372#define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1))
373#define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0))
374/* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */
375/* Configuration's port connection */
376#define CODEC_F1C_PORT_MASK (0x3)
377#define CODEC_F1C_PORT_SHIFT (30)
378
379#define CODEC_F1C_PORT_COMPLEX (0x0)
380#define CODEC_F1C_PORT_NO_PHYS (0x1)
381#define CODEC_F1C_PORT_FIXED (0x2)
382#define CODEC_F1C_BOTH (0x3)
383
384/* Configuration default: connection */
385#define CODEC_F1C_PORT_MASK (0x3)
386#define CODEC_F1C_PORT_SHIFT (30)
387
388/* Connected to a jack (1/8", ATAPI, ...). */
389#define CODEC_F1C_PORT_COMPLEX (0x0)
390/* No physical connection. */
391#define CODEC_F1C_PORT_NO_PHYS (0x1)
392/* Fixed function device (integrated speaker, integrated mic, ...). */
393#define CODEC_F1C_PORT_FIXED (0x2)
394/* Both, a jack and an internal device are attached. */
395#define CODEC_F1C_BOTH (0x3)
396
397/* Configuration default: Location */
398#define CODEC_F1C_LOCATION_MASK (0x3F)
399#define CODEC_F1C_LOCATION_SHIFT (24)
400
401/* [4:5] bits of location region means chassis attachment */
402#define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)
403#define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)
404#define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)
405#define CODEC_F1C_LOCATION_OTHER RT_BIT(5)
406
407/* [0:3] bits of location region means geometry location attachment */
408#define CODEC_F1C_LOCATION_NA (0)
409#define CODEC_F1C_LOCATION_REAR (0x1)
410#define CODEC_F1C_LOCATION_FRONT (0x2)
411#define CODEC_F1C_LOCATION_LEFT (0x3)
412#define CODEC_F1C_LOCATION_RIGTH (0x4)
413#define CODEC_F1C_LOCATION_TOP (0x5)
414#define CODEC_F1C_LOCATION_BOTTOM (0x6)
415#define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)
416#define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)
417#define CODEC_F1C_LOCATION_SPECIAL_2 (0x9)
418
419/* Configuration default: Device type */
420#define CODEC_F1C_DEVICE_MASK (0xF)
421#define CODEC_F1C_DEVICE_SHIFT (20)
422#define CODEC_F1C_DEVICE_LINE_OUT (0)
423#define CODEC_F1C_DEVICE_SPEAKER (0x1)
424#define CODEC_F1C_DEVICE_HP (0x2)
425#define CODEC_F1C_DEVICE_CD (0x3)
426#define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)
427#define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)
428#define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)
429#define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)
430#define CODEC_F1C_DEVICE_LINE_IN (0x8)
431#define CODEC_F1C_DEVICE_AUX (0x9)
432#define CODEC_F1C_DEVICE_MIC (0xA)
433#define CODEC_F1C_DEVICE_PHONE (0xB)
434#define CODEC_F1C_DEVICE_SPDIF_IN (0xC)
435#define CODEC_F1C_DEVICE_RESERVED (0xE)
436#define CODEC_F1C_DEVICE_OTHER (0xF)
437
438/* Configuration default: Connection type */
439#define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)
440#define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)
441
442#define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)
443#define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)
444#define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)
445#define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)
446#define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)
447#define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)
448#define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)
449#define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)
450#define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)
451#define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)
452#define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)
453#define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)
454#define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)
455
456/* Configuration's color */
457#define CODEC_F1C_COLOR_MASK (0xF)
458#define CODEC_F1C_COLOR_SHIFT (12)
459#define CODEC_F1C_COLOR_UNKNOWN (0)
460#define CODEC_F1C_COLOR_BLACK (0x1)
461#define CODEC_F1C_COLOR_GREY (0x2)
462#define CODEC_F1C_COLOR_BLUE (0x3)
463#define CODEC_F1C_COLOR_GREEN (0x4)
464#define CODEC_F1C_COLOR_RED (0x5)
465#define CODEC_F1C_COLOR_ORANGE (0x6)
466#define CODEC_F1C_COLOR_YELLOW (0x7)
467#define CODEC_F1C_COLOR_PURPLE (0x8)
468#define CODEC_F1C_COLOR_PINK (0x9)
469#define CODEC_F1C_COLOR_RESERVED_0 (0xA)
470#define CODEC_F1C_COLOR_RESERVED_1 (0xB)
471#define CODEC_F1C_COLOR_RESERVED_2 (0xC)
472#define CODEC_F1C_COLOR_RESERVED_3 (0xD)
473#define CODEC_F1C_COLOR_WHITE (0xE)
474#define CODEC_F1C_COLOR_OTHER (0xF)
475
476/* Configuration's misc */
477#define CODEC_F1C_MISC_MASK (0xF)
478#define CODEC_F1C_MISC_SHIFT (8)
479#define CODEC_F1C_MISC_JACK_DETECT (0)
480#define CODEC_F1C_MISC_RESERVED_0 (1)
481#define CODEC_F1C_MISC_RESERVED_1 (2)
482#define CODEC_F1C_MISC_RESERVED_2 (3)
483
484/* Configuration default: Association */
485#define CODEC_F1C_ASSOCIATION_MASK (0xF)
486#define CODEC_F1C_ASSOCIATION_SHIFT (4)
487
488/* Reserved; don't use. */
489#define CODEC_F1C_ASSOCIATION_INVALID 0x0
490#define CODEC_F1C_ASSOCIATION_GROUP_0 0x1
491#define CODEC_F1C_ASSOCIATION_GROUP_1 0x2
492#define CODEC_F1C_ASSOCIATION_GROUP_2 0x3
493#define CODEC_F1C_ASSOCIATION_GROUP_3 0x4
494#define CODEC_F1C_ASSOCIATION_GROUP_4 0x5
495#define CODEC_F1C_ASSOCIATION_GROUP_5 0x6
496#define CODEC_F1C_ASSOCIATION_GROUP_6 0x7
497#define CODEC_F1C_ASSOCIATION_GROUP_7 0x8
498#define CODEC_F1C_ASSOCIATION_GROUP_15 0xF
499
500/* Configuration default: Association Sequence */
501#define CODEC_F1C_SEQ_MASK (0xF)
502#define CODEC_F1C_SEQ_SHIFT (0)
503
504/* Implementation identification (7.3.3.30) */
505#define CODEC_MAKE_F20(bmid, bsku, aid) \
506 ( (((bmid) & 0xFFFF) << 16) \
507 | (((bsku) & 0xFF) << 8) \
508 | (((aid) & 0xFF)) \
509 )
510
511/* macro definition helping in filling the configuration registers. */
512#define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \
513 ( ((port_connectivity) << CODEC_F1C_PORT_SHIFT) \
514 | ((location) << CODEC_F1C_LOCATION_SHIFT) \
515 | ((device) << CODEC_F1C_DEVICE_SHIFT) \
516 | ((connection_type) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \
517 | ((color) << CODEC_F1C_COLOR_SHIFT) \
518 | ((misc) << CODEC_F1C_MISC_SHIFT) \
519 | ((association) << CODEC_F1C_ASSOCIATION_SHIFT) \
520 | ((sequence)))
521
522
523/*******************************************************************************
524* Structures and Typedefs *
525*******************************************************************************/
526/** The F00 parameter length (in dwords). */
527#define CODECNODE_F00_PARAM_LENGTH 20
528/** The F02 parameter length (in dwords). */
529#define CODECNODE_F02_PARAM_LENGTH 16
530
531/**
532 * Common (or core) codec node structure.
533 */
534typedef struct CODECCOMMONNODE
535{
536 /** Node id - 7 bit format */
537 uint8_t id;
538 /** The node name. */
539 char const *pszName;
540 /* PRM 5.3.6 */
541 uint32_t au32F00_param[CODECNODE_F00_PARAM_LENGTH];
542 uint32_t au32F02_param[CODECNODE_F02_PARAM_LENGTH];
543} CODECCOMMONNODE;
544typedef CODECCOMMONNODE *PCODECCOMMONNODE;
545AssertCompile(CODECNODE_F00_PARAM_LENGTH == 20); /* saved state */
546AssertCompile(CODECNODE_F02_PARAM_LENGTH == 16); /* saved state */
547
548/**
549 * Compile time assertion on the expected node size.
550 */
551#define AssertNodeSize(a_Node, a_cParams) \
552 AssertCompile((a_cParams) <= (60 + 6)); /* the max size - saved state */ \
553 AssertCompile( sizeof(a_Node) - sizeof(CODECCOMMONNODE) \
554 == (((a_cParams) * sizeof(uint32_t) + sizeof(void *) - 1) & ~(sizeof(void *) - 1)) )
555
556typedef struct ROOTCODECNODE
557{
558 CODECCOMMONNODE node;
559} ROOTCODECNODE, *PROOTCODECNODE;
560AssertNodeSize(ROOTCODECNODE, 0);
561
562#define AMPLIFIER_SIZE 60
563typedef uint32_t AMPLIFIER[AMPLIFIER_SIZE];
564#define AMPLIFIER_IN 0
565#define AMPLIFIER_OUT 1
566#define AMPLIFIER_LEFT 1
567#define AMPLIFIER_RIGHT 0
568#define AMPLIFIER_REGISTER(amp, inout, side, index) ((amp)[30*(inout) + 15*(side) + (index)])
569typedef struct DACNODE
570{
571 CODECCOMMONNODE node;
572 uint32_t u32F0d_param;
573 uint32_t u32F04_param;
574 uint32_t u32F05_param;
575 uint32_t u32F06_param;
576 uint32_t u32F0c_param;
577
578 uint32_t u32A_param;
579 AMPLIFIER B_params;
580
581} DACNODE, *PDACNODE;
582AssertNodeSize(DACNODE, 6 + 60);
583
584typedef struct ADCNODE
585{
586 CODECCOMMONNODE node;
587 uint32_t u32F03_param;
588 uint32_t u32F05_param;
589 uint32_t u32F06_param;
590 uint32_t u32F09_param;
591
592 uint32_t u32A_param;
593 uint32_t u32F01_param;
594 AMPLIFIER B_params;
595} ADCNODE, *PADCNODE;
596AssertNodeSize(DACNODE, 6 + 60);
597
598typedef struct SPDIFOUTNODE
599{
600 CODECCOMMONNODE node;
601 uint32_t u32F05_param;
602 uint32_t u32F06_param;
603 uint32_t u32F09_param;
604 uint32_t u32F0d_param;
605
606 uint32_t u32A_param;
607 AMPLIFIER B_params;
608} SPDIFOUTNODE, *PSPDIFOUTNODE;
609AssertNodeSize(SPDIFOUTNODE, 5 + 60);
610
611typedef struct SPDIFINNODE
612{
613 CODECCOMMONNODE node;
614 uint32_t u32F05_param;
615 uint32_t u32F06_param;
616 uint32_t u32F09_param;
617 uint32_t u32F0d_param;
618
619 uint32_t u32A_param;
620 AMPLIFIER B_params;
621} SPDIFINNODE, *PSPDIFINNODE;
622AssertNodeSize(SPDIFINNODE, 5 + 60);
623
624typedef struct AFGCODECNODE
625{
626 CODECCOMMONNODE node;
627 uint32_t u32F05_param;
628 uint32_t u32F08_param;
629 uint32_t u32F20_param;
630 uint32_t u32F17_param;
631} AFGCODECNODE, *PAFGCODECNODE;
632AssertNodeSize(AFGCODECNODE, 4);
633
634typedef struct PORTNODE
635{
636 CODECCOMMONNODE node;
637 uint32_t u32F07_param;
638 uint32_t u32F08_param;
639 uint32_t u32F09_param;
640 uint32_t u32F01_param;
641 uint32_t u32F1c_param;
642 AMPLIFIER B_params;
643} PORTNODE, *PPORTNODE;
644AssertNodeSize(PORTNODE, 5 + 60);
645
646typedef struct DIGOUTNODE
647{
648 CODECCOMMONNODE node;
649 uint32_t u32F01_param;
650 uint32_t u32F08_param;
651 uint32_t u32F07_param;
652 uint32_t u32F09_param;
653 uint32_t u32F1c_param;
654} DIGOUTNODE, *PDIGOUTNODE;
655AssertNodeSize(DIGOUTNODE, 5);
656
657typedef struct DIGINNODE
658{
659 CODECCOMMONNODE node;
660 uint32_t u32F05_param;
661 uint32_t u32F07_param;
662 uint32_t u32F08_param;
663 uint32_t u32F09_param;
664 uint32_t u32F0c_param;
665 uint32_t u32F1c_param;
666 uint32_t u32F1e_param;
667} DIGINNODE, *PDIGINNODE;
668AssertNodeSize(DIGINNODE, 7);
669
670typedef struct ADCMUXNODE
671{
672 CODECCOMMONNODE node;
673 uint32_t u32F01_param;
674
675 uint32_t u32A_param;
676 AMPLIFIER B_params;
677} ADCMUXNODE, *PADCMUXNODE;
678AssertNodeSize(ADCMUXNODE, 2 + 60);
679
680typedef struct PCBEEPNODE
681{
682 CODECCOMMONNODE node;
683 uint32_t u32F07_param;
684 uint32_t u32F0a_param;
685
686 uint32_t u32A_param;
687 AMPLIFIER B_params;
688 uint32_t u32F1c_param;
689} PCBEEPNODE, *PPCBEEPNODE;
690AssertNodeSize(PCBEEPNODE, 3 + 60 + 1);
691
692typedef struct CDNODE
693{
694 CODECCOMMONNODE node;
695 uint32_t u32F07_param;
696 uint32_t u32F1c_param;
697} CDNODE, *PCDNODE;
698AssertNodeSize(CDNODE, 2);
699
700typedef struct VOLUMEKNOBNODE
701{
702 CODECCOMMONNODE node;
703 uint32_t u32F08_param;
704 uint32_t u32F0f_param;
705} VOLUMEKNOBNODE, *PVOLUMEKNOBNODE;
706AssertNodeSize(VOLUMEKNOBNODE, 2);
707
708typedef struct ADCVOLNODE
709{
710 CODECCOMMONNODE node;
711 uint32_t u32F0c_param;
712 uint32_t u32F01_param;
713 uint32_t u32A_params;
714 AMPLIFIER B_params;
715} ADCVOLNODE, *PADCVOLNODE;
716AssertNodeSize(ADCVOLNODE, 3 + 60);
717
718typedef struct RESNODE
719{
720 CODECCOMMONNODE node;
721 uint32_t u32F05_param;
722 uint32_t u32F06_param;
723 uint32_t u32F07_param;
724 uint32_t u32F1c_param;
725} RESNODE, *PRESNODE;
726AssertNodeSize(RESNODE, 4);
727
728/**
729 * Used for the saved state.
730 */
731typedef struct CODECSAVEDSTATENODE
732{
733 CODECCOMMONNODE Core;
734 uint32_t au32Params[60 + 6];
735} CODECSAVEDSTATENODE;
736AssertNodeSize(CODECSAVEDSTATENODE, 60 + 6);
737
738typedef union CODECNODE
739{
740 CODECCOMMONNODE node;
741 ROOTCODECNODE root;
742 AFGCODECNODE afg;
743 DACNODE dac;
744 ADCNODE adc;
745 SPDIFOUTNODE spdifout;
746 SPDIFINNODE spdifin;
747 PORTNODE port;
748 DIGOUTNODE digout;
749 DIGINNODE digin;
750 ADCMUXNODE adcmux;
751 PCBEEPNODE pcbeep;
752 CDNODE cdnode;
753 VOLUMEKNOBNODE volumeKnob;
754 ADCVOLNODE adcvol;
755 RESNODE reserved;
756 CODECSAVEDSTATENODE SavedState;
757} CODECNODE, *PCODECNODE;
758AssertNodeSize(CODECNODE, 60 + 6);
759/*******************************************************************************
760* Global Variables *
761*******************************************************************************/
762/* STAC9220 - Nodes IDs / names. */
763#define STAC9220_NID_ROOT 0x0 /* Root node */
764#define STAC9220_NID_AFG 0x1 /* Audio Configuration Group */
765#define STAC9220_NID_DAC0 0x2 /* Out */
766#define STAC9220_NID_DAC1 0x3 /* Out */
767#define STAC9220_NID_DAC2 0x4 /* Out */
768#define STAC9220_NID_DAC3 0x5 /* Out */
769#define STAC9220_NID_ADC0 0x6 /* In */
770#define STAC9220_NID_ADC1 0x7 /* In */
771#define STAC9220_NID_SPDIF_OUT 0x8 /* Out */
772#define STAC9220_NID_SPDIF_IN 0x9 /* In */
773#define STAC9220_NID_PIN_HEADPHONE0 0xA /* In, Out */
774#define STAC9220_NID_PIN_B 0xB /* In, Out */
775#define STAC9220_NID_PIN_C 0xC /* In, Out */
776#define STAC9220_NID_PIN_HEADPHONE1 0xD /* In, Out */
777#define STAC9220_NID_PIN_E 0xE /* In */
778#define STAC9220_NID_PIN_F 0xF /* In, Out */
779#define STAC9220_NID_PIN_SPDIF_OUT 0x10 /* Out */
780#define STAC9220_NID_PIN_SPDIF_IN 0x11 /* In */
781#define STAC9220_NID_ADC0_MUX 0x12 /* In */
782#define STAC9220_NID_ADC1_MUX 0x13 /* In */
783#define STAC9220_NID_PCBEEP 0x14 /* Out */
784#define STAC9220_NID_PIN_CD 0x15 /* In */
785#define STAC9220_NID_VOL_KNOB 0x16
786#define STAC9220_NID_AMP_ADC0 0x17 /* In */
787#define STAC9220_NID_AMP_ADC1 0x18 /* In */
788/* STAC9221. */
789#define STAC9221_NID_ADAT_OUT 0x19 /* Out */
790#define STAC9221_NID_I2S_OUT 0x1A /* Out */
791#define STAC9221_NID_PIN_I2S_OUT 0x1B /* Out */
792
793#if 1
794/* STAC9220 - Referenced thru STAC9220WIDGET in the constructor below. */
795static uint8_t const g_abStac9220Ports[] = { 0x0A, 0xB, 0xC, 0xD, 0xE, 0xF, 0};
796static uint8_t const g_abStac9220Dacs[] = { 0x02, 0x3, 0x4, 0x5, 0};
797static uint8_t const g_abStac9220Adcs[] = { 0x06, 0x7, 0};
798static uint8_t const g_abStac9220SpdifOuts[] = { 0x08, 0 };
799static uint8_t const g_abStac9220SpdifIns[] = { 0x09, 0 };
800static uint8_t const g_abStac9220DigOutPins[] = { 0x10, 0 };
801static uint8_t const g_abStac9220DigInPins[] = { 0x11, 0 };
802static uint8_t const g_abStac9220AdcVols[] = { 0x17, 0x18, 0};
803static uint8_t const g_abStac9220AdcMuxs[] = { 0x12, 0x13, 0};
804static uint8_t const g_abStac9220Pcbeeps[] = { 0x14, 0 };
805static uint8_t const g_abStac9220Cds[] = { 0x15, 0 };
806static uint8_t const g_abStac9220VolKnobs[] = { 0x16, 0 };
807static uint8_t const g_abStac9220Reserveds[] = { 0x09, 0x19, 0x1a, 0x1b, 0 };
808#else /** @todo Enable this after 5.0 -- needs more testing first. */
809static uint8_t const g_abStac9220Ports[] = { STAC9220_NID_PIN_HEADPHONE0, STAC9220_NID_PIN_B, STAC9220_NID_PIN_C, STAC9220_NID_PIN_HEADPHONE1, STAC9220_NID_PIN_E, STAC9220_NID_PIN_F, 0};
810static uint8_t const g_abStac9220Dacs[] = { STAC9220_NID_DAC0, STAC9220_NID_DAC1, STAC9220_NID_DAC2, STAC9220_NID_DAC3, 0};
811static uint8_t const g_abStac9220Adcs[] = { STAC9220_NID_ADC0, STAC9220_NID_ADC1, 0};
812static uint8_t const g_abStac9220SpdifOuts[] = { STAC9220_NID_SPDIF_OUT, 0 };
813static uint8_t const g_abStac9220SpdifIns[] = { STAC9220_NID_SPDIF_IN, 0 };
814static uint8_t const g_abStac9220DigOutPins[] = { STAC9220_NID_PIN_SPDIF_OUT, 0 };
815static uint8_t const g_abStac9220DigInPins[] = { STAC9220_NID_PIN_SPDIF_IN, 0 };
816static uint8_t const g_abStac9220AdcVols[] = { STAC9220_NID_AMP_ADC0, STAC9220_NID_AMP_ADC1, 0};
817static uint8_t const g_abStac9220AdcMuxs[] = { STAC9220_NID_ADC0_MUX, STAC9220_NID_ADC1_MUX, 0};
818static uint8_t const g_abStac9220Pcbeeps[] = { STAC9220_NID_PCBEEP, 0 };
819static uint8_t const g_abStac9220Cds[] = { STAC9220_NID_PIN_CD, 0 };
820static uint8_t const g_abStac9220VolKnobs[] = { STAC9220_NID_VOL_KNOB, 0 };
821/* STAC 9221. */
822/** @todo Is STAC9220_NID_SPDIF_IN really correct for reserved nodes? */
823static uint8_t const g_abStac9220Reserveds[] = { STAC9220_NID_SPDIF_IN, STAC9221_NID_ADAT_OUT, STAC9221_NID_I2S_OUT, STAC9221_NID_PIN_I2S_OUT, 0 };
824#endif
825
826/** SSM description of a CODECNODE. */
827static SSMFIELD const g_aCodecNodeFields[] =
828{
829 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.id),
830 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 3),
831 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
832 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
833 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
834 SSMFIELD_ENTRY_TERM()
835};
836
837/** Backward compatibility with v1 of the CODECNODE. */
838static SSMFIELD const g_aCodecNodeFieldsV1[] =
839{
840 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.id),
841 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 7),
842 SSMFIELD_ENTRY_OLD_HCPTR(Core.name),
843 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
844 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
845 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
846 SSMFIELD_ENTRY_TERM()
847};
848
849
850
851
852static DECLCALLBACK(void) stac9220DbgNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
853{
854 for (int i = 1; i < 12; i++)
855 {
856 PCODECNODE pNode = &pThis->paNodes[i];
857 AMPLIFIER *pAmp = &pNode->dac.B_params;
858
859 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) & 0x7f;
860 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) & 0x7f;
861
862 pHlp->pfnPrintf(pHlp, "0x%x: lVol=%RU8, rVol=%RU8\n", i, lVol, rVol);
863 }
864}
865
866
867static int stac9220ResetNode(PHDACODEC pThis, uint8_t nodenum, PCODECNODE pNode)
868{
869 pNode->node.id = nodenum;
870 pNode->node.au32F00_param[0xF] = 0; /* Power statest Supported: are the same as AFG reports */
871 switch (nodenum)
872 {
873 /* Root Node*/
874 case 0:
875 pNode->node.au32F00_param[0x02] = CODEC_MAKE_F00_02(0x1, 0x0, 0x34, 0x1); /* rev id */
876 break;
877 case 1:
878 pNode->node.au32F00_param[0x08] = CODEC_MAKE_F00_08(1, 0xd, 0xd);
879 pNode->node.au32F00_param[0x0C] = CODEC_MAKE_F00_0C(0x17)
880 | CODEC_F00_0C_CAP_BALANCED_IO
881 | CODEC_F00_0C_CAP_INPUT
882 | CODEC_F00_0C_CAP_PRESENSE_DETECT
883 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
884 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//(17 << 8)|RT_BIT(6)|RT_BIT(5)|RT_BIT(2)|RT_BIT(1)|RT_BIT(0);
885 pNode->node.au32F00_param[0x0B] = CODEC_F00_0B_PCM;
886 pNode->node.au32F00_param[0x0D] = CODEC_MAKE_F00_0D(1, 0x5, 0xE, 0);//RT_BIT(31)|(0x5 << 16)|(0xE)<<8;
887 pNode->node.au32F00_param[0x12] = RT_BIT(31)|(0x2 << 16)|(0x7f << 8)|0x7f;
888 pNode->node.au32F00_param[0x11] = CODEC_MAKE_F00_11(1, 1, 0, 0, 4);//0xc0000004;
889 pNode->node.au32F00_param[0x0F] = CODEC_F00_0F_D3|CODEC_F00_0F_D2|CODEC_F00_0F_D1|CODEC_F00_0F_D0;
890 pNode->afg.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D2, CODEC_F05_D2);//0x2 << 4| 0x2; /* PS-Act: D3, PS->Set D3 */
891 pNode->afg.u32F08_param = 0;
892 pNode->afg.u32F17_param = 0;
893 break;
894 case 2:
895 case 3:
896 case 4:
897 case 5:
898 memset(pNode->dac.B_params, 0, AMPLIFIER_SIZE);
899 pNode->dac.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//RT_BIT(14)|(0x1 << 4)|0x1; /* 44100Hz/16bit/2ch */
900
901 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) = 0x7F | RT_BIT(7);
902 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) = 0x7F | RT_BIT(7);
903
904 pNode->dac.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 0xD, 0)
905 | CODEC_F00_09_CAP_L_R_SWAP
906 | CODEC_F00_09_CAP_POWER_CTRL
907 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
908 | CODEC_F00_09_CAP_LSB;//(0xD << 16) | RT_BIT(11) | RT_BIT(10) | RT_BIT(2) | RT_BIT(0);
909 pNode->dac.u32F0c_param = 0;
910 pNode->dac.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3, Set: D3 */
911 break;
912 case 6:
913 pNode->node.au32F02_param[0] = 0x17;
914 goto adc_init;
915 case 7:
916 pNode->node.au32F02_param[0] = 0x18;
917 adc_init:
918 pNode->adc.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//RT_BIT(14)|(0x1 << 3)|0x1; /* 44100Hz/16bit/2ch */
919 pNode->adc.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0);
920 pNode->adc.u32F03_param = RT_BIT(0);
921 pNode->adc.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 Set: D3 */
922 pNode->adc.u32F06_param = 0;
923 pNode->adc.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 0xD, 0)
924 | CODEC_F00_09_CAP_POWER_CTRL
925 | CODEC_F00_09_CAP_CONNECTION_LIST
926 | CODEC_F00_09_CAP_PROC_WIDGET
927 | CODEC_F00_09_CAP_LSB;//RT_BIT(20)| (0xd << 16) | RT_BIT(10) | RT_BIT(8) | RT_BIT(6)| RT_BIT(0);
928 break;
929 case 8:
930 pNode->spdifout.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//(1<<14)|(0x1<<4) | 0x1;
931 pNode->spdifout.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 0x4, 0)
932 | CODEC_F00_09_CAP_DIGITAL
933 | CODEC_F00_09_CAP_FMT_OVERRIDE
934 | CODEC_F00_09_CAP_LSB;//(4 << 16) | RT_BIT(9)|RT_BIT(4)|0x1;
935 pNode->node.au32F00_param[0xa] = pThis->paNodes[1].node.au32F00_param[0xA];
936 pNode->spdifout.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
937 pNode->spdifout.u32F06_param = 0;
938 pNode->spdifout.u32F0d_param = 0;
939 break;
940 case 9:
941 pNode->spdifin.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//(0x1<<4) | 0x1;
942 pNode->spdifin.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 0x4, 0)
943 | CODEC_F00_09_CAP_DIGITAL
944 | CODEC_F00_09_CAP_CONNECTION_LIST
945 | CODEC_F00_09_CAP_FMT_OVERRIDE
946 | CODEC_F00_09_CAP_LSB;//(0x1 << 20)|(4 << 16) | RT_BIT(9)| RT_BIT(8)|RT_BIT(4)|0x1;
947 pNode->node.au32F00_param[0xA] = pThis->paNodes[1].node.au32F00_param[0xA];
948 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0);
949 pNode->node.au32F02_param[0] = 0x11;
950 pNode->spdifin.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
951 pNode->spdifin.u32F06_param = 0;
952 pNode->spdifin.u32F0d_param = 0;
953 break;
954 case 0xA:
955 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
956 | CODEC_F00_0C_CAP_INPUT
957 | CODEC_F00_0C_CAP_OUTPUT
958 | CODEC_F00_0C_CAP_HP
959 | CODEC_F00_0C_CAP_PRESENSE_DETECT
960 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
961 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x173f;
962 pNode->node.au32F02_param[0] = 0x2;
963 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE
964 | CODEC_F07_OUT_ENABLE;
965 pNode->port.u32F08_param = 0;
966 if (!pThis->fInReset)
967 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
968 CODEC_F1C_LOCATION_FRONT,
969 CODEC_F1C_DEVICE_HP,
970 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
971 CODEC_F1C_COLOR_GREEN,
972 CODEC_F1C_MISC_JACK_DETECT,
973 0x2, 0);//RT_MAKE_U32_FROM_U8(0x20, 0x40, 0x21, 0x02);
974 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(0, CODEC_F09_ANALOG_NA);//0x7fffffff;
975 goto port_init;
976 case 0xB:
977 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
978 | CODEC_F00_0C_CAP_INPUT
979 | CODEC_F00_0C_CAP_OUTPUT
980 | CODEC_F00_0C_CAP_PRESENSE_DETECT
981 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
982 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x1737;
983 pNode->node.au32F02_param[0] = 0x4;
984 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
985 if (!pThis->fInReset)
986 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
987 CODEC_F1C_LOCATION_INTERNAL|CODEC_F1C_LOCATION_REAR,
988 CODEC_F1C_DEVICE_SPEAKER,
989 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
990 CODEC_F1C_COLOR_BLACK,
991 CODEC_F1C_MISC_JACK_DETECT,
992 0x1, 0x1);//RT_MAKE_U32_FROM_U8(0x11, 0x60, 0x11, 0x01);
993 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1, CODEC_F09_ANALOG_NA);//RT_BIT(31)|0x7fffffff;
994 goto port_init;
995 case 0xC:
996 pNode->node.au32F02_param[0] = 0x3;
997 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
998 | CODEC_F00_0C_CAP_INPUT
999 | CODEC_F00_0C_CAP_OUTPUT
1000 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1001 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
1002 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x1737;
1003 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1004 if (!pThis->fInReset)
1005 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1006 CODEC_F1C_LOCATION_REAR,
1007 CODEC_F1C_DEVICE_SPEAKER,
1008 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1009 CODEC_F1C_COLOR_GREEN,
1010 0x0, 0x1, 0x0);//RT_MAKE_U32_FROM_U8(0x10, 0x40, 0x11, 0x01);
1011 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1, CODEC_F09_ANALOG_NA);//RT_BIT(31)|0x7fffffff;
1012 goto port_init;
1013 case 0xD:
1014 pNode->node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1015 | CODEC_F00_0C_CAP_INPUT
1016 | CODEC_F00_0C_CAP_OUTPUT
1017 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1018 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
1019 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x1737;
1020 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1021 pNode->node.au32F02_param[0] = 0x2;
1022 if (!pThis->fInReset)
1023 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1024 CODEC_F1C_LOCATION_FRONT,
1025 CODEC_F1C_DEVICE_MIC,
1026 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1027 CODEC_F1C_COLOR_PINK,
1028 0x0, 0x5, 0x0);//RT_MAKE_U32_FROM_U8(0x50, 0x90, 0xA1, 0x02); /* Microphone */
1029 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1, CODEC_F09_ANALOG_NA);//RT_BIT(31)|0x7fffffff;
1030 port_init:
1031 pNode->port.u32F08_param = 0;
1032 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0)
1033 | CODEC_F00_09_CAP_CONNECTION_LIST
1034 | CODEC_F00_09_CAP_UNSOL
1035 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(8)|RT_BIT(7)|RT_BIT(0);
1036 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//0x1;
1037 break;
1038 case 0xE:
1039 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0)
1040 | CODEC_F00_09_CAP_UNSOL
1041 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(7)|RT_BIT(0);
1042 pNode->port.u32F08_param = 0;
1043 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1044 | CODEC_F00_0C_CAP_OUTPUT
1045 | CODEC_F00_0C_CAP_PRESENSE_DETECT;//0x34;
1046 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1047 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(0, CODEC_F09_ANALOG_NA);//0x7fffffff;
1048 if (!pThis->fInReset)
1049 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1050 CODEC_F1C_LOCATION_REAR,
1051 CODEC_F1C_DEVICE_LINE_OUT,
1052 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1053 CODEC_F1C_COLOR_BLUE,
1054 0x0, 0x4, 0x0);//0x01013040; /* Line Out */
1055 break;
1056 case 0xF:
1057 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0x0)
1058 | CODEC_F00_09_CAP_CONNECTION_LIST
1059 | CODEC_F00_09_CAP_UNSOL
1060 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1061 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(8)|RT_BIT(7)|RT_BIT(2)|RT_BIT(0);
1062 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1063 | CODEC_F00_0C_CAP_OUTPUT
1064 | CODEC_F00_0C_CAP_PRESENSE_DETECT
1065 /* | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
1066 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE */;//0x37;
1067 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//0x1;
1068 pNode->port.u32F08_param = 0;
1069 pNode->port.u32F07_param = CODEC_F07_OUT_ENABLE
1070 | CODEC_F07_IN_ENABLE;
1071 if (!pThis->fInReset)
1072 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1073 CODEC_F1C_LOCATION_INTERNAL,
1074 CODEC_F1C_DEVICE_SPEAKER,
1075 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1076 CODEC_F1C_COLOR_ORANGE,
1077 0x0, 0x1, 0x2);//RT_MAKE_U32_FROM_U8(0x12, 0x60, 0x11, 0x01);
1078 pNode->node.au32F02_param[0] = 0x5;
1079 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(0, CODEC_F09_ANALOG_NA);//0x7fffffff;
1080 break;
1081 case 0x10:
1082 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0x0, 0x0)
1083 | CODEC_F00_09_CAP_DIGITAL
1084 | CODEC_F00_09_CAP_CONNECTION_LIST
1085 | CODEC_F00_09_CAP_LSB;//(4<<20)|RT_BIT(9)|RT_BIT(8)|RT_BIT(0);
1086 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;//RT_BIT(4);
1087 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 0x3);
1088 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0x08, 0x17, 0x19, 0);
1089 if (!pThis->fInReset)
1090 pNode->digout.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1091 CODEC_F1C_LOCATION_REAR,
1092 CODEC_F1C_DEVICE_SPDIF_OUT,
1093 CODEC_F1C_CONNECTION_TYPE_DIN,
1094 CODEC_F1C_COLOR_BLACK,
1095 0x0, 0x3, 0x0);//RT_MAKE_U32_FROM_U8(0x30, 0x10, 0x45, 0x01);
1096 break;
1097 case 0x11:
1098 pNode->node.au32F00_param[9] = (4 << 20) | (3 << 16) | RT_BIT(10) | RT_BIT(9) | RT_BIT(7) | RT_BIT(0);
1099 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_EAPD
1100 | CODEC_F00_0C_CAP_INPUT
1101 | CODEC_F00_0C_CAP_PRESENSE_DETECT;//RT_BIT(16)| RT_BIT(5)|RT_BIT(2);
1102 pNode->digin.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 -> D3 */
1103 pNode->digin.u32F07_param = 0;
1104 pNode->digin.u32F08_param = 0;
1105 pNode->digin.u32F09_param = CODEC_MAKE_F09_DIGITAL(0, 0);
1106 pNode->digin.u32F0c_param = 0;
1107 if (!pThis->fInReset)
1108 pNode->digin.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1109 CODEC_F1C_LOCATION_REAR,
1110 CODEC_F1C_DEVICE_SPDIF_IN,
1111 CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL,
1112 CODEC_F1C_COLOR_BLACK,
1113 0x0, 0x6, 0x0);//(0x1 << 24) | (0xc5 << 16) | (0x10 << 8) | 0x60;
1114 break;
1115 case 0x12:
1116 pNode->adcmux.u32F01_param = 0;
1117 goto adcmux_init;
1118 case 0x13:
1119 pNode->adcmux.u32F01_param = 1;
1120 adcmux_init:
1121 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0x0, 0)
1122 | CODEC_F00_09_CAP_CONNECTION_LIST
1123 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1124 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1125 | CODEC_F00_09_CAP_LSB;//(3<<20)|RT_BIT(8)|RT_BIT(3)|RT_BIT(2)|RT_BIT(0);
1126 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x7);
1127 pNode->node.au32F00_param[0x12] = (0x27 << 16)|(0x4 << 8);
1128 /* STAC 9220 v10 6.21-22.{4,5} both(left and right) out amplefiers inited with 0*/
1129 memset(pNode->adcmux.B_params, 0, AMPLIFIER_SIZE);
1130 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0xe, 0x15, 0xf, 0xb);
1131 pNode->node.au32F02_param[4] = RT_MAKE_U32_FROM_U8(0xc, 0xd, 0xa, 0x0);
1132 break;
1133 case 0x14:
1134 pNode->node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_BEEP_GEN, 0, 0)
1135 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1136 | CODEC_F00_09_CAP_OUT_AMP_PRESENT;//(7 << 20) | RT_BIT(3) | RT_BIT(2);
1137 pNode->node.au32F00_param[0x12] = (0x17 << 16)|(0x3 << 8)| 0x3;
1138 pNode->pcbeep.u32F0a_param = 0;
1139 memset(pNode->pcbeep.B_params, 0, AMPLIFIER_SIZE);
1140 break;
1141 case 0x15:
1142 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1143 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(0);
1144 pNode->node.au32F00_param[0xc] = CODEC_F00_0C_CAP_INPUT;//RT_BIT(5);
1145 if (!pThis->fInReset)
1146 pNode->cdnode.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_FIXED,
1147 CODEC_F1C_LOCATION_INTERNAL,
1148 CODEC_F1C_DEVICE_CD,
1149 CODEC_F1C_CONNECTION_TYPE_ATAPI,
1150 CODEC_F1C_COLOR_UNKNOWN,
1151 0x0, 0x7, 0x0);//RT_MAKE_U32_FROM_U8(0x70, 0x0, 0x33, 0x90);
1152 break;
1153 case 0x16:
1154 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VOLUME_KNOB, 0x0, 0x0);//(0x6 << 20);
1155 pNode->node.au32F00_param[0x13] = RT_BIT(7)| 0x7F;
1156 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x4);
1157 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0x2, 0x3, 0x4, 0x5);
1158 pNode->volumeKnob.u32F08_param = 0;
1159 pNode->volumeKnob.u32F0f_param = 0x7f;
1160 break;
1161 case 0x17:
1162 pNode->node.au32F02_param[0] = 0x12;
1163 goto adcvol_init;
1164 case 0x18:
1165 pNode->node.au32F02_param[0] = 0x13;
1166 adcvol_init:
1167 memset(pNode->adcvol.B_params, 0, AMPLIFIER_SIZE);
1168
1169 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0, 0)
1170 | CODEC_F00_09_CAP_L_R_SWAP
1171 | CODEC_F00_09_CAP_CONNECTION_LIST
1172 | CODEC_F00_09_CAP_IN_AMP_PRESENT
1173 | CODEC_F00_09_CAP_LSB;//(0x3 << 20)|RT_BIT(11)|RT_BIT(8)|RT_BIT(1)|RT_BIT(0);
1174 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x1);
1175 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_LEFT, 0) = RT_BIT(7);
1176 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_RIGHT, 0) = RT_BIT(7);
1177 pNode->adcvol.u32F0c_param = 0;
1178 break;
1179 case 0x19:
1180 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VENDOR_DEFINED, 0x3, 0)
1181 | CODEC_F00_09_CAP_DIGITAL
1182 | CODEC_F00_09_CAP_LSB;//(0xF << 20)|(0x3 << 16)|RT_BIT(9)|RT_BIT(0);
1183 break;
1184 case 0x1A:
1185 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 0x3, 0)
1186 | CODEC_F00_09_CAP_DIGITAL
1187 | CODEC_F00_09_CAP_LSB;//(0x3 << 16)|RT_BIT(9)|RT_BIT(0);
1188 break;
1189 case 0x1B:
1190 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1191 | CODEC_F00_09_CAP_DIGITAL
1192 | CODEC_F00_09_CAP_CONNECTION_LIST
1193 | CODEC_F00_09_CAP_LSB;//(0x4 << 20)|RT_BIT(9)|RT_BIT(8)|RT_BIT(0);
1194 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 0x1);
1195 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;//0x10;
1196 pNode->node.au32F02_param[0] = 0x1a;
1197 pNode->reserved.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_NO_PHYS,
1198 CODEC_F1C_LOCATION_NA,
1199 CODEC_F1C_DEVICE_LINE_OUT,
1200 CODEC_F1C_CONNECTION_TYPE_UNKNOWN,
1201 CODEC_F1C_COLOR_UNKNOWN,
1202 0x0, 0x0, 0xf);//0x4000000f;
1203 break;
1204 default:
1205 break;
1206 }
1207 return VINF_SUCCESS;
1208}
1209
1210
1211static int stac9220Construct(PHDACODEC pThis)
1212{
1213 unconst(pThis->cTotalNodes) = 0x1C;
1214 pThis->pfnCodecNodeReset = stac9220ResetNode;
1215 pThis->pfnDbgListNodes = stac9220DbgNodes;
1216 pThis->u16VendorId = 0x8384;
1217 pThis->u16DeviceId = 0x7680;
1218 pThis->u8BSKU = 0x76;
1219 pThis->u8AssemblyId = 0x80;
1220 pThis->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pThis->cTotalNodes);
1221 if (!pThis->paNodes)
1222 return VERR_NO_MEMORY;
1223 pThis->fInReset = false;
1224#define STAC9220WIDGET(type) pThis->au8##type##s = g_abStac9220##type##s
1225 STAC9220WIDGET(Port);
1226 STAC9220WIDGET(Dac);
1227 STAC9220WIDGET(Adc);
1228 STAC9220WIDGET(AdcVol);
1229 STAC9220WIDGET(AdcMux);
1230 STAC9220WIDGET(Pcbeep);
1231 STAC9220WIDGET(SpdifIn);
1232 STAC9220WIDGET(SpdifOut);
1233 STAC9220WIDGET(DigInPin);
1234 STAC9220WIDGET(DigOutPin);
1235 STAC9220WIDGET(Cd);
1236 STAC9220WIDGET(VolKnob);
1237 STAC9220WIDGET(Reserved);
1238#undef STAC9220WIDGET
1239 unconst(pThis->u8AdcVolsLineIn) = 0x17;
1240 unconst(pThis->u8DacLineOut) = 0x3;
1241
1242 return VINF_SUCCESS;
1243}
1244
1245
1246/*
1247 * Some generic predicate functions.
1248 */
1249
1250#define DECLISNODEOFTYPE(type) \
1251 DECLINLINE(int) hdaCodecIs##type##Node(PHDACODEC pThis, uint8_t cNode) \
1252 { \
1253 Assert(pThis->au8##type##s); \
1254 for (int i = 0; pThis->au8##type##s[i] != 0; ++i) \
1255 if (pThis->au8##type##s[i] == cNode) \
1256 return 1; \
1257 return 0; \
1258 }
1259/* hdaCodecIsPortNode */
1260DECLISNODEOFTYPE(Port)
1261/* hdaCodecIsDacNode */
1262DECLISNODEOFTYPE(Dac)
1263/* hdaCodecIsAdcVolNode */
1264DECLISNODEOFTYPE(AdcVol)
1265/* hdaCodecIsAdcNode */
1266DECLISNODEOFTYPE(Adc)
1267/* hdaCodecIsAdcMuxNode */
1268DECLISNODEOFTYPE(AdcMux)
1269/* hdaCodecIsPcbeepNode */
1270DECLISNODEOFTYPE(Pcbeep)
1271/* hdaCodecIsSpdifOutNode */
1272DECLISNODEOFTYPE(SpdifOut)
1273/* hdaCodecIsSpdifInNode */
1274DECLISNODEOFTYPE(SpdifIn)
1275/* hdaCodecIsDigInPinNode */
1276DECLISNODEOFTYPE(DigInPin)
1277/* hdaCodecIsDigOutPinNode */
1278DECLISNODEOFTYPE(DigOutPin)
1279/* hdaCodecIsCdNode */
1280DECLISNODEOFTYPE(Cd)
1281/* hdaCodecIsVolKnobNode */
1282DECLISNODEOFTYPE(VolKnob)
1283/* hdaCodecIsReservedNode */
1284DECLISNODEOFTYPE(Reserved)
1285
1286
1287/*
1288 * Misc helpers.
1289 */
1290static int hdaCodecToAudVolume(PHDACODEC pThis, AMPLIFIER *pAmp, PDMAUDIOMIXERCTL mt)
1291{
1292 uint32_t dir = AMPLIFIER_OUT;
1293 ENMSOUNDSOURCE enmSrc;
1294 switch (mt)
1295 {
1296 case PDMAUDIOMIXERCTL_PCM:
1297 enmSrc = PO_INDEX;
1298 dir = AMPLIFIER_OUT;
1299 break;
1300 case PDMAUDIOMIXERCTL_LINE_IN:
1301 enmSrc = PI_INDEX;
1302 dir = AMPLIFIER_IN;
1303 break;
1304 default:
1305 AssertMsgFailedReturn(("Invalid mixer control %ld\n", mt), VERR_INVALID_PARAMETER);
1306 break;
1307 }
1308
1309 int mute = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & RT_BIT(7);
1310 mute |= AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & RT_BIT(7);
1311 mute >>=7;
1312 mute &= 0x1;
1313 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & 0x7f;
1314 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & 0x7f;
1315
1316 /* The STAC9220 volume controls have 0 to -96dB attenuation range in 128 steps.
1317 * We have 0 to -96dB range in 256 steps. HDA volume setting of 127 must map
1318 * to 255 internally (0dB), while HDA volume setting of 0 (-96dB) should map
1319 * to 1 (rather than zero) internally.
1320 */
1321 lVol = (lVol + 1) * (2 * 255) / 256;
1322 rVol = (rVol + 1) * (2 * 255) / 256;
1323
1324 return pThis->pfnSetVolume(pThis->pHDAState, enmSrc, RT_BOOL(mute), lVol, rVol);
1325}
1326
1327DECLINLINE(void) hdaCodecSetRegister(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset, uint32_t mask)
1328{
1329 Assert((pu32Reg && u8Offset < 32));
1330 *pu32Reg &= ~(mask << u8Offset);
1331 *pu32Reg |= (u32Cmd & mask) << u8Offset;
1332}
1333
1334DECLINLINE(void) hdaCodecSetRegisterU8(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1335{
1336 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_8BIT_DATA);
1337}
1338
1339DECLINLINE(void) hdaCodecSetRegisterU16(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1340{
1341 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_16BIT_DATA);
1342}
1343
1344
1345/*
1346 * Verb processor functions.
1347 */
1348
1349static DECLCALLBACK(int) vrbProcUnimplemented(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1350{
1351 LogFlowFunc(("cmd(raw:%x: cad:%x, d:%c, nid:%x, verb:%x)\n", cmd,
1352 CODEC_CAD(cmd), CODEC_DIRECT(cmd) ? 'N' : 'Y', CODEC_NID(cmd), CODEC_VERBDATA(cmd)));
1353 *pResp = 0;
1354 return VINF_SUCCESS;
1355}
1356
1357static DECLCALLBACK(int) vrbProcBreak(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1358{
1359 int rc;
1360 rc = vrbProcUnimplemented(pThis, cmd, pResp);
1361 *pResp |= CODEC_RESPONSE_UNSOLICITED;
1362 return rc;
1363}
1364
1365/* B-- */
1366static DECLCALLBACK(int) vrbProcGetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1367{
1368 Assert(CODEC_CAD(cmd) == pThis->id);
1369 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1370 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1371 {
1372 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1373 return VINF_SUCCESS;
1374 }
1375 *pResp = 0;
1376 /* HDA spec 7.3.3.7 Note A */
1377 /** @todo: if index out of range response should be 0 */
1378 uint8_t u8Index = CODEC_GET_AMP_DIRECTION(cmd) == AMPLIFIER_OUT? 0 : CODEC_GET_AMP_INDEX(cmd);
1379
1380 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1381 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1382 *pResp = AMPLIFIER_REGISTER(pNode->dac.B_params,
1383 CODEC_GET_AMP_DIRECTION(cmd),
1384 CODEC_GET_AMP_SIDE(cmd),
1385 u8Index);
1386 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1387 *pResp = AMPLIFIER_REGISTER(pNode->adcvol.B_params,
1388 CODEC_GET_AMP_DIRECTION(cmd),
1389 CODEC_GET_AMP_SIDE(cmd),
1390 u8Index);
1391 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1392 *pResp = AMPLIFIER_REGISTER(pNode->adcmux.B_params,
1393 CODEC_GET_AMP_DIRECTION(cmd),
1394 CODEC_GET_AMP_SIDE(cmd),
1395 u8Index);
1396 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1397 *pResp = AMPLIFIER_REGISTER(pNode->pcbeep.B_params,
1398 CODEC_GET_AMP_DIRECTION(cmd),
1399 CODEC_GET_AMP_SIDE(cmd),
1400 u8Index);
1401 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1402 *pResp = AMPLIFIER_REGISTER(pNode->port.B_params,
1403 CODEC_GET_AMP_DIRECTION(cmd),
1404 CODEC_GET_AMP_SIDE(cmd),
1405 u8Index);
1406 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1407 *pResp = AMPLIFIER_REGISTER(pNode->adc.B_params,
1408 CODEC_GET_AMP_DIRECTION(cmd),
1409 CODEC_GET_AMP_SIDE(cmd),
1410 u8Index);
1411 else
1412 AssertMsgFailedReturn(("access to fields of %x need to be implemented\n", CODEC_NID(cmd)), VINF_SUCCESS);
1413 return VINF_SUCCESS;
1414}
1415
1416/* 3-- */
1417static DECLCALLBACK(int) vrbProcSetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1418{
1419 bool fIsLeft = false;
1420 bool fIsRight = false;
1421 bool fIsOut = false;
1422 bool fIsIn = false;
1423 uint8_t u8Index = 0;
1424 Assert(CODEC_CAD(cmd) == pThis->id);
1425 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1426 {
1427 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1428 return VINF_SUCCESS;
1429 }
1430 *pResp = 0;
1431 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1432 AMPLIFIER *pAmplifier;
1433 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1434 pAmplifier = &pNode->dac.B_params;
1435 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1436 pAmplifier = &pNode->adcvol.B_params;
1437 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1438 pAmplifier = &pNode->adcmux.B_params;
1439 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1440 pAmplifier = &pNode->pcbeep.B_params;
1441 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1442 pAmplifier = &pNode->port.B_params;
1443 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1444 pAmplifier = &pNode->adc.B_params;
1445 else
1446 AssertFailedReturn(VINF_SUCCESS);
1447
1448 fIsOut = CODEC_SET_AMP_IS_OUT_DIRECTION(cmd);
1449 fIsIn = CODEC_SET_AMP_IS_IN_DIRECTION(cmd);
1450 fIsRight = CODEC_SET_AMP_IS_RIGHT_SIDE(cmd);
1451 fIsLeft = CODEC_SET_AMP_IS_LEFT_SIDE(cmd);
1452 u8Index = CODEC_SET_AMP_INDEX(cmd);
1453 if ( (!fIsLeft && !fIsRight)
1454 || (!fIsOut && !fIsIn))
1455 return VINF_SUCCESS;
1456 if (fIsIn)
1457 {
1458 if (fIsLeft)
1459 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_LEFT, u8Index), cmd, 0);
1460 if (fIsRight)
1461 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1462
1463 /** @todo Fix ID of u8AdcVolsLineIn! */
1464 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_LINE_IN);
1465 }
1466 if (fIsOut)
1467 {
1468 if (fIsLeft)
1469 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_LEFT, u8Index), cmd, 0);
1470 if (fIsRight)
1471 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1472
1473 if (CODEC_NID(cmd) == pThis->u8DacLineOut)
1474 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_PCM);
1475 }
1476
1477 return VINF_SUCCESS;
1478}
1479
1480static DECLCALLBACK(int) vrbProcGetParameter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1481{
1482 Assert(CODEC_CAD(cmd) == pThis->id);
1483 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1484 {
1485 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1486 return VINF_SUCCESS;
1487 }
1488 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F00_PARAM_LENGTH);
1489 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F00_PARAM_LENGTH)
1490 {
1491 LogFlowFunc(("invalid F00 parameter %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1492 return VINF_SUCCESS;
1493 }
1494 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA];
1495 return VINF_SUCCESS;
1496}
1497
1498/* F01 */
1499static DECLCALLBACK(int) vrbProcGetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1500{
1501 Assert(CODEC_CAD(cmd) == pThis->id);
1502 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1503 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1504 {
1505 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1506 return VINF_SUCCESS;
1507 }
1508 *pResp = 0;
1509 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1510 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1511 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1512 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1513 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1514 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1515 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1516 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1517 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1518 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1519 return VINF_SUCCESS;
1520}
1521
1522/* 701 */
1523static DECLCALLBACK(int) vrbProcSetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1524{
1525 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1526 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1527 {
1528 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1529 return VINF_SUCCESS;
1530 }
1531 *pResp = 0;
1532 uint32_t *pu32Reg;
1533 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1534 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1535 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1536 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1537 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1538 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1539 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1540 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1541 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1542 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1543 else
1544 AssertFailedReturn(VINF_SUCCESS);
1545 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1546 return VINF_SUCCESS;
1547}
1548
1549/* F07 */
1550static DECLCALLBACK(int) vrbProcGetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1551{
1552 Assert(CODEC_CAD(cmd) == pThis->id);
1553 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1554 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1555 {
1556 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1557 return VINF_SUCCESS;
1558 }
1559 *pResp = 0;
1560 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1561 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1562 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1563 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1564 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1565 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1566 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1567 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1568 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1569 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1570 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1571 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1572 else
1573 AssertMsgFailed(("Unsupported"));
1574 return VINF_SUCCESS;
1575}
1576
1577/* 707 */
1578static DECLCALLBACK(int) vrbProcSetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1579{
1580 Assert(CODEC_CAD(cmd) == pThis->id);
1581 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1582 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1583 {
1584 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1585 return VINF_SUCCESS;
1586 }
1587 *pResp = 0;
1588 uint32_t *pu32Reg;
1589 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1590 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1591 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1592 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1593 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1594 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1595 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1596 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1597 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1598 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1599 else if ( hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))
1600 && CODEC_NID(cmd) == 0x1b)
1601 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1602 else
1603 AssertFailedReturn(VINF_SUCCESS);
1604 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1605 return VINF_SUCCESS;
1606}
1607
1608/* F08 */
1609static DECLCALLBACK(int) vrbProcGetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1610{
1611 Assert(CODEC_CAD(cmd) == pThis->id);
1612 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1613 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1614 {
1615 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1616 return VINF_SUCCESS;
1617 }
1618 *pResp = 0;
1619 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1620 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1621 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1622 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1623 else if ((cmd) == 1 /* AFG */)
1624 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1625 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1626 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1627 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1628 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1629 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1630 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1631 else
1632 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)));
1633 return VINF_SUCCESS;
1634}
1635
1636/* 708 */
1637static DECLCALLBACK(int) vrbProcSetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1638{
1639 Assert(CODEC_CAD(cmd) == pThis->id);
1640 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1641 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1642 {
1643 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1644 return VINF_SUCCESS;
1645 }
1646 *pResp = 0;
1647 uint32_t *pu32Reg;
1648 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1649 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1650 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1651 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1652 else if (CODEC_NID(cmd) == 1 /* AFG */)
1653 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1654 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1655 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1656 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1657 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1658 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1659 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1660 else
1661 AssertMsgFailedReturn(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)), VINF_SUCCESS);
1662 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1663 return VINF_SUCCESS;
1664}
1665
1666/* F09 */
1667static DECLCALLBACK(int) vrbProcGetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1668{
1669 Assert(CODEC_CAD(cmd) == pThis->id);
1670 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1671 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1672 {
1673 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1674 return VINF_SUCCESS;
1675 }
1676 *pResp = 0;
1677 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1678 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1679 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1680 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1681 else
1682 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)));
1683 return VINF_SUCCESS;
1684}
1685
1686/* 709 */
1687static DECLCALLBACK(int) vrbProcSetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1688{
1689 Assert(CODEC_CAD(cmd) == pThis->id);
1690 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1691 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1692 {
1693 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1694 return VINF_SUCCESS;
1695 }
1696 *pResp = 0;
1697 uint32_t *pu32Reg;
1698 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1699 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1700 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1701 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1702 else
1703 AssertFailedReturn(VINF_SUCCESS);
1704 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1705 return VINF_SUCCESS;
1706}
1707
1708static DECLCALLBACK(int) vrbProcGetConnectionListEntry(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1709{
1710 Assert(CODEC_CAD(cmd) == pThis->id);
1711 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1712 *pResp = 0;
1713 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1714 {
1715 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1716 return VINF_SUCCESS;
1717 }
1718 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F02_PARAM_LENGTH);
1719 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F02_PARAM_LENGTH)
1720 {
1721 LogFlowFunc(("access to invalid F02 index %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1722 return VINF_SUCCESS;
1723 }
1724 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];
1725 return VINF_SUCCESS;
1726}
1727
1728/* F03 */
1729static DECLCALLBACK(int) vrbProcGetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1730{
1731 Assert(CODEC_CAD(cmd) == pThis->id);
1732 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1733 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1734 {
1735 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1736 return VINF_SUCCESS;
1737 }
1738 *pResp = 0;
1739 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1740 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param;
1741 return VINF_SUCCESS;
1742}
1743
1744/* 703 */
1745static DECLCALLBACK(int) vrbProcSetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1746{
1747 Assert(CODEC_CAD(cmd) == pThis->id);
1748 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1749 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1750 {
1751 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1752 return VINF_SUCCESS;
1753 }
1754 *pResp = 0;
1755 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1756 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0);
1757 return VINF_SUCCESS;
1758}
1759
1760/* F0D */
1761static DECLCALLBACK(int) vrbProcGetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1762{
1763 Assert(CODEC_CAD(cmd) == pThis->id);
1764 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1765 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1766 {
1767 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1768 return VINF_SUCCESS;
1769 }
1770 *pResp = 0;
1771 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1772 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param;
1773 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1774 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param;
1775 return VINF_SUCCESS;
1776}
1777
1778static int codecSetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset, uint64_t *pResp)
1779{
1780 Assert(CODEC_CAD(cmd) == pThis->id);
1781 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1782 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1783 {
1784 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1785 return VINF_SUCCESS;
1786 }
1787 *pResp = 0;
1788 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1789 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);
1790 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1791 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);
1792 return VINF_SUCCESS;
1793}
1794
1795/* 70D */
1796static DECLCALLBACK(int) vrbProcSetDigitalConverter1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1797{
1798 return codecSetDigitalConverter(pThis, cmd, 0, pResp);
1799}
1800
1801/* 70E */
1802static DECLCALLBACK(int) vrbProcSetDigitalConverter2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1803{
1804 return codecSetDigitalConverter(pThis, cmd, 8, pResp);
1805}
1806
1807/* F20 */
1808static DECLCALLBACK(int) vrbProcGetSubId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1809{
1810 Assert(CODEC_CAD(cmd) == pThis->id);
1811 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1812 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1813 {
1814 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1815 return VINF_SUCCESS;
1816 }
1817 if (CODEC_NID(cmd) == 1 /* AFG */)
1818 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
1819 else
1820 *pResp = 0;
1821 return VINF_SUCCESS;
1822}
1823
1824static int codecSetSubIdX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
1825{
1826 Assert(CODEC_CAD(cmd) == pThis->id);
1827 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1828 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1829 {
1830 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1831 return VINF_SUCCESS;
1832 }
1833 uint32_t *pu32Reg;
1834 if (CODEC_NID(cmd) == 0x1 /* AFG */)
1835 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
1836 else
1837 AssertFailedReturn(VINF_SUCCESS);
1838 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
1839 return VINF_SUCCESS;
1840}
1841
1842/* 720 */
1843static DECLCALLBACK(int) vrbProcSetSubId0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1844{
1845 *pResp = 0;
1846 return codecSetSubIdX(pThis, cmd, 0);
1847}
1848
1849/* 721 */
1850static DECLCALLBACK(int) vrbProcSetSubId1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1851{
1852 *pResp = 0;
1853 return codecSetSubIdX(pThis, cmd, 8);
1854}
1855
1856/* 722 */
1857static DECLCALLBACK(int) vrbProcSetSubId2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1858{
1859 *pResp = 0;
1860 return codecSetSubIdX(pThis, cmd, 16);
1861}
1862
1863/* 723 */
1864static DECLCALLBACK(int) vrbProcSetSubId3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1865{
1866 *pResp = 0;
1867 return codecSetSubIdX(pThis, cmd, 24);
1868}
1869
1870static DECLCALLBACK(int) vrbProcReset(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1871{
1872 Assert(CODEC_CAD(cmd) == pThis->id);
1873 Assert(CODEC_NID(cmd) == 1 /* AFG */);
1874 if ( CODEC_NID(cmd) == 1 /* AFG */
1875 && pThis->pfnCodecNodeReset)
1876 {
1877 uint8_t i;
1878 LogFlowFunc(("enters reset\n"));
1879 Assert(pThis->pfnCodecNodeReset);
1880 for (i = 0; i < pThis->cTotalNodes; ++i)
1881 {
1882 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
1883 }
1884 pThis->fInReset = false;
1885 LogFlowFunc(("exits reset\n"));
1886 }
1887 *pResp = 0;
1888 return VINF_SUCCESS;
1889}
1890
1891/* F05 */
1892static DECLCALLBACK(int) vrbProcGetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1893{
1894 Assert(CODEC_CAD(cmd) == pThis->id);
1895 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1896 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1897 {
1898 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1899 return VINF_SUCCESS;
1900 }
1901 *pResp = 0;
1902 if (CODEC_NID(cmd) == 1 /* AFG */)
1903 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
1904 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1905 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
1906 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1907 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
1908 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1909 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
1910 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1911 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
1912 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1913 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
1914 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1915 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
1916 return VINF_SUCCESS;
1917}
1918
1919/* 705 */
1920
1921DECLINLINE(void) codecPropogatePowerState(uint32_t *pu32F05_param)
1922{
1923 Assert(pu32F05_param);
1924 if (!pu32F05_param)
1925 return;
1926 bool fReset = CODEC_F05_IS_RESET(*pu32F05_param);
1927 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32F05_param);
1928 uint8_t u8SetPowerState = CODEC_F05_SET(*pu32F05_param);
1929 *pu32F05_param = CODEC_MAKE_F05(fReset, fStopOk, 0, u8SetPowerState, u8SetPowerState);
1930}
1931
1932static DECLCALLBACK(int) vrbProcSetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1933{
1934 Assert(CODEC_CAD(cmd) == pThis->id);
1935 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1936 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1937 {
1938 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1939 return VINF_SUCCESS;
1940 }
1941 *pResp = 0;
1942 uint32_t *pu32Reg;
1943 if (CODEC_NID(cmd) == 1 /* AFG */)
1944 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
1945 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1946 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
1947 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1948 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
1949 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1950 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
1951 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1952 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
1953 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1954 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
1955 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1956 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
1957 else
1958 AssertFailedReturn(VINF_SUCCESS);
1959
1960 bool fReset = CODEC_F05_IS_RESET(*pu32Reg);
1961 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32Reg);
1962
1963 if (CODEC_NID(cmd) != 1 /* AFG */)
1964 {
1965 /*
1966 * We shouldn't propogate actual power state, which actual for AFG
1967 */
1968 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0,
1969 CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param),
1970 CODEC_F05_SET(cmd));
1971 }
1972
1973 /* Propagate next power state only if AFG is on or verb modifies AFG power state */
1974 if ( CODEC_NID(cmd) == 1 /* AFG */
1975 || !CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param))
1976 {
1977 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, CODEC_F05_SET(cmd), CODEC_F05_SET(cmd));
1978 if ( CODEC_NID(cmd) == 1 /* AFG */
1979 && (CODEC_F05_SET(cmd)) == CODEC_F05_D0)
1980 {
1981 /* now we're powered on AFG and may propogate power states on nodes */
1982 const uint8_t *pu8NodeIndex = &pThis->au8Dacs[0];
1983 while (*(++pu8NodeIndex))
1984 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].dac.u32F05_param);
1985
1986 pu8NodeIndex = &pThis->au8Adcs[0];
1987 while (*(++pu8NodeIndex))
1988 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].adc.u32F05_param);
1989
1990 pu8NodeIndex = &pThis->au8DigInPins[0];
1991 while (*(++pu8NodeIndex))
1992 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].digin.u32F05_param);
1993 }
1994 }
1995 return VINF_SUCCESS;
1996}
1997
1998static DECLCALLBACK(int) vrbProcGetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1999{
2000 Assert(CODEC_CAD(cmd) == pThis->id);
2001 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2002 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2003 {
2004 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2005 return VINF_SUCCESS;
2006 }
2007 *pResp = 0;
2008 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2009 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2010 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2011 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2012 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2013 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2014 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2015 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2016 else if (CODEC_NID(cmd) == 0x1A)
2017 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
2018 return VINF_SUCCESS;
2019}
2020
2021static DECLCALLBACK(int) vrbProcSetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2022{
2023 Assert(CODEC_CAD(cmd) == pThis->id);
2024 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2025 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2026 {
2027 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2028 return VINF_SUCCESS;
2029 }
2030 *pResp = 0;
2031 uint32_t *pu32addr;
2032 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2033 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2034 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2035 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2036 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2037 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2038 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2039 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2040 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2041 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
2042 else
2043 AssertFailedReturn(VINF_SUCCESS);
2044 hdaCodecSetRegisterU8(pu32addr, cmd, 0);
2045 return VINF_SUCCESS;
2046}
2047
2048static DECLCALLBACK(int) vrbProcGetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2049{
2050 Assert(CODEC_CAD(cmd) == pThis->id);
2051 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2052 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2053 {
2054 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2055 return VINF_SUCCESS;
2056 }
2057 *pResp = 0;
2058 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2059 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param;
2060 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2061 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param;
2062 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2063 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param;
2064 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2065 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param;
2066 return VINF_SUCCESS;
2067}
2068
2069static DECLCALLBACK(int) vrbProcSetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2070{
2071 Assert(CODEC_CAD(cmd) == pThis->id);
2072 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2073 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2074 {
2075 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2076 return VINF_SUCCESS;
2077 }
2078 *pResp = 0;
2079 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2080 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0);
2081 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2082 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0);
2083 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2084 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0);
2085 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2086 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0);
2087 return VINF_SUCCESS;
2088}
2089
2090/* F0C */
2091static DECLCALLBACK(int) vrbProcGetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2092{
2093 Assert(CODEC_CAD(cmd) == pThis->id);
2094 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2095 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2096 {
2097 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2098 return VINF_SUCCESS;
2099 }
2100 *pResp = 0;
2101 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2102 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2103 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2104 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2105 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2106 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2107 return VINF_SUCCESS;
2108}
2109
2110/* 70C */
2111static DECLCALLBACK(int) vrbProcSetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2112{
2113 Assert(CODEC_CAD(cmd) == pThis->id);
2114 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2115 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2116 {
2117 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2118 return VINF_SUCCESS;
2119 }
2120
2121 *pResp = 0;
2122 uint32_t *pu32Reg;
2123 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2124 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2125 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2126 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2127 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2128 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2129 else
2130 AssertFailedReturn(VINF_SUCCESS);
2131 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2132
2133 return VINF_SUCCESS;
2134}
2135
2136/* F0F */
2137static DECLCALLBACK(int) vrbProcGetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2138{
2139 Assert(CODEC_CAD(cmd) == pThis->id);
2140 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2141 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2142 {
2143 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2144 return VINF_SUCCESS;
2145 }
2146 *pResp = 0;
2147 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2148 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2149 return VINF_SUCCESS;
2150}
2151
2152/* 70F */
2153static DECLCALLBACK(int) vrbProcSetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2154{
2155 Assert(CODEC_CAD(cmd) == pThis->id);
2156 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2157 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2158 {
2159 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2160 return VINF_SUCCESS;
2161 }
2162 uint32_t *pu32Reg = NULL;
2163 *pResp = 0;
2164 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2165 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2166 Assert(pu32Reg);
2167 if (pu32Reg)
2168 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2169 return VINF_SUCCESS;
2170}
2171
2172/* F17 */
2173static DECLCALLBACK(int) vrbProcGetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2174{
2175 Assert(CODEC_CAD(cmd) == pThis->id);
2176 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2177 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2178 {
2179 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2180 return VINF_SUCCESS;
2181 }
2182 *pResp = 0;
2183 /* note: this is true for ALC885 */
2184 if (CODEC_NID(cmd) == 0x1 /* AFG */)
2185 *pResp = pThis->paNodes[1].afg.u32F17_param;
2186 return VINF_SUCCESS;
2187}
2188
2189/* 717 */
2190static DECLCALLBACK(int) vrbProcSetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2191{
2192 Assert(CODEC_CAD(cmd) == pThis->id);
2193 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2194 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2195 {
2196 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2197 return VINF_SUCCESS;
2198 }
2199 uint32_t *pu32Reg = NULL;
2200 *pResp = 0;
2201 if (CODEC_NID(cmd) == 1 /* AFG */)
2202 pu32Reg = &pThis->paNodes[1].afg.u32F17_param;
2203 Assert(pu32Reg);
2204 if (pu32Reg)
2205 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2206 return VINF_SUCCESS;
2207}
2208
2209/* F1C */
2210static DECLCALLBACK(int) vrbProcGetConfig(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2211{
2212 Assert(CODEC_CAD(cmd) == pThis->id);
2213 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2214 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2215 {
2216 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2217 return VINF_SUCCESS;
2218 }
2219 *pResp = 0;
2220 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2221 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2222 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2223 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2224 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2225 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2226 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2227 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2228 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2229 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2230 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2231 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2232 return VINF_SUCCESS;
2233}
2234
2235static int codecSetConfigX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
2236{
2237 Assert(CODEC_CAD(cmd) == pThis->id);
2238 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2239 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2240 {
2241 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2242 return VINF_SUCCESS;
2243 }
2244 uint32_t *pu32Reg = NULL;
2245 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2246 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2247 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2248 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2249 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2250 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2251 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2252 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2253 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2254 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2255 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2256 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2257 Assert(pu32Reg);
2258 if (pu32Reg)
2259 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
2260 return VINF_SUCCESS;
2261}
2262
2263/* 71C */
2264static DECLCALLBACK(int) vrbProcSetConfig0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2265{
2266 *pResp = 0;
2267 return codecSetConfigX(pThis, cmd, 0);
2268}
2269
2270/* 71D */
2271static DECLCALLBACK(int) vrbProcSetConfig1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2272{
2273 *pResp = 0;
2274 return codecSetConfigX(pThis, cmd, 8);
2275}
2276
2277/* 71E */
2278static DECLCALLBACK(int) vrbProcSetConfig2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2279{
2280 *pResp = 0;
2281 return codecSetConfigX(pThis, cmd, 16);
2282}
2283
2284/* 71E */
2285static DECLCALLBACK(int) vrbProcSetConfig3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2286{
2287 *pResp = 0;
2288 return codecSetConfigX(pThis, cmd, 24);
2289}
2290
2291
2292/**
2293 * HDA codec verb map.
2294 * @todo Any reason not to use binary search here?
2295 */
2296static const CODECVERB g_aCodecVerbs[] =
2297{
2298/* verb | verb mask | callback */
2299/* ----------- -------------------- ----------------------- */
2300 { 0x000F0000, CODEC_VERB_8BIT_CMD , vrbProcGetParameter },
2301 { 0x000F0100, CODEC_VERB_8BIT_CMD , vrbProcGetConSelectCtrl },
2302 { 0x00070100, CODEC_VERB_8BIT_CMD , vrbProcSetConSelectCtrl },
2303 { 0x000F0600, CODEC_VERB_8BIT_CMD , vrbProcGetStreamId },
2304 { 0x00070600, CODEC_VERB_8BIT_CMD , vrbProcSetStreamId },
2305 { 0x000F0700, CODEC_VERB_8BIT_CMD , vrbProcGetPinCtrl },
2306 { 0x00070700, CODEC_VERB_8BIT_CMD , vrbProcSetPinCtrl },
2307 { 0x000F0800, CODEC_VERB_8BIT_CMD , vrbProcGetUnsolicitedEnabled },
2308 { 0x00070800, CODEC_VERB_8BIT_CMD , vrbProcSetUnsolicitedEnabled },
2309 { 0x000F0900, CODEC_VERB_8BIT_CMD , vrbProcGetPinSense },
2310 { 0x00070900, CODEC_VERB_8BIT_CMD , vrbProcSetPinSense },
2311 { 0x000F0200, CODEC_VERB_8BIT_CMD , vrbProcGetConnectionListEntry },
2312 { 0x000F0300, CODEC_VERB_8BIT_CMD , vrbProcGetProcessingState },
2313 { 0x00070300, CODEC_VERB_8BIT_CMD , vrbProcSetProcessingState },
2314 { 0x000F0D00, CODEC_VERB_8BIT_CMD , vrbProcGetDigitalConverter },
2315 { 0x00070D00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter1 },
2316 { 0x00070E00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter2 },
2317 { 0x000F2000, CODEC_VERB_8BIT_CMD , vrbProcGetSubId },
2318 { 0x00072000, CODEC_VERB_8BIT_CMD , vrbProcSetSubId0 },
2319 { 0x00072100, CODEC_VERB_8BIT_CMD , vrbProcSetSubId1 },
2320 { 0x00072200, CODEC_VERB_8BIT_CMD , vrbProcSetSubId2 },
2321 { 0x00072300, CODEC_VERB_8BIT_CMD , vrbProcSetSubId3 },
2322 { 0x0007FF00, CODEC_VERB_8BIT_CMD , vrbProcReset },
2323 { 0x000F0500, CODEC_VERB_8BIT_CMD , vrbProcGetPowerState },
2324 { 0x00070500, CODEC_VERB_8BIT_CMD , vrbProcSetPowerState },
2325 { 0x000F0C00, CODEC_VERB_8BIT_CMD , vrbProcGetEAPD_BTLEnabled },
2326 { 0x00070C00, CODEC_VERB_8BIT_CMD , vrbProcSetEAPD_BTLEnabled },
2327 { 0x000F0F00, CODEC_VERB_8BIT_CMD , vrbProcGetVolumeKnobCtrl },
2328 { 0x00070F00, CODEC_VERB_8BIT_CMD , vrbProcSetVolumeKnobCtrl },
2329 { 0x000F1700, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOUnsolisted },
2330 { 0x00071700, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOUnsolisted },
2331 { 0x000F1C00, CODEC_VERB_8BIT_CMD , vrbProcGetConfig },
2332 { 0x00071C00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig0 },
2333 { 0x00071D00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig1 },
2334 { 0x00071E00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig2 },
2335 { 0x00071F00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig3 },
2336 { 0x000A0000, CODEC_VERB_16BIT_CMD, vrbProcGetConverterFormat },
2337 { 0x00020000, CODEC_VERB_16BIT_CMD, vrbProcSetConverterFormat },
2338 { 0x000B0000, CODEC_VERB_16BIT_CMD, vrbProcGetAmplifier },
2339 { 0x00030000, CODEC_VERB_16BIT_CMD, vrbProcSetAmplifier },
2340};
2341
2342#ifdef DEBUG
2343typedef struct CODECDBGINFO
2344{
2345 /** DBGF info helpers. */
2346 PCDBGFINFOHLP pHlp;
2347 /** Current recursion level. */
2348 uint8_t uLevel;
2349 /** Pointer to codec state. */
2350 PHDACODEC pThis;
2351
2352} CODECDBGINFO, *PCODECDBGINFO;
2353
2354#define CODECDBG_INDENT pInfo->uLevel++;
2355#define CODECDBG_UNINDENT if (pInfo->uLevel) pInfo->uLevel--;
2356
2357#define CODECDBG_PRINT(...) pInfo->pHlp->pfnPrintf(pInfo->pHlp, __VA_ARGS__)
2358#define CODECDBG_PRINTI(...) codecDbgPrintf(pInfo, __VA_ARGS__)
2359
2360static void codecDbgPrintfIndentV(PCODECDBGINFO pInfo, uint16_t uIndent, const char *pszFormat, va_list va)
2361{
2362 char *pszValueFormat;
2363 if (RTStrAPrintfV(&pszValueFormat, pszFormat, va))
2364 {
2365 pInfo->pHlp->pfnPrintf(pInfo->pHlp, "%*s%s", uIndent, "", pszValueFormat);
2366 RTStrFree(pszValueFormat);
2367 }
2368}
2369
2370static void codecDbgPrintf(PCODECDBGINFO pInfo, const char *pszFormat, ...)
2371{
2372 va_list va;
2373 va_start(va, pszFormat);
2374 codecDbgPrintfIndentV(pInfo, pInfo->uLevel * 4, pszFormat, va);
2375 va_end(va);
2376}
2377
2378/* Power state */
2379static void codecDbgPrintNodeRegF05(PCODECDBGINFO pInfo, uint32_t u32Reg)
2380{
2381 codecDbgPrintf(pInfo, "Power (F05): fReset=%RTbool, fStopOk=%RTbool, Set=%RU8, Act=%RU8\n",
2382 CODEC_F05_IS_RESET(u32Reg), CODEC_F05_IS_STOPOK(u32Reg), CODEC_F05_SET(u32Reg), CODEC_F05_ACT(u32Reg));
2383}
2384
2385static void codecDbgPrintNodeRegA(PCODECDBGINFO pInfo, uint32_t u32Reg)
2386{
2387 codecDbgPrintf(pInfo, "RegA: %x\n", u32Reg);
2388}
2389
2390static void codecDbgPrintNodeRegF00(PCODECDBGINFO pInfo, uint32_t *paReg00)
2391{
2392 codecDbgPrintf(pInfo, "Parameters (F00):\n");
2393
2394 CODECDBG_INDENT
2395 codecDbgPrintf(pInfo, "Amplifier Caps:\n");
2396 uint32_t uReg = paReg00[0xD];
2397 CODECDBG_INDENT
2398 codecDbgPrintf(pInfo, "Input Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2399 CODEC_F00_0D_NUM_STEPS(uReg),
2400 CODEC_F00_0D_STEP_SIZE(uReg),
2401 CODEC_F00_0D_OFFSET(uReg),
2402 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg)));
2403
2404 uReg = paReg00[0x12];
2405 codecDbgPrintf(pInfo, "Output Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2406 CODEC_F00_12_NUM_STEPS(uReg),
2407 CODEC_F00_12_STEP_SIZE(uReg),
2408 CODEC_F00_12_OFFSET(uReg),
2409 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg)));
2410 CODECDBG_UNINDENT
2411 CODECDBG_UNINDENT
2412}
2413
2414static void codecDbgPrintNodeAmp(PCODECDBGINFO pInfo, uint32_t *paReg, uint8_t uIdx, uint8_t uDir)
2415{
2416#define CODECDBG_AMP(reg, chan) \
2417 codecDbgPrintf(pInfo, "Amp %RU8 %s %s: In=%RTbool, Out=%RTbool, Left=%RTbool, Right=%RTbool, Idx=%RU8, fMute=%RTbool, uGain=%RU8\n", \
2418 uIdx, chan, uDir == AMPLIFIER_IN ? "In" : "Out", \
2419 RT_BOOL(CODEC_SET_AMP_IS_IN_DIRECTION(reg)), RT_BOOL(CODEC_SET_AMP_IS_OUT_DIRECTION(reg)), \
2420 RT_BOOL(CODEC_SET_AMP_IS_LEFT_SIDE(reg)), RT_BOOL(CODEC_SET_AMP_IS_RIGHT_SIDE(reg)), \
2421 CODEC_SET_AMP_INDEX(reg), RT_BOOL(CODEC_SET_AMP_MUTE(reg)), CODEC_SET_AMP_GAIN(reg));
2422
2423 uint32_t regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_LEFT, uIdx);
2424 CODECDBG_AMP(regAmp, "Left");
2425 regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_RIGHT, uIdx);
2426 CODECDBG_AMP(regAmp, "Right");
2427
2428#undef CODECDBG_AMP
2429}
2430
2431static void codecDbgPrintNodeConnections(PCODECDBGINFO pInfo, PCODECNODE pNode)
2432{
2433 if (pNode->node.au32F00_param[0xE] == 0) /* Directly connected to HDA link. */
2434 {
2435 codecDbgPrintf(pInfo, "[HDA LINK]\n");
2436 return;
2437 }
2438}
2439
2440static void codecDbgPrintNode(PCODECDBGINFO pInfo, PCODECNODE pNode)
2441{
2442 codecDbgPrintf(pInfo, "Node 0x%02x (%02RU8): ", pNode->node.id, pNode->node.id);
2443
2444 if (pNode->node.id == STAC9220_NID_ROOT)
2445 {
2446 CODECDBG_PRINT("ROOT\n");
2447 }
2448 else if (pNode->node.id == STAC9220_NID_AFG)
2449 {
2450 CODECDBG_PRINT("AFG\n");
2451 CODECDBG_INDENT
2452 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2453 codecDbgPrintNodeRegF05(pInfo, pNode->afg.u32F05_param);
2454 CODECDBG_UNINDENT
2455 }
2456 else if (hdaCodecIsPortNode(pInfo->pThis, pNode->node.id))
2457 {
2458 CODECDBG_PRINT("PORT\n");
2459 }
2460 else if (hdaCodecIsDacNode(pInfo->pThis, pNode->node.id))
2461 {
2462 CODECDBG_PRINT("DAC\n");
2463 CODECDBG_INDENT
2464 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2465 codecDbgPrintNodeRegF05(pInfo, pNode->dac.u32F05_param);
2466 codecDbgPrintNodeRegA (pInfo, pNode->dac.u32A_param);
2467 codecDbgPrintNodeAmp (pInfo, pNode->dac.B_params, 0, AMPLIFIER_OUT);
2468 CODECDBG_UNINDENT
2469 }
2470 else if (hdaCodecIsAdcVolNode(pInfo->pThis, pNode->node.id))
2471 {
2472 CODECDBG_PRINT("ADC VOLUME\n");
2473 CODECDBG_INDENT
2474 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2475 codecDbgPrintNodeRegA (pInfo, pNode->adcvol.u32A_params);
2476 codecDbgPrintNodeAmp (pInfo, pNode->adcvol.B_params, 0, AMPLIFIER_IN);
2477 CODECDBG_UNINDENT
2478 }
2479 else if (hdaCodecIsAdcNode(pInfo->pThis, pNode->node.id))
2480 {
2481 CODECDBG_PRINT("ADC\n");
2482 CODECDBG_INDENT
2483 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2484 codecDbgPrintNodeRegF05(pInfo, pNode->adc.u32F05_param);
2485 codecDbgPrintNodeRegA (pInfo, pNode->adc.u32A_param);
2486 codecDbgPrintNodeAmp (pInfo, pNode->adc.B_params, 0, AMPLIFIER_IN);
2487 CODECDBG_UNINDENT
2488 }
2489 else if (hdaCodecIsAdcMuxNode(pInfo->pThis, pNode->node.id))
2490 {
2491 CODECDBG_PRINT("ADC MUX\n");
2492 CODECDBG_INDENT
2493 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2494 codecDbgPrintNodeRegA (pInfo, pNode->adcmux.u32A_param);
2495 codecDbgPrintNodeAmp (pInfo, pNode->adcmux.B_params, 0, AMPLIFIER_IN);
2496 CODECDBG_UNINDENT
2497 }
2498 else if (hdaCodecIsPcbeepNode(pInfo->pThis, pNode->node.id))
2499 {
2500 CODECDBG_PRINT("PC BEEP\n");
2501 }
2502 else if (hdaCodecIsSpdifOutNode(pInfo->pThis, pNode->node.id))
2503 {
2504 CODECDBG_PRINT("SPDIF OUT\n");
2505 }
2506 else if (hdaCodecIsSpdifInNode(pInfo->pThis, pNode->node.id))
2507 {
2508 CODECDBG_PRINT("SPDIF IN\n");
2509 }
2510 else if (hdaCodecIsDigInPinNode(pInfo->pThis, pNode->node.id))
2511 {
2512 CODECDBG_PRINT("DIGITAL IN PIN\n");
2513 }
2514 else if (hdaCodecIsDigOutPinNode(pInfo->pThis, pNode->node.id))
2515 {
2516 CODECDBG_PRINT("DIGITAL OUT PIN\n");
2517 }
2518 else if (hdaCodecIsCdNode(pInfo->pThis, pNode->node.id))
2519 {
2520 CODECDBG_PRINT("CD\n");
2521 }
2522 else if (hdaCodecIsVolKnobNode(pInfo->pThis, pNode->node.id))
2523 {
2524 CODECDBG_PRINT("VOLUME KNOB\n");
2525 }
2526 else if (hdaCodecIsReservedNode(pInfo->pThis, pNode->node.id))
2527 {
2528 CODECDBG_PRINT("RESERVED\n");
2529 }
2530 else
2531 CODECDBG_PRINT("UNKNOWN TYPE 0x%x\n", pNode->node.id);
2532}
2533
2534static DECLCALLBACK(void) codecDbgListNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2535{
2536 pHlp->pfnPrintf(pHlp, "HDA LINK\n");
2537
2538 CODECDBGINFO dbgInfo;
2539 dbgInfo.pHlp = pHlp;
2540 dbgInfo.pThis = pThis;
2541 dbgInfo.uLevel = 0;
2542
2543 PCODECDBGINFO pInfo = &dbgInfo;
2544
2545 CODECDBG_INDENT
2546 for (uint8_t i = 0; i < pThis->cTotalNodes; i++)
2547 {
2548 PCODECNODE pNode = &pThis->paNodes[i];
2549 if (pNode->node.au32F00_param[0xE] == 0) /* Start with all nodes connected directly to the HDA (Azalia) link. */
2550 codecDbgPrintNode(&dbgInfo, pNode);
2551 }
2552 CODECDBG_UNINDENT
2553}
2554
2555static DECLCALLBACK(void) codecDbgSelector(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2556{
2557
2558}
2559#endif
2560
2561static int codecLookup(PHDACODEC pThis, uint32_t cmd, PPFNHDACODECVERBPROCESSOR pfn)
2562{
2563 Assert(CODEC_CAD(cmd) == pThis->id);
2564 if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2565 LogFlowFunc(("cmd %x was addressed to reserved node\n", cmd));
2566
2567 if ( CODEC_VERBDATA(cmd) == 0
2568 || CODEC_NID(cmd) >= pThis->cTotalNodes)
2569 {
2570 *pfn = vrbProcUnimplemented;
2571 /// @todo r=michaln: There needs to be a counter to avoid log flooding (see e.g. DevRTC.cpp)
2572 LogFlowFunc(("cmd %x was ignored\n", cmd));
2573 return VINF_SUCCESS;
2574 }
2575
2576 for (int i = 0; i < pThis->cVerbs; ++i)
2577 {
2578 if ((CODEC_VERBDATA(cmd) & pThis->paVerbs[i].mask) == pThis->paVerbs[i].verb)
2579 {
2580 *pfn = pThis->paVerbs[i].pfn;
2581 return VINF_SUCCESS;
2582 }
2583 }
2584
2585 *pfn = vrbProcUnimplemented;
2586 LogFlowFunc(("callback for %x wasn't found\n", CODEC_VERBDATA(cmd)));
2587 return VINF_SUCCESS;
2588}
2589
2590/*
2591 * APIs exposed to DevHDA.
2592 */
2593
2594/**
2595 *
2596 * routines open one of the voices (IN, OUT) with corresponding parameters.
2597 * this routine could be called from HDA on setting/resseting sound format.
2598 *
2599 * @todo Probably passed settings should be verified (if AFG's declared proposed
2600 * format) before enabling.
2601 */
2602int hdaCodecOpenStream(PHDACODEC pThis, ENMSOUNDSOURCE enmSoundSource, PPDMAUDIOSTREAMCFG pCfg)
2603{
2604 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2605
2606 int rc;
2607
2608 switch (enmSoundSource)
2609 {
2610 case PI_INDEX:
2611 rc = pThis->pfnOpenIn(pThis->pHDAState, "hda.in", PDMAUDIORECSOURCE_LINE_IN, pCfg);
2612 break;
2613
2614 case PO_INDEX:
2615 rc = pThis->pfnOpenOut(pThis->pHDAState, "hda.out", pCfg);
2616 break;
2617
2618#ifdef VBOX_WITH_HDA_MIC_IN
2619 case MC_INDEX:
2620 rc = pThis->pfnOpenIn(pThis->pHDAState, "hda.mc", PDMAUDIORECSOURCE_MIC, pCfg);
2621 break;
2622#endif
2623 default:
2624 AssertMsgFailed(("Index %ld not implemented\n", enmSoundSource));
2625 rc = VERR_NOT_IMPLEMENTED;
2626 }
2627
2628 LogFlowFuncLeaveRC(rc);
2629 return rc;
2630}
2631
2632int hdaCodecSaveState(PHDACODEC pThis, PSSMHANDLE pSSM)
2633{
2634 AssertLogRelMsgReturn(pThis->cTotalNodes == 0x1c, ("cTotalNodes=%#x, should be 0x1c", pThis->cTotalNodes),
2635 VERR_INTERNAL_ERROR);
2636 SSMR3PutU32(pSSM, pThis->cTotalNodes);
2637 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
2638 SSMR3PutStructEx(pSSM, &pThis->paNodes[idxNode].SavedState, sizeof(pThis->paNodes[idxNode].SavedState),
2639 0 /*fFlags*/, g_aCodecNodeFields, NULL /*pvUser*/);
2640 return VINF_SUCCESS;
2641}
2642
2643int hdaCodecLoadState(PHDACODEC pThis, PSSMHANDLE pSSM, uint32_t uVersion)
2644{
2645 PCSSMFIELD pFields;
2646 uint32_t fFlags;
2647 switch (uVersion)
2648 {
2649 case HDA_SSM_VERSION_1:
2650 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2651 pFields = g_aCodecNodeFieldsV1;
2652 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
2653 break;
2654
2655 case HDA_SSM_VERSION_2:
2656 case HDA_SSM_VERSION_3:
2657 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2658 pFields = g_aCodecNodeFields;
2659 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
2660 break;
2661
2662 case HDA_SSM_VERSION:
2663 {
2664 uint32_t cNodes;
2665 int rc2 = SSMR3GetU32(pSSM, &cNodes);
2666 AssertRCReturn(rc2, rc2);
2667 if (cNodes != 0x1c)
2668 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
2669 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
2670
2671 pFields = g_aCodecNodeFields;
2672 fFlags = 0;
2673 break;
2674 }
2675
2676 default:
2677 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2678 }
2679
2680 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
2681 {
2682 uint8_t idOld = pThis->paNodes[idxNode].SavedState.Core.id;
2683 int rc = SSMR3GetStructEx(pSSM, &pThis->paNodes[idxNode].SavedState,
2684 sizeof(pThis->paNodes[idxNode].SavedState),
2685 fFlags, pFields, NULL);
2686 if (RT_FAILURE(rc))
2687 return rc;
2688 AssertLogRelMsgReturn(idOld == pThis->paNodes[idxNode].SavedState.Core.id,
2689 ("loaded %#x, expected %#x\n", pThis->paNodes[idxNode].SavedState.Core.id, idOld),
2690 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2691 }
2692
2693 /*
2694 * Update stuff after changing the state.
2695 */
2696 if (hdaCodecIsDacNode(pThis, pThis->u8DacLineOut))
2697 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_PCM);
2698 else if (hdaCodecIsSpdifOutNode(pThis, pThis->u8DacLineOut))
2699 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].spdifout.B_params, PDMAUDIOMIXERCTL_PCM);
2700 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
2701
2702 return VINF_SUCCESS;
2703}
2704
2705int hdaCodecDestruct(PHDACODEC pThis)
2706{
2707 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2708
2709 if (pThis->paNodes)
2710 {
2711 RTMemFree(pThis->paNodes);
2712 pThis->paNodes = NULL;
2713 }
2714
2715 return VINF_SUCCESS;
2716}
2717
2718int hdaCodecConstruct(PPDMDEVINS pDevIns, PHDACODEC pThis,
2719 uint16_t uLUN, PCFGMNODE pCfg)
2720{
2721 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
2722 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2723 AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
2724
2725 pThis->id = uLUN;
2726 pThis->paVerbs = &g_aCodecVerbs[0];
2727 pThis->cVerbs = RT_ELEMENTS(g_aCodecVerbs);
2728 pThis->pfnLookup = codecLookup;
2729#ifdef DEBUG
2730 pThis->pfnDbgSelector = codecDbgSelector;
2731 pThis->pfnDbgListNodes = codecDbgListNodes;
2732#endif
2733 int rc = stac9220Construct(pThis);
2734 AssertRC(rc);
2735
2736 /* common root node initializers */
2737 pThis->paNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pThis->u16VendorId, pThis->u16DeviceId);
2738 pThis->paNodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);
2739 /* common AFG node initializers */
2740 pThis->paNodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pThis->cTotalNodes - 2);
2741 pThis->paNodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);
2742 pThis->paNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pThis->u16VendorId, pThis->u8BSKU, pThis->u8AssemblyId);
2743
2744 /* 44.1 kHz. */
2745 PDMAUDIOSTREAMCFG as;
2746 as.uHz = 44100;
2747 as.cChannels = 2;
2748 as.enmFormat = AUD_FMT_S16;
2749 as.enmEndianness = PDMAUDIOHOSTENDIANNESS;
2750
2751 pThis->paNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT;
2752
2753 hdaCodecOpenStream(pThis, PI_INDEX, &as);
2754 hdaCodecOpenStream(pThis, PO_INDEX, &as);
2755#ifdef VBOX_WITH_HDA_MIC_IN
2756 hdaCodecOpenStream(pThis, MC_INDEX, &as);
2757#endif
2758
2759 pThis->paNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ;
2760
2761 uint8_t i;
2762 Assert(pThis->paNodes);
2763 Assert(pThis->pfnCodecNodeReset);
2764
2765 for (i = 0; i < pThis->cTotalNodes; ++i)
2766 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
2767
2768 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_PCM);
2769 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
2770
2771 return VINF_SUCCESS;
2772}
2773
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