VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/HDAStream.cpp@ 69304

Last change on this file since 69304 was 69119, checked in by vboxsync, 7 years ago

Audio: More cleanups (missing keywords, incorrect #endif docs, stuff)
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  • Property svn:keywords set to Author Date Id Revision
File size: 41.5 KB
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1/* $Id: HDAStream.cpp 69119 2017-10-17 19:08:38Z vboxsync $ */
2/** @file
3 * HDAStream.cpp - Stream functions for HD Audio.
4 */
5
6/*
7 * Copyright (C) 2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_HDA
23#include <VBox/log.h>
24
25#include <iprt/mem.h>
26#include <iprt/semaphore.h>
27
28#include <VBox/vmm/pdmdev.h>
29#include <VBox/vmm/pdmaudioifs.h>
30
31#include "DrvAudio.h"
32
33#include "DevHDA.h"
34#include "HDAStream.h"
35
36
37#ifdef IN_RING3
38
39/**
40 * Creates an HDA stream.
41 *
42 * @returns IPRT status code.
43 * @param pStream HDA stream to create.
44 * @param pThis HDA state to assign the HDA stream to.
45 */
46int hdaStreamCreate(PHDASTREAM pStream, PHDASTATE pThis)
47{
48 RT_NOREF(pThis);
49 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
50
51 pStream->u8SD = UINT8_MAX;
52 pStream->pMixSink = NULL;
53 pStream->pHDAState = pThis;
54
55 pStream->State.fInReset = false;
56#ifdef HDA_USE_DMA_ACCESS_HANDLER
57 RTListInit(&pStream->State.lstDMAHandlers);
58#endif
59
60 int rc = RTCircBufCreate(&pStream->State.pCircBuf, _64K); /** @todo Make this configurable. */
61 if (RT_SUCCESS(rc))
62 {
63 rc = hdaStreamPeriodCreate(&pStream->State.Period);
64 if (RT_SUCCESS(rc))
65 rc = RTCritSectInit(&pStream->State.CritSect);
66 }
67
68#ifdef DEBUG
69 int rc2 = RTCritSectInit(&pStream->Dbg.CritSect);
70 AssertRC(rc2);
71#endif
72
73 return rc;
74}
75
76/**
77 * Destroys an HDA stream.
78 *
79 * @param pStream HDA stream to destroy.
80 */
81void hdaStreamDestroy(PHDASTREAM pStream)
82{
83 AssertPtrReturnVoid(pStream);
84
85 LogFlowFunc(("[SD%RU8]: Destroying ...\n", pStream->u8SD));
86
87 hdaStreamMapDestroy(&pStream->State.Mapping);
88
89 int rc2;
90
91#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
92 rc2 = hdaStreamAsyncIODestroy(pStream);
93 AssertRC(rc2);
94#else
95 RT_NOREF(pThis);
96#endif
97
98 rc2 = RTCritSectDelete(&pStream->State.CritSect);
99 AssertRC(rc2);
100
101 if (pStream->State.pCircBuf)
102 {
103 RTCircBufDestroy(pStream->State.pCircBuf);
104 pStream->State.pCircBuf = NULL;
105 }
106
107 hdaStreamPeriodDestroy(&pStream->State.Period);
108
109#ifdef DEBUG
110 rc2 = RTCritSectDelete(&pStream->Dbg.CritSect);
111 AssertRC(rc2);
112#endif
113
114 LogFlowFuncLeave();
115}
116
117/**
118 * Initializes an HDA stream.
119 *
120 * @returns IPRT status code.
121 * @param pStream HDA stream to initialize.
122 * @param uSD SD (stream descriptor) number to assign the HDA stream to.
123 */
124int hdaStreamInit(PHDASTREAM pStream, uint8_t uSD)
125{
126 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
127
128 PHDASTATE pThis = pStream->pHDAState;
129 AssertPtr(pThis);
130
131 pStream->u8SD = uSD;
132 pStream->u64BDLBase = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, pStream->u8SD),
133 HDA_STREAM_REG(pThis, BDPU, pStream->u8SD));
134 pStream->u16LVI = HDA_STREAM_REG(pThis, LVI, pStream->u8SD);
135 pStream->u32CBL = HDA_STREAM_REG(pThis, CBL, pStream->u8SD);
136 pStream->u16FIFOS = HDA_STREAM_REG(pThis, FIFOS, pStream->u8SD) + 1;
137
138 /* Make sure to also update the stream's DMA counter (based on its current LPIB value). */
139 hdaStreamUpdateLPIB(pStream, HDA_STREAM_REG(pThis, LPIB, pStream->u8SD));
140
141 PPDMAUDIOSTREAMCFG pCfg = &pStream->State.Cfg;
142
143 int rc = hdaSDFMTToPCMProps(HDA_STREAM_REG(pThis, FMT, uSD), &pCfg->Props);
144 if (RT_FAILURE(rc))
145 {
146 LogRel(("HDA: Warning: Format 0x%x for stream #%RU8 not supported\n", HDA_STREAM_REG(pThis, FMT, uSD), uSD));
147 return rc;
148 }
149
150 /* Set the stream's direction. */
151 pCfg->enmDir = hdaGetDirFromSD(pStream->u8SD);
152
153 /* The the stream's name, based on the direction. */
154 switch (pCfg->enmDir)
155 {
156 case PDMAUDIODIR_IN:
157# ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
158# error "Implement me!"
159# else
160 pCfg->DestSource.Source = PDMAUDIORECSOURCE_LINE;
161 pCfg->enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
162 RTStrCopy(pCfg->szName, sizeof(pCfg->szName), "Line In");
163# endif
164 break;
165
166 case PDMAUDIODIR_OUT:
167 /* Destination(s) will be set in hdaAddStreamOut(),
168 * based on the channels / stream layout. */
169 break;
170
171 default:
172 rc = VERR_NOT_SUPPORTED;
173 break;
174 }
175
176 /*
177 * Initialize the stream mapping in any case, regardless if
178 * we support surround audio or not. This is needed to handle
179 * the supported channels within a single audio stream, e.g. mono/stereo.
180 *
181 * In other words, the stream mapping *always* knows the real
182 * number of channels in a single audio stream.
183 */
184 rc = hdaStreamMapInit(&pStream->State.Mapping, &pCfg->Props);
185 AssertRCReturn(rc, rc);
186
187 LogFunc(("[SD%RU8] DMA @ 0x%x (%RU32 bytes), LVI=%RU16, FIFOS=%RU16, rc=%Rrc\n",
188 pStream->u8SD, pStream->u64BDLBase, pStream->u32CBL, pStream->u16LVI, pStream->u16FIFOS, rc));
189
190 return rc;
191}
192
193/**
194 * Resets an HDA stream.
195 *
196 * @param pThis HDA state.
197 * @param pStream HDA stream to reset.
198 * @param uSD Stream descriptor (SD) number to use for this stream.
199 */
200void hdaStreamReset(PHDASTATE pThis, PHDASTREAM pStream, uint8_t uSD)
201{
202 AssertPtrReturnVoid(pThis);
203 AssertPtrReturnVoid(pStream);
204 AssertReturnVoid(uSD < HDA_MAX_STREAMS);
205
206# ifdef VBOX_STRICT
207 AssertReleaseMsg(!RT_BOOL(HDA_STREAM_REG(pThis, CTL, uSD) & HDA_SDCTL_RUN),
208 ("[SD%RU8] Cannot reset stream while in running state\n", uSD));
209# endif
210
211 LogFunc(("[SD%RU8]: Reset\n", uSD));
212
213 /*
214 * Set reset state.
215 */
216 Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false); /* No nested calls. */
217 ASMAtomicXchgBool(&pStream->State.fInReset, true);
218
219 /*
220 * Second, initialize the registers.
221 */
222 HDA_STREAM_REG(pThis, STS, uSD) = HDA_SDSTS_FIFORDY;
223 /* According to the ICH6 datasheet, 0x40000 is the default value for stream descriptor register 23:20
224 * bits are reserved for stream number 18.2.33, resets SDnCTL except SRST bit. */
225 HDA_STREAM_REG(pThis, CTL, uSD) = 0x40000 | (HDA_STREAM_REG(pThis, CTL, uSD) & HDA_SDCTL_SRST);
226 /* ICH6 defines default values (120 bytes for input and 192 bytes for output descriptors) of FIFO size. 18.2.39. */
227 HDA_STREAM_REG(pThis, FIFOS, uSD) = hdaGetDirFromSD(uSD) == PDMAUDIODIR_IN ? HDA_SDIFIFO_120B : HDA_SDOFIFO_192B;
228 /* See 18.2.38: Always defaults to 0x4 (32 bytes). */
229 HDA_STREAM_REG(pThis, FIFOW, uSD) = HDA_SDFIFOW_32B;
230 HDA_STREAM_REG(pThis, LPIB, uSD) = 0;
231 HDA_STREAM_REG(pThis, CBL, uSD) = 0;
232 HDA_STREAM_REG(pThis, LVI, uSD) = 0;
233 HDA_STREAM_REG(pThis, FMT, uSD) = 0;
234 HDA_STREAM_REG(pThis, BDPU, uSD) = 0;
235 HDA_STREAM_REG(pThis, BDPL, uSD) = 0;
236
237#ifdef HDA_USE_DMA_ACCESS_HANDLER
238 hdaStreamUnregisterDMAHandlers(pThis, pStream);
239#endif
240
241 RT_ZERO(pStream->State.BDLE);
242 pStream->State.uCurBDLE = 0;
243
244 if (pStream->State.pCircBuf)
245 RTCircBufReset(pStream->State.pCircBuf);
246
247 /* Reset stream map. */
248 hdaStreamMapReset(&pStream->State.Mapping);
249
250 /* (Re-)initialize the stream with current values. */
251 int rc2 = hdaStreamInit(pStream, uSD);
252 AssertRC(rc2);
253
254 /* Reset the stream's period. */
255 hdaStreamPeriodReset(&pStream->State.Period);
256
257#ifdef DEBUG
258 pStream->Dbg.cReadsTotal = 0;
259 pStream->Dbg.cbReadTotal = 0;
260 pStream->Dbg.tsLastReadNs = 0;
261 pStream->Dbg.cWritesTotal = 0;
262 pStream->Dbg.cbWrittenTotal = 0;
263 pStream->Dbg.cWritesHz = 0;
264 pStream->Dbg.cbWrittenHz = 0;
265 pStream->Dbg.tsWriteSlotBegin = 0;
266#endif
267
268 /* Report that we're done resetting this stream. */
269 HDA_STREAM_REG(pThis, CTL, uSD) = 0;
270
271 LogFunc(("[SD%RU8] Reset\n", uSD));
272
273 /* Exit reset mode. */
274 ASMAtomicXchgBool(&pStream->State.fInReset, false);
275}
276
277/**
278 * Enables or disables an HDA audio stream.
279 *
280 * @returns IPRT status code.
281 * @param pStream HDA stream to enable or disable.
282 * @param fEnable Whether to enable or disble the stream.
283 */
284int hdaStreamEnable(PHDASTREAM pStream, bool fEnable)
285{
286 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
287
288 LogFunc(("[SD%RU8]: fEnable=%RTbool, pMixSink=%p\n", pStream->u8SD, fEnable, pStream->pMixSink));
289
290 int rc = VINF_SUCCESS;
291
292 if (pStream->pMixSink) /* Stream attached to a sink? */
293 {
294 AUDMIXSINKCMD enmCmd = fEnable
295 ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE;
296
297 /* First, enable or disable the stream and the stream's sink, if any. */
298 if (pStream->pMixSink->pMixSink)
299 rc = AudioMixerSinkCtl(pStream->pMixSink->pMixSink, enmCmd);
300 }
301
302 LogFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
303 return rc;
304}
305
306/**
307 * Returns the number of outstanding stream data bytes which need to be processed
308 * by the DMA engine assigned to this stream.
309 *
310 * @return Number of bytes for the DMA engine to process.
311 */
312uint32_t hdaStreamGetTransferSize(PHDASTATE pThis, PHDASTREAM pStream)
313{
314 AssertPtrReturn(pThis, 0);
315 AssertPtrReturn(pStream, 0);
316
317 if (!RT_BOOL(HDA_STREAM_REG(pThis, CTL, pStream->u8SD) & HDA_SDCTL_RUN))
318 {
319 AssertFailed(); /* Should never happen. */
320 return 0;
321 }
322
323 /* Determine how much for the current BDL entry we have left to transfer. */
324 PHDABDLE pBDLE = &pStream->State.BDLE;
325 const uint32_t cbBDLE = RT_MIN(pBDLE->Desc.u32BufSize, pBDLE->Desc.u32BufSize - pBDLE->State.u32BufOff);
326
327 /* Determine how much we (still) can stuff in the stream's internal FIFO. */
328 const uint32_t cbCircBuf = (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
329
330 uint32_t cbToTransfer = cbBDLE;
331
332 /* Make sure that we don't transfer more than our FIFO can hold at the moment.
333 * As the host sets the overall pace it needs to process some of the FIFO data first before
334 * we can issue a new DMA data transfer. */
335 if (cbToTransfer > cbCircBuf)
336 cbToTransfer = cbCircBuf;
337
338 Log3Func(("[SD%RU8] LPIB=%RU32 CBL=%RU32 cbCircBuf=%RU32, -> cbToTransfer=%RU32 %R[bdle]\n", pStream->u8SD,
339 HDA_STREAM_REG(pThis, LPIB, pStream->u8SD), pStream->u32CBL, cbCircBuf, cbToTransfer, pBDLE));
340 return cbToTransfer;
341}
342
343/**
344 * Increases the amount of transferred (audio) data of an HDA stream and
345 * reports this as needed to the guest.
346 *
347 * @param pStream HDA stream to increase amount for.
348 * @param cbInc Amount (in bytes) to increase.
349 */
350void hdaStreamTransferInc(PHDASTREAM pStream, uint32_t cbInc)
351{
352 AssertPtrReturnVoid(pStream);
353
354 if (!cbInc)
355 return;
356
357 const PHDASTATE pThis = pStream->pHDAState;
358
359 const uint32_t u32LPIB = HDA_STREAM_REG(pThis, LPIB, pStream->u8SD);
360
361 Log3Func(("[SD%RU8] %RU32 + %RU32 -> %RU32, CBL=%RU32\n",
362 pStream->u8SD, u32LPIB, cbInc, u32LPIB + cbInc, pStream->u32CBL));
363
364 hdaStreamUpdateLPIB(pStream, u32LPIB + cbInc);
365}
366
367/**
368 * Retrieves the available size of (buffered) audio data (in bytes) of a given HDA stream.
369 *
370 * @returns Available data (in bytes).
371 * @param pStream HDA stream to retrieve size for.
372 */
373uint32_t hdaStreamGetUsed(PHDASTREAM pStream)
374{
375 AssertPtrReturn(pStream, 0);
376
377 if (!pStream->State.pCircBuf)
378 return 0;
379
380 return (uint32_t)RTCircBufUsed(pStream->State.pCircBuf);
381}
382
383/**
384 * Retrieves the free size of audio data (in bytes) of a given HDA stream.
385 *
386 * @returns Free data (in bytes).
387 * @param pStream HDA stream to retrieve size for.
388 */
389uint32_t hdaStreamGetFree(PHDASTREAM pStream)
390{
391 AssertPtrReturn(pStream, 0);
392
393 if (!pStream->State.pCircBuf)
394 return 0;
395
396 return (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
397}
398
399
400/**
401 * Writes audio data from a mixer sink into an HDA stream's DMA buffer.
402 *
403 * @returns IPRT status code.
404 * @param pStream HDA stream to write to.
405 * @param cbToWrite Number of bytes to write.
406 * @param pcbWritten Number of bytes written. Optional.
407 */
408int hdaStreamWrite(PHDASTREAM pStream, uint32_t cbToWrite, uint32_t *pcbWritten)
409{
410 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
411 AssertReturn(cbToWrite, VERR_INVALID_PARAMETER);
412 /* pcbWritten is optional. */
413
414 PHDAMIXERSINK pSink = pStream->pMixSink;
415 if (!pSink)
416 {
417 AssertMsgFailed(("[SD%RU8]: Can't write to a stream with no sink attached\n", pStream->u8SD));
418
419 if (pcbWritten)
420 *pcbWritten = 0;
421 return VINF_SUCCESS;
422 }
423
424 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
425 AssertPtr(pCircBuf);
426
427 int rc = VINF_SUCCESS;
428
429 uint32_t cbWrittenTotal = 0;
430 uint32_t cbLeft = RT_MIN(cbToWrite, (uint32_t)RTCircBufFree(pCircBuf));
431
432 while (cbLeft)
433 {
434 void *pvDst;
435 size_t cbDst;
436
437 uint32_t cbRead = 0;
438
439 RTCircBufAcquireWriteBlock(pCircBuf, cbLeft, &pvDst, &cbDst);
440
441 if (cbDst)
442 {
443 rc = AudioMixerSinkRead(pSink->pMixSink, AUDMIXOP_COPY, pvDst, (uint32_t)cbDst, &cbRead);
444 AssertRC(rc);
445
446 Assert(cbDst >= cbRead);
447 Log2Func(("[SD%RU8]: %RU32/%zu bytes read\n", pStream->u8SD, cbRead, cbDst));
448
449#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
450 RTFILE fh;
451 RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "hdaStreamWrite.pcm",
452 RTFILE_O_OPEN_CREATE | RTFILE_O_APPEND | RTFILE_O_WRITE | RTFILE_O_DENY_NONE);
453 RTFileWrite(fh, pvDst, cbRead, NULL);
454 RTFileClose(fh);
455#endif
456 }
457
458 RTCircBufReleaseWriteBlock(pCircBuf, cbRead);
459
460 if (RT_FAILURE(rc))
461 break;
462
463 Assert(cbLeft >= cbRead);
464 cbLeft -= cbRead;
465
466 cbWrittenTotal += cbRead;
467 }
468
469 if (pcbWritten)
470 *pcbWritten = cbWrittenTotal;
471
472 return rc;
473}
474
475
476/**
477 * Reads audio data from an HDA stream's DMA buffer and writes into a specified mixer sink.
478 *
479 * @returns IPRT status code.
480 * @param pStream HDA stream to read audio data from.
481 * @param cbToRead Number of bytes to read.
482 * @param pcbRead Number of bytes read. Optional.
483 */
484int hdaStreamRead(PHDASTREAM pStream, uint32_t cbToRead, uint32_t *pcbRead)
485{
486 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
487 AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
488 /* pcbWritten is optional. */
489
490 PHDAMIXERSINK pSink = pStream->pMixSink;
491 if (!pSink)
492 {
493 AssertMsgFailed(("[SD%RU8]: Can't read from a stream with no sink attached\n", pStream->u8SD));
494
495 if (pcbRead)
496 *pcbRead = 0;
497 return VINF_SUCCESS;
498 }
499
500 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
501 AssertPtr(pCircBuf);
502
503 int rc = VINF_SUCCESS;
504
505 uint32_t cbReadTotal = 0;
506 uint32_t cbLeft = RT_MIN(cbToRead, (uint32_t)RTCircBufUsed(pCircBuf));
507
508 while (cbLeft)
509 {
510 void *pvSrc;
511 size_t cbSrc;
512
513 uint32_t cbWritten = 0;
514
515 RTCircBufAcquireReadBlock(pCircBuf, cbLeft, &pvSrc, &cbSrc);
516
517 if (cbSrc)
518 {
519#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
520 RTFILE fh;
521 RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "hdaStreamRead.pcm",
522 RTFILE_O_OPEN_CREATE | RTFILE_O_APPEND | RTFILE_O_WRITE | RTFILE_O_DENY_NONE);
523 RTFileWrite(fh, pvSrc, cbSrc, NULL);
524 RTFileClose(fh);
525#endif
526 rc = AudioMixerSinkWrite(pSink->pMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
527 AssertRC(rc);
528
529 Assert(cbSrc >= cbWritten);
530 Log2Func(("[SD%RU8]: %zu/%zu bytes read\n", pStream->u8SD, cbWritten, cbSrc));
531 }
532
533 RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
534
535 if (RT_FAILURE(rc))
536 break;
537
538 Assert(cbLeft >= cbWritten);
539 cbLeft -= cbWritten;
540
541 cbReadTotal += cbWritten;
542 }
543
544 if (pcbRead)
545 *pcbRead = cbReadTotal;
546
547 return rc;
548}
549
550uint32_t hdaStreamTransferGetElapsed(PHDASTREAM pStream)
551{
552 AssertPtr(pStream->pHDAState->pTimer);
553 const uint64_t cTicksNow = TMTimerGet(pStream->pHDAState->pTimer);
554 const uint64_t cTicksPerSec = TMTimerGetFreq(pStream->pHDAState->pTimer);
555
556 const uint64_t cTicksElapsed = cTicksNow - pStream->State.uTimerTS;
557#ifdef DEBUG
558 const uint64_t cMsElapsed = cTicksElapsed / (cTicksPerSec / 1000);
559#endif
560
561 AssertPtr(pStream->pHDAState->pCodec);
562
563 PPDMAUDIOSTREAMCFG pCfg = &pStream->State.Cfg;
564
565 /* A stream *always* runs with 48 kHz device-wise, regardless of the actual stream input/output format (Hz) being set. */
566 uint32_t csPerPeriod = (int)((pCfg->Props.cChannels * cTicksElapsed * 48000 /* Hz */ + cTicksPerSec) / cTicksPerSec / 2);
567 uint32_t cbPerPeriod = csPerPeriod << pCfg->Props.cShift;
568
569 Log3Func(("[SD%RU8] %RU64ms (%zu samples, %zu bytes) elapsed\n", pStream->u8SD, cMsElapsed, csPerPeriod, cbPerPeriod));
570
571 return cbPerPeriod;
572}
573
574/**
575 * Transfers data of an HDA stream according to its usage (input / output).
576 *
577 * For an SDO (output) stream this means reading DMA data from the device to
578 * the HDA stream's internal FIFO buffer.
579 *
580 * For an SDI (input) stream this is reading audio data from the HDA stream's
581 * internal FIFO buffer and writing it as DMA data to the device.
582 *
583 * @returns IPRT status code.
584 * @param pStream HDA stream to update.
585 * @param cbToProcessMax Maximum of data (in bytes) to process.
586 */
587int hdaStreamTransfer(PHDASTREAM pStream, uint32_t cbToProcessMax)
588{
589 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
590 AssertReturn(cbToProcessMax, VERR_INVALID_PARAMETER);
591
592 hdaStreamLock(pStream);
593
594 PHDASTATE pThis = pStream->pHDAState;
595 AssertPtr(pThis);
596
597 PHDASTREAMPERIOD pPeriod = &pStream->State.Period;
598 int rc = hdaStreamPeriodLock(pPeriod);
599 AssertRC(rc);
600
601 bool fProceed = true;
602
603 /* Stream not running? */
604 if (!(HDA_STREAM_REG(pThis, CTL, pStream->u8SD) & HDA_SDCTL_RUN))
605 {
606 Log3Func(("[SD%RU8] RUN bit not set\n", pStream->u8SD));
607 fProceed = false;
608 }
609 /* Period complete? */
610 else if (hdaStreamPeriodIsComplete(pPeriod))
611 {
612 Log3Func(("[SD%RU8] Period is complete, nothing to do\n", pStream->u8SD));
613 fProceed = false;
614 }
615
616 if (!fProceed)
617 {
618 hdaStreamPeriodUnlock(pPeriod);
619 hdaStreamUnlock(pStream);
620 return VINF_SUCCESS;
621 }
622
623 /* Sanity checks. */
624 Assert(pStream->u8SD < HDA_MAX_STREAMS);
625 Assert(pStream->u64BDLBase);
626 Assert(pStream->u32CBL);
627
628 /* State sanity checks. */
629 Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false);
630
631 /* Fetch first / next BDL entry. */
632 PHDABDLE pBDLE = &pStream->State.BDLE;
633 if (hdaBDLEIsComplete(pBDLE))
634 {
635 rc = hdaBDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
636 AssertRC(rc);
637 }
638
639 const uint32_t cbPeriodRemaining = hdaStreamPeriodGetRemainingFrames(pPeriod) * HDA_FRAME_SIZE;
640 Assert(cbPeriodRemaining); /* Paranoia. */
641
642 const uint32_t cbElapsed = hdaStreamTransferGetElapsed(pStream);
643 Assert(cbElapsed); /* Paranoia. */
644
645 /* Limit the data to read, as this routine could be delayed and therefore
646 * report wrong (e.g. too much) cbElapsed bytes. */
647 uint32_t cbLeft = RT_MIN(RT_MIN(cbPeriodRemaining, cbElapsed), cbToProcessMax);
648
649 Log3Func(("[SD%RU8] cbPeriodRemaining=%RU32, cbElapsed=%RU32, cbToProcessMax=%RU32 -> cbLeft=%RU32\n",
650 pStream->u8SD, cbPeriodRemaining, cbElapsed, cbToProcessMax, cbLeft));
651
652 Assert(cbLeft % HDA_FRAME_SIZE == 0); /* Paranoia. */
653
654 while (cbLeft)
655 {
656 uint32_t cbChunk = RT_MIN(hdaStreamGetTransferSize(pThis, pStream), cbLeft);
657 if (!cbChunk)
658 break;
659
660 uint32_t cbDMA = 0;
661
662 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
663 {
664 STAM_PROFILE_START(&pThis->StatOut, a);
665
666 rc = hdaDMARead(pThis, pStream, cbChunk, &cbDMA /* pcbRead */);
667 if (RT_FAILURE(rc))
668 LogRel(("HDA: Reading from stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
669
670 STAM_PROFILE_STOP(&pThis->StatOut, a);
671 }
672 else if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN) /* Input (SDI). */
673 {
674 STAM_PROFILE_START(&pThis->StatIn, a);
675
676 rc = hdaDMAWrite(pThis, pStream, cbChunk, &cbDMA /* pcbWritten */);
677 if (RT_FAILURE(rc))
678 LogRel(("HDA: Writing to stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
679
680 STAM_PROFILE_STOP(&pThis->StatIn, a);
681 }
682 else /** @todo Handle duplex streams? */
683 AssertFailed();
684
685 if (cbDMA)
686 {
687 Assert(cbDMA % HDA_FRAME_SIZE == 0);
688
689 /* We always increment the position of DMA buffer counter because we're always reading
690 * into an intermediate buffer. */
691 pBDLE->State.u32BufOff += (uint32_t)cbDMA;
692 Assert(pBDLE->State.u32BufOff <= pBDLE->Desc.u32BufSize);
693
694 hdaStreamTransferInc(pStream, cbDMA);
695
696 uint32_t framesDMA = cbDMA / HDA_FRAME_SIZE;
697
698 /* Add the transferred frames to the period. */
699 hdaStreamPeriodInc(pPeriod, framesDMA);
700
701 /* Save the timestamp of when the last successful DMA transfer has been for this stream. */
702 pStream->State.uTimerTS = TMTimerGet(pThis->pTimer);
703
704 Assert(cbLeft >= cbDMA);
705 cbLeft -= cbDMA;
706 }
707
708 if (hdaBDLEIsComplete(pBDLE))
709 {
710 Log3Func(("[SD%RU8] Complete: %R[bdle]\n", pStream->u8SD, pBDLE));
711
712 if (hdaBDLENeedsInterrupt(pBDLE))
713 {
714 /* If the IOCE ("Interrupt On Completion Enable") bit of the SDCTL register is set
715 * we need to generate an interrupt.
716 */
717 if (HDA_STREAM_REG(pThis, CTL, pStream->u8SD) & HDA_SDCTL_IOCE)
718 hdaStreamPeriodAcquireInterrupt(pPeriod);
719 }
720
721 if (pStream->State.uCurBDLE == pStream->u16LVI)
722 {
723 Assert(pStream->u32CBL == HDA_STREAM_REG(pThis, LPIB, pStream->u8SD));
724
725 pStream->State.uCurBDLE = 0;
726 hdaStreamUpdateLPIB(pStream, 0 /* LPIB */);
727 }
728 else
729 pStream->State.uCurBDLE++;
730
731 hdaBDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
732
733 Log3Func(("[SD%RU8] Fetching: %R[bdle]\n", pStream->u8SD, pBDLE));
734 }
735
736 if (RT_FAILURE(rc))
737 break;
738 }
739
740 if (hdaStreamPeriodIsComplete(pPeriod))
741 {
742 Log3Func(("[SD%RU8] Period complete -- Current: %R[bdle]\n", pStream->u8SD, &pStream->State.BDLE));
743
744 /* Set the stream's BCIS bit.
745 *
746 * Note: This only must be done if the whole period is complete, and not if only
747 * one specific BDL entry is complete (if it has the IOC bit set).
748 *
749 * This will otherwise confuses the guest when it 1) deasserts the interrupt,
750 * 2) reads SDSTS (with BCIS set) and then 3) too early reads a (wrong) WALCLK value.
751 *
752 * snd_hda_intel on Linux will tell. */
753 HDA_STREAM_REG(pThis, STS, pStream->u8SD) |= HDA_SDSTS_BCIS;
754
755 /* Try updating the wall clock. */
756 const uint64_t u64WalClk = hdaStreamPeriodGetAbsElapsedWalClk(pPeriod);
757 const bool fWalClkSet = hdaWalClkSet(pThis, u64WalClk, false /* fForce */);
758
759 /* Does the period have any interrupts outstanding? */
760 if (hdaStreamPeriodNeedsInterrupt(pPeriod))
761 {
762 if (fWalClkSet)
763 {
764 Log3Func(("[SD%RU8] Set WALCLK to %RU64, triggering interrupt\n", pStream->u8SD, u64WalClk));
765
766 /* Trigger an interrupt first and let hdaRegWriteSDSTS() deal with
767 * ending / beginning a period. */
768#ifndef DEBUG
769 hdaProcessInterrupt(pThis);
770#else
771 hdaProcessInterrupt(pThis, __FUNCTION__);
772#endif
773 }
774 }
775 else
776 {
777 /* End the period first ... */
778 hdaStreamPeriodEnd(pPeriod);
779
780 /* ... and immediately begin the next one. */
781 hdaStreamPeriodBegin(pPeriod, hdaWalClkGetCurrent(pThis));
782 }
783 }
784
785 hdaStreamPeriodUnlock(pPeriod);
786
787 Log3Func(("[SD%RU8] Returning %Rrc ==========================================\n", pStream->u8SD, rc));
788
789 if (RT_FAILURE(rc))
790 LogFunc(("[SD%RU8] Failed with rc=%Rrcc\n", pStream->u8SD, rc));
791
792 hdaStreamUnlock(pStream);
793
794 return VINF_SUCCESS;
795}
796
797/**
798 * Updates a HDA stream by doing its required data transfers.
799 * The host sink(s) set the overall pace.
800 *
801 * This routine is called by both, the synchronous and the asynchronous, implementations.
802 *
803 * @param pStream HDA stream to update.
804 * @param fInTimer Whether to this function was called from the timer
805 * context or an asynchronous I/O stream thread (if supported).
806 */
807void hdaStreamUpdate(PHDASTREAM pStream, bool fInTimer)
808{
809 PAUDMIXSINK pSink = NULL;
810 if ( pStream->pMixSink
811 && pStream->pMixSink->pMixSink)
812 {
813 pSink = pStream->pMixSink->pMixSink;
814 }
815
816 if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
817 return;
818
819 int rc2;
820
821 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
822 {
823 /* Is the HDA stream ready to be written (guest output data) to? If so, by how much? */
824 const uint32_t cbFree = hdaStreamGetFree(pStream);
825
826 if ( fInTimer
827 && cbFree)
828 {
829 Log3Func(("[SD%RU8] cbFree=%RU32\n", pStream->u8SD, cbFree));
830
831 /* Do the DMA transfer. */
832 rc2 = hdaStreamTransfer(pStream, cbFree);
833 AssertRC(rc2);
834 }
835
836 /* How much (guest output) data is available at the moment for the HDA stream? */
837 uint32_t cbUsed = hdaStreamGetUsed(pStream);
838
839#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
840 if ( fInTimer
841 && cbUsed)
842 {
843 rc2 = hdaStreamAsyncIONotify(pStream);
844 AssertRC(rc2);
845 }
846 else
847 {
848#endif
849 const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
850
851 /* Do not write more than the sink can hold at the moment.
852 * The host sets the overall pace. */
853 if (cbUsed > cbSinkWritable)
854 cbUsed = cbSinkWritable;
855
856 if (cbUsed)
857 {
858 /* Read (guest output) data and write it to the stream's sink. */
859 rc2 = hdaStreamRead(pStream, cbUsed, NULL /* pcbRead */);
860 AssertRC(rc2);
861 }
862
863 /* When running synchronously, update the associated sink here.
864 * Otherwise this will be done in the device timer. */
865 rc2 = AudioMixerSinkUpdate(pSink);
866 AssertRC(rc2);
867
868#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
869 }
870#endif
871 }
872 else /* Input (SDI). */
873 {
874#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
875 if (fInTimer)
876 {
877 rc2 = hdaStreamAsyncIONotify(pStream);
878 AssertRC(rc2);
879 }
880 else
881 {
882#endif
883 rc2 = AudioMixerSinkUpdate(pSink);
884 AssertRC(rc2);
885
886 /* Is the sink ready to be read (host input data) from? If so, by how much? */
887 const uint32_t cbReadable = AudioMixerSinkGetReadable(pSink);
888
889 /* How much (guest input) data is free at the moment? */
890 uint32_t cbFree = hdaStreamGetFree(pStream);
891
892 Log3Func(("[SD%RU8] cbReadable=%RU32, cbFree=%RU32\n", pStream->u8SD, cbReadable, cbFree));
893
894 /* Do not read more than the sink can provide at the moment.
895 * The host sets the overall pace. */
896 if (cbFree > cbReadable)
897 cbFree = cbReadable;
898
899 if (cbFree)
900 {
901 /* Write (guest input) data to the stream which was read from stream's sink before. */
902 rc2 = hdaStreamWrite(pStream, cbFree, NULL /* pcbWritten */);
903 AssertRC(rc2);
904 }
905#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
906 }
907#endif
908
909#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
910 if (fInTimer)
911 {
912#endif
913 const uint32_t cbToTransfer = hdaStreamGetUsed(pStream);
914 if (cbToTransfer)
915 {
916 /* When running synchronously, do the DMA data transfers here.
917 * Otherwise this will be done in the stream's async I/O thread. */
918 rc2 = hdaStreamTransfer(pStream, cbToTransfer);
919 AssertRC(rc2);
920 }
921#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
922 }
923#endif
924 }
925}
926
927/**
928 * Locks an HDA stream for serialized access.
929 *
930 * @returns IPRT status code.
931 * @param pStream HDA stream to lock.
932 */
933void hdaStreamLock(PHDASTREAM pStream)
934{
935 AssertPtrReturnVoid(pStream);
936 int rc2 = RTCritSectEnter(&pStream->State.CritSect);
937 AssertRC(rc2);
938}
939
940/**
941 * Unlocks a formerly locked HDA stream.
942 *
943 * @returns IPRT status code.
944 * @param pStream HDA stream to unlock.
945 */
946void hdaStreamUnlock(PHDASTREAM pStream)
947{
948 AssertPtrReturnVoid(pStream);
949 int rc2 = RTCritSectLeave(&pStream->State.CritSect);
950 AssertRC(rc2);
951}
952
953/**
954 * Updates an HDA stream's current read or write buffer position (depending on the stream type) by
955 * updating its associated LPIB register and DMA position buffer (if enabled).
956 *
957 * @returns Set LPIB value.
958 * @param pStream HDA stream to update read / write position for.
959 * @param u32LPIB New LPIB (position) value to set.
960 */
961uint32_t hdaStreamUpdateLPIB(PHDASTREAM pStream, uint32_t u32LPIB)
962{
963 AssertPtrReturn(pStream, 0);
964
965 AssertMsg(u32LPIB <= pStream->u32CBL,
966 ("[SD%RU8] New LPIB (%RU32) exceeds CBL (%RU32)\n", pStream->u8SD, u32LPIB, pStream->u32CBL));
967
968 const PHDASTATE pThis = pStream->pHDAState;
969
970 u32LPIB = RT_MIN(u32LPIB, pStream->u32CBL);
971
972 LogFlowFunc(("[SD%RU8]: LPIB=%RU32 (DMA Position Buffer Enabled: %RTbool)\n",
973 pStream->u8SD, u32LPIB, pThis->fDMAPosition));
974
975 /* Update LPIB in any case. */
976 HDA_STREAM_REG(pThis, LPIB, pStream->u8SD) = u32LPIB;
977
978 /* Do we need to tell the current DMA position? */
979 if (pThis->fDMAPosition)
980 {
981 int rc2 = PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns),
982 pThis->u64DPBase + (pStream->u8SD * 2 * sizeof(uint32_t)),
983 (void *)&u32LPIB, sizeof(uint32_t));
984 AssertRC(rc2);
985 }
986
987 return u32LPIB;
988}
989
990# ifdef HDA_USE_DMA_ACCESS_HANDLER
991/**
992 * Registers access handlers for a stream's BDLE DMA accesses.
993 *
994 * @returns true if registration was successful, false if not.
995 * @param pStream HDA stream to register BDLE access handlers for.
996 */
997bool hdaStreamRegisterDMAHandlers(PHDASTREAM pStream)
998{
999 /* At least LVI and the BDL base must be set. */
1000 if ( !pStream->u16LVI
1001 || !pStream->u64BDLBase)
1002 {
1003 return false;
1004 }
1005
1006 hdaStreamUnregisterDMAHandlers(pStream);
1007
1008 LogFunc(("Registering ...\n"));
1009
1010 int rc = VINF_SUCCESS;
1011
1012 /*
1013 * Create BDLE ranges.
1014 */
1015
1016 struct BDLERANGE
1017 {
1018 RTGCPHYS uAddr;
1019 uint32_t uSize;
1020 } arrRanges[16]; /** @todo Use a define. */
1021
1022 size_t cRanges = 0;
1023
1024 for (uint16_t i = 0; i < pStream->u16LVI + 1; i++)
1025 {
1026 HDABDLE BDLE;
1027 rc = hdaBDLEFetch(pThis, &BDLE, pStream->u64BDLBase, i /* Index */);
1028 if (RT_FAILURE(rc))
1029 break;
1030
1031 bool fAddRange = true;
1032 BDLERANGE *pRange;
1033
1034 if (cRanges)
1035 {
1036 pRange = &arrRanges[cRanges - 1];
1037
1038 /* Is the current range a direct neighbor of the current BLDE? */
1039 if ((pRange->uAddr + pRange->uSize) == BDLE.Desc.u64BufAdr)
1040 {
1041 /* Expand the current range by the current BDLE's size. */
1042 pRange->uSize += BDLE.Desc.u32BufSize;
1043
1044 /* Adding a new range in this case is not needed anymore. */
1045 fAddRange = false;
1046
1047 LogFunc(("Expanding range %zu by %RU32 (%RU32 total now)\n", cRanges - 1, BDLE.Desc.u32BufSize, pRange->uSize));
1048 }
1049 }
1050
1051 /* Do we need to add a new range? */
1052 if ( fAddRange
1053 && cRanges < RT_ELEMENTS(arrRanges))
1054 {
1055 pRange = &arrRanges[cRanges];
1056
1057 pRange->uAddr = BDLE.Desc.u64BufAdr;
1058 pRange->uSize = BDLE.Desc.u32BufSize;
1059
1060 LogFunc(("Adding range %zu - 0x%x (%RU32)\n", cRanges, pRange->uAddr, pRange->uSize));
1061
1062 cRanges++;
1063 }
1064 }
1065
1066 LogFunc(("%zu ranges total\n", cRanges));
1067
1068 /*
1069 * Register all ranges as DMA access handlers.
1070 */
1071
1072 for (size_t i = 0; i < cRanges; i++)
1073 {
1074 BDLERANGE *pRange = &arrRanges[i];
1075
1076 PHDADMAACCESSHANDLER pHandler = (PHDADMAACCESSHANDLER)RTMemAllocZ(sizeof(HDADMAACCESSHANDLER));
1077 if (!pHandler)
1078 {
1079 rc = VERR_NO_MEMORY;
1080 break;
1081 }
1082
1083 RTListAppend(&pStream->State.lstDMAHandlers, &pHandler->Node);
1084
1085 pHandler->pStream = pStream; /* Save a back reference to the owner. */
1086
1087 char szDesc[32];
1088 RTStrPrintf(szDesc, sizeof(szDesc), "HDA[SD%RU8 - RANGE%02zu]", pStream->u8SD, i);
1089
1090 int rc2 = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3), PGMPHYSHANDLERKIND_WRITE,
1091 hdaDMAAccessHandler,
1092 NULL, NULL, NULL,
1093 NULL, NULL, NULL,
1094 szDesc, &pHandler->hAccessHandlerType);
1095 AssertRCBreak(rc2);
1096
1097 pHandler->BDLEAddr = pRange->uAddr;
1098 pHandler->BDLESize = pRange->uSize;
1099
1100 /* Get first and last pages of the BDLE range. */
1101 RTGCPHYS pgFirst = pRange->uAddr & ~PAGE_OFFSET_MASK;
1102 RTGCPHYS pgLast = RT_ALIGN(pgFirst + pRange->uSize, PAGE_SIZE);
1103
1104 /* Calculate the region size (in pages). */
1105 RTGCPHYS regionSize = RT_ALIGN(pgLast - pgFirst, PAGE_SIZE);
1106
1107 pHandler->GCPhysFirst = pgFirst;
1108 pHandler->GCPhysLast = pHandler->GCPhysFirst + (regionSize - 1);
1109
1110 LogFunc(("\tRegistering region '%s': 0x%x - 0x%x (region size: %zu)\n",
1111 szDesc, pHandler->GCPhysFirst, pHandler->GCPhysLast, regionSize));
1112 LogFunc(("\tBDLE @ 0x%x - 0x%x (%RU32)\n",
1113 pHandler->BDLEAddr, pHandler->BDLEAddr + pHandler->BDLESize, pHandler->BDLESize));
1114
1115 rc2 = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
1116 pHandler->GCPhysFirst, pHandler->GCPhysLast,
1117 pHandler->hAccessHandlerType, pHandler, NIL_RTR0PTR, NIL_RTRCPTR,
1118 szDesc);
1119 AssertRCBreak(rc2);
1120
1121 pHandler->fRegistered = true;
1122 }
1123
1124 LogFunc(("Registration ended with rc=%Rrc\n", rc));
1125
1126 return RT_SUCCESS(rc);
1127}
1128
1129/**
1130 * Unregisters access handlers of a stream's BDLEs.
1131 *
1132 * @param pStream HDA stream to unregister BDLE access handlers for.
1133 */
1134void hdaStreamUnregisterDMAHandlers(PHDASTREAM pStream)
1135{
1136 LogFunc(("\n"));
1137
1138 PHDADMAACCESSHANDLER pHandler, pHandlerNext;
1139 RTListForEachSafe(&pStream->State.lstDMAHandlers, pHandler, pHandlerNext, HDADMAACCESSHANDLER, Node)
1140 {
1141 if (!pHandler->fRegistered) /* Handler not registered? Skip. */
1142 continue;
1143
1144 LogFunc(("Unregistering 0x%x - 0x%x (%zu)\n",
1145 pHandler->GCPhysFirst, pHandler->GCPhysLast, pHandler->GCPhysLast - pHandler->GCPhysFirst));
1146
1147 int rc2 = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
1148 pHandler->GCPhysFirst);
1149 AssertRC(rc2);
1150
1151 RTListNodeRemove(&pHandler->Node);
1152
1153 RTMemFree(pHandler);
1154 pHandler = NULL;
1155 }
1156
1157 Assert(RTListIsEmpty(&pStream->State.lstDMAHandlers));
1158}
1159# endif /* HDA_USE_DMA_ACCESS_HANDLER */
1160
1161# ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1162/**
1163 * Asynchronous I/O thread for a HDA stream.
1164 * This will do the heavy lifting work for us as soon as it's getting notified by another thread.
1165 *
1166 * @returns IPRT status code.
1167 * @param hThreadSelf Thread handle.
1168 * @param pvUser User argument. Must be of type PHDASTREAMTHREADCTX.
1169 */
1170DECLCALLBACK(int) hdaStreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
1171{
1172 PHDASTREAMTHREADCTX pCtx = (PHDASTREAMTHREADCTX)pvUser;
1173 AssertPtr(pCtx);
1174
1175 PHDASTREAM pStream = pCtx->pStream;
1176 AssertPtr(pStream);
1177
1178 PHDASTREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
1179
1180 ASMAtomicXchgBool(&pAIO->fStarted, true);
1181
1182 RTThreadUserSignal(hThreadSelf);
1183
1184 LogFunc(("[SD%RU8]: Started\n", pStream->u8SD));
1185
1186 for (;;)
1187 {
1188 int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1189 if (RT_FAILURE(rc2))
1190 break;
1191
1192 if (ASMAtomicReadBool(&pAIO->fShutdown))
1193 break;
1194
1195 rc2 = RTCritSectEnter(&pAIO->CritSect);
1196 if (RT_SUCCESS(rc2))
1197 {
1198 if (!pAIO->fEnabled)
1199 {
1200 RTCritSectLeave(&pAIO->CritSect);
1201 continue;
1202 }
1203
1204 hdaStreamUpdate(pStream, false /* fInTimer */);
1205
1206 int rc3 = RTCritSectLeave(&pAIO->CritSect);
1207 AssertRC(rc3);
1208 }
1209
1210 AssertRC(rc2);
1211 }
1212
1213 LogFunc(("[SD%RU8]: Ended\n", pStream->u8SD));
1214
1215 ASMAtomicXchgBool(&pAIO->fStarted, false);
1216
1217 return VINF_SUCCESS;
1218}
1219
1220/**
1221 * Creates the async I/O thread for a specific HDA audio stream.
1222 *
1223 * @returns IPRT status code.
1224 * @param pStream HDA audio stream to create the async I/O thread for.
1225 */
1226int hdaStreamAsyncIOCreate(PHDASTREAM pStream)
1227{
1228 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1229
1230 int rc;
1231
1232 if (!ASMAtomicReadBool(&pAIO->fStarted))
1233 {
1234 pAIO->fShutdown = false;
1235
1236 rc = RTSemEventCreate(&pAIO->Event);
1237 if (RT_SUCCESS(rc))
1238 {
1239 rc = RTCritSectInit(&pAIO->CritSect);
1240 if (RT_SUCCESS(rc))
1241 {
1242 HDASTREAMTHREADCTX Ctx = { pStream->pHDAState, pStream };
1243
1244 char szThreadName[64];
1245 RTStrPrintf2(szThreadName, sizeof(szThreadName), "hdaAIO%RU8", pStream->u8SD);
1246
1247 rc = RTThreadCreate(&pAIO->Thread, hdaStreamAsyncIOThread, &Ctx,
1248 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
1249 if (RT_SUCCESS(rc))
1250 rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
1251 }
1252 }
1253 }
1254 else
1255 rc = VINF_SUCCESS;
1256
1257 LogFunc(("[SD%RU8]: Returning %Rrc\n", pStream->u8SD, rc));
1258 return rc;
1259}
1260
1261/**
1262 * Destroys the async I/O thread of a specific HDA audio stream.
1263 *
1264 * @returns IPRT status code.
1265 * @param pStream HDA audio stream to destroy the async I/O thread for.
1266 */
1267int hdaStreamAsyncIODestroy(PHDASTREAM pStream)
1268{
1269 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1270
1271 if (!ASMAtomicReadBool(&pAIO->fStarted))
1272 return VINF_SUCCESS;
1273
1274 ASMAtomicWriteBool(&pAIO->fShutdown, true);
1275
1276 int rc = hdaStreamAsyncIONotify(pStream);
1277 AssertRC(rc);
1278
1279 int rcThread;
1280 rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
1281 LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
1282
1283 if (RT_SUCCESS(rc))
1284 {
1285 rc = RTCritSectDelete(&pAIO->CritSect);
1286 AssertRC(rc);
1287
1288 rc = RTSemEventDestroy(pAIO->Event);
1289 AssertRC(rc);
1290
1291 pAIO->fStarted = false;
1292 pAIO->fShutdown = false;
1293 pAIO->fEnabled = false;
1294 }
1295
1296 LogFunc(("[SD%RU8]: Returning %Rrc\n", pStream->u8SD, rc));
1297 return rc;
1298}
1299
1300/**
1301 * Lets the stream's async I/O thread know that there is some data to process.
1302 *
1303 * @returns IPRT status code.
1304 * @param pStream HDA stream to notify async I/O thread for.
1305 */
1306int hdaStreamAsyncIONotify(PHDASTREAM pStream)
1307{
1308 return RTSemEventSignal(pStream->State.AIO.Event);
1309}
1310
1311/**
1312 * Locks the async I/O thread of a specific HDA audio stream.
1313 *
1314 * @param pStream HDA stream to lock async I/O thread for.
1315 */
1316void hdaStreamAsyncIOLock(PHDASTREAM pStream)
1317{
1318 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1319
1320 if (!ASMAtomicReadBool(&pAIO->fStarted))
1321 return;
1322
1323 int rc2 = RTCritSectEnter(&pAIO->CritSect);
1324 AssertRC(rc2);
1325}
1326
1327/**
1328 * Unlocks the async I/O thread of a specific HDA audio stream.
1329 *
1330 * @param pStream HDA stream to unlock async I/O thread for.
1331 */
1332void hdaStreamAsyncIOUnlock(PHDASTREAM pStream)
1333{
1334 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1335
1336 if (!ASMAtomicReadBool(&pAIO->fStarted))
1337 return;
1338
1339 int rc2 = RTCritSectLeave(&pAIO->CritSect);
1340 AssertRC(rc2);
1341}
1342
1343/**
1344 * Enables (resumes) or disables (pauses) the async I/O thread.
1345 *
1346 * @param pStream HDA stream to enable/disable async I/O thread for.
1347 * @param fEnable Whether to enable or disable the I/O thread.
1348 *
1349 * @remarks Does not do locking.
1350 */
1351void hdaStreamAsyncIOEnable(PHDASTREAM pStream, bool fEnable)
1352{
1353 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1354 ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
1355}
1356# endif /* VBOX_WITH_AUDIO_HDA_ASYNC_IO */
1357
1358#endif /* IN_RING3 */
1359
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