VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/HDAStream.cpp@ 70363

Last change on this file since 70363 was 70321, checked in by vboxsync, 7 years ago

Audio/HDA: Logging.
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1/* $Id: HDAStream.cpp 70321 2017-12-22 16:21:59Z vboxsync $ */
2/** @file
3 * HDAStream.cpp - Stream functions for HD Audio.
4 */
5
6/*
7 * Copyright (C) 2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_HDA
23#include <VBox/log.h>
24
25#include <iprt/mem.h>
26#include <iprt/semaphore.h>
27
28#include <VBox/vmm/pdmdev.h>
29#include <VBox/vmm/pdmaudioifs.h>
30
31#include "DrvAudio.h"
32
33#include "DevHDA.h"
34#include "HDAStream.h"
35
36
37#ifdef IN_RING3
38
39/**
40 * Creates an HDA stream.
41 *
42 * @returns IPRT status code.
43 * @param pStream HDA stream to create.
44 * @param pThis HDA state to assign the HDA stream to.
45 * @param u8SD Stream descriptor number to assign.
46 */
47int hdaStreamCreate(PHDASTREAM pStream, PHDASTATE pThis, uint8_t u8SD)
48{
49 RT_NOREF(pThis);
50 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
51
52 pStream->u8SD = u8SD;
53 pStream->pMixSink = NULL;
54 pStream->pHDAState = pThis;
55
56 pStream->State.fInReset = false;
57 pStream->State.fRunning = false;
58#ifdef HDA_USE_DMA_ACCESS_HANDLER
59 RTListInit(&pStream->State.lstDMAHandlers);
60#endif
61
62 int rc = RTCircBufCreate(&pStream->State.pCircBuf, _64K); /** @todo Make this configurable. */
63 if (RT_SUCCESS(rc))
64 {
65 rc = hdaStreamPeriodCreate(&pStream->State.Period);
66 if (RT_SUCCESS(rc))
67 rc = RTCritSectInit(&pStream->State.CritSect);
68 }
69
70 int rc2;
71
72#ifdef DEBUG
73 rc2 = RTCritSectInit(&pStream->Dbg.CritSect);
74 AssertRC(rc2);
75#endif
76
77 pStream->Dbg.Runtime.fEnabled = pThis->Dbg.fEnabled;
78
79 if (pStream->Dbg.Runtime.fEnabled)
80 {
81 char szFile[64];
82
83 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
84 RTStrPrintf(szFile, sizeof(szFile), "hdaStreamWriteSD%RU8", pStream->u8SD);
85 else
86 RTStrPrintf(szFile, sizeof(szFile), "hdaStreamReadSD%RU8", pStream->u8SD);
87
88 char szPath[RTPATH_MAX + 1];
89 rc2 = DrvAudioHlpGetFileName(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
90 0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAG_NONE);
91 AssertRC(rc2);
92 rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAG_NONE, &pStream->Dbg.Runtime.pFileStream);
93 AssertRC(rc2);
94
95 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
96 RTStrPrintf(szFile, sizeof(szFile), "hdaDMAWriteSD%RU8", pStream->u8SD);
97 else
98 RTStrPrintf(szFile, sizeof(szFile), "hdaDMAReadSD%RU8", pStream->u8SD);
99
100 rc2 = DrvAudioHlpGetFileName(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
101 0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAG_NONE);
102 AssertRC(rc2);
103
104 rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAG_NONE, &pStream->Dbg.Runtime.pFileDMA);
105 AssertRC(rc2);
106
107 /* Delete stale debugging files from a former run. */
108 DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileStream);
109 DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileDMA);
110 }
111
112 return rc;
113}
114
115/**
116 * Destroys an HDA stream.
117 *
118 * @param pStream HDA stream to destroy.
119 */
120void hdaStreamDestroy(PHDASTREAM pStream)
121{
122 AssertPtrReturnVoid(pStream);
123
124 LogFlowFunc(("[SD%RU8]: Destroying ...\n", pStream->u8SD));
125
126 hdaStreamMapDestroy(&pStream->State.Mapping);
127
128 int rc2;
129
130#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
131 rc2 = hdaStreamAsyncIODestroy(pStream);
132 AssertRC(rc2);
133#endif
134
135 rc2 = RTCritSectDelete(&pStream->State.CritSect);
136 AssertRC(rc2);
137
138 if (pStream->State.pCircBuf)
139 {
140 RTCircBufDestroy(pStream->State.pCircBuf);
141 pStream->State.pCircBuf = NULL;
142 }
143
144 hdaStreamPeriodDestroy(&pStream->State.Period);
145
146#ifdef DEBUG
147 rc2 = RTCritSectDelete(&pStream->Dbg.CritSect);
148 AssertRC(rc2);
149#endif
150
151 if (pStream->Dbg.Runtime.fEnabled)
152 {
153 DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileStream);
154 pStream->Dbg.Runtime.pFileStream = NULL;
155
156 DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileDMA);
157 pStream->Dbg.Runtime.pFileDMA = NULL;
158 }
159
160 LogFlowFuncLeave();
161}
162
163/**
164 * Initializes an HDA stream.
165 *
166 * @returns IPRT status code.
167 * @param pStream HDA stream to initialize.
168 * @param uSD SD (stream descriptor) number to assign the HDA stream to.
169 */
170int hdaStreamInit(PHDASTREAM pStream, uint8_t uSD)
171{
172 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
173
174 PHDASTATE pThis = pStream->pHDAState;
175 AssertPtr(pThis);
176
177 pStream->u8SD = uSD;
178 pStream->u64BDLBase = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, pStream->u8SD),
179 HDA_STREAM_REG(pThis, BDPU, pStream->u8SD));
180 pStream->u16LVI = HDA_STREAM_REG(pThis, LVI, pStream->u8SD);
181 pStream->u32CBL = HDA_STREAM_REG(pThis, CBL, pStream->u8SD);
182 pStream->u16FIFOS = HDA_STREAM_REG(pThis, FIFOS, pStream->u8SD) + 1;
183
184 PPDMAUDIOSTREAMCFG pCfg = &pStream->State.Cfg;
185
186 int rc = hdaSDFMTToPCMProps(HDA_STREAM_REG(pThis, FMT, uSD), &pCfg->Props);
187 if (RT_FAILURE(rc))
188 {
189 LogRel(("HDA: Warning: Format 0x%x for stream #%RU8 not supported\n", HDA_STREAM_REG(pThis, FMT, uSD), uSD));
190 return rc;
191 }
192
193 /* Set the stream's direction. */
194 pCfg->enmDir = hdaGetDirFromSD(pStream->u8SD);
195
196 /* The the stream's name, based on the direction. */
197 switch (pCfg->enmDir)
198 {
199 case PDMAUDIODIR_IN:
200# ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
201# error "Implement me!"
202# else
203 pCfg->DestSource.Source = PDMAUDIORECSOURCE_LINE;
204 pCfg->enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
205 RTStrCopy(pCfg->szName, sizeof(pCfg->szName), "Line In");
206# endif
207 break;
208
209 case PDMAUDIODIR_OUT:
210 /* Destination(s) will be set in hdaAddStreamOut(),
211 * based on the channels / stream layout. */
212 break;
213
214 default:
215 rc = VERR_NOT_SUPPORTED;
216 break;
217 }
218
219 /* Set the stream's frame size. */
220 pStream->State.cbFrameSize = pCfg->Props.cChannels * (pCfg->Props.cBits / 8 /* To bytes */);
221
222 /*
223 * Initialize the stream mapping in any case, regardless if
224 * we support surround audio or not. This is needed to handle
225 * the supported channels within a single audio stream, e.g. mono/stereo.
226 *
227 * In other words, the stream mapping *always* knows the real
228 * number of channels in a single audio stream.
229 */
230 rc = hdaStreamMapInit(&pStream->State.Mapping, &pCfg->Props);
231 AssertRCReturn(rc, rc);
232
233 LogFunc(("[SD%RU8] DMA @ 0x%x (%RU32 bytes), LVI=%RU16, FIFOS=%RU16, Hz=%RU32, rc=%Rrc\n",
234 pStream->u8SD, pStream->u64BDLBase, pStream->u32CBL, pStream->u16LVI, pStream->u16FIFOS,
235 pStream->State.Cfg.Props.uHz, rc));
236
237 if ( pStream->u32CBL
238 && pStream->u16LVI)
239 {
240 /* Make sure that the chosen Hz rate dividable by the stream's rate. */
241 if (pStream->State.Cfg.Props.uHz % pThis->u16TimerHz != 0)
242 LogRel(("HDA: Device timer (%RU32) does not fit to stream #RU8 timing (%RU32)\n",
243 pThis->u16TimerHz, pStream->State.Cfg.Props.uHz));
244
245 /** @todo Use a more dynamic fragment size? */
246 Assert(pStream->u16LVI <= UINT8_MAX - 1);
247 uint8_t cFragments = pStream->u16LVI + 1;
248 if (cFragments <= 1)
249 cFragments = 2; /* At least two fragments (BDLEs) must be present. */
250
251 /* Calculate the fragment size the guest OS expects interrupt delivery at. */
252 pStream->State.cbTransferSize = pStream->u32CBL / cFragments;
253 Assert(pStream->State.cbTransferSize);
254 Assert(pStream->State.cbTransferSize % pStream->State.cbFrameSize == 0);
255
256 /* Calculate the bytes we need to transfer to / from the stream's DMA per iteration.
257 * This is bound to the device's Hz rate and thus to the (virtual) timing the device expects. */
258 pStream->State.cbTransferChunk = (pStream->State.Cfg.Props.uHz / pThis->u16TimerHz) * pStream->State.cbFrameSize;
259 Assert(pStream->State.cbTransferChunk);
260 Assert(pStream->State.cbTransferChunk % pStream->State.cbFrameSize == 0);
261
262 /* Make sure that the transfer chunk does not exceed the overall transfer size. */
263 if (pStream->State.cbTransferChunk > pStream->State.cbTransferSize)
264 pStream->State.cbTransferChunk = pStream->State.cbTransferSize;
265
266 pStream->State.cbTransferProcessed = 0;
267 pStream->State.cTransferPendingInterrupts = 0;
268
269 const uint64_t cTicksPerHz = TMTimerGetFreq(pThis->pTimer) / pThis->u16TimerHz;
270
271 /* Calculate the timer ticks per byte for this stream. */
272 pStream->State.cTicksPerByte = cTicksPerHz / pStream->State.cbTransferChunk;
273 Assert(pStream->State.cTicksPerByte);
274
275 /* Calculate timer ticks per transfer. */
276 pStream->State.cTransferTicks = pStream->State.cbTransferChunk * pStream->State.cTicksPerByte;
277
278 /* Initialize the transfer timestamps. */
279 pStream->State.tsTransferLast = 0;
280 pStream->State.tsTransferNext = 0;
281
282 LogFunc(("[SD%RU8] Timer %uHz (%RU64 ticks per Hz), cTicksPerByte=%RU64, cbTransferChunk=%RU32, cTransferTicks=%RU64, " \
283 "cbTransferSize=%RU32\n",
284 pStream->u8SD, pThis->u16TimerHz, cTicksPerHz, pStream->State.cTicksPerByte,
285 pStream->State.cbTransferChunk, pStream->State.cTransferTicks, pStream->State.cbTransferSize));
286 /*
287 * Handle the stream's position adjustment.
288 */
289 uint32_t cfPosAdjust = 0;
290
291 if (pThis->fPosAdjustEnabled) /* Is the position adjustment enabled at all? */
292 {
293 /* If no custom set position adjustment is set, apply some
294 * simple heuristics to detect the appropriate position adjustment. */
295 if ( pStream->u64BDLBase
296 && !pThis->cPosAdjustFrames)
297 {
298 HDABDLE BDLE;
299 int rc2 = hdaBDLEFetch(pThis, &BDLE, pStream->u64BDLBase, 0 /* Entry */);
300 AssertRC(rc2);
301
302 /** @todo Implement / use a (dynamic) table once this gets more complicated. */
303
304#ifdef VBOX_WITH_INTEL_HDA
305 /* Intel ICH / PCH: 1 frame. */
306 if (BDLE.Desc.u32BufSize == 1 * pStream->State.cbFrameSize)
307 {
308 cfPosAdjust = 1;
309 }
310 /* Intel Baytrail / Braswell: 32 frames. */
311 else if (BDLE.Desc.u32BufSize == 32 * pStream->State.cbFrameSize)
312 {
313 cfPosAdjust = 32;
314 }
315 else
316#endif
317 cfPosAdjust = pThis->cPosAdjustFrames;
318 }
319 else /* Go with the set default. */
320 cfPosAdjust = pThis->cPosAdjustFrames;
321
322 if (cfPosAdjust)
323 {
324 /* Initialize position adjustment counter. */
325 pStream->State.cPosAdjustFramesLeft = cfPosAdjust;
326 LogRel2(("HDA: Position adjustment for stream #%RU8 active (%RU32 frames)\n", pStream->u8SD, cfPosAdjust));
327 }
328 }
329
330 LogFunc(("[SD%RU8] cfPosAdjust=%RU32\n", pStream->u8SD, cfPosAdjust));
331
332 /* Make sure to also update the stream's DMA counter (based on its current LPIB value). */
333 hdaStreamSetPosition(pStream, HDA_STREAM_REG(pThis, LPIB, pStream->u8SD));
334
335#ifdef LOG_ENABLED
336 hdaBDLEDumpAll(pThis, pStream->u64BDLBase, pStream->u16LVI + 1);
337#endif
338 }
339
340 return rc;
341}
342
343/**
344 * Resets an HDA stream.
345 *
346 * @param pThis HDA state.
347 * @param pStream HDA stream to reset.
348 * @param uSD Stream descriptor (SD) number to use for this stream.
349 */
350void hdaStreamReset(PHDASTATE pThis, PHDASTREAM pStream, uint8_t uSD)
351{
352 AssertPtrReturnVoid(pThis);
353 AssertPtrReturnVoid(pStream);
354 AssertReturnVoid(uSD < HDA_MAX_STREAMS);
355
356# ifdef VBOX_STRICT
357 AssertReleaseMsg(!pStream->State.fRunning, ("[SD%RU8] Cannot reset stream while in running state\n", uSD));
358# endif
359
360 LogFunc(("[SD%RU8]: Reset\n", uSD));
361
362 /*
363 * Set reset state.
364 */
365 Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false); /* No nested calls. */
366 ASMAtomicXchgBool(&pStream->State.fInReset, true);
367
368 /*
369 * Second, initialize the registers.
370 */
371 HDA_STREAM_REG(pThis, STS, uSD) = HDA_SDSTS_FIFORDY;
372 /* According to the ICH6 datasheet, 0x40000 is the default value for stream descriptor register 23:20
373 * bits are reserved for stream number 18.2.33, resets SDnCTL except SRST bit. */
374 HDA_STREAM_REG(pThis, CTL, uSD) = 0x40000 | (HDA_STREAM_REG(pThis, CTL, uSD) & HDA_SDCTL_SRST);
375 /* ICH6 defines default values (120 bytes for input and 192 bytes for output descriptors) of FIFO size. 18.2.39. */
376 HDA_STREAM_REG(pThis, FIFOS, uSD) = hdaGetDirFromSD(uSD) == PDMAUDIODIR_IN ? HDA_SDIFIFO_120B : HDA_SDOFIFO_192B;
377 /* See 18.2.38: Always defaults to 0x4 (32 bytes). */
378 HDA_STREAM_REG(pThis, FIFOW, uSD) = HDA_SDFIFOW_32B;
379 HDA_STREAM_REG(pThis, LPIB, uSD) = 0;
380 HDA_STREAM_REG(pThis, CBL, uSD) = 0;
381 HDA_STREAM_REG(pThis, LVI, uSD) = 0;
382 HDA_STREAM_REG(pThis, FMT, uSD) = 0;
383 HDA_STREAM_REG(pThis, BDPU, uSD) = 0;
384 HDA_STREAM_REG(pThis, BDPL, uSD) = 0;
385
386#ifdef HDA_USE_DMA_ACCESS_HANDLER
387 hdaStreamUnregisterDMAHandlers(pThis, pStream);
388#endif
389
390 /* Assign the default mixer sink to the stream. */
391 pStream->pMixSink = hdaGetDefaultSink(pThis, uSD);
392
393 pStream->State.tsTransferLast = 0;
394 pStream->State.tsTransferNext = 0;
395
396 RT_ZERO(pStream->State.BDLE);
397 pStream->State.uCurBDLE = 0;
398
399 if (pStream->State.pCircBuf)
400 RTCircBufReset(pStream->State.pCircBuf);
401
402 /* Reset stream map. */
403 hdaStreamMapReset(&pStream->State.Mapping);
404
405 /* (Re-)initialize the stream with current values. */
406 int rc2 = hdaStreamInit(pStream, uSD);
407 AssertRC(rc2);
408
409 /* Reset the stream's period. */
410 hdaStreamPeriodReset(&pStream->State.Period);
411
412#ifdef DEBUG
413 pStream->Dbg.cReadsTotal = 0;
414 pStream->Dbg.cbReadTotal = 0;
415 pStream->Dbg.tsLastReadNs = 0;
416 pStream->Dbg.cWritesTotal = 0;
417 pStream->Dbg.cbWrittenTotal = 0;
418 pStream->Dbg.cWritesHz = 0;
419 pStream->Dbg.cbWrittenHz = 0;
420 pStream->Dbg.tsWriteSlotBegin = 0;
421#endif
422
423 /* Report that we're done resetting this stream. */
424 HDA_STREAM_REG(pThis, CTL, uSD) = 0;
425
426 LogFunc(("[SD%RU8] Reset\n", uSD));
427
428 /* Exit reset mode. */
429 ASMAtomicXchgBool(&pStream->State.fInReset, false);
430}
431
432/**
433 * Enables or disables an HDA audio stream.
434 *
435 * @returns IPRT status code.
436 * @param pStream HDA stream to enable or disable.
437 * @param fEnable Whether to enable or disble the stream.
438 */
439int hdaStreamEnable(PHDASTREAM pStream, bool fEnable)
440{
441 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
442
443 LogFunc(("[SD%RU8]: fEnable=%RTbool, pMixSink=%p\n", pStream->u8SD, fEnable, pStream->pMixSink));
444
445 int rc = VINF_SUCCESS;
446
447 if (!pStream->pMixSink) /* Stream attached to a sink? */
448 {
449 AssertMsgFailed(("Stream #%RU8 not has no mixer sink attached\n", pStream->u8SD));
450 return VERR_WRONG_ORDER;
451 }
452
453 AUDMIXSINKCMD enmCmd = fEnable
454 ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE;
455
456 /* First, enable or disable the stream and the stream's sink, if any. */
457 if (pStream->pMixSink->pMixSink)
458 rc = AudioMixerSinkCtl(pStream->pMixSink->pMixSink, enmCmd);
459
460 if ( RT_SUCCESS(rc)
461 && pStream->Dbg.Runtime.fEnabled)
462 {
463 Assert(DrvAudioHlpPCMPropsAreValid(&pStream->State.Cfg.Props));
464
465 if (fEnable)
466 {
467 int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileStream, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
468 &pStream->State.Cfg.Props);
469 AssertRC(rc2);
470
471 rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileDMA, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
472 &pStream->State.Cfg.Props);
473 AssertRC(rc2);
474 }
475 else
476 {
477 int rc2 = DrvAudioHlpFileClose(pStream->Dbg.Runtime.pFileStream);
478 AssertRC(rc2);
479
480 rc2 = DrvAudioHlpFileClose(pStream->Dbg.Runtime.pFileDMA);
481 AssertRC(rc2);
482 }
483 }
484
485 if (RT_SUCCESS(rc))
486 {
487 pStream->State.fRunning = fEnable;
488 }
489
490 LogFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
491 return rc;
492}
493
494uint32_t hdaStreamGetPosition(PHDASTATE pThis, PHDASTREAM pStream)
495{
496 return HDA_STREAM_REG(pThis, LPIB, pStream->u8SD);
497}
498
499/**
500 * Updates an HDA stream's current read or write buffer position (depending on the stream type) by
501 * updating its associated LPIB register and DMA position buffer (if enabled).
502 *
503 * @param pStream HDA stream to update read / write position for.
504 * @param u32LPIB Absolute position (in bytes) to set current read / write position to.
505 */
506void hdaStreamSetPosition(PHDASTREAM pStream, uint32_t u32LPIB)
507{
508 AssertPtrReturnVoid(pStream);
509
510 Assert(u32LPIB % pStream->State.cbFrameSize == 0);
511
512 Log3Func(("[SD%RU8] LPIB=%RU32 (DMA Position Buffer Enabled: %RTbool)\n",
513 pStream->u8SD, u32LPIB, pStream->pHDAState->fDMAPosition));
514
515 /* Update LPIB in any case. */
516 HDA_STREAM_REG(pStream->pHDAState, LPIB, pStream->u8SD) = u32LPIB;
517
518 /* Do we need to tell the current DMA position? */
519 if (pStream->pHDAState->fDMAPosition)
520 {
521 int rc2 = PDMDevHlpPCIPhysWrite(pStream->pHDAState->CTX_SUFF(pDevIns),
522 pStream->pHDAState->u64DPBase + (pStream->u8SD * 2 * sizeof(uint32_t)),
523 (void *)&u32LPIB, sizeof(uint32_t));
524 AssertRC(rc2);
525 }
526}
527
528/**
529 * Retrieves the available size of (buffered) audio data (in bytes) of a given HDA stream.
530 *
531 * @returns Available data (in bytes).
532 * @param pStream HDA stream to retrieve size for.
533 */
534uint32_t hdaStreamGetUsed(PHDASTREAM pStream)
535{
536 AssertPtrReturn(pStream, 0);
537
538 if (!pStream->State.pCircBuf)
539 return 0;
540
541 return (uint32_t)RTCircBufUsed(pStream->State.pCircBuf);
542}
543
544/**
545 * Retrieves the free size of audio data (in bytes) of a given HDA stream.
546 *
547 * @returns Free data (in bytes).
548 * @param pStream HDA stream to retrieve size for.
549 */
550uint32_t hdaStreamGetFree(PHDASTREAM pStream)
551{
552 AssertPtrReturn(pStream, 0);
553
554 if (!pStream->State.pCircBuf)
555 return 0;
556
557 return (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
558}
559
560/**
561 * Returns whether a next transfer for a given stream is scheduled or not.
562 * This takes pending stream interrupts into account as well as the next scheduled
563 * transfer timestamp.
564 *
565 * @returns True if a next transfer is scheduled, false if not.
566 * @param pStream HDA stream to retrieve schedule status for.
567 */
568bool hdaStreamTransferIsScheduled(PHDASTREAM pStream)
569{
570 if (!pStream)
571 return false;
572
573 AssertPtrReturn(pStream->pHDAState, false);
574
575 const bool fScheduled = pStream->State.fRunning
576 && ( pStream->State.cTransferPendingInterrupts
577 || pStream->State.tsTransferNext > TMTimerGet(pStream->pHDAState->pTimer));
578
579 Log3Func(("[SD%RU8] tsTransferNext=%RU64, cTransferPendingInterrupts=%RU8 -> %RTbool\n",
580 pStream->u8SD, pStream->State.tsTransferNext, pStream->State.cTransferPendingInterrupts, fScheduled));
581
582 return fScheduled;
583}
584
585/**
586 * Returns the (virtual) clock timestamp of the next transfer, if any.
587 * Will return 0 if no new transfer is scheduled.
588 *
589 * @returns The (virtual) clock timestamp of the next transfer.
590 * @param pStream HDA stream to retrieve timestamp for.
591 */
592uint64_t hdaStreamTransferGetNext(PHDASTREAM pStream)
593{
594 return pStream->State.tsTransferNext;
595}
596
597/**
598 * Writes audio data from a mixer sink into an HDA stream's DMA buffer.
599 *
600 * @returns IPRT status code.
601 * @param pStream HDA stream to write to.
602 * @param pvBuf Data buffer to write.
603 * If NULL, silence will be written.
604 * @param cbBuf Number of bytes of data buffer to write.
605 * @param pcbWritten Number of bytes written. Optional.
606 */
607int hdaStreamWrite(PHDASTREAM pStream, const void *pvBuf, uint32_t cbBuf, uint32_t *pcbWritten)
608{
609 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
610 /* pvBuf is optional. */
611 AssertReturn(cbBuf, VERR_INVALID_PARAMETER);
612 /* pcbWritten is optional. */
613
614 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
615 AssertPtr(pCircBuf);
616
617 int rc = VINF_SUCCESS;
618
619 uint32_t cbWrittenTotal = 0;
620 uint32_t cbLeft = RT_MIN(cbBuf, (uint32_t)RTCircBufFree(pCircBuf));
621
622 while (cbLeft)
623 {
624 void *pvDst;
625 size_t cbDst;
626
627 RTCircBufAcquireWriteBlock(pCircBuf, cbLeft, &pvDst, &cbDst);
628
629 if (cbDst)
630 {
631 if (pvBuf)
632 {
633 memcpy(pvDst, (uint8_t *)pvBuf + cbWrittenTotal, cbDst);
634 }
635 else /* Send silence. */
636 {
637 /** @todo Use a sample spec for "silence" based on the PCM parameters.
638 * For now we ASSUME that silence equals NULLing the data. */
639 RT_BZERO(pvDst, cbDst);
640 }
641
642 if (pStream->Dbg.Runtime.fEnabled)
643 DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileStream, pvDst, cbDst, 0 /* fFlags */);
644 }
645
646 RTCircBufReleaseWriteBlock(pCircBuf, cbDst);
647
648 if (RT_FAILURE(rc))
649 break;
650
651 Assert(cbLeft >= (uint32_t)cbDst);
652 cbLeft -= (uint32_t)cbDst;
653
654 cbWrittenTotal += (uint32_t)cbDst;
655 }
656
657 if (pcbWritten)
658 *pcbWritten = cbWrittenTotal;
659
660 return rc;
661}
662
663
664/**
665 * Reads audio data from an HDA stream's DMA buffer and writes into a specified mixer sink.
666 *
667 * @returns IPRT status code.
668 * @param pStream HDA stream to read audio data from.
669 * @param cbToRead Number of bytes to read.
670 * @param pcbRead Number of bytes read. Optional.
671 */
672int hdaStreamRead(PHDASTREAM pStream, uint32_t cbToRead, uint32_t *pcbRead)
673{
674 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
675 AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
676 /* pcbWritten is optional. */
677
678 PHDAMIXERSINK pSink = pStream->pMixSink;
679 if (!pSink)
680 {
681 AssertMsgFailed(("[SD%RU8]: Can't read from a stream with no sink attached\n", pStream->u8SD));
682
683 if (pcbRead)
684 *pcbRead = 0;
685 return VINF_SUCCESS;
686 }
687
688 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
689 AssertPtr(pCircBuf);
690
691 int rc = VINF_SUCCESS;
692
693 uint32_t cbReadTotal = 0;
694 uint32_t cbLeft = RT_MIN(cbToRead, (uint32_t)RTCircBufUsed(pCircBuf));
695
696 while (cbLeft)
697 {
698 void *pvSrc;
699 size_t cbSrc;
700
701 uint32_t cbWritten = 0;
702
703 RTCircBufAcquireReadBlock(pCircBuf, cbLeft, &pvSrc, &cbSrc);
704
705 if (cbSrc)
706 {
707 if (pStream->Dbg.Runtime.fEnabled)
708 DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileStream, pvSrc, cbSrc, 0 /* fFlags */);
709
710 rc = AudioMixerSinkWrite(pSink->pMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
711 AssertRC(rc);
712
713 Assert(cbSrc >= cbWritten);
714 Log2Func(("[SD%RU8]: %zu/%zu bytes read\n", pStream->u8SD, cbWritten, cbSrc));
715 }
716
717 RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
718
719 if (RT_FAILURE(rc))
720 break;
721
722 Assert(cbLeft >= cbWritten);
723 cbLeft -= cbWritten;
724
725 cbReadTotal += cbWritten;
726 }
727
728 if (pcbRead)
729 *pcbRead = cbReadTotal;
730
731 return rc;
732}
733
734/**
735 * Transfers data of an HDA stream according to its usage (input / output).
736 *
737 * For an SDO (output) stream this means reading DMA data from the device to
738 * the HDA stream's internal FIFO buffer.
739 *
740 * For an SDI (input) stream this is reading audio data from the HDA stream's
741 * internal FIFO buffer and writing it as DMA data to the device.
742 *
743 * @returns IPRT status code.
744 * @param pStream HDA stream to update.
745 * @param cbToProcessMax How much data (in bytes) to process as maximum.
746 */
747int hdaStreamTransfer(PHDASTREAM pStream, uint32_t cbToProcessMax)
748{
749 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
750
751 hdaStreamLock(pStream);
752
753 PHDASTATE pThis = pStream->pHDAState;
754 AssertPtr(pThis);
755
756 PHDASTREAMPERIOD pPeriod = &pStream->State.Period;
757 if (!hdaStreamPeriodLock(pPeriod))
758 return VERR_ACCESS_DENIED;
759
760 bool fProceed = true;
761
762 /* Stream not running? */
763 if (!pStream->State.fRunning)
764 {
765 Log3Func(("[SD%RU8] Not running\n", pStream->u8SD));
766 fProceed = false;
767 }
768 else if (HDA_STREAM_REG(pThis, STS, pStream->u8SD) & HDA_SDSTS_BCIS)
769 {
770 Log3Func(("[SD%RU8] BCIS bit set\n", pStream->u8SD));
771 fProceed = false;
772 }
773
774 if (!fProceed)
775 {
776 hdaStreamPeriodUnlock(pPeriod);
777 hdaStreamUnlock(pStream);
778 return VINF_SUCCESS;
779 }
780
781 const uint64_t tsNow = TMTimerGet(pThis->pTimer);
782
783 if (!pStream->State.tsTransferLast)
784 pStream->State.tsTransferLast = tsNow;
785
786#ifdef DEBUG
787 const int64_t iTimerDelta = tsNow - pStream->State.tsTransferLast;
788 Log3Func(("[SD%RU8] Time now=%RU64, last=%RU64 -> %RI64 ticks delta\n",
789 pStream->u8SD, tsNow, pStream->State.tsTransferLast, iTimerDelta));
790#endif
791
792 pStream->State.tsTransferLast = tsNow;
793
794 /* Sanity checks. */
795 Assert(pStream->u8SD < HDA_MAX_STREAMS);
796 Assert(pStream->u64BDLBase);
797 Assert(pStream->u32CBL);
798 Assert(pStream->u16FIFOS);
799
800 /* State sanity checks. */
801 Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false);
802
803 int rc = VINF_SUCCESS;
804
805 /* Fetch first / next BDL entry. */
806 PHDABDLE pBDLE = &pStream->State.BDLE;
807 if (hdaBDLEIsComplete(pBDLE))
808 {
809 rc = hdaBDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
810 AssertRC(rc);
811 }
812
813 uint32_t cbToProcess = RT_MIN(pStream->State.cbTransferSize - pStream->State.cbTransferProcessed,
814 pStream->State.cbTransferChunk);
815
816 Log3Func(("[SD%RU8] cbToProcess=%RU32, cbToProcessMax=%RU32\n", pStream->u8SD, cbToProcess, cbToProcessMax));
817
818 if (cbToProcess > cbToProcessMax)
819 {
820 if (pStream->State.Cfg.enmDir == PDMAUDIODIR_IN)
821 LogRelMax2(64, ("HDA: Warning: FIFO underflow for stream #%RU8 (still %RU32 bytes needed)\n",
822 pStream->u8SD, cbToProcess - cbToProcessMax));
823 else
824 LogRelMax2(64, ("HDA: Warning: FIFO overflow for stream #%RU8 (%RU32 bytes outstanding)\n",
825 pStream->u8SD, cbToProcess - cbToProcessMax));
826
827 LogFunc(("[SD%RU8] Warning: Limiting transfer (cbToProcess=%RU32, cbToProcessMax=%RU32)\n",
828 pStream->u8SD, cbToProcess, cbToProcessMax));
829
830 /* Never process more than a stream currently can handle. */
831 cbToProcess = cbToProcessMax;
832 }
833
834 uint32_t cbProcessed = 0;
835 uint32_t cbLeft = cbToProcess;
836
837 uint8_t abChunk[HDA_FIFO_MAX + 1];
838 while (cbLeft)
839 {
840 /* Limit the chunk to the stream's FIFO size and what's left to process. */
841 uint32_t cbChunk = RT_MIN(cbLeft, pStream->u16FIFOS);
842
843 /* Limit the chunk to the remaining data of the current BDLE. */
844 cbChunk = RT_MIN(cbChunk, pBDLE->Desc.u32BufSize - pBDLE->State.u32BufOff);
845
846 /* If there are position adjustment frames left to be processed,
847 * make sure that we process them first as a whole. */
848 if (pStream->State.cPosAdjustFramesLeft)
849 cbChunk = RT_MIN(cbChunk, uint32_t(pStream->State.cPosAdjustFramesLeft * pStream->State.cbFrameSize));
850
851 Log3Func(("[SD%RU8] cbChunk=%RU32, cPosAdjustFramesLeft=%RU16\n",
852 pStream->u8SD, cbChunk, pStream->State.cPosAdjustFramesLeft));
853
854 if (!cbChunk)
855 break;
856
857 uint32_t cbDMA = 0;
858 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
859
860 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN) /* Input (SDI). */
861 {
862 STAM_PROFILE_START(&pThis->StatIn, a);
863
864 uint32_t cbDMAWritten = 0;
865 uint32_t cbDMAToWrite = cbChunk;
866
867 /** @todo Do we need interleaving streams support here as well?
868 * Never saw anything else besides mono/stereo mics (yet). */
869 while (cbDMAToWrite)
870 {
871 void *pvBuf; size_t cbBuf;
872 RTCircBufAcquireReadBlock(pCircBuf, cbDMAToWrite, &pvBuf, &cbBuf);
873
874 if ( !cbBuf
875 && !RTCircBufUsed(pCircBuf))
876 break;
877
878 memcpy(abChunk + cbDMAWritten, pvBuf, cbBuf);
879
880 RTCircBufReleaseReadBlock(pCircBuf, cbBuf);
881
882 Assert(cbDMAToWrite >= cbBuf);
883 cbDMAToWrite -= (uint32_t)cbBuf;
884 cbDMAWritten += (uint32_t)cbBuf;
885 Assert(cbDMAWritten <= cbChunk);
886 }
887
888 if (cbDMAToWrite)
889 {
890 LogRel2(("HDA: FIFO underflow for stream #%RU8 (%RU32 bytes outstanding)\n", pStream->u8SD, cbDMAToWrite));
891
892 Assert(cbChunk == cbDMAWritten + cbDMAToWrite);
893 memset((uint8_t *)abChunk + cbDMAWritten, 0, cbDMAToWrite);
894 cbDMAWritten = cbChunk;
895 }
896
897 rc = hdaDMAWrite(pThis, pStream, abChunk, cbDMAWritten, &cbDMA /* pcbWritten */);
898 if (RT_FAILURE(rc))
899 LogRel(("HDA: Writing to stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
900
901 STAM_PROFILE_STOP(&pThis->StatIn, a);
902 }
903 else if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
904 {
905 STAM_PROFILE_START(&pThis->StatOut, a);
906
907 rc = hdaDMARead(pThis, pStream, abChunk, cbChunk, &cbDMA /* pcbRead */);
908 if (RT_SUCCESS(rc))
909 {
910 uint32_t cbDMAWritten = 0;
911 uint32_t cbDMALeft = cbDMA;
912
913 if (cbDMALeft > RTCircBufFree(pCircBuf))
914 {
915 LogRel2(("HDA: FIFO overflow for stream #%RU8 (%RU32 bytes outstanding)\n",
916 pStream->u8SD, cbDMALeft - RTCircBufFree(pCircBuf)));
917
918 /* Try to read as much as possible. */
919 cbDMALeft = (uint32_t)RTCircBufFree(pCircBuf);
920
921 rc = VERR_BUFFER_OVERFLOW;
922 }
923
924#ifndef VBOX_WITH_HDA_AUDIO_INTERLEAVING_STREAMS_SUPPORT
925 /**
926 * The following code extracts the required audio stream (channel) data
927 * of non-interleaved *and* interleaved audio streams.
928 *
929 * We by default only support 2 channels with 16-bit samples (HDA_FRAME_SIZE),
930 * but an HDA audio stream can have interleaved audio data of multiple audio
931 * channels in such a single stream ("AA,AA,AA vs. AA,BB,AA,BB").
932 *
933 * So take this into account by just handling the first channel in such a stream ("A")
934 * and just discard the other channel's data.
935 */
936 while (cbDMALeft)
937 {
938 void *pvBuf; size_t cbBuf;
939 RTCircBufAcquireWriteBlock(pCircBuf, HDA_FRAME_SIZE, &pvBuf, &cbBuf);
940
941 if (cbBuf)
942 memcpy(pvBuf, abChunk + cbDMAWritten, cbBuf);
943
944 RTCircBufReleaseWriteBlock(pCircBuf, cbBuf);
945
946 cbDMALeft -= (uint32_t)pStream->State.cbFrameSize;
947 cbDMAWritten += (uint32_t)pStream->State.cbFrameSize;
948 }
949#else
950 /** @todo This needs making use of HDAStreamMap + HDAStreamChannel. */
951# error "Implement reading interleaving streams support here."
952#endif
953 }
954 else
955 LogRel(("HDA: Reading from stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
956
957 STAM_PROFILE_STOP(&pThis->StatOut, a);
958 }
959
960 else /** @todo Handle duplex streams? */
961 AssertFailed();
962
963 if (cbDMA)
964 {
965 Assert(cbDMA % pStream->State.cbFrameSize == 0);
966
967 /* We always increment the position of DMA buffer counter because we're always reading
968 * into an intermediate buffer. */
969 pBDLE->State.u32BufOff += (uint32_t)cbDMA;
970 Assert(pBDLE->State.u32BufOff <= pBDLE->Desc.u32BufSize);
971
972 /* Are we done doing the position adjustment?
973 * Only then do the transfer accounting .*/
974 if (pStream->State.cPosAdjustFramesLeft == 0)
975 {
976 Assert(cbLeft >= cbDMA);
977 cbLeft -= cbDMA;
978
979 cbProcessed += cbDMA;
980 }
981
982 /**
983 * Update the stream's current position.
984 * Do this as accurate and close to the actual data transfer as possible.
985 * All guetsts rely on this, depending on the mechanism they use (LPIB register or DMA counters).
986 */
987 uint32_t cbStreamPos = hdaStreamGetPosition(pThis, pStream);
988 if (cbStreamPos == pStream->u32CBL)
989 cbStreamPos = 0;
990
991 hdaStreamSetPosition(pStream, cbStreamPos + cbDMA);
992 }
993
994 if (hdaBDLEIsComplete(pBDLE))
995 {
996 Log3Func(("[SD%RU8] Complete: %R[bdle]\n", pStream->u8SD, pBDLE));
997
998 /* Does the current BDLE require an interrupt to be sent? */
999 if ( hdaBDLENeedsInterrupt(pBDLE)
1000 /* Are we done doing the position adjustment?
1001 * It can happen that a BDLE which is handled while doing the
1002 * position adjustment requires an interrupt on completion (IOC) being set.
1003 *
1004 * In such a case we need to skip such an interrupt and just move on. */
1005 && pStream->State.cPosAdjustFramesLeft == 0)
1006 {
1007 /* If the IOCE ("Interrupt On Completion Enable") bit of the SDCTL register is set
1008 * we need to generate an interrupt.
1009 */
1010 if (HDA_STREAM_REG(pThis, CTL, pStream->u8SD) & HDA_SDCTL_IOCE)
1011 {
1012 pStream->State.cTransferPendingInterrupts++;
1013
1014 AssertMsg(pStream->State.cTransferPendingInterrupts <= 32,
1015 ("Too many pending interrupts (%RU8) for stream #%RU8\n",
1016 pStream->State.cTransferPendingInterrupts, pStream->u8SD));
1017 }
1018 }
1019
1020 if (pStream->State.uCurBDLE == pStream->u16LVI)
1021 {
1022 pStream->State.uCurBDLE = 0;
1023 }
1024 else
1025 pStream->State.uCurBDLE++;
1026
1027 /* Fetch the next BDLE entry. */
1028 hdaBDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
1029 }
1030
1031 /* Do the position adjustment accounting. */
1032 pStream->State.cPosAdjustFramesLeft -= RT_MIN(pStream->State.cPosAdjustFramesLeft, cbDMA / pStream->State.cbFrameSize);
1033
1034 if (RT_FAILURE(rc))
1035 break;
1036 }
1037
1038 Log3Func(("[SD%RU8] cbToProcess=%RU32, cbProcessed=%RU32, cbLeft=%RU32, %R[bdle], rc=%Rrc\n",
1039 pStream->u8SD, cbToProcess, cbProcessed, cbLeft, pBDLE, rc));
1040
1041 /* Sanity. */
1042 Assert(cbProcessed % pStream->State.cbFrameSize == 0);
1043 Assert(cbProcessed == cbToProcess);
1044 Assert(cbLeft == 0);
1045
1046 /* Only do the data accounting if we don't have to do any position
1047 * adjustment anymore. */
1048 if (pStream->State.cPosAdjustFramesLeft == 0)
1049 {
1050 hdaStreamPeriodInc(pPeriod, RT_MIN(cbProcessed / pStream->State.cbFrameSize, hdaStreamPeriodGetRemainingFrames(pPeriod)));
1051
1052 pStream->State.cbTransferProcessed += cbProcessed;
1053 }
1054
1055 /* Make sure that we never report more stuff processed than initially announced. */
1056 if (pStream->State.cbTransferProcessed > pStream->State.cbTransferSize)
1057 pStream->State.cbTransferProcessed = pStream->State.cbTransferSize;
1058
1059 uint32_t cbTransferLeft = pStream->State.cbTransferSize - pStream->State.cbTransferProcessed;
1060 bool fTransferComplete = !cbTransferLeft;
1061 uint64_t tsTransferNext = 0;
1062
1063 if (fTransferComplete)
1064 {
1065 /**
1066 * Try updating the wall clock.
1067 *
1068 * Note 1) Only certain guests (like Linux' snd_hda_intel) rely on the WALCLK register
1069 * in order to determine the correct timing of the sound device. Other guests
1070 * like Windows 7 + 10 (or even more exotic ones like Haiku) will completely
1071 * ignore this.
1072 *
1073 * Note 2) When updating the WALCLK register too often / early (or even in a non-monotonic
1074 * fashion) this *will* upset guest device drivers and will completely fuck up the
1075 * sound output. Running VLC on the guest will tell!
1076 */
1077 const bool fWalClkSet = hdaWalClkSet(pThis,
1078 hdaWalClkGetCurrent(pThis)
1079 + hdaStreamPeriodFramesToWalClk(pPeriod, pStream->State.cbTransferProcessed / pStream->State.cbFrameSize),
1080 false /* fForce */);
1081 RT_NOREF(fWalClkSet);
1082 }
1083
1084 /* Does the period have any interrupts outstanding? */
1085 if (pStream->State.cTransferPendingInterrupts)
1086 {
1087 Log3Func(("[SD%RU8] Scheduling interrupt\n", pStream->u8SD));
1088
1089 /**
1090 * Set the stream's BCIS bit.
1091 *
1092 * Note: This only must be done if the whole period is complete, and not if only
1093 * one specific BDL entry is complete (if it has the IOC bit set).
1094 *
1095 * This will otherwise confuses the guest when it 1) deasserts the interrupt,
1096 * 2) reads SDSTS (with BCIS set) and then 3) too early reads a (wrong) WALCLK value.
1097 *
1098 * snd_hda_intel on Linux will tell.
1099 */
1100 HDA_STREAM_REG(pThis, STS, pStream->u8SD) |= HDA_SDSTS_BCIS;
1101
1102 /* Trigger an interrupt first and let hdaRegWriteSDSTS() deal with
1103 * ending / beginning a period. */
1104#ifndef DEBUG
1105 hdaProcessInterrupt(pThis);
1106#else
1107 hdaProcessInterrupt(pThis, __FUNCTION__);
1108#endif
1109 }
1110 else /* Transfer still in-flight -- schedule the next timing slot. */
1111 {
1112 uint32_t cbTransferNext = cbTransferLeft;
1113
1114 /* No data left to transfer anymore or do we have more data left
1115 * than we can transfer per timing slot? Clamp. */
1116 if ( !cbTransferNext
1117 || cbTransferNext > pStream->State.cbTransferChunk)
1118 {
1119 cbTransferNext = pStream->State.cbTransferChunk;
1120 }
1121
1122 tsTransferNext = tsNow + (cbTransferNext * pStream->State.cTicksPerByte);
1123
1124 /**
1125 * If the current transfer is complete, reset our counter.
1126 *
1127 * This can happen for examlpe if the guest OS (like macOS) sets up
1128 * big BDLEs without IOC bits set (but for the last one) and the
1129 * transfer is complete before we reach such a BDL entry.
1130 */
1131 if (fTransferComplete)
1132 pStream->State.cbTransferProcessed = 0;
1133 }
1134
1135 /* If we need to do another transfer, (re-)arm the device timer. */
1136 if (tsTransferNext) /* Can be 0 if no next transfer is needed. */
1137 {
1138 Log3Func(("[SD%RU8] Scheduling timer\n", pStream->u8SD));
1139
1140 TMTimerUnlock(pThis->pTimer);
1141
1142 hdaTimerSet(pThis, tsTransferNext, false /* fForce */);
1143
1144 TMTimerLock(pThis->pTimer, VINF_SUCCESS);
1145
1146 pStream->State.tsTransferNext = tsTransferNext;
1147 }
1148
1149 pStream->State.tsTransferLast = tsNow;
1150
1151 Log3Func(("[SD%RU8] cbTransferLeft=%RU32 -- %RU32/%RU32\n",
1152 pStream->u8SD, cbTransferLeft, pStream->State.cbTransferProcessed, pStream->State.cbTransferSize));
1153 Log3Func(("[SD%RU8] fTransferComplete=%RTbool, cTransferPendingInterrupts=%RU8\n",
1154 pStream->u8SD, fTransferComplete, pStream->State.cTransferPendingInterrupts));
1155 Log3Func(("[SD%RU8] tsNow=%RU64, tsTransferNext=%RU64 (in %RU64 ticks)\n",
1156 pStream->u8SD, tsNow, tsTransferNext, tsTransferNext - tsNow));
1157
1158 hdaStreamPeriodUnlock(pPeriod);
1159 hdaStreamUnlock(pStream);
1160
1161 return VINF_SUCCESS;
1162}
1163
1164/**
1165 * Updates a HDA stream by doing its required data transfers.
1166 * The host sink(s) set the overall pace.
1167 *
1168 * This routine is called by both, the synchronous and the asynchronous, implementations.
1169 *
1170 * @param pStream HDA stream to update.
1171 * @param fInTimer Whether to this function was called from the timer
1172 * context or an asynchronous I/O stream thread (if supported).
1173 */
1174void hdaStreamUpdate(PHDASTREAM pStream, bool fInTimer)
1175{
1176 if (!pStream)
1177 return;
1178
1179 PAUDMIXSINK pSink = NULL;
1180 if ( pStream->pMixSink
1181 && pStream->pMixSink->pMixSink)
1182 {
1183 pSink = pStream->pMixSink->pMixSink;
1184 }
1185
1186 if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
1187 return;
1188
1189 int rc2;
1190
1191 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
1192 {
1193 /* Is the HDA stream ready to be written (guest output data) to? If so, by how much? */
1194 const uint32_t cbFree = hdaStreamGetFree(pStream);
1195
1196 if ( fInTimer
1197 && cbFree)
1198 {
1199 Log3Func(("[SD%RU8] cbFree=%RU32\n", pStream->u8SD, cbFree));
1200
1201 /* Do the DMA transfer. */
1202 rc2 = hdaStreamTransfer(pStream, cbFree);
1203 AssertRC(rc2);
1204 }
1205
1206 /* How much (guest output) data is available at the moment for the HDA stream? */
1207 uint32_t cbUsed = hdaStreamGetUsed(pStream);
1208
1209#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1210 if ( fInTimer
1211 && cbUsed)
1212 {
1213 rc2 = hdaStreamAsyncIONotify(pStream);
1214 AssertRC(rc2);
1215 }
1216 else
1217 {
1218#endif
1219 const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
1220
1221 /* Do not write more than the sink can hold at the moment.
1222 * The host sets the overall pace. */
1223 if (cbUsed > cbSinkWritable)
1224 cbUsed = cbSinkWritable;
1225
1226 if (cbUsed)
1227 {
1228 /* Read (guest output) data and write it to the stream's sink. */
1229 rc2 = hdaStreamRead(pStream, cbUsed, NULL /* pcbRead */);
1230 AssertRC(rc2);
1231 }
1232
1233 /* When running synchronously, update the associated sink here.
1234 * Otherwise this will be done in the stream's dedicated async I/O thread. */
1235 rc2 = AudioMixerSinkUpdate(pSink);
1236 AssertRC(rc2);
1237
1238#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1239 }
1240#endif
1241 }
1242 else /* Input (SDI). */
1243 {
1244#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1245 if (fInTimer)
1246 {
1247#endif
1248 rc2 = AudioMixerSinkUpdate(pSink);
1249 AssertRC(rc2);
1250
1251 /* Is the sink ready to be read (host input data) from? If so, by how much? */
1252 uint32_t cbReadable = AudioMixerSinkGetReadable(pSink);
1253
1254 /* How much (guest input) data is available for writing at the moment for the HDA stream? */
1255 const uint32_t cbFree = hdaStreamGetFree(pStream);
1256
1257 Log3Func(("[SD%RU8] cbReadable=%RU32, cbFree=%RU32\n", pStream->u8SD, cbReadable, cbFree));
1258
1259 /* Do not write more than the sink can hold at the moment.
1260 * The host sets the overall pace. */
1261 if (cbReadable > cbFree)
1262 cbReadable = cbFree;
1263
1264 if (cbReadable)
1265 {
1266 uint8_t abFIFO[HDA_FIFO_MAX + 1];
1267 while (cbReadable)
1268 {
1269 uint32_t cbRead;
1270 rc2 = AudioMixerSinkRead(pSink, AUDMIXOP_COPY,
1271 abFIFO, RT_MIN(cbReadable, (uint32_t)sizeof(abFIFO)), &cbRead);
1272 AssertRCBreak(rc2);
1273
1274 if (!cbRead)
1275 {
1276 AssertMsgFailed(("Nothing read from sink, even if %RU32 bytes were (still) announced\n", cbReadable));
1277 break;
1278 }
1279
1280 /* Write (guest input) data to the stream which was read from stream's sink before. */
1281 uint32_t cbWritten;
1282 rc2 = hdaStreamWrite(pStream, abFIFO, cbRead, &cbWritten);
1283 AssertRCBreak(rc2);
1284
1285 if (!cbWritten)
1286 {
1287 AssertFailed(); /* Should never happen, as we know how much we can write. */
1288 break;
1289 }
1290
1291 Assert(cbReadable >= cbRead);
1292 cbReadable -= cbRead;
1293 }
1294 }
1295 #if 0
1296 else /* Send silence as input. */
1297 {
1298 cbReadable = pStream->State.cbTransferSize - pStream->State.cbTransferProcessed;
1299
1300 Log3Func(("[SD%RU8] Sending silence (%RU32 bytes)\n", pStream->u8SD, cbReadable));
1301
1302 if (cbReadable)
1303 {
1304 rc2 = hdaStreamWrite(pStream, NULL /* Silence */, cbReadable, NULL /* pcbWritten */);
1305 AssertRC(rc2);
1306 }
1307 }
1308 #endif
1309
1310 const uint32_t cbToTransfer = hdaStreamGetUsed(pStream);
1311 if (cbToTransfer)
1312 {
1313 rc2 = hdaStreamTransfer(pStream, cbToTransfer);
1314 AssertRC(rc2);
1315 }
1316#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1317 } /* fInTimer */
1318#endif
1319 }
1320}
1321
1322/**
1323 * Locks an HDA stream for serialized access.
1324 *
1325 * @returns IPRT status code.
1326 * @param pStream HDA stream to lock.
1327 */
1328void hdaStreamLock(PHDASTREAM pStream)
1329{
1330 AssertPtrReturnVoid(pStream);
1331 int rc2 = RTCritSectEnter(&pStream->State.CritSect);
1332 AssertRC(rc2);
1333}
1334
1335/**
1336 * Unlocks a formerly locked HDA stream.
1337 *
1338 * @returns IPRT status code.
1339 * @param pStream HDA stream to unlock.
1340 */
1341void hdaStreamUnlock(PHDASTREAM pStream)
1342{
1343 AssertPtrReturnVoid(pStream);
1344 int rc2 = RTCritSectLeave(&pStream->State.CritSect);
1345 AssertRC(rc2);
1346}
1347
1348/**
1349 * Updates an HDA stream's current read or write buffer position (depending on the stream type) by
1350 * updating its associated LPIB register and DMA position buffer (if enabled).
1351 *
1352 * @returns Set LPIB value.
1353 * @param pStream HDA stream to update read / write position for.
1354 * @param u32LPIB New LPIB (position) value to set.
1355 */
1356uint32_t hdaStreamUpdateLPIB(PHDASTREAM pStream, uint32_t u32LPIB)
1357{
1358 AssertPtrReturn(pStream, 0);
1359
1360 AssertMsg(u32LPIB <= pStream->u32CBL,
1361 ("[SD%RU8] New LPIB (%RU32) exceeds CBL (%RU32)\n", pStream->u8SD, u32LPIB, pStream->u32CBL));
1362
1363 const PHDASTATE pThis = pStream->pHDAState;
1364
1365 u32LPIB = RT_MIN(u32LPIB, pStream->u32CBL);
1366
1367 LogFlowFunc(("[SD%RU8]: LPIB=%RU32 (DMA Position Buffer Enabled: %RTbool)\n",
1368 pStream->u8SD, u32LPIB, pThis->fDMAPosition));
1369
1370 /* Update LPIB in any case. */
1371 HDA_STREAM_REG(pThis, LPIB, pStream->u8SD) = u32LPIB;
1372
1373 /* Do we need to tell the current DMA position? */
1374 if (pThis->fDMAPosition)
1375 {
1376 int rc2 = PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns),
1377 pThis->u64DPBase + (pStream->u8SD * 2 * sizeof(uint32_t)),
1378 (void *)&u32LPIB, sizeof(uint32_t));
1379 AssertRC(rc2);
1380 }
1381
1382 return u32LPIB;
1383}
1384
1385# ifdef HDA_USE_DMA_ACCESS_HANDLER
1386/**
1387 * Registers access handlers for a stream's BDLE DMA accesses.
1388 *
1389 * @returns true if registration was successful, false if not.
1390 * @param pStream HDA stream to register BDLE access handlers for.
1391 */
1392bool hdaStreamRegisterDMAHandlers(PHDASTREAM pStream)
1393{
1394 /* At least LVI and the BDL base must be set. */
1395 if ( !pStream->u16LVI
1396 || !pStream->u64BDLBase)
1397 {
1398 return false;
1399 }
1400
1401 hdaStreamUnregisterDMAHandlers(pStream);
1402
1403 LogFunc(("Registering ...\n"));
1404
1405 int rc = VINF_SUCCESS;
1406
1407 /*
1408 * Create BDLE ranges.
1409 */
1410
1411 struct BDLERANGE
1412 {
1413 RTGCPHYS uAddr;
1414 uint32_t uSize;
1415 } arrRanges[16]; /** @todo Use a define. */
1416
1417 size_t cRanges = 0;
1418
1419 for (uint16_t i = 0; i < pStream->u16LVI + 1; i++)
1420 {
1421 HDABDLE BDLE;
1422 rc = hdaBDLEFetch(pThis, &BDLE, pStream->u64BDLBase, i /* Index */);
1423 if (RT_FAILURE(rc))
1424 break;
1425
1426 bool fAddRange = true;
1427 BDLERANGE *pRange;
1428
1429 if (cRanges)
1430 {
1431 pRange = &arrRanges[cRanges - 1];
1432
1433 /* Is the current range a direct neighbor of the current BLDE? */
1434 if ((pRange->uAddr + pRange->uSize) == BDLE.Desc.u64BufAdr)
1435 {
1436 /* Expand the current range by the current BDLE's size. */
1437 pRange->uSize += BDLE.Desc.u32BufSize;
1438
1439 /* Adding a new range in this case is not needed anymore. */
1440 fAddRange = false;
1441
1442 LogFunc(("Expanding range %zu by %RU32 (%RU32 total now)\n", cRanges - 1, BDLE.Desc.u32BufSize, pRange->uSize));
1443 }
1444 }
1445
1446 /* Do we need to add a new range? */
1447 if ( fAddRange
1448 && cRanges < RT_ELEMENTS(arrRanges))
1449 {
1450 pRange = &arrRanges[cRanges];
1451
1452 pRange->uAddr = BDLE.Desc.u64BufAdr;
1453 pRange->uSize = BDLE.Desc.u32BufSize;
1454
1455 LogFunc(("Adding range %zu - 0x%x (%RU32)\n", cRanges, pRange->uAddr, pRange->uSize));
1456
1457 cRanges++;
1458 }
1459 }
1460
1461 LogFunc(("%zu ranges total\n", cRanges));
1462
1463 /*
1464 * Register all ranges as DMA access handlers.
1465 */
1466
1467 for (size_t i = 0; i < cRanges; i++)
1468 {
1469 BDLERANGE *pRange = &arrRanges[i];
1470
1471 PHDADMAACCESSHANDLER pHandler = (PHDADMAACCESSHANDLER)RTMemAllocZ(sizeof(HDADMAACCESSHANDLER));
1472 if (!pHandler)
1473 {
1474 rc = VERR_NO_MEMORY;
1475 break;
1476 }
1477
1478 RTListAppend(&pStream->State.lstDMAHandlers, &pHandler->Node);
1479
1480 pHandler->pStream = pStream; /* Save a back reference to the owner. */
1481
1482 char szDesc[32];
1483 RTStrPrintf(szDesc, sizeof(szDesc), "HDA[SD%RU8 - RANGE%02zu]", pStream->u8SD, i);
1484
1485 int rc2 = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3), PGMPHYSHANDLERKIND_WRITE,
1486 hdaDMAAccessHandler,
1487 NULL, NULL, NULL,
1488 NULL, NULL, NULL,
1489 szDesc, &pHandler->hAccessHandlerType);
1490 AssertRCBreak(rc2);
1491
1492 pHandler->BDLEAddr = pRange->uAddr;
1493 pHandler->BDLESize = pRange->uSize;
1494
1495 /* Get first and last pages of the BDLE range. */
1496 RTGCPHYS pgFirst = pRange->uAddr & ~PAGE_OFFSET_MASK;
1497 RTGCPHYS pgLast = RT_ALIGN(pgFirst + pRange->uSize, PAGE_SIZE);
1498
1499 /* Calculate the region size (in pages). */
1500 RTGCPHYS regionSize = RT_ALIGN(pgLast - pgFirst, PAGE_SIZE);
1501
1502 pHandler->GCPhysFirst = pgFirst;
1503 pHandler->GCPhysLast = pHandler->GCPhysFirst + (regionSize - 1);
1504
1505 LogFunc(("\tRegistering region '%s': 0x%x - 0x%x (region size: %zu)\n",
1506 szDesc, pHandler->GCPhysFirst, pHandler->GCPhysLast, regionSize));
1507 LogFunc(("\tBDLE @ 0x%x - 0x%x (%RU32)\n",
1508 pHandler->BDLEAddr, pHandler->BDLEAddr + pHandler->BDLESize, pHandler->BDLESize));
1509
1510 rc2 = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
1511 pHandler->GCPhysFirst, pHandler->GCPhysLast,
1512 pHandler->hAccessHandlerType, pHandler, NIL_RTR0PTR, NIL_RTRCPTR,
1513 szDesc);
1514 AssertRCBreak(rc2);
1515
1516 pHandler->fRegistered = true;
1517 }
1518
1519 LogFunc(("Registration ended with rc=%Rrc\n", rc));
1520
1521 return RT_SUCCESS(rc);
1522}
1523
1524/**
1525 * Unregisters access handlers of a stream's BDLEs.
1526 *
1527 * @param pStream HDA stream to unregister BDLE access handlers for.
1528 */
1529void hdaStreamUnregisterDMAHandlers(PHDASTREAM pStream)
1530{
1531 LogFunc(("\n"));
1532
1533 PHDADMAACCESSHANDLER pHandler, pHandlerNext;
1534 RTListForEachSafe(&pStream->State.lstDMAHandlers, pHandler, pHandlerNext, HDADMAACCESSHANDLER, Node)
1535 {
1536 if (!pHandler->fRegistered) /* Handler not registered? Skip. */
1537 continue;
1538
1539 LogFunc(("Unregistering 0x%x - 0x%x (%zu)\n",
1540 pHandler->GCPhysFirst, pHandler->GCPhysLast, pHandler->GCPhysLast - pHandler->GCPhysFirst));
1541
1542 int rc2 = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
1543 pHandler->GCPhysFirst);
1544 AssertRC(rc2);
1545
1546 RTListNodeRemove(&pHandler->Node);
1547
1548 RTMemFree(pHandler);
1549 pHandler = NULL;
1550 }
1551
1552 Assert(RTListIsEmpty(&pStream->State.lstDMAHandlers));
1553}
1554# endif /* HDA_USE_DMA_ACCESS_HANDLER */
1555
1556# ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1557/**
1558 * Asynchronous I/O thread for a HDA stream.
1559 * This will do the heavy lifting work for us as soon as it's getting notified by another thread.
1560 *
1561 * @returns IPRT status code.
1562 * @param hThreadSelf Thread handle.
1563 * @param pvUser User argument. Must be of type PHDASTREAMTHREADCTX.
1564 */
1565DECLCALLBACK(int) hdaStreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
1566{
1567 PHDASTREAMTHREADCTX pCtx = (PHDASTREAMTHREADCTX)pvUser;
1568 AssertPtr(pCtx);
1569
1570 PHDASTREAM pStream = pCtx->pStream;
1571 AssertPtr(pStream);
1572
1573 PHDASTREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
1574
1575 ASMAtomicXchgBool(&pAIO->fStarted, true);
1576
1577 RTThreadUserSignal(hThreadSelf);
1578
1579 LogFunc(("[SD%RU8]: Started\n", pStream->u8SD));
1580
1581 for (;;)
1582 {
1583 int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1584 if (RT_FAILURE(rc2))
1585 break;
1586
1587 if (ASMAtomicReadBool(&pAIO->fShutdown))
1588 break;
1589
1590 rc2 = RTCritSectEnter(&pAIO->CritSect);
1591 if (RT_SUCCESS(rc2))
1592 {
1593 if (!pAIO->fEnabled)
1594 {
1595 RTCritSectLeave(&pAIO->CritSect);
1596 continue;
1597 }
1598
1599 hdaStreamUpdate(pStream, false /* fInTimer */);
1600
1601 int rc3 = RTCritSectLeave(&pAIO->CritSect);
1602 AssertRC(rc3);
1603 }
1604
1605 AssertRC(rc2);
1606 }
1607
1608 LogFunc(("[SD%RU8]: Ended\n", pStream->u8SD));
1609
1610 ASMAtomicXchgBool(&pAIO->fStarted, false);
1611
1612 return VINF_SUCCESS;
1613}
1614
1615/**
1616 * Creates the async I/O thread for a specific HDA audio stream.
1617 *
1618 * @returns IPRT status code.
1619 * @param pStream HDA audio stream to create the async I/O thread for.
1620 */
1621int hdaStreamAsyncIOCreate(PHDASTREAM pStream)
1622{
1623 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1624
1625 int rc;
1626
1627 if (!ASMAtomicReadBool(&pAIO->fStarted))
1628 {
1629 pAIO->fShutdown = false;
1630
1631 rc = RTSemEventCreate(&pAIO->Event);
1632 if (RT_SUCCESS(rc))
1633 {
1634 rc = RTCritSectInit(&pAIO->CritSect);
1635 if (RT_SUCCESS(rc))
1636 {
1637 HDASTREAMTHREADCTX Ctx = { pStream->pHDAState, pStream };
1638
1639 char szThreadName[64];
1640 RTStrPrintf2(szThreadName, sizeof(szThreadName), "hdaAIO%RU8", pStream->u8SD);
1641
1642 rc = RTThreadCreate(&pAIO->Thread, hdaStreamAsyncIOThread, &Ctx,
1643 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
1644 if (RT_SUCCESS(rc))
1645 rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
1646 }
1647 }
1648 }
1649 else
1650 rc = VINF_SUCCESS;
1651
1652 LogFunc(("[SD%RU8]: Returning %Rrc\n", pStream->u8SD, rc));
1653 return rc;
1654}
1655
1656/**
1657 * Destroys the async I/O thread of a specific HDA audio stream.
1658 *
1659 * @returns IPRT status code.
1660 * @param pStream HDA audio stream to destroy the async I/O thread for.
1661 */
1662int hdaStreamAsyncIODestroy(PHDASTREAM pStream)
1663{
1664 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1665
1666 if (!ASMAtomicReadBool(&pAIO->fStarted))
1667 return VINF_SUCCESS;
1668
1669 ASMAtomicWriteBool(&pAIO->fShutdown, true);
1670
1671 int rc = hdaStreamAsyncIONotify(pStream);
1672 AssertRC(rc);
1673
1674 int rcThread;
1675 rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
1676 LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
1677
1678 if (RT_SUCCESS(rc))
1679 {
1680 rc = RTCritSectDelete(&pAIO->CritSect);
1681 AssertRC(rc);
1682
1683 rc = RTSemEventDestroy(pAIO->Event);
1684 AssertRC(rc);
1685
1686 pAIO->fStarted = false;
1687 pAIO->fShutdown = false;
1688 pAIO->fEnabled = false;
1689 }
1690
1691 LogFunc(("[SD%RU8]: Returning %Rrc\n", pStream->u8SD, rc));
1692 return rc;
1693}
1694
1695/**
1696 * Lets the stream's async I/O thread know that there is some data to process.
1697 *
1698 * @returns IPRT status code.
1699 * @param pStream HDA stream to notify async I/O thread for.
1700 */
1701int hdaStreamAsyncIONotify(PHDASTREAM pStream)
1702{
1703 return RTSemEventSignal(pStream->State.AIO.Event);
1704}
1705
1706/**
1707 * Locks the async I/O thread of a specific HDA audio stream.
1708 *
1709 * @param pStream HDA stream to lock async I/O thread for.
1710 */
1711void hdaStreamAsyncIOLock(PHDASTREAM pStream)
1712{
1713 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1714
1715 if (!ASMAtomicReadBool(&pAIO->fStarted))
1716 return;
1717
1718 int rc2 = RTCritSectEnter(&pAIO->CritSect);
1719 AssertRC(rc2);
1720}
1721
1722/**
1723 * Unlocks the async I/O thread of a specific HDA audio stream.
1724 *
1725 * @param pStream HDA stream to unlock async I/O thread for.
1726 */
1727void hdaStreamAsyncIOUnlock(PHDASTREAM pStream)
1728{
1729 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1730
1731 if (!ASMAtomicReadBool(&pAIO->fStarted))
1732 return;
1733
1734 int rc2 = RTCritSectLeave(&pAIO->CritSect);
1735 AssertRC(rc2);
1736}
1737
1738/**
1739 * Enables (resumes) or disables (pauses) the async I/O thread.
1740 *
1741 * @param pStream HDA stream to enable/disable async I/O thread for.
1742 * @param fEnable Whether to enable or disable the I/O thread.
1743 *
1744 * @remarks Does not do locking.
1745 */
1746void hdaStreamAsyncIOEnable(PHDASTREAM pStream, bool fEnable)
1747{
1748 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1749 ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
1750}
1751# endif /* VBOX_WITH_AUDIO_HDA_ASYNC_IO */
1752
1753#endif /* IN_RING3 */
1754
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