1 | /* $Id: HDAStream.cpp 82255 2019-11-27 23:20:26Z vboxsync $ */
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2 | /** @file
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3 | * HDAStream.cpp - Stream functions for HD Audio.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2017-2019 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 |
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19 | /*********************************************************************************************************************************
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20 | * Header Files *
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21 | *********************************************************************************************************************************/
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22 | #define LOG_GROUP LOG_GROUP_DEV_HDA
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23 | #include <VBox/log.h>
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24 |
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25 | #include <iprt/mem.h>
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26 | #include <iprt/semaphore.h>
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27 |
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28 | #include <VBox/AssertGuest.h>
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29 | #include <VBox/vmm/pdmdev.h>
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30 | #include <VBox/vmm/pdmaudioifs.h>
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31 |
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32 | #include "DrvAudio.h"
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33 |
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34 | #include "DevHDA.h"
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35 | #include "HDAStream.h"
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36 |
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37 |
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38 | #ifdef IN_RING3
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39 |
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40 | /**
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41 | * Creates an HDA stream.
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42 | *
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43 | * @returns IPRT status code.
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44 | * @param pStream HDA stream to create.
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45 | * @param pThis HDA state to assign the HDA stream to.
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46 | * @param u8SD Stream descriptor number to assign.
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47 | */
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48 | int hdaR3StreamCreate(PHDASTREAM pStream, PHDASTATE pThis, uint8_t u8SD)
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49 | {
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50 | RT_NOREF(pThis);
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51 | AssertPtrReturn(pStream, VERR_INVALID_POINTER);
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52 |
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53 | pStream->u8SD = u8SD;
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54 | pStream->pMixSink = NULL;
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55 | pStream->pHDAState = pThis;
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56 | pStream->pTimer = pThis->pTimer[u8SD];
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57 | AssertPtr(pStream->pTimer);
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58 |
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59 | pStream->State.fInReset = false;
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60 | pStream->State.fRunning = false;
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61 | #ifdef HDA_USE_DMA_ACCESS_HANDLER
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62 | RTListInit(&pStream->State.lstDMAHandlers);
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63 | #endif
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64 |
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65 | int rc = RTCritSectInit(&pStream->CritSect);
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66 | AssertRCReturn(rc, rc);
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67 |
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68 | rc = hdaR3StreamPeriodCreate(&pStream->State.Period);
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69 | AssertRCReturn(rc, rc);
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70 |
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71 | pStream->State.tsLastUpdateNs = 0;
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72 |
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73 | #ifdef DEBUG
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74 | rc = RTCritSectInit(&pStream->Dbg.CritSect);
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75 | AssertRCReturn(rc, rc);
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76 | #endif
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77 |
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78 | pStream->Dbg.Runtime.fEnabled = pThis->Dbg.fEnabled;
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79 |
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80 | if (pStream->Dbg.Runtime.fEnabled)
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81 | {
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82 | char szFile[64];
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83 |
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84 | if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
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85 | RTStrPrintf(szFile, sizeof(szFile), "hdaStreamWriteSD%RU8", pStream->u8SD);
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86 | else
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87 | RTStrPrintf(szFile, sizeof(szFile), "hdaStreamReadSD%RU8", pStream->u8SD);
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88 |
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89 | char szPath[RTPATH_MAX + 1];
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90 | int rc2 = DrvAudioHlpFileNameGet(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
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91 | 0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAGS_NONE);
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92 | AssertRC(rc2);
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93 | rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAGS_NONE, &pStream->Dbg.Runtime.pFileStream);
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94 | AssertRC(rc2);
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95 |
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96 | if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
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97 | RTStrPrintf(szFile, sizeof(szFile), "hdaDMARawWriteSD%RU8", pStream->u8SD);
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98 | else
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99 | RTStrPrintf(szFile, sizeof(szFile), "hdaDMARawReadSD%RU8", pStream->u8SD);
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100 |
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101 | rc2 = DrvAudioHlpFileNameGet(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
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102 | 0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAGS_NONE);
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103 | AssertRC(rc2);
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104 |
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105 | rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAGS_NONE, &pStream->Dbg.Runtime.pFileDMARaw);
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106 | AssertRC(rc2);
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107 |
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108 | if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
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109 | RTStrPrintf(szFile, sizeof(szFile), "hdaDMAWriteMappedSD%RU8", pStream->u8SD);
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110 | else
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111 | RTStrPrintf(szFile, sizeof(szFile), "hdaDMAReadMappedSD%RU8", pStream->u8SD);
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112 |
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113 | rc2 = DrvAudioHlpFileNameGet(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
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114 | 0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAGS_NONE);
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115 | AssertRC(rc2);
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116 |
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117 | rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAGS_NONE, &pStream->Dbg.Runtime.pFileDMAMapped);
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118 | AssertRC(rc2);
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119 |
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120 | /* Delete stale debugging files from a former run. */
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121 | DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileStream);
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122 | DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileDMARaw);
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123 | DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileDMAMapped);
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124 | }
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125 |
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126 | return rc;
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127 | }
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128 |
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129 | /**
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130 | * Destroys an HDA stream.
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131 | *
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132 | * @param pStream HDA stream to destroy.
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133 | */
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134 | void hdaR3StreamDestroy(PHDASTREAM pStream)
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135 | {
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136 | AssertPtrReturnVoid(pStream);
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137 |
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138 | LogFlowFunc(("[SD%RU8] Destroying ...\n", pStream->u8SD));
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139 |
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140 | hdaR3StreamMapDestroy(&pStream->State.Mapping);
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141 |
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142 | int rc2;
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143 |
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144 | #ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
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145 | rc2 = hdaR3StreamAsyncIODestroy(pStream);
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146 | AssertRC(rc2);
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147 | #endif
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148 |
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149 | if (RTCritSectIsInitialized(&pStream->CritSect))
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150 | {
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151 | rc2 = RTCritSectDelete(&pStream->CritSect);
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152 | AssertRC(rc2);
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153 | }
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154 |
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155 | if (pStream->State.pCircBuf)
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156 | {
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157 | RTCircBufDestroy(pStream->State.pCircBuf);
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158 | pStream->State.pCircBuf = NULL;
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159 | }
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160 |
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161 | hdaR3StreamPeriodDestroy(&pStream->State.Period);
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162 |
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163 | #ifdef DEBUG
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164 | if (RTCritSectIsInitialized(&pStream->Dbg.CritSect))
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165 | {
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166 | rc2 = RTCritSectDelete(&pStream->Dbg.CritSect);
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167 | AssertRC(rc2);
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168 | }
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169 | #endif
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170 |
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171 | if (pStream->Dbg.Runtime.fEnabled)
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172 | {
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173 | DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileStream);
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174 | pStream->Dbg.Runtime.pFileStream = NULL;
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175 |
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176 | DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileDMARaw);
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177 | pStream->Dbg.Runtime.pFileDMARaw = NULL;
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178 |
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179 | DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileDMAMapped);
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180 | pStream->Dbg.Runtime.pFileDMAMapped = NULL;
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181 | }
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182 |
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183 | LogFlowFuncLeave();
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184 | }
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185 |
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186 | /**
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187 | * Initializes an HDA stream.
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188 | *
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189 | * @returns IPRT status code. VINF_NO_CHANGE if the stream does not need (re-)initialization because the stream's (hardware)
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190 | * parameters did not change.
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191 | * @param pStream HDA stream to initialize.
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192 | * @param uSD SD (stream descriptor) number to assign the HDA stream to.
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193 | */
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194 | int hdaR3StreamInit(PHDASTREAM pStream, uint8_t uSD)
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195 | {
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196 | AssertPtrReturn(pStream, VERR_INVALID_POINTER);
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197 |
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198 | PHDASTATE pThis = pStream->pHDAState;
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199 | AssertPtr(pThis);
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200 |
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201 | const uint64_t u64BDLBase = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, uSD),
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202 | HDA_STREAM_REG(pThis, BDPU, uSD));
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203 | const uint16_t u16LVI = HDA_STREAM_REG(pThis, LVI, uSD);
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204 | const uint32_t u32CBL = HDA_STREAM_REG(pThis, CBL, uSD);
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205 | const uint16_t u16FIFOS = HDA_STREAM_REG(pThis, FIFOS, uSD) + 1;
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206 | const uint16_t u16FMT = HDA_STREAM_REG(pThis, FMT, uSD);
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207 |
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208 | /* Is the bare minimum set of registers configured for the stream?
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209 | * If not, bail out early, as there's nothing to do here for us (yet). */
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210 | if ( !u64BDLBase
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211 | || !u16LVI
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212 | || !u32CBL
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213 | || !u16FIFOS
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214 | || !u16FMT)
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215 | {
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216 | LogFunc(("[SD%RU8] Registers not set up yet, skipping (re-)initialization\n", uSD));
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217 | return VINF_SUCCESS;
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218 | }
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219 |
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220 | PDMAUDIOPCMPROPS Props;
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221 | int rc = hdaR3SDFMTToPCMProps(u16FMT, &Props);
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222 | if (RT_FAILURE(rc))
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223 | {
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224 | LogRel(("HDA: Warning: Format 0x%x for stream #%RU8 not supported\n", HDA_STREAM_REG(pThis, FMT, uSD), uSD));
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225 | return rc;
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226 | }
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227 |
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228 | /* Reset (any former) stream map. */
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229 | hdaR3StreamMapReset(&pStream->State.Mapping);
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230 |
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231 | /*
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232 | * Initialize the stream mapping in any case, regardless if
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233 | * we support surround audio or not. This is needed to handle
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234 | * the supported channels within a single audio stream, e.g. mono/stereo.
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235 | *
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236 | * In other words, the stream mapping *always* knows the real
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237 | * number of channels in a single audio stream.
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238 | */
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239 | rc = hdaR3StreamMapInit(&pStream->State.Mapping, &Props);
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240 | AssertRCReturn(rc, rc);
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241 |
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242 | ASSERT_GUEST_LOGREL_MSG_RETURN(u32CBL % pStream->State.Mapping.cbFrameSize == 0,
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243 | ("CBL for stream #%RU8 does not align to frame size\n", pStream->u8SD),
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244 | VERR_INVALID_PARAMETER);
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245 |
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246 | /*
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247 | * Set the stream's timer Hz rate, based on the stream channel count.
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248 | * Currently this is just a rough guess and we might want to optimize this further.
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249 | *
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250 | * In any case, more channels per SDI/SDO means that we have to drive data more frequently.
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251 | */
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252 | if (pThis->uTimerHz == HDA_TIMER_HZ_DEFAULT) /* Make sure that we don't have any custom Hz rate set we want to enforce */
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253 | {
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254 | if (Props.cChannels >= 5)
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255 | pStream->State.uTimerHz = 300;
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256 | else if (Props.cChannels == 4)
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257 | pStream->State.uTimerHz = 150;
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258 | else
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259 | pStream->State.uTimerHz = 100;
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260 | }
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261 | else
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262 | pStream->State.uTimerHz = pThis->uTimerHz;
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263 |
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264 | #ifndef VBOX_WITH_AUDIO_HDA_51_SURROUND
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265 | if (Props.cChannels > 2)
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266 | {
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267 | /*
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268 | * When not running with surround support enabled, override the audio channel count
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269 | * with stereo (2) channels so that we at least can properly work with those.
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270 | *
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271 | * Note: This also involves dealing with surround setups the guest might has set up for us.
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272 | */
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273 | LogRel2(("HDA: More than stereo (2) channels are not supported (%RU8 requested), "
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274 | "falling back to stereo channels for stream #%RU8\n", Props.cChannels, uSD));
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275 | Props.cChannels = 2;
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276 | Props.cShift = PDMAUDIOPCMPROPS_MAKE_SHIFT_PARMS(Props.cbSample, Props.cChannels);
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277 | }
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278 | #endif
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279 |
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280 | /* Did some of the vital / critical parameters change?
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281 | * If not, we can skip a lot of the (re-)initialization and just (re-)use the existing stuff.
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282 | * Also, tell the caller so that further actions can be taken. */
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283 | if ( uSD == pStream->u8SD
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284 | && u64BDLBase == pStream->u64BDLBase
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285 | && u16LVI == pStream->u16LVI
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286 | && u32CBL == pStream->u32CBL
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287 | && u16FIFOS == pStream->u16FIFOS
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288 | && u16FMT == pStream->u16FMT)
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289 | {
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290 | LogFunc(("[SD%RU8] No format change, skipping (re-)initialization\n", uSD));
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291 | return VINF_NO_CHANGE;
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292 | }
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293 |
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294 | pStream->u8SD = uSD;
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295 |
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296 | /* Update all register copies so that we later know that something has changed. */
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297 | pStream->u64BDLBase = u64BDLBase;
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298 | pStream->u16LVI = u16LVI;
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299 | pStream->u32CBL = u32CBL;
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300 | pStream->u16FIFOS = u16FIFOS;
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301 | pStream->u16FMT = u16FMT;
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302 |
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303 | PPDMAUDIOSTREAMCFG pCfg = &pStream->State.Cfg;
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304 | pCfg->Props = Props;
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305 |
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306 | /* (Re-)Allocate the stream's internal DMA buffer, based on the PCM properties we just got above. */
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307 | if (pStream->State.pCircBuf)
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308 | {
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309 | RTCircBufDestroy(pStream->State.pCircBuf);
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310 | pStream->State.pCircBuf = NULL;
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311 | }
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312 |
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313 | /* By default we allocate an internal buffer of 100ms. */
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314 | rc = RTCircBufCreate(&pStream->State.pCircBuf,
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315 | DrvAudioHlpMilliToBytes(100 /* ms */, &pCfg->Props)); /** @todo Make this configurable. */
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316 | AssertRCReturn(rc, rc);
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317 |
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318 | /* Set the stream's direction. */
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319 | pCfg->enmDir = hdaGetDirFromSD(pStream->u8SD);
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320 |
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321 | /* The the stream's name, based on the direction. */
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322 | switch (pCfg->enmDir)
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323 | {
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324 | case PDMAUDIODIR_IN:
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325 | # ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
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326 | # error "Implement me!"
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327 | # else
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328 | pCfg->u.enmSrc = PDMAUDIORECSRC_LINE;
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329 | pCfg->enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
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330 | RTStrCopy(pCfg->szName, sizeof(pCfg->szName), "Line In");
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331 | # endif
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332 | break;
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333 |
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334 | case PDMAUDIODIR_OUT:
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335 | /* Destination(s) will be set in hdaAddStreamOut(),
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336 | * based on the channels / stream layout. */
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337 | break;
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338 |
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339 | default:
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340 | rc = VERR_NOT_SUPPORTED;
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341 | break;
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342 | }
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343 |
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344 | /* Set scheduling hint (if available). */
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345 | if (pStream->State.uTimerHz)
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346 | pCfg->Device.cMsSchedulingHint = 1000 /* ms */ / pStream->State.uTimerHz;
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347 |
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348 | LogFunc(("[SD%RU8] DMA @ 0x%x (%RU32 bytes), LVI=%RU16, FIFOS=%RU16\n",
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349 | pStream->u8SD, pStream->u64BDLBase, pStream->u32CBL, pStream->u16LVI, pStream->u16FIFOS));
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350 |
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351 | if (RT_SUCCESS(rc))
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352 | {
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353 | /* Make sure that the chosen Hz rate dividable by the stream's rate. */
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354 | if (pStream->State.Cfg.Props.uHz % pStream->State.uTimerHz != 0)
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355 | LogRel(("HDA: Stream timer Hz rate (%RU32) does not fit to stream #%RU8 timing (%RU32)\n",
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356 | pStream->State.uTimerHz, pStream->u8SD, pStream->State.Cfg.Props.uHz));
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357 |
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358 | /* Figure out how many transfer fragments we're going to use for this stream. */
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359 | /** @todo Use a more dynamic fragment size? */
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360 | uint8_t cFragments = pStream->u16LVI + 1;
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361 | if (cFragments <= 1)
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362 | cFragments = 2; /* At least two fragments (BDLEs) must be present. */
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363 |
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364 | /*
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365 | * Handle the stream's position adjustment.
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366 | */
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367 | uint32_t cfPosAdjust = 0;
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368 |
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369 | LogFunc(("[SD%RU8] fPosAdjustEnabled=%RTbool, cPosAdjustFrames=%RU16\n",
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370 | pStream->u8SD, pThis->fPosAdjustEnabled, pThis->cPosAdjustFrames));
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371 |
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372 | if (pThis->fPosAdjustEnabled) /* Is the position adjustment enabled at all? */
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373 | {
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374 | HDABDLE BDLE;
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375 | RT_ZERO(BDLE);
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376 |
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377 | int rc2 = hdaR3BDLEFetch(pThis, &BDLE, pStream->u64BDLBase, 0 /* Entry */);
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378 | AssertRC(rc2);
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379 |
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380 | /* Note: Do *not* check if this BDLE aligns to the stream's frame size.
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381 | * It can happen that this isn't the case on some guests, e.g.
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382 | * on Windows with a 5.1 speaker setup.
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383 | *
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384 | * The only thing which counts is that the stream's CBL value
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385 | * properly aligns to the stream's frame size.
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386 | */
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387 |
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388 | /* If no custom set position adjustment is set, apply some
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389 | * simple heuristics to detect the appropriate position adjustment. */
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390 | if ( !pThis->cPosAdjustFrames
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391 | /* Position adjustmenet buffer *must* have the IOC bit set! */
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392 | && hdaR3BDLENeedsInterrupt(&BDLE))
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393 | {
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394 | /** @todo Implement / use a (dynamic) table once this gets more complicated. */
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395 | #ifdef VBOX_WITH_INTEL_HDA
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396 | /* Intel ICH / PCH: 1 frame. */
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397 | if (BDLE.Desc.u32BufSize == (uint32_t)(1 * pStream->State.Mapping.cbFrameSize))
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398 | {
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399 | cfPosAdjust = 1;
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400 | }
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401 | /* Intel Baytrail / Braswell: 32 frames. */
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---|
402 | else if (BDLE.Desc.u32BufSize == (uint32_t)(32 * pStream->State.Mapping.cbFrameSize))
|
---|
403 | {
|
---|
404 | cfPosAdjust = 32;
|
---|
405 | }
|
---|
406 | #endif
|
---|
407 | }
|
---|
408 | else /* Go with the set default. */
|
---|
409 | cfPosAdjust = pThis->cPosAdjustFrames;
|
---|
410 |
|
---|
411 | if (cfPosAdjust)
|
---|
412 | {
|
---|
413 | /* Also adjust the number of fragments, as the position adjustment buffer
|
---|
414 | * does not count as an own fragment as such.
|
---|
415 | *
|
---|
416 | * This e.g. can happen on (newer) Ubuntu guests which use
|
---|
417 | * 4 (IOC) + 4408 (IOC) + 4408 (IOC) + 4408 (IOC) + 4404 (= 17632) bytes,
|
---|
418 | * where the first buffer (4) is used as position adjustment.
|
---|
419 | *
|
---|
420 | * Only skip a fragment if the whole buffer fragment is used for
|
---|
421 | * position adjustment.
|
---|
422 | */
|
---|
423 | if ( (cfPosAdjust * pStream->State.Mapping.cbFrameSize) == BDLE.Desc.u32BufSize
|
---|
424 | && cFragments)
|
---|
425 | {
|
---|
426 | cFragments--;
|
---|
427 | }
|
---|
428 |
|
---|
429 | /* Initialize position adjustment counter. */
|
---|
430 | pStream->State.cfPosAdjustDefault = cfPosAdjust;
|
---|
431 | pStream->State.cfPosAdjustLeft = pStream->State.cfPosAdjustDefault;
|
---|
432 |
|
---|
433 | LogRel2(("HDA: Position adjustment for stream #%RU8 active (%RU32 frames)\n",
|
---|
434 | pStream->u8SD, pStream->State.cfPosAdjustDefault));
|
---|
435 | }
|
---|
436 | }
|
---|
437 |
|
---|
438 | LogFunc(("[SD%RU8] cfPosAdjust=%RU32, cFragments=%RU8\n", pStream->u8SD, cfPosAdjust, cFragments));
|
---|
439 |
|
---|
440 | /*
|
---|
441 | * Set up data transfer stuff.
|
---|
442 | */
|
---|
443 |
|
---|
444 | /* Calculate the fragment size the guest OS expects interrupt delivery at. */
|
---|
445 | pStream->State.cbTransferSize = pStream->u32CBL / cFragments;
|
---|
446 | Assert(pStream->State.cbTransferSize);
|
---|
447 | Assert(pStream->State.cbTransferSize % pStream->State.Mapping.cbFrameSize == 0);
|
---|
448 | ASSERT_GUEST_LOGREL_MSG_STMT(pStream->State.cbTransferSize,
|
---|
449 | ("Transfer size for stream #%RU8 is invalid\n", pStream->u8SD), rc = VERR_INVALID_PARAMETER);
|
---|
450 | if (RT_SUCCESS(rc))
|
---|
451 | {
|
---|
452 | /* Calculate the bytes we need to transfer to / from the stream's DMA per iteration.
|
---|
453 | * This is bound to the device's Hz rate and thus to the (virtual) timing the device expects. */
|
---|
454 | pStream->State.cbTransferChunk = (pStream->State.Cfg.Props.uHz / pStream->State.uTimerHz) * pStream->State.Mapping.cbFrameSize;
|
---|
455 | Assert(pStream->State.cbTransferChunk);
|
---|
456 | Assert(pStream->State.cbTransferChunk % pStream->State.Mapping.cbFrameSize == 0);
|
---|
457 | ASSERT_GUEST_LOGREL_MSG_STMT(pStream->State.cbTransferChunk,
|
---|
458 | ("Transfer chunk for stream #%RU8 is invalid\n", pStream->u8SD),
|
---|
459 | rc = VERR_INVALID_PARAMETER);
|
---|
460 | if (RT_SUCCESS(rc))
|
---|
461 | {
|
---|
462 | /* Make sure that the transfer chunk does not exceed the overall transfer size. */
|
---|
463 | if (pStream->State.cbTransferChunk > pStream->State.cbTransferSize)
|
---|
464 | pStream->State.cbTransferChunk = pStream->State.cbTransferSize;
|
---|
465 |
|
---|
466 | const uint64_t cTicksPerHz = TMTimerGetFreq(pStream->pTimer) / pStream->State.uTimerHz;
|
---|
467 |
|
---|
468 | /* Calculate the timer ticks per byte for this stream. */
|
---|
469 | pStream->State.cTicksPerByte = cTicksPerHz / pStream->State.cbTransferChunk;
|
---|
470 | Assert(pStream->State.cTicksPerByte);
|
---|
471 |
|
---|
472 | /* Calculate timer ticks per transfer. */
|
---|
473 | pStream->State.cTransferTicks = pStream->State.cbTransferChunk * pStream->State.cTicksPerByte;
|
---|
474 | Assert(pStream->State.cTransferTicks);
|
---|
475 |
|
---|
476 | LogFunc(("[SD%RU8] Timer %uHz (%RU64 ticks per Hz), cTicksPerByte=%RU64, cbTransferChunk=%RU32, " \
|
---|
477 | "cTransferTicks=%RU64, cbTransferSize=%RU32\n",
|
---|
478 | pStream->u8SD, pStream->State.uTimerHz, cTicksPerHz, pStream->State.cTicksPerByte,
|
---|
479 | pStream->State.cbTransferChunk, pStream->State.cTransferTicks, pStream->State.cbTransferSize));
|
---|
480 |
|
---|
481 | /* Make sure to also update the stream's DMA counter (based on its current LPIB value). */
|
---|
482 | hdaR3StreamSetPosition(pStream, HDA_STREAM_REG(pThis, LPIB, pStream->u8SD));
|
---|
483 |
|
---|
484 | #ifdef LOG_ENABLED
|
---|
485 | hdaR3BDLEDumpAll(pThis, pStream->u64BDLBase, pStream->u16LVI + 1);
|
---|
486 | #endif
|
---|
487 | }
|
---|
488 | }
|
---|
489 | }
|
---|
490 |
|
---|
491 | if (RT_FAILURE(rc))
|
---|
492 | LogRel(("HDA: Initializing stream #%RU8 failed with %Rrc\n", pStream->u8SD, rc));
|
---|
493 |
|
---|
494 | return rc;
|
---|
495 | }
|
---|
496 |
|
---|
497 | /**
|
---|
498 | * Resets an HDA stream.
|
---|
499 | *
|
---|
500 | * @param pThis HDA state.
|
---|
501 | * @param pStream HDA stream to reset.
|
---|
502 | * @param uSD Stream descriptor (SD) number to use for this stream.
|
---|
503 | */
|
---|
504 | void hdaR3StreamReset(PHDASTATE pThis, PHDASTREAM pStream, uint8_t uSD)
|
---|
505 | {
|
---|
506 | AssertPtrReturnVoid(pThis);
|
---|
507 | AssertPtrReturnVoid(pStream);
|
---|
508 | AssertReturnVoid(uSD < HDA_MAX_STREAMS);
|
---|
509 |
|
---|
510 | # ifdef VBOX_STRICT
|
---|
511 | AssertReleaseMsg(!pStream->State.fRunning, ("[SD%RU8] Cannot reset stream while in running state\n", uSD));
|
---|
512 | # endif
|
---|
513 |
|
---|
514 | LogFunc(("[SD%RU8] Reset\n", uSD));
|
---|
515 |
|
---|
516 | /*
|
---|
517 | * Set reset state.
|
---|
518 | */
|
---|
519 | Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false); /* No nested calls. */
|
---|
520 | ASMAtomicXchgBool(&pStream->State.fInReset, true);
|
---|
521 |
|
---|
522 | /*
|
---|
523 | * Second, initialize the registers.
|
---|
524 | */
|
---|
525 | HDA_STREAM_REG(pThis, STS, uSD) = HDA_SDSTS_FIFORDY;
|
---|
526 | /* According to the ICH6 datasheet, 0x40000 is the default value for stream descriptor register 23:20
|
---|
527 | * bits are reserved for stream number 18.2.33, resets SDnCTL except SRST bit. */
|
---|
528 | HDA_STREAM_REG(pThis, CTL, uSD) = 0x40000 | (HDA_STREAM_REG(pThis, CTL, uSD) & HDA_SDCTL_SRST);
|
---|
529 | /* ICH6 defines default values (120 bytes for input and 192 bytes for output descriptors) of FIFO size. 18.2.39. */
|
---|
530 | HDA_STREAM_REG(pThis, FIFOS, uSD) = hdaGetDirFromSD(uSD) == PDMAUDIODIR_IN ? HDA_SDIFIFO_120B : HDA_SDOFIFO_192B;
|
---|
531 | /* See 18.2.38: Always defaults to 0x4 (32 bytes). */
|
---|
532 | HDA_STREAM_REG(pThis, FIFOW, uSD) = HDA_SDFIFOW_32B;
|
---|
533 | HDA_STREAM_REG(pThis, LPIB, uSD) = 0;
|
---|
534 | HDA_STREAM_REG(pThis, CBL, uSD) = 0;
|
---|
535 | HDA_STREAM_REG(pThis, LVI, uSD) = 0;
|
---|
536 | HDA_STREAM_REG(pThis, FMT, uSD) = 0;
|
---|
537 | HDA_STREAM_REG(pThis, BDPU, uSD) = 0;
|
---|
538 | HDA_STREAM_REG(pThis, BDPL, uSD) = 0;
|
---|
539 |
|
---|
540 | #ifdef HDA_USE_DMA_ACCESS_HANDLER
|
---|
541 | hdaR3StreamUnregisterDMAHandlers(pThis, pStream);
|
---|
542 | #endif
|
---|
543 |
|
---|
544 | /* Assign the default mixer sink to the stream. */
|
---|
545 | pStream->pMixSink = hdaR3GetDefaultSink(pThis, uSD);
|
---|
546 |
|
---|
547 | /* Reset position adjustment counter. */
|
---|
548 | pStream->State.cfPosAdjustLeft = pStream->State.cfPosAdjustDefault;
|
---|
549 |
|
---|
550 | /* Reset transfer stuff. */
|
---|
551 | pStream->State.cbTransferProcessed = 0;
|
---|
552 | pStream->State.cTransferPendingInterrupts = 0;
|
---|
553 | pStream->State.tsTransferLast = 0;
|
---|
554 | pStream->State.tsTransferNext = 0;
|
---|
555 |
|
---|
556 | /* Initialize other timestamps. */
|
---|
557 | pStream->State.tsLastUpdateNs = 0;
|
---|
558 |
|
---|
559 | RT_ZERO(pStream->State.BDLE);
|
---|
560 | pStream->State.uCurBDLE = 0;
|
---|
561 |
|
---|
562 | if (pStream->State.pCircBuf)
|
---|
563 | RTCircBufReset(pStream->State.pCircBuf);
|
---|
564 |
|
---|
565 | /* Reset the stream's period. */
|
---|
566 | hdaR3StreamPeriodReset(&pStream->State.Period);
|
---|
567 |
|
---|
568 | #ifdef DEBUG
|
---|
569 | pStream->Dbg.cReadsTotal = 0;
|
---|
570 | pStream->Dbg.cbReadTotal = 0;
|
---|
571 | pStream->Dbg.tsLastReadNs = 0;
|
---|
572 | pStream->Dbg.cWritesTotal = 0;
|
---|
573 | pStream->Dbg.cbWrittenTotal = 0;
|
---|
574 | pStream->Dbg.cWritesHz = 0;
|
---|
575 | pStream->Dbg.cbWrittenHz = 0;
|
---|
576 | pStream->Dbg.tsWriteSlotBegin = 0;
|
---|
577 | #endif
|
---|
578 |
|
---|
579 | /* Report that we're done resetting this stream. */
|
---|
580 | HDA_STREAM_REG(pThis, CTL, uSD) = 0;
|
---|
581 |
|
---|
582 | LogFunc(("[SD%RU8] Reset\n", uSD));
|
---|
583 |
|
---|
584 | /* Exit reset mode. */
|
---|
585 | ASMAtomicXchgBool(&pStream->State.fInReset, false);
|
---|
586 | }
|
---|
587 |
|
---|
588 | /**
|
---|
589 | * Enables or disables an HDA audio stream.
|
---|
590 | *
|
---|
591 | * @returns IPRT status code.
|
---|
592 | * @param pStream HDA stream to enable or disable.
|
---|
593 | * @param fEnable Whether to enable or disble the stream.
|
---|
594 | */
|
---|
595 | int hdaR3StreamEnable(PHDASTREAM pStream, bool fEnable)
|
---|
596 | {
|
---|
597 | AssertPtrReturn(pStream, VERR_INVALID_POINTER);
|
---|
598 |
|
---|
599 | LogFunc(("[SD%RU8] fEnable=%RTbool, pMixSink=%p\n", pStream->u8SD, fEnable, pStream->pMixSink));
|
---|
600 |
|
---|
601 | int rc = VINF_SUCCESS;
|
---|
602 |
|
---|
603 | AUDMIXSINKCMD enmCmd = fEnable
|
---|
604 | ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE;
|
---|
605 |
|
---|
606 | /* First, enable or disable the stream and the stream's sink, if any. */
|
---|
607 | if ( pStream->pMixSink
|
---|
608 | && pStream->pMixSink->pMixSink)
|
---|
609 | rc = AudioMixerSinkCtl(pStream->pMixSink->pMixSink, enmCmd);
|
---|
610 |
|
---|
611 | if ( RT_SUCCESS(rc)
|
---|
612 | && fEnable
|
---|
613 | && pStream->Dbg.Runtime.fEnabled)
|
---|
614 | {
|
---|
615 | Assert(DrvAudioHlpPCMPropsAreValid(&pStream->State.Cfg.Props));
|
---|
616 |
|
---|
617 | if (fEnable)
|
---|
618 | {
|
---|
619 | if (!DrvAudioHlpFileIsOpen(pStream->Dbg.Runtime.pFileStream))
|
---|
620 | {
|
---|
621 | int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileStream, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
|
---|
622 | &pStream->State.Cfg.Props);
|
---|
623 | AssertRC(rc2);
|
---|
624 | }
|
---|
625 |
|
---|
626 | if (!DrvAudioHlpFileIsOpen(pStream->Dbg.Runtime.pFileDMARaw))
|
---|
627 | {
|
---|
628 | int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileDMARaw, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
|
---|
629 | &pStream->State.Cfg.Props);
|
---|
630 | AssertRC(rc2);
|
---|
631 | }
|
---|
632 |
|
---|
633 | if (!DrvAudioHlpFileIsOpen(pStream->Dbg.Runtime.pFileDMAMapped))
|
---|
634 | {
|
---|
635 | int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileDMAMapped, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
|
---|
636 | &pStream->State.Cfg.Props);
|
---|
637 | AssertRC(rc2);
|
---|
638 | }
|
---|
639 | }
|
---|
640 | }
|
---|
641 |
|
---|
642 | if (RT_SUCCESS(rc))
|
---|
643 | {
|
---|
644 | pStream->State.fRunning = fEnable;
|
---|
645 | }
|
---|
646 |
|
---|
647 | LogFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
|
---|
648 | return rc;
|
---|
649 | }
|
---|
650 |
|
---|
651 | uint32_t hdaR3StreamGetPosition(PHDASTATE pThis, PHDASTREAM pStream)
|
---|
652 | {
|
---|
653 | return HDA_STREAM_REG(pThis, LPIB, pStream->u8SD);
|
---|
654 | }
|
---|
655 |
|
---|
656 | /**
|
---|
657 | * Updates an HDA stream's current read or write buffer position (depending on the stream type) by
|
---|
658 | * updating its associated LPIB register and DMA position buffer (if enabled).
|
---|
659 | *
|
---|
660 | * @param pStream HDA stream to update read / write position for.
|
---|
661 | * @param u32LPIB Absolute position (in bytes) to set current read / write position to.
|
---|
662 | */
|
---|
663 | void hdaR3StreamSetPosition(PHDASTREAM pStream, uint32_t u32LPIB)
|
---|
664 | {
|
---|
665 | AssertPtrReturnVoid(pStream);
|
---|
666 |
|
---|
667 | Log3Func(("[SD%RU8] LPIB=%RU32 (DMA Position Buffer Enabled: %RTbool)\n",
|
---|
668 | pStream->u8SD, u32LPIB, pStream->pHDAState->fDMAPosition));
|
---|
669 |
|
---|
670 | /* Update LPIB in any case. */
|
---|
671 | HDA_STREAM_REG(pStream->pHDAState, LPIB, pStream->u8SD) = u32LPIB;
|
---|
672 |
|
---|
673 | /* Do we need to tell the current DMA position? */
|
---|
674 | if (pStream->pHDAState->fDMAPosition)
|
---|
675 | {
|
---|
676 | int rc2 = PDMDevHlpPCIPhysWrite(pStream->pHDAState->CTX_SUFF(pDevIns),
|
---|
677 | pStream->pHDAState->u64DPBase + (pStream->u8SD * 2 * sizeof(uint32_t)),
|
---|
678 | (void *)&u32LPIB, sizeof(uint32_t));
|
---|
679 | AssertRC(rc2);
|
---|
680 | }
|
---|
681 | }
|
---|
682 |
|
---|
683 | /**
|
---|
684 | * Retrieves the available size of (buffered) audio data (in bytes) of a given HDA stream.
|
---|
685 | *
|
---|
686 | * @returns Available data (in bytes).
|
---|
687 | * @param pStream HDA stream to retrieve size for.
|
---|
688 | */
|
---|
689 | uint32_t hdaR3StreamGetUsed(PHDASTREAM pStream)
|
---|
690 | {
|
---|
691 | AssertPtrReturn(pStream, 0);
|
---|
692 |
|
---|
693 | if (!pStream->State.pCircBuf)
|
---|
694 | return 0;
|
---|
695 |
|
---|
696 | return (uint32_t)RTCircBufUsed(pStream->State.pCircBuf);
|
---|
697 | }
|
---|
698 |
|
---|
699 | /**
|
---|
700 | * Retrieves the free size of audio data (in bytes) of a given HDA stream.
|
---|
701 | *
|
---|
702 | * @returns Free data (in bytes).
|
---|
703 | * @param pStream HDA stream to retrieve size for.
|
---|
704 | */
|
---|
705 | uint32_t hdaR3StreamGetFree(PHDASTREAM pStream)
|
---|
706 | {
|
---|
707 | AssertPtrReturn(pStream, 0);
|
---|
708 |
|
---|
709 | if (!pStream->State.pCircBuf)
|
---|
710 | return 0;
|
---|
711 |
|
---|
712 | return (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
|
---|
713 | }
|
---|
714 |
|
---|
715 | /**
|
---|
716 | * Returns whether a next transfer for a given stream is scheduled or not.
|
---|
717 | * This takes pending stream interrupts into account as well as the next scheduled
|
---|
718 | * transfer timestamp.
|
---|
719 | *
|
---|
720 | * @returns True if a next transfer is scheduled, false if not.
|
---|
721 | * @param pStream HDA stream to retrieve schedule status for.
|
---|
722 | */
|
---|
723 | bool hdaR3StreamTransferIsScheduled(PHDASTREAM pStream)
|
---|
724 | {
|
---|
725 | if (pStream)
|
---|
726 | {
|
---|
727 | AssertPtrReturn(pStream->pHDAState, false);
|
---|
728 |
|
---|
729 | if (pStream->State.fRunning)
|
---|
730 | {
|
---|
731 | if (pStream->State.cTransferPendingInterrupts)
|
---|
732 | {
|
---|
733 | Log3Func(("[SD%RU8] Scheduled (%RU8 IRQs pending)\n", pStream->u8SD, pStream->State.cTransferPendingInterrupts));
|
---|
734 | return true;
|
---|
735 | }
|
---|
736 |
|
---|
737 | const uint64_t tsNow = TMTimerGet(pStream->pTimer);
|
---|
738 | if (pStream->State.tsTransferNext > tsNow)
|
---|
739 | {
|
---|
740 | Log3Func(("[SD%RU8] Scheduled in %RU64\n", pStream->u8SD, pStream->State.tsTransferNext - tsNow));
|
---|
741 | return true;
|
---|
742 | }
|
---|
743 | }
|
---|
744 | }
|
---|
745 | return false;
|
---|
746 | }
|
---|
747 |
|
---|
748 | /**
|
---|
749 | * Returns the (virtual) clock timestamp of the next transfer, if any.
|
---|
750 | * Will return 0 if no new transfer is scheduled.
|
---|
751 | *
|
---|
752 | * @returns The (virtual) clock timestamp of the next transfer.
|
---|
753 | * @param pStream HDA stream to retrieve timestamp for.
|
---|
754 | */
|
---|
755 | uint64_t hdaR3StreamTransferGetNext(PHDASTREAM pStream)
|
---|
756 | {
|
---|
757 | return pStream->State.tsTransferNext;
|
---|
758 | }
|
---|
759 |
|
---|
760 | /**
|
---|
761 | * Writes audio data from a mixer sink into an HDA stream's DMA buffer.
|
---|
762 | *
|
---|
763 | * @returns IPRT status code.
|
---|
764 | * @param pStream HDA stream to write to.
|
---|
765 | * @param pvBuf Data buffer to write.
|
---|
766 | * If NULL, silence will be written.
|
---|
767 | * @param cbBuf Number of bytes of data buffer to write.
|
---|
768 | * @param pcbWritten Number of bytes written. Optional.
|
---|
769 | */
|
---|
770 | int hdaR3StreamWrite(PHDASTREAM pStream, const void *pvBuf, uint32_t cbBuf, uint32_t *pcbWritten)
|
---|
771 | {
|
---|
772 | AssertPtrReturn(pStream, VERR_INVALID_POINTER);
|
---|
773 | /* pvBuf is optional. */
|
---|
774 | AssertReturn(cbBuf, VERR_INVALID_PARAMETER);
|
---|
775 | /* pcbWritten is optional. */
|
---|
776 |
|
---|
777 | PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
|
---|
778 | AssertPtr(pCircBuf);
|
---|
779 |
|
---|
780 | int rc = VINF_SUCCESS;
|
---|
781 |
|
---|
782 | uint32_t cbWrittenTotal = 0;
|
---|
783 | uint32_t cbLeft = RT_MIN(cbBuf, (uint32_t)RTCircBufFree(pCircBuf));
|
---|
784 |
|
---|
785 | while (cbLeft)
|
---|
786 | {
|
---|
787 | void *pvDst;
|
---|
788 | size_t cbDst;
|
---|
789 |
|
---|
790 | RTCircBufAcquireWriteBlock(pCircBuf, cbLeft, &pvDst, &cbDst);
|
---|
791 |
|
---|
792 | if (cbDst)
|
---|
793 | {
|
---|
794 | if (pvBuf)
|
---|
795 | {
|
---|
796 | memcpy(pvDst, (uint8_t *)pvBuf + cbWrittenTotal, cbDst);
|
---|
797 | }
|
---|
798 | else /* Send silence. */
|
---|
799 | {
|
---|
800 | /** @todo Use a sample spec for "silence" based on the PCM parameters.
|
---|
801 | * For now we ASSUME that silence equals NULLing the data. */
|
---|
802 | RT_BZERO(pvDst, cbDst);
|
---|
803 | }
|
---|
804 |
|
---|
805 | if (pStream->Dbg.Runtime.fEnabled)
|
---|
806 | DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileStream, pvDst, cbDst, 0 /* fFlags */);
|
---|
807 | }
|
---|
808 |
|
---|
809 | RTCircBufReleaseWriteBlock(pCircBuf, cbDst);
|
---|
810 |
|
---|
811 | if (RT_FAILURE(rc))
|
---|
812 | break;
|
---|
813 |
|
---|
814 | Assert(cbLeft >= (uint32_t)cbDst);
|
---|
815 | cbLeft -= (uint32_t)cbDst;
|
---|
816 |
|
---|
817 | cbWrittenTotal += (uint32_t)cbDst;
|
---|
818 | }
|
---|
819 |
|
---|
820 | Log3Func(("cbWrittenTotal=%RU32\n", cbWrittenTotal));
|
---|
821 |
|
---|
822 | if (pcbWritten)
|
---|
823 | *pcbWritten = cbWrittenTotal;
|
---|
824 |
|
---|
825 | return rc;
|
---|
826 | }
|
---|
827 |
|
---|
828 |
|
---|
829 | /**
|
---|
830 | * Reads audio data from an HDA stream's DMA buffer and writes into a specified mixer sink.
|
---|
831 | *
|
---|
832 | * @returns IPRT status code.
|
---|
833 | * @param pStream HDA stream to read audio data from.
|
---|
834 | * @param cbToRead Number of bytes to read.
|
---|
835 | * @param pcbRead Number of bytes read. Optional.
|
---|
836 | */
|
---|
837 | int hdaR3StreamRead(PHDASTREAM pStream, uint32_t cbToRead, uint32_t *pcbRead)
|
---|
838 | {
|
---|
839 | AssertPtrReturn(pStream, VERR_INVALID_POINTER);
|
---|
840 | AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
|
---|
841 | /* pcbWritten is optional. */
|
---|
842 |
|
---|
843 | PHDAMIXERSINK pSink = pStream->pMixSink;
|
---|
844 | if (!pSink)
|
---|
845 | {
|
---|
846 | AssertMsgFailed(("[SD%RU8] Can't read from a stream with no sink attached\n", pStream->u8SD));
|
---|
847 |
|
---|
848 | if (pcbRead)
|
---|
849 | *pcbRead = 0;
|
---|
850 | return VINF_SUCCESS;
|
---|
851 | }
|
---|
852 |
|
---|
853 | PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
|
---|
854 | AssertPtr(pCircBuf);
|
---|
855 |
|
---|
856 | int rc = VINF_SUCCESS;
|
---|
857 |
|
---|
858 | uint32_t cbReadTotal = 0;
|
---|
859 | uint32_t cbLeft = RT_MIN(cbToRead, (uint32_t)RTCircBufUsed(pCircBuf));
|
---|
860 |
|
---|
861 | while (cbLeft)
|
---|
862 | {
|
---|
863 | void *pvSrc;
|
---|
864 | size_t cbSrc;
|
---|
865 |
|
---|
866 | uint32_t cbWritten = 0;
|
---|
867 |
|
---|
868 | RTCircBufAcquireReadBlock(pCircBuf, cbLeft, &pvSrc, &cbSrc);
|
---|
869 |
|
---|
870 | if (cbSrc)
|
---|
871 | {
|
---|
872 | if (pStream->Dbg.Runtime.fEnabled)
|
---|
873 | DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileStream, pvSrc, cbSrc, 0 /* fFlags */);
|
---|
874 |
|
---|
875 | rc = AudioMixerSinkWrite(pSink->pMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
|
---|
876 | AssertRC(rc);
|
---|
877 |
|
---|
878 | Assert(cbSrc >= cbWritten);
|
---|
879 | Log2Func(("[SD%RU8] %RU32/%zu bytes read\n", pStream->u8SD, cbWritten, cbSrc));
|
---|
880 | }
|
---|
881 |
|
---|
882 | RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
|
---|
883 |
|
---|
884 | if ( !cbWritten /* Nothing written? */
|
---|
885 | || RT_FAILURE(rc))
|
---|
886 | break;
|
---|
887 |
|
---|
888 | Assert(cbLeft >= cbWritten);
|
---|
889 | cbLeft -= cbWritten;
|
---|
890 |
|
---|
891 | cbReadTotal += cbWritten;
|
---|
892 | }
|
---|
893 |
|
---|
894 | if (pcbRead)
|
---|
895 | *pcbRead = cbReadTotal;
|
---|
896 |
|
---|
897 | return rc;
|
---|
898 | }
|
---|
899 |
|
---|
900 | /**
|
---|
901 | * Transfers data of an HDA stream according to its usage (input / output).
|
---|
902 | *
|
---|
903 | * For an SDO (output) stream this means reading DMA data from the device to
|
---|
904 | * the HDA stream's internal FIFO buffer.
|
---|
905 | *
|
---|
906 | * For an SDI (input) stream this is reading audio data from the HDA stream's
|
---|
907 | * internal FIFO buffer and writing it as DMA data to the device.
|
---|
908 | *
|
---|
909 | * @returns IPRT status code.
|
---|
910 | * @param pStream HDA stream to update.
|
---|
911 | * @param cbToProcessMax How much data (in bytes) to process as maximum.
|
---|
912 | */
|
---|
913 | int hdaR3StreamTransfer(PHDASTREAM pStream, uint32_t cbToProcessMax)
|
---|
914 | {
|
---|
915 | AssertPtrReturn(pStream, VERR_INVALID_POINTER);
|
---|
916 |
|
---|
917 | hdaR3StreamLock(pStream);
|
---|
918 |
|
---|
919 | PHDASTATE pThis = pStream->pHDAState;
|
---|
920 | AssertPtr(pThis);
|
---|
921 |
|
---|
922 | PHDASTREAMPERIOD pPeriod = &pStream->State.Period;
|
---|
923 | if (!hdaR3StreamPeriodLock(pPeriod))
|
---|
924 | return VERR_ACCESS_DENIED;
|
---|
925 |
|
---|
926 | bool fProceed = true;
|
---|
927 |
|
---|
928 | /* Stream not running? */
|
---|
929 | if (!pStream->State.fRunning)
|
---|
930 | {
|
---|
931 | Log3Func(("[SD%RU8] Not running\n", pStream->u8SD));
|
---|
932 | fProceed = false;
|
---|
933 | }
|
---|
934 | else if (HDA_STREAM_REG(pThis, STS, pStream->u8SD) & HDA_SDSTS_BCIS)
|
---|
935 | {
|
---|
936 | Log3Func(("[SD%RU8] BCIS bit set\n", pStream->u8SD));
|
---|
937 | fProceed = false;
|
---|
938 | }
|
---|
939 |
|
---|
940 | if (!fProceed)
|
---|
941 | {
|
---|
942 | hdaR3StreamPeriodUnlock(pPeriod);
|
---|
943 | hdaR3StreamUnlock(pStream);
|
---|
944 | return VINF_SUCCESS;
|
---|
945 | }
|
---|
946 |
|
---|
947 | const uint64_t tsNow = TMTimerGet(pStream->pTimer);
|
---|
948 |
|
---|
949 | if (!pStream->State.tsTransferLast)
|
---|
950 | pStream->State.tsTransferLast = tsNow;
|
---|
951 |
|
---|
952 | #ifdef DEBUG
|
---|
953 | const int64_t iTimerDelta = tsNow - pStream->State.tsTransferLast;
|
---|
954 | Log3Func(("[SD%RU8] Time now=%RU64, last=%RU64 -> %RI64 ticks delta\n",
|
---|
955 | pStream->u8SD, tsNow, pStream->State.tsTransferLast, iTimerDelta));
|
---|
956 | #endif
|
---|
957 |
|
---|
958 | pStream->State.tsTransferLast = tsNow;
|
---|
959 |
|
---|
960 | /* Sanity checks. */
|
---|
961 | Assert(pStream->u8SD < HDA_MAX_STREAMS);
|
---|
962 | Assert(pStream->u64BDLBase);
|
---|
963 | Assert(pStream->u32CBL);
|
---|
964 | Assert(pStream->u16FIFOS);
|
---|
965 |
|
---|
966 | /* State sanity checks. */
|
---|
967 | Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false);
|
---|
968 |
|
---|
969 | int rc = VINF_SUCCESS;
|
---|
970 |
|
---|
971 | /* Fetch first / next BDL entry. */
|
---|
972 | PHDABDLE pBDLE = &pStream->State.BDLE;
|
---|
973 | if (hdaR3BDLEIsComplete(pBDLE))
|
---|
974 | {
|
---|
975 | rc = hdaR3BDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
|
---|
976 | AssertRC(rc);
|
---|
977 | }
|
---|
978 |
|
---|
979 | uint32_t cbToProcess = RT_MIN(pStream->State.cbTransferSize - pStream->State.cbTransferProcessed,
|
---|
980 | pStream->State.cbTransferChunk);
|
---|
981 |
|
---|
982 | Log3Func(("[SD%RU8] cbToProcess=%RU32, cbToProcessMax=%RU32\n", pStream->u8SD, cbToProcess, cbToProcessMax));
|
---|
983 |
|
---|
984 | if (cbToProcess > cbToProcessMax)
|
---|
985 | {
|
---|
986 | LogFunc(("[SD%RU8] Limiting transfer (cbToProcess=%RU32, cbToProcessMax=%RU32)\n",
|
---|
987 | pStream->u8SD, cbToProcess, cbToProcessMax));
|
---|
988 |
|
---|
989 | /* Never process more than a stream currently can handle. */
|
---|
990 | cbToProcess = cbToProcessMax;
|
---|
991 | }
|
---|
992 |
|
---|
993 | uint32_t cbProcessed = 0;
|
---|
994 | uint32_t cbLeft = cbToProcess;
|
---|
995 |
|
---|
996 | uint8_t abChunk[HDA_FIFO_MAX + 1];
|
---|
997 | while (cbLeft)
|
---|
998 | {
|
---|
999 | /* Limit the chunk to the stream's FIFO size and what's left to process. */
|
---|
1000 | uint32_t cbChunk = RT_MIN(cbLeft, pStream->u16FIFOS);
|
---|
1001 |
|
---|
1002 | /* Limit the chunk to the remaining data of the current BDLE. */
|
---|
1003 | cbChunk = RT_MIN(cbChunk, pBDLE->Desc.u32BufSize - pBDLE->State.u32BufOff);
|
---|
1004 |
|
---|
1005 | /* If there are position adjustment frames left to be processed,
|
---|
1006 | * make sure that we process them first as a whole. */
|
---|
1007 | if (pStream->State.cfPosAdjustLeft)
|
---|
1008 | cbChunk = RT_MIN(cbChunk, uint32_t(pStream->State.cfPosAdjustLeft * pStream->State.Mapping.cbFrameSize));
|
---|
1009 |
|
---|
1010 | Log3Func(("[SD%RU8] cbChunk=%RU32, cPosAdjustFramesLeft=%RU16\n",
|
---|
1011 | pStream->u8SD, cbChunk, pStream->State.cfPosAdjustLeft));
|
---|
1012 |
|
---|
1013 | if (!cbChunk)
|
---|
1014 | break;
|
---|
1015 |
|
---|
1016 | uint32_t cbDMA = 0;
|
---|
1017 | PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
|
---|
1018 |
|
---|
1019 | if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN) /* Input (SDI). */
|
---|
1020 | {
|
---|
1021 | STAM_PROFILE_START(&pThis->StatIn, a);
|
---|
1022 |
|
---|
1023 | uint32_t cbDMAWritten = 0;
|
---|
1024 | uint32_t cbDMAToWrite = cbChunk;
|
---|
1025 |
|
---|
1026 | /** @todo Do we need interleaving streams support here as well?
|
---|
1027 | * Never saw anything else besides mono/stereo mics (yet). */
|
---|
1028 | while (cbDMAToWrite)
|
---|
1029 | {
|
---|
1030 | void *pvBuf; size_t cbBuf;
|
---|
1031 | RTCircBufAcquireReadBlock(pCircBuf, cbDMAToWrite, &pvBuf, &cbBuf);
|
---|
1032 |
|
---|
1033 | if ( !cbBuf
|
---|
1034 | && !RTCircBufUsed(pCircBuf))
|
---|
1035 | break;
|
---|
1036 |
|
---|
1037 | memcpy(abChunk + cbDMAWritten, pvBuf, cbBuf);
|
---|
1038 |
|
---|
1039 | RTCircBufReleaseReadBlock(pCircBuf, cbBuf);
|
---|
1040 |
|
---|
1041 | Assert(cbDMAToWrite >= cbBuf);
|
---|
1042 | cbDMAToWrite -= (uint32_t)cbBuf;
|
---|
1043 | cbDMAWritten += (uint32_t)cbBuf;
|
---|
1044 | Assert(cbDMAWritten <= cbChunk);
|
---|
1045 | }
|
---|
1046 |
|
---|
1047 | if (cbDMAToWrite)
|
---|
1048 | {
|
---|
1049 | LogRel2(("HDA: FIFO underflow for stream #%RU8 (%RU32 bytes outstanding)\n", pStream->u8SD, cbDMAToWrite));
|
---|
1050 |
|
---|
1051 | Assert(cbChunk == cbDMAWritten + cbDMAToWrite);
|
---|
1052 | memset((uint8_t *)abChunk + cbDMAWritten, 0, cbDMAToWrite);
|
---|
1053 | cbDMAWritten = cbChunk;
|
---|
1054 | }
|
---|
1055 |
|
---|
1056 | rc = hdaR3DMAWrite(pThis, pStream, abChunk, cbDMAWritten, &cbDMA /* pcbWritten */);
|
---|
1057 | if (RT_FAILURE(rc))
|
---|
1058 | LogRel(("HDA: Writing to stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
|
---|
1059 |
|
---|
1060 | STAM_PROFILE_STOP(&pThis->StatIn, a);
|
---|
1061 | }
|
---|
1062 | else if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
|
---|
1063 | {
|
---|
1064 | STAM_PROFILE_START(&pThis->StatOut, a);
|
---|
1065 |
|
---|
1066 | rc = hdaR3DMARead(pThis, pStream, abChunk, cbChunk, &cbDMA /* pcbRead */);
|
---|
1067 | if (RT_SUCCESS(rc))
|
---|
1068 | {
|
---|
1069 | const uint32_t cbFree = (uint32_t)RTCircBufFree(pCircBuf);
|
---|
1070 |
|
---|
1071 | /*
|
---|
1072 | * Most guests don't use different stream frame sizes than
|
---|
1073 | * the default one, so save a bit of CPU time and don't go into
|
---|
1074 | * the frame extraction code below.
|
---|
1075 | *
|
---|
1076 | * Only macOS guests need the frame extraction branch below at the moment AFAIK.
|
---|
1077 | */
|
---|
1078 | if (pStream->State.Mapping.cbFrameSize == HDA_FRAME_SIZE_DEFAULT)
|
---|
1079 | {
|
---|
1080 | uint32_t cbDMARead = 0;
|
---|
1081 | uint32_t cbDMALeft = RT_MIN(cbDMA, cbFree);
|
---|
1082 |
|
---|
1083 | while (cbDMALeft)
|
---|
1084 | {
|
---|
1085 | void *pvBuf; size_t cbBuf;
|
---|
1086 | RTCircBufAcquireWriteBlock(pCircBuf, cbDMALeft, &pvBuf, &cbBuf);
|
---|
1087 |
|
---|
1088 | if (cbBuf)
|
---|
1089 | {
|
---|
1090 | memcpy(pvBuf, abChunk + cbDMARead, cbBuf);
|
---|
1091 | cbDMARead += (uint32_t)cbBuf;
|
---|
1092 | cbDMALeft -= (uint32_t)cbBuf;
|
---|
1093 | }
|
---|
1094 |
|
---|
1095 | RTCircBufReleaseWriteBlock(pCircBuf, cbBuf);
|
---|
1096 | }
|
---|
1097 | }
|
---|
1098 | else
|
---|
1099 | {
|
---|
1100 | /*
|
---|
1101 | * The following code extracts the required audio stream (channel) data
|
---|
1102 | * of non-interleaved *and* interleaved audio streams.
|
---|
1103 | *
|
---|
1104 | * We by default only support 2 channels with 16-bit samples (HDA_FRAME_SIZE),
|
---|
1105 | * but an HDA audio stream can have interleaved audio data of multiple audio
|
---|
1106 | * channels in such a single stream ("AA,AA,AA vs. AA,BB,AA,BB").
|
---|
1107 | *
|
---|
1108 | * So take this into account by just handling the first channel in such a stream ("A")
|
---|
1109 | * and just discard the other channel's data.
|
---|
1110 | *
|
---|
1111 | * I know, the following code is horribly slow, but seems to work for now.
|
---|
1112 | ** @todo Optimize channel data extraction! Use some SSE(3) / intrinsics?
|
---|
1113 | */
|
---|
1114 | for (unsigned m = 0; m < pStream->State.Mapping.cMappings; m++)
|
---|
1115 | {
|
---|
1116 | const uint32_t cbFrame = pStream->State.Mapping.cbFrameSize;
|
---|
1117 |
|
---|
1118 | Assert(cbFree >= cbDMA);
|
---|
1119 |
|
---|
1120 | PPDMAUDIOSTREAMMAP pMap = &pStream->State.Mapping.paMappings[m];
|
---|
1121 | AssertPtr(pMap);
|
---|
1122 |
|
---|
1123 | Log3Func(("Mapping #%u: Start (cbDMA=%RU32, cbFrame=%RU32, offNext=%RU32)\n",
|
---|
1124 | m, cbDMA, cbFrame, pMap->offNext));
|
---|
1125 |
|
---|
1126 | uint8_t *pbSrcBuf = abChunk;
|
---|
1127 | size_t cbSrcOff = pMap->offNext;
|
---|
1128 | Assert(cbChunk >= cbSrcOff);
|
---|
1129 |
|
---|
1130 | for (unsigned i = 0; i < cbDMA / cbFrame; i++)
|
---|
1131 | {
|
---|
1132 | void *pvDstBuf; size_t cbDstBuf;
|
---|
1133 | RTCircBufAcquireWriteBlock(pCircBuf, pMap->cbStep, &pvDstBuf, &cbDstBuf);
|
---|
1134 |
|
---|
1135 | Assert(cbDstBuf >= pMap->cbStep);
|
---|
1136 |
|
---|
1137 | if (cbDstBuf)
|
---|
1138 | {
|
---|
1139 | Log3Func(("Mapping #%u: Frame #%02u: cbStep=%u, offFirst=%u, offNext=%u, cbDstBuf=%u, cbSrcOff=%u\n",
|
---|
1140 | m, i, pMap->cbStep, pMap->offFirst, pMap->offNext, cbDstBuf, cbSrcOff));
|
---|
1141 |
|
---|
1142 | memcpy(pvDstBuf, pbSrcBuf + cbSrcOff, cbDstBuf);
|
---|
1143 |
|
---|
1144 | #if 0 /* Too slow, even for release builds, so disabled it. */
|
---|
1145 | if (pStream->Dbg.Runtime.fEnabled)
|
---|
1146 | DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileDMAMapped, pvDstBuf, cbDstBuf,
|
---|
1147 | 0 /* fFlags */);
|
---|
1148 | #endif
|
---|
1149 | Assert(cbSrcOff <= cbDMA);
|
---|
1150 | if (cbSrcOff + cbFrame + pMap->offFirst<= cbDMA)
|
---|
1151 | cbSrcOff += cbFrame + pMap->offFirst;
|
---|
1152 |
|
---|
1153 | Log3Func(("Mapping #%u: Frame #%02u: -> cbSrcOff=%zu\n", m, i, cbSrcOff));
|
---|
1154 | }
|
---|
1155 |
|
---|
1156 | RTCircBufReleaseWriteBlock(pCircBuf, cbDstBuf);
|
---|
1157 | }
|
---|
1158 |
|
---|
1159 | Log3Func(("Mapping #%u: End cbSize=%u, cbDMA=%RU32, cbSrcOff=%zu\n",
|
---|
1160 | m, pMap->cbStep, cbDMA, cbSrcOff));
|
---|
1161 |
|
---|
1162 | Assert(cbSrcOff <= cbDMA);
|
---|
1163 |
|
---|
1164 | const uint32_t cbSrcLeft = cbDMA - (uint32_t)cbSrcOff;
|
---|
1165 | if (cbSrcLeft)
|
---|
1166 | {
|
---|
1167 | Log3Func(("Mapping #%u: cbSrcLeft=%RU32\n", m, cbSrcLeft));
|
---|
1168 |
|
---|
1169 | if (cbSrcLeft >= pMap->cbStep)
|
---|
1170 | {
|
---|
1171 | void *pvDstBuf; size_t cbDstBuf;
|
---|
1172 | RTCircBufAcquireWriteBlock(pCircBuf, pMap->cbStep, &pvDstBuf, &cbDstBuf);
|
---|
1173 |
|
---|
1174 | Assert(cbDstBuf >= pMap->cbStep);
|
---|
1175 |
|
---|
1176 | if (cbDstBuf)
|
---|
1177 | {
|
---|
1178 | memcpy(pvDstBuf, pbSrcBuf + cbSrcOff, cbDstBuf);
|
---|
1179 | }
|
---|
1180 |
|
---|
1181 | RTCircBufReleaseWriteBlock(pCircBuf, cbDstBuf);
|
---|
1182 | }
|
---|
1183 |
|
---|
1184 | Assert(pMap->cbFrame >= cbSrcLeft);
|
---|
1185 | pMap->offNext = pMap->cbFrame - cbSrcLeft;
|
---|
1186 | }
|
---|
1187 | else
|
---|
1188 | pMap->offNext = 0;
|
---|
1189 |
|
---|
1190 | Log3Func(("Mapping #%u finish (cbSrcOff=%zu, offNext=%zu)\n", m, cbSrcOff, pMap->offNext));
|
---|
1191 | }
|
---|
1192 | }
|
---|
1193 | }
|
---|
1194 | else
|
---|
1195 | LogRel(("HDA: Reading from stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
|
---|
1196 |
|
---|
1197 | STAM_PROFILE_STOP(&pThis->StatOut, a);
|
---|
1198 | }
|
---|
1199 |
|
---|
1200 | else /** @todo Handle duplex streams? */
|
---|
1201 | AssertFailed();
|
---|
1202 |
|
---|
1203 | if (cbDMA)
|
---|
1204 | {
|
---|
1205 | /* We always increment the position of DMA buffer counter because we're always reading
|
---|
1206 | * into an intermediate DMA buffer. */
|
---|
1207 | pBDLE->State.u32BufOff += (uint32_t)cbDMA;
|
---|
1208 | Assert(pBDLE->State.u32BufOff <= pBDLE->Desc.u32BufSize);
|
---|
1209 |
|
---|
1210 | /* Are we done doing the position adjustment?
|
---|
1211 | * Only then do the transfer accounting .*/
|
---|
1212 | if (pStream->State.cfPosAdjustLeft == 0)
|
---|
1213 | {
|
---|
1214 | Assert(cbLeft >= cbDMA);
|
---|
1215 | cbLeft -= cbDMA;
|
---|
1216 |
|
---|
1217 | cbProcessed += cbDMA;
|
---|
1218 | }
|
---|
1219 |
|
---|
1220 | /*
|
---|
1221 | * Update the stream's current position.
|
---|
1222 | * Do this as accurate and close to the actual data transfer as possible.
|
---|
1223 | * All guetsts rely on this, depending on the mechanism they use (LPIB register or DMA counters).
|
---|
1224 | */
|
---|
1225 | uint32_t cbStreamPos = hdaR3StreamGetPosition(pThis, pStream);
|
---|
1226 | if (cbStreamPos == pStream->u32CBL)
|
---|
1227 | cbStreamPos = 0;
|
---|
1228 |
|
---|
1229 | hdaR3StreamSetPosition(pStream, cbStreamPos + cbDMA);
|
---|
1230 | }
|
---|
1231 |
|
---|
1232 | if (hdaR3BDLEIsComplete(pBDLE))
|
---|
1233 | {
|
---|
1234 | Log3Func(("[SD%RU8] Complete: %R[bdle]\n", pStream->u8SD, pBDLE));
|
---|
1235 |
|
---|
1236 | /* Does the current BDLE require an interrupt to be sent? */
|
---|
1237 | if ( hdaR3BDLENeedsInterrupt(pBDLE)
|
---|
1238 | /* Are we done doing the position adjustment?
|
---|
1239 | * It can happen that a BDLE which is handled while doing the
|
---|
1240 | * position adjustment requires an interrupt on completion (IOC) being set.
|
---|
1241 | *
|
---|
1242 | * In such a case we need to skip such an interrupt and just move on. */
|
---|
1243 | && pStream->State.cfPosAdjustLeft == 0)
|
---|
1244 | {
|
---|
1245 | /* If the IOCE ("Interrupt On Completion Enable") bit of the SDCTL register is set
|
---|
1246 | * we need to generate an interrupt.
|
---|
1247 | */
|
---|
1248 | if (HDA_STREAM_REG(pThis, CTL, pStream->u8SD) & HDA_SDCTL_IOCE)
|
---|
1249 | {
|
---|
1250 | pStream->State.cTransferPendingInterrupts++;
|
---|
1251 |
|
---|
1252 | AssertMsg(pStream->State.cTransferPendingInterrupts <= 32,
|
---|
1253 | ("Too many pending interrupts (%RU8) for stream #%RU8\n",
|
---|
1254 | pStream->State.cTransferPendingInterrupts, pStream->u8SD));
|
---|
1255 | }
|
---|
1256 | }
|
---|
1257 |
|
---|
1258 | if (pStream->State.uCurBDLE == pStream->u16LVI)
|
---|
1259 | {
|
---|
1260 | pStream->State.uCurBDLE = 0;
|
---|
1261 | }
|
---|
1262 | else
|
---|
1263 | pStream->State.uCurBDLE++;
|
---|
1264 |
|
---|
1265 | /* Fetch the next BDLE entry. */
|
---|
1266 | hdaR3BDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
|
---|
1267 | }
|
---|
1268 |
|
---|
1269 | /* Do the position adjustment accounting. */
|
---|
1270 | pStream->State.cfPosAdjustLeft -=
|
---|
1271 | RT_MIN(pStream->State.cfPosAdjustLeft, cbDMA / pStream->State.Mapping.cbFrameSize);
|
---|
1272 |
|
---|
1273 | if (RT_FAILURE(rc))
|
---|
1274 | break;
|
---|
1275 | }
|
---|
1276 |
|
---|
1277 | Log3Func(("[SD%RU8] cbToProcess=%RU32, cbProcessed=%RU32, cbLeft=%RU32, %R[bdle], rc=%Rrc\n",
|
---|
1278 | pStream->u8SD, cbToProcess, cbProcessed, cbLeft, pBDLE, rc));
|
---|
1279 |
|
---|
1280 | /* Sanity. */
|
---|
1281 | Assert(cbProcessed == cbToProcess);
|
---|
1282 | Assert(cbLeft == 0);
|
---|
1283 |
|
---|
1284 | /* Only do the data accounting if we don't have to do any position
|
---|
1285 | * adjustment anymore. */
|
---|
1286 | if (pStream->State.cfPosAdjustLeft == 0)
|
---|
1287 | {
|
---|
1288 | hdaR3StreamPeriodInc(pPeriod, RT_MIN(cbProcessed / pStream->State.Mapping.cbFrameSize,
|
---|
1289 | hdaR3StreamPeriodGetRemainingFrames(pPeriod)));
|
---|
1290 |
|
---|
1291 | pStream->State.cbTransferProcessed += cbProcessed;
|
---|
1292 | }
|
---|
1293 |
|
---|
1294 | /* Make sure that we never report more stuff processed than initially announced. */
|
---|
1295 | if (pStream->State.cbTransferProcessed > pStream->State.cbTransferSize)
|
---|
1296 | pStream->State.cbTransferProcessed = pStream->State.cbTransferSize;
|
---|
1297 |
|
---|
1298 | uint32_t cbTransferLeft = pStream->State.cbTransferSize - pStream->State.cbTransferProcessed;
|
---|
1299 | bool fTransferComplete = !cbTransferLeft;
|
---|
1300 | uint64_t tsTransferNext = 0;
|
---|
1301 |
|
---|
1302 | if (fTransferComplete)
|
---|
1303 | {
|
---|
1304 | /*
|
---|
1305 | * Try updating the wall clock.
|
---|
1306 | *
|
---|
1307 | * Note 1) Only certain guests (like Linux' snd_hda_intel) rely on the WALCLK register
|
---|
1308 | * in order to determine the correct timing of the sound device. Other guests
|
---|
1309 | * like Windows 7 + 10 (or even more exotic ones like Haiku) will completely
|
---|
1310 | * ignore this.
|
---|
1311 | *
|
---|
1312 | * Note 2) When updating the WALCLK register too often / early (or even in a non-monotonic
|
---|
1313 | * fashion) this *will* upset guest device drivers and will completely fuck up the
|
---|
1314 | * sound output. Running VLC on the guest will tell!
|
---|
1315 | */
|
---|
1316 | const bool fWalClkSet = hdaR3WalClkSet(pThis,
|
---|
1317 | hdaWalClkGetCurrent(pThis)
|
---|
1318 | + hdaR3StreamPeriodFramesToWalClk(pPeriod,
|
---|
1319 | pStream->State.cbTransferProcessed
|
---|
1320 | / pStream->State.Mapping.cbFrameSize),
|
---|
1321 | false /* fForce */);
|
---|
1322 | RT_NOREF(fWalClkSet);
|
---|
1323 | }
|
---|
1324 |
|
---|
1325 | /* Does the period have any interrupts outstanding? */
|
---|
1326 | if (pStream->State.cTransferPendingInterrupts)
|
---|
1327 | {
|
---|
1328 | Log3Func(("[SD%RU8] Scheduling interrupt\n", pStream->u8SD));
|
---|
1329 |
|
---|
1330 | /*
|
---|
1331 | * Set the stream's BCIS bit.
|
---|
1332 | *
|
---|
1333 | * Note: This only must be done if the whole period is complete, and not if only
|
---|
1334 | * one specific BDL entry is complete (if it has the IOC bit set).
|
---|
1335 | *
|
---|
1336 | * This will otherwise confuses the guest when it 1) deasserts the interrupt,
|
---|
1337 | * 2) reads SDSTS (with BCIS set) and then 3) too early reads a (wrong) WALCLK value.
|
---|
1338 | *
|
---|
1339 | * snd_hda_intel on Linux will tell.
|
---|
1340 | */
|
---|
1341 | HDA_STREAM_REG(pThis, STS, pStream->u8SD) |= HDA_SDSTS_BCIS;
|
---|
1342 |
|
---|
1343 | /* Trigger an interrupt first and let hdaRegWriteSDSTS() deal with
|
---|
1344 | * ending / beginning a period. */
|
---|
1345 | HDA_PROCESS_INTERRUPT(pThis->pDevInsR3, pThis);
|
---|
1346 | }
|
---|
1347 | else /* Transfer still in-flight -- schedule the next timing slot. */
|
---|
1348 | {
|
---|
1349 | uint32_t cbTransferNext = cbTransferLeft;
|
---|
1350 |
|
---|
1351 | /* No data left to transfer anymore or do we have more data left
|
---|
1352 | * than we can transfer per timing slot? Clamp. */
|
---|
1353 | if ( !cbTransferNext
|
---|
1354 | || cbTransferNext > pStream->State.cbTransferChunk)
|
---|
1355 | {
|
---|
1356 | cbTransferNext = pStream->State.cbTransferChunk;
|
---|
1357 | }
|
---|
1358 |
|
---|
1359 | tsTransferNext = tsNow + (cbTransferNext * pStream->State.cTicksPerByte);
|
---|
1360 |
|
---|
1361 | /*
|
---|
1362 | * If the current transfer is complete, reset our counter.
|
---|
1363 | *
|
---|
1364 | * This can happen for examlpe if the guest OS (like macOS) sets up
|
---|
1365 | * big BDLEs without IOC bits set (but for the last one) and the
|
---|
1366 | * transfer is complete before we reach such a BDL entry.
|
---|
1367 | */
|
---|
1368 | if (fTransferComplete)
|
---|
1369 | pStream->State.cbTransferProcessed = 0;
|
---|
1370 | }
|
---|
1371 |
|
---|
1372 | /* If we need to do another transfer, (re-)arm the device timer. */
|
---|
1373 | if (tsTransferNext) /* Can be 0 if no next transfer is needed. */
|
---|
1374 | {
|
---|
1375 | Log3Func(("[SD%RU8] Scheduling timer\n", pStream->u8SD));
|
---|
1376 |
|
---|
1377 | TMTimerUnlock(pStream->pTimer);
|
---|
1378 |
|
---|
1379 | LogFunc(("Timer set SD%RU8\n", pStream->u8SD));
|
---|
1380 | hdaR3TimerSet(pStream->pHDAState, pStream, tsTransferNext, false /* fForce */);
|
---|
1381 |
|
---|
1382 | TMTimerLock(pStream->pTimer, VINF_SUCCESS);
|
---|
1383 |
|
---|
1384 | pStream->State.tsTransferNext = tsTransferNext;
|
---|
1385 | }
|
---|
1386 |
|
---|
1387 | pStream->State.tsTransferLast = tsNow;
|
---|
1388 |
|
---|
1389 | Log3Func(("[SD%RU8] cbTransferLeft=%RU32 -- %RU32/%RU32\n",
|
---|
1390 | pStream->u8SD, cbTransferLeft, pStream->State.cbTransferProcessed, pStream->State.cbTransferSize));
|
---|
1391 | Log3Func(("[SD%RU8] fTransferComplete=%RTbool, cTransferPendingInterrupts=%RU8\n",
|
---|
1392 | pStream->u8SD, fTransferComplete, pStream->State.cTransferPendingInterrupts));
|
---|
1393 | Log3Func(("[SD%RU8] tsNow=%RU64, tsTransferNext=%RU64 (in %RU64 ticks)\n",
|
---|
1394 | pStream->u8SD, tsNow, tsTransferNext, tsTransferNext - tsNow));
|
---|
1395 |
|
---|
1396 | hdaR3StreamPeriodUnlock(pPeriod);
|
---|
1397 | hdaR3StreamUnlock(pStream);
|
---|
1398 |
|
---|
1399 | return VINF_SUCCESS;
|
---|
1400 | }
|
---|
1401 |
|
---|
1402 | /**
|
---|
1403 | * Updates a HDA stream by doing its required data transfers.
|
---|
1404 | * The host sink(s) set the overall pace.
|
---|
1405 | *
|
---|
1406 | * This routine is called by both, the synchronous and the asynchronous, implementations.
|
---|
1407 | *
|
---|
1408 | * This routine is called by both, the synchronous and the asynchronous
|
---|
1409 | * (VBOX_WITH_AUDIO_HDA_ASYNC_IO), implementations.
|
---|
1410 | *
|
---|
1411 | * When running synchronously, the device DMA transfers *and* the mixer sink
|
---|
1412 | * processing is within the device timer.
|
---|
1413 | *
|
---|
1414 | * When running asynchronously, only the device DMA transfers are done in the
|
---|
1415 | * device timer, whereas the mixer sink processing then is done in the stream's
|
---|
1416 | * own async I/O thread. This thread also will call this function
|
---|
1417 | * (with fInTimer set to @c false).
|
---|
1418 | *
|
---|
1419 | * @param pStream HDA stream to update.
|
---|
1420 | * @param fInTimer Whether to this function was called from the timer
|
---|
1421 | * context or an asynchronous I/O stream thread (if supported).
|
---|
1422 | */
|
---|
1423 | void hdaR3StreamUpdate(PHDASTREAM pStream, bool fInTimer)
|
---|
1424 | {
|
---|
1425 | if (!pStream)
|
---|
1426 | return;
|
---|
1427 |
|
---|
1428 | PAUDMIXSINK pSink = NULL;
|
---|
1429 | if ( pStream->pMixSink
|
---|
1430 | && pStream->pMixSink->pMixSink)
|
---|
1431 | {
|
---|
1432 | pSink = pStream->pMixSink->pMixSink;
|
---|
1433 | }
|
---|
1434 |
|
---|
1435 | if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
|
---|
1436 | return;
|
---|
1437 |
|
---|
1438 | int rc2;
|
---|
1439 |
|
---|
1440 | if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
|
---|
1441 | {
|
---|
1442 | bool fDoRead = false; /* Whether to read from the HDA stream or not. */
|
---|
1443 |
|
---|
1444 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1445 | if (fInTimer)
|
---|
1446 | # endif
|
---|
1447 | {
|
---|
1448 | const uint32_t cbStreamFree = hdaR3StreamGetFree(pStream);
|
---|
1449 | if (cbStreamFree)
|
---|
1450 | {
|
---|
1451 | /* Do the DMA transfer. */
|
---|
1452 | rc2 = hdaR3StreamTransfer(pStream, cbStreamFree);
|
---|
1453 | AssertRC(rc2);
|
---|
1454 | }
|
---|
1455 |
|
---|
1456 | /* Only read from the HDA stream at the given scheduling rate. */
|
---|
1457 | const uint64_t tsNowNs = RTTimeNanoTS();
|
---|
1458 | if (tsNowNs - pStream->State.tsLastUpdateNs >= pStream->State.Cfg.Device.cMsSchedulingHint * RT_NS_1MS)
|
---|
1459 | {
|
---|
1460 | fDoRead = true;
|
---|
1461 | pStream->State.tsLastUpdateNs = tsNowNs;
|
---|
1462 | }
|
---|
1463 | }
|
---|
1464 |
|
---|
1465 | Log3Func(("[SD%RU8] fInTimer=%RTbool, fDoRead=%RTbool\n", pStream->u8SD, fInTimer, fDoRead));
|
---|
1466 |
|
---|
1467 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1468 | if (fDoRead)
|
---|
1469 | {
|
---|
1470 | rc2 = hdaR3StreamAsyncIONotify(pStream);
|
---|
1471 | AssertRC(rc2);
|
---|
1472 | }
|
---|
1473 | # endif
|
---|
1474 |
|
---|
1475 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1476 | if (!fInTimer) /* In async I/O thread */
|
---|
1477 | {
|
---|
1478 | # else
|
---|
1479 | if (fDoRead)
|
---|
1480 | {
|
---|
1481 | # endif
|
---|
1482 | const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
|
---|
1483 | const uint32_t cbStreamReadable = hdaR3StreamGetUsed(pStream);
|
---|
1484 | const uint32_t cbToReadFromStream = RT_MIN(cbStreamReadable, cbSinkWritable);
|
---|
1485 |
|
---|
1486 | Log3Func(("[SD%RU8] cbSinkWritable=%RU32, cbStreamReadable=%RU32\n", pStream->u8SD, cbSinkWritable, cbStreamReadable));
|
---|
1487 |
|
---|
1488 | if (cbToReadFromStream)
|
---|
1489 | {
|
---|
1490 | /* Read (guest output) data and write it to the stream's sink. */
|
---|
1491 | rc2 = hdaR3StreamRead(pStream, cbToReadFromStream, NULL /* pcbRead */);
|
---|
1492 | AssertRC(rc2);
|
---|
1493 | }
|
---|
1494 |
|
---|
1495 | /* When running synchronously, update the associated sink here.
|
---|
1496 | * Otherwise this will be done in the async I/O thread. */
|
---|
1497 | rc2 = AudioMixerSinkUpdate(pSink);
|
---|
1498 | AssertRC(rc2);
|
---|
1499 | }
|
---|
1500 | }
|
---|
1501 | else /* Input (SDI). */
|
---|
1502 | {
|
---|
1503 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1504 | if (!fInTimer)
|
---|
1505 | {
|
---|
1506 | # endif
|
---|
1507 | rc2 = AudioMixerSinkUpdate(pSink);
|
---|
1508 | AssertRC(rc2);
|
---|
1509 |
|
---|
1510 | /* Is the sink ready to be read (host input data) from? If so, by how much? */
|
---|
1511 | uint32_t cbSinkReadable = AudioMixerSinkGetReadable(pSink);
|
---|
1512 |
|
---|
1513 | /* How much (guest input) data is available for writing at the moment for the HDA stream? */
|
---|
1514 | const uint32_t cbStreamFree = hdaR3StreamGetFree(pStream);
|
---|
1515 |
|
---|
1516 | Log3Func(("[SD%RU8] cbSinkReadable=%RU32, cbStreamFree=%RU32\n", pStream->u8SD, cbSinkReadable, cbStreamFree));
|
---|
1517 |
|
---|
1518 | /* Do not read more than the HDA stream can hold at the moment.
|
---|
1519 | * The host sets the overall pace. */
|
---|
1520 | if (cbSinkReadable > cbStreamFree)
|
---|
1521 | cbSinkReadable = cbStreamFree;
|
---|
1522 |
|
---|
1523 | if (cbSinkReadable)
|
---|
1524 | {
|
---|
1525 | uint8_t abFIFO[HDA_FIFO_MAX + 1];
|
---|
1526 | while (cbSinkReadable)
|
---|
1527 | {
|
---|
1528 | uint32_t cbRead;
|
---|
1529 | rc2 = AudioMixerSinkRead(pSink, AUDMIXOP_COPY,
|
---|
1530 | abFIFO, RT_MIN(cbSinkReadable, (uint32_t)sizeof(abFIFO)), &cbRead);
|
---|
1531 | AssertRCBreak(rc2);
|
---|
1532 |
|
---|
1533 | if (!cbRead)
|
---|
1534 | {
|
---|
1535 | AssertMsgFailed(("Nothing read from sink, even if %RU32 bytes were (still) announced\n", cbSinkReadable));
|
---|
1536 | break;
|
---|
1537 | }
|
---|
1538 |
|
---|
1539 | /* Write (guest input) data to the stream which was read from stream's sink before. */
|
---|
1540 | uint32_t cbWritten;
|
---|
1541 | rc2 = hdaR3StreamWrite(pStream, abFIFO, cbRead, &cbWritten);
|
---|
1542 | AssertRCBreak(rc2);
|
---|
1543 |
|
---|
1544 | if (!cbWritten)
|
---|
1545 | {
|
---|
1546 | AssertFailed(); /* Should never happen, as we know how much we can write. */
|
---|
1547 | break;
|
---|
1548 | }
|
---|
1549 |
|
---|
1550 | Assert(cbSinkReadable >= cbRead);
|
---|
1551 | cbSinkReadable -= cbRead;
|
---|
1552 | }
|
---|
1553 | }
|
---|
1554 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1555 | }
|
---|
1556 | else /* fInTimer */
|
---|
1557 | {
|
---|
1558 | # endif
|
---|
1559 |
|
---|
1560 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1561 | const uint64_t tsNowNs = RTTimeNanoTS();
|
---|
1562 | if (tsNowNs - pStream->State.tsLastUpdateNs >= pStream->State.Cfg.Device.cMsSchedulingHint * RT_NS_1MS)
|
---|
1563 | {
|
---|
1564 | rc2 = hdaR3StreamAsyncIONotify(pStream);
|
---|
1565 | AssertRC(rc2);
|
---|
1566 |
|
---|
1567 | pStream->State.tsLastUpdateNs = tsNowNs;
|
---|
1568 | }
|
---|
1569 | # endif
|
---|
1570 | const uint32_t cbStreamUsed = hdaR3StreamGetUsed(pStream);
|
---|
1571 | if (cbStreamUsed)
|
---|
1572 | {
|
---|
1573 | rc2 = hdaR3StreamTransfer(pStream, cbStreamUsed);
|
---|
1574 | AssertRC(rc2);
|
---|
1575 | }
|
---|
1576 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1577 | }
|
---|
1578 | # endif
|
---|
1579 | }
|
---|
1580 | }
|
---|
1581 |
|
---|
1582 | /**
|
---|
1583 | * Locks an HDA stream for serialized access.
|
---|
1584 | *
|
---|
1585 | * @returns IPRT status code.
|
---|
1586 | * @param pStream HDA stream to lock.
|
---|
1587 | */
|
---|
1588 | void hdaR3StreamLock(PHDASTREAM pStream)
|
---|
1589 | {
|
---|
1590 | AssertPtrReturnVoid(pStream);
|
---|
1591 | int rc2 = RTCritSectEnter(&pStream->CritSect);
|
---|
1592 | AssertRC(rc2);
|
---|
1593 | }
|
---|
1594 |
|
---|
1595 | /**
|
---|
1596 | * Unlocks a formerly locked HDA stream.
|
---|
1597 | *
|
---|
1598 | * @returns IPRT status code.
|
---|
1599 | * @param pStream HDA stream to unlock.
|
---|
1600 | */
|
---|
1601 | void hdaR3StreamUnlock(PHDASTREAM pStream)
|
---|
1602 | {
|
---|
1603 | AssertPtrReturnVoid(pStream);
|
---|
1604 | int rc2 = RTCritSectLeave(&pStream->CritSect);
|
---|
1605 | AssertRC(rc2);
|
---|
1606 | }
|
---|
1607 |
|
---|
1608 | /**
|
---|
1609 | * Updates an HDA stream's current read or write buffer position (depending on the stream type) by
|
---|
1610 | * updating its associated LPIB register and DMA position buffer (if enabled).
|
---|
1611 | *
|
---|
1612 | * @returns Set LPIB value.
|
---|
1613 | * @param pStream HDA stream to update read / write position for.
|
---|
1614 | * @param u32LPIB New LPIB (position) value to set.
|
---|
1615 | */
|
---|
1616 | uint32_t hdaR3StreamUpdateLPIB(PHDASTREAM pStream, uint32_t u32LPIB)
|
---|
1617 | {
|
---|
1618 | AssertPtrReturn(pStream, 0);
|
---|
1619 |
|
---|
1620 | AssertMsg(u32LPIB <= pStream->u32CBL,
|
---|
1621 | ("[SD%RU8] New LPIB (%RU32) exceeds CBL (%RU32)\n", pStream->u8SD, u32LPIB, pStream->u32CBL));
|
---|
1622 |
|
---|
1623 | const PHDASTATE pThis = pStream->pHDAState;
|
---|
1624 |
|
---|
1625 | u32LPIB = RT_MIN(u32LPIB, pStream->u32CBL);
|
---|
1626 |
|
---|
1627 | LogFlowFunc(("[SD%RU8] LPIB=%RU32 (DMA Position Buffer Enabled: %RTbool)\n",
|
---|
1628 | pStream->u8SD, u32LPIB, pThis->fDMAPosition));
|
---|
1629 |
|
---|
1630 | /* Update LPIB in any case. */
|
---|
1631 | HDA_STREAM_REG(pThis, LPIB, pStream->u8SD) = u32LPIB;
|
---|
1632 |
|
---|
1633 | /* Do we need to tell the current DMA position? */
|
---|
1634 | if (pThis->fDMAPosition)
|
---|
1635 | {
|
---|
1636 | int rc2 = PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns),
|
---|
1637 | pThis->u64DPBase + (pStream->u8SD * 2 * sizeof(uint32_t)),
|
---|
1638 | (void *)&u32LPIB, sizeof(uint32_t));
|
---|
1639 | AssertRC(rc2);
|
---|
1640 | }
|
---|
1641 |
|
---|
1642 | return u32LPIB;
|
---|
1643 | }
|
---|
1644 |
|
---|
1645 | # ifdef HDA_USE_DMA_ACCESS_HANDLER
|
---|
1646 | /**
|
---|
1647 | * Registers access handlers for a stream's BDLE DMA accesses.
|
---|
1648 | *
|
---|
1649 | * @returns true if registration was successful, false if not.
|
---|
1650 | * @param pStream HDA stream to register BDLE access handlers for.
|
---|
1651 | */
|
---|
1652 | bool hdaR3StreamRegisterDMAHandlers(PHDASTREAM pStream)
|
---|
1653 | {
|
---|
1654 | /* At least LVI and the BDL base must be set. */
|
---|
1655 | if ( !pStream->u16LVI
|
---|
1656 | || !pStream->u64BDLBase)
|
---|
1657 | {
|
---|
1658 | return false;
|
---|
1659 | }
|
---|
1660 |
|
---|
1661 | hdaR3StreamUnregisterDMAHandlers(pStream);
|
---|
1662 |
|
---|
1663 | LogFunc(("Registering ...\n"));
|
---|
1664 |
|
---|
1665 | int rc = VINF_SUCCESS;
|
---|
1666 |
|
---|
1667 | /*
|
---|
1668 | * Create BDLE ranges.
|
---|
1669 | */
|
---|
1670 |
|
---|
1671 | struct BDLERANGE
|
---|
1672 | {
|
---|
1673 | RTGCPHYS uAddr;
|
---|
1674 | uint32_t uSize;
|
---|
1675 | } arrRanges[16]; /** @todo Use a define. */
|
---|
1676 |
|
---|
1677 | size_t cRanges = 0;
|
---|
1678 |
|
---|
1679 | for (uint16_t i = 0; i < pStream->u16LVI + 1; i++)
|
---|
1680 | {
|
---|
1681 | HDABDLE BDLE;
|
---|
1682 | rc = hdaR3BDLEFetch(pThis, &BDLE, pStream->u64BDLBase, i /* Index */);
|
---|
1683 | if (RT_FAILURE(rc))
|
---|
1684 | break;
|
---|
1685 |
|
---|
1686 | bool fAddRange = true;
|
---|
1687 | BDLERANGE *pRange;
|
---|
1688 |
|
---|
1689 | if (cRanges)
|
---|
1690 | {
|
---|
1691 | pRange = &arrRanges[cRanges - 1];
|
---|
1692 |
|
---|
1693 | /* Is the current range a direct neighbor of the current BLDE? */
|
---|
1694 | if ((pRange->uAddr + pRange->uSize) == BDLE.Desc.u64BufAddr)
|
---|
1695 | {
|
---|
1696 | /* Expand the current range by the current BDLE's size. */
|
---|
1697 | pRange->uSize += BDLE.Desc.u32BufSize;
|
---|
1698 |
|
---|
1699 | /* Adding a new range in this case is not needed anymore. */
|
---|
1700 | fAddRange = false;
|
---|
1701 |
|
---|
1702 | LogFunc(("Expanding range %zu by %RU32 (%RU32 total now)\n", cRanges - 1, BDLE.Desc.u32BufSize, pRange->uSize));
|
---|
1703 | }
|
---|
1704 | }
|
---|
1705 |
|
---|
1706 | /* Do we need to add a new range? */
|
---|
1707 | if ( fAddRange
|
---|
1708 | && cRanges < RT_ELEMENTS(arrRanges))
|
---|
1709 | {
|
---|
1710 | pRange = &arrRanges[cRanges];
|
---|
1711 |
|
---|
1712 | pRange->uAddr = BDLE.Desc.u64BufAddr;
|
---|
1713 | pRange->uSize = BDLE.Desc.u32BufSize;
|
---|
1714 |
|
---|
1715 | LogFunc(("Adding range %zu - 0x%x (%RU32)\n", cRanges, pRange->uAddr, pRange->uSize));
|
---|
1716 |
|
---|
1717 | cRanges++;
|
---|
1718 | }
|
---|
1719 | }
|
---|
1720 |
|
---|
1721 | LogFunc(("%zu ranges total\n", cRanges));
|
---|
1722 |
|
---|
1723 | /*
|
---|
1724 | * Register all ranges as DMA access handlers.
|
---|
1725 | */
|
---|
1726 |
|
---|
1727 | for (size_t i = 0; i < cRanges; i++)
|
---|
1728 | {
|
---|
1729 | BDLERANGE *pRange = &arrRanges[i];
|
---|
1730 |
|
---|
1731 | PHDADMAACCESSHANDLER pHandler = (PHDADMAACCESSHANDLER)RTMemAllocZ(sizeof(HDADMAACCESSHANDLER));
|
---|
1732 | if (!pHandler)
|
---|
1733 | {
|
---|
1734 | rc = VERR_NO_MEMORY;
|
---|
1735 | break;
|
---|
1736 | }
|
---|
1737 |
|
---|
1738 | RTListAppend(&pStream->State.lstDMAHandlers, &pHandler->Node);
|
---|
1739 |
|
---|
1740 | pHandler->pStream = pStream; /* Save a back reference to the owner. */
|
---|
1741 |
|
---|
1742 | char szDesc[32];
|
---|
1743 | RTStrPrintf(szDesc, sizeof(szDesc), "HDA[SD%RU8 - RANGE%02zu]", pStream->u8SD, i);
|
---|
1744 |
|
---|
1745 | int rc2 = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3), PGMPHYSHANDLERKIND_WRITE,
|
---|
1746 | hdaDMAAccessHandler,
|
---|
1747 | NULL, NULL, NULL,
|
---|
1748 | NULL, NULL, NULL,
|
---|
1749 | szDesc, &pHandler->hAccessHandlerType);
|
---|
1750 | AssertRCBreak(rc2);
|
---|
1751 |
|
---|
1752 | pHandler->BDLEAddr = pRange->uAddr;
|
---|
1753 | pHandler->BDLESize = pRange->uSize;
|
---|
1754 |
|
---|
1755 | /* Get first and last pages of the BDLE range. */
|
---|
1756 | RTGCPHYS pgFirst = pRange->uAddr & ~PAGE_OFFSET_MASK;
|
---|
1757 | RTGCPHYS pgLast = RT_ALIGN(pgFirst + pRange->uSize, PAGE_SIZE);
|
---|
1758 |
|
---|
1759 | /* Calculate the region size (in pages). */
|
---|
1760 | RTGCPHYS regionSize = RT_ALIGN(pgLast - pgFirst, PAGE_SIZE);
|
---|
1761 |
|
---|
1762 | pHandler->GCPhysFirst = pgFirst;
|
---|
1763 | pHandler->GCPhysLast = pHandler->GCPhysFirst + (regionSize - 1);
|
---|
1764 |
|
---|
1765 | LogFunc(("\tRegistering region '%s': 0x%x - 0x%x (region size: %zu)\n",
|
---|
1766 | szDesc, pHandler->GCPhysFirst, pHandler->GCPhysLast, regionSize));
|
---|
1767 | LogFunc(("\tBDLE @ 0x%x - 0x%x (%RU32)\n",
|
---|
1768 | pHandler->BDLEAddr, pHandler->BDLEAddr + pHandler->BDLESize, pHandler->BDLESize));
|
---|
1769 |
|
---|
1770 | rc2 = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
|
---|
1771 | pHandler->GCPhysFirst, pHandler->GCPhysLast,
|
---|
1772 | pHandler->hAccessHandlerType, pHandler, NIL_RTR0PTR, NIL_RTRCPTR,
|
---|
1773 | szDesc);
|
---|
1774 | AssertRCBreak(rc2);
|
---|
1775 |
|
---|
1776 | pHandler->fRegistered = true;
|
---|
1777 | }
|
---|
1778 |
|
---|
1779 | LogFunc(("Registration ended with rc=%Rrc\n", rc));
|
---|
1780 |
|
---|
1781 | return RT_SUCCESS(rc);
|
---|
1782 | }
|
---|
1783 |
|
---|
1784 | /**
|
---|
1785 | * Unregisters access handlers of a stream's BDLEs.
|
---|
1786 | *
|
---|
1787 | * @param pStream HDA stream to unregister BDLE access handlers for.
|
---|
1788 | */
|
---|
1789 | void hdaR3StreamUnregisterDMAHandlers(PHDASTREAM pStream)
|
---|
1790 | {
|
---|
1791 | LogFunc(("\n"));
|
---|
1792 |
|
---|
1793 | PHDADMAACCESSHANDLER pHandler, pHandlerNext;
|
---|
1794 | RTListForEachSafe(&pStream->State.lstDMAHandlers, pHandler, pHandlerNext, HDADMAACCESSHANDLER, Node)
|
---|
1795 | {
|
---|
1796 | if (!pHandler->fRegistered) /* Handler not registered? Skip. */
|
---|
1797 | continue;
|
---|
1798 |
|
---|
1799 | LogFunc(("Unregistering 0x%x - 0x%x (%zu)\n",
|
---|
1800 | pHandler->GCPhysFirst, pHandler->GCPhysLast, pHandler->GCPhysLast - pHandler->GCPhysFirst));
|
---|
1801 |
|
---|
1802 | int rc2 = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
|
---|
1803 | pHandler->GCPhysFirst);
|
---|
1804 | AssertRC(rc2);
|
---|
1805 |
|
---|
1806 | RTListNodeRemove(&pHandler->Node);
|
---|
1807 |
|
---|
1808 | RTMemFree(pHandler);
|
---|
1809 | pHandler = NULL;
|
---|
1810 | }
|
---|
1811 |
|
---|
1812 | Assert(RTListIsEmpty(&pStream->State.lstDMAHandlers));
|
---|
1813 | }
|
---|
1814 | # endif /* HDA_USE_DMA_ACCESS_HANDLER */
|
---|
1815 |
|
---|
1816 | # ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
|
---|
1817 | /**
|
---|
1818 | * Asynchronous I/O thread for a HDA stream.
|
---|
1819 | * This will do the heavy lifting work for us as soon as it's getting notified by another thread.
|
---|
1820 | *
|
---|
1821 | * @returns IPRT status code.
|
---|
1822 | * @param hThreadSelf Thread handle.
|
---|
1823 | * @param pvUser User argument. Must be of type PHDASTREAMTHREADCTX.
|
---|
1824 | */
|
---|
1825 | DECLCALLBACK(int) hdaR3StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
|
---|
1826 | {
|
---|
1827 | PHDASTREAMTHREADCTX pCtx = (PHDASTREAMTHREADCTX)pvUser;
|
---|
1828 | AssertPtr(pCtx);
|
---|
1829 |
|
---|
1830 | PHDASTREAM pStream = pCtx->pStream;
|
---|
1831 | AssertPtr(pStream);
|
---|
1832 |
|
---|
1833 | PHDASTREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
|
---|
1834 |
|
---|
1835 | ASMAtomicXchgBool(&pAIO->fStarted, true);
|
---|
1836 |
|
---|
1837 | RTThreadUserSignal(hThreadSelf);
|
---|
1838 |
|
---|
1839 | LogFunc(("[SD%RU8] Started\n", pStream->u8SD));
|
---|
1840 |
|
---|
1841 | for (;;)
|
---|
1842 | {
|
---|
1843 | int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
|
---|
1844 | if (RT_FAILURE(rc2))
|
---|
1845 | break;
|
---|
1846 |
|
---|
1847 | if (ASMAtomicReadBool(&pAIO->fShutdown))
|
---|
1848 | break;
|
---|
1849 |
|
---|
1850 | rc2 = RTCritSectEnter(&pAIO->CritSect);
|
---|
1851 | if (RT_SUCCESS(rc2))
|
---|
1852 | {
|
---|
1853 | if (!pAIO->fEnabled)
|
---|
1854 | {
|
---|
1855 | RTCritSectLeave(&pAIO->CritSect);
|
---|
1856 | continue;
|
---|
1857 | }
|
---|
1858 |
|
---|
1859 | hdaR3StreamUpdate(pStream, false /* fInTimer */);
|
---|
1860 |
|
---|
1861 | int rc3 = RTCritSectLeave(&pAIO->CritSect);
|
---|
1862 | AssertRC(rc3);
|
---|
1863 | }
|
---|
1864 |
|
---|
1865 | AssertRC(rc2);
|
---|
1866 | }
|
---|
1867 |
|
---|
1868 | LogFunc(("[SD%RU8] Ended\n", pStream->u8SD));
|
---|
1869 |
|
---|
1870 | ASMAtomicXchgBool(&pAIO->fStarted, false);
|
---|
1871 |
|
---|
1872 | return VINF_SUCCESS;
|
---|
1873 | }
|
---|
1874 |
|
---|
1875 | /**
|
---|
1876 | * Creates the async I/O thread for a specific HDA audio stream.
|
---|
1877 | *
|
---|
1878 | * @returns IPRT status code.
|
---|
1879 | * @param pStream HDA audio stream to create the async I/O thread for.
|
---|
1880 | */
|
---|
1881 | int hdaR3StreamAsyncIOCreate(PHDASTREAM pStream)
|
---|
1882 | {
|
---|
1883 | PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
|
---|
1884 |
|
---|
1885 | int rc;
|
---|
1886 |
|
---|
1887 | if (!ASMAtomicReadBool(&pAIO->fStarted))
|
---|
1888 | {
|
---|
1889 | pAIO->fShutdown = false;
|
---|
1890 | pAIO->fEnabled = true; /* Enabled by default. */
|
---|
1891 |
|
---|
1892 | rc = RTSemEventCreate(&pAIO->Event);
|
---|
1893 | if (RT_SUCCESS(rc))
|
---|
1894 | {
|
---|
1895 | rc = RTCritSectInit(&pAIO->CritSect);
|
---|
1896 | if (RT_SUCCESS(rc))
|
---|
1897 | {
|
---|
1898 | HDASTREAMTHREADCTX Ctx = { pStream->pHDAState, pStream };
|
---|
1899 |
|
---|
1900 | char szThreadName[64];
|
---|
1901 | RTStrPrintf2(szThreadName, sizeof(szThreadName), "hdaAIO%RU8", pStream->u8SD);
|
---|
1902 |
|
---|
1903 | rc = RTThreadCreate(&pAIO->Thread, hdaR3StreamAsyncIOThread, &Ctx,
|
---|
1904 | 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
|
---|
1905 | if (RT_SUCCESS(rc))
|
---|
1906 | rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
|
---|
1907 | }
|
---|
1908 | }
|
---|
1909 | }
|
---|
1910 | else
|
---|
1911 | rc = VINF_SUCCESS;
|
---|
1912 |
|
---|
1913 | LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
|
---|
1914 | return rc;
|
---|
1915 | }
|
---|
1916 |
|
---|
1917 | /**
|
---|
1918 | * Destroys the async I/O thread of a specific HDA audio stream.
|
---|
1919 | *
|
---|
1920 | * @returns IPRT status code.
|
---|
1921 | * @param pStream HDA audio stream to destroy the async I/O thread for.
|
---|
1922 | */
|
---|
1923 | int hdaR3StreamAsyncIODestroy(PHDASTREAM pStream)
|
---|
1924 | {
|
---|
1925 | PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
|
---|
1926 |
|
---|
1927 | if (!ASMAtomicReadBool(&pAIO->fStarted))
|
---|
1928 | return VINF_SUCCESS;
|
---|
1929 |
|
---|
1930 | ASMAtomicWriteBool(&pAIO->fShutdown, true);
|
---|
1931 |
|
---|
1932 | int rc = hdaR3StreamAsyncIONotify(pStream);
|
---|
1933 | AssertRC(rc);
|
---|
1934 |
|
---|
1935 | int rcThread;
|
---|
1936 | rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
|
---|
1937 | LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
|
---|
1938 |
|
---|
1939 | if (RT_SUCCESS(rc))
|
---|
1940 | {
|
---|
1941 | rc = RTCritSectDelete(&pAIO->CritSect);
|
---|
1942 | AssertRC(rc);
|
---|
1943 |
|
---|
1944 | rc = RTSemEventDestroy(pAIO->Event);
|
---|
1945 | AssertRC(rc);
|
---|
1946 |
|
---|
1947 | pAIO->fStarted = false;
|
---|
1948 | pAIO->fShutdown = false;
|
---|
1949 | pAIO->fEnabled = false;
|
---|
1950 | }
|
---|
1951 |
|
---|
1952 | LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
|
---|
1953 | return rc;
|
---|
1954 | }
|
---|
1955 |
|
---|
1956 | /**
|
---|
1957 | * Lets the stream's async I/O thread know that there is some data to process.
|
---|
1958 | *
|
---|
1959 | * @returns IPRT status code.
|
---|
1960 | * @param pStream HDA stream to notify async I/O thread for.
|
---|
1961 | */
|
---|
1962 | int hdaR3StreamAsyncIONotify(PHDASTREAM pStream)
|
---|
1963 | {
|
---|
1964 | return RTSemEventSignal(pStream->State.AIO.Event);
|
---|
1965 | }
|
---|
1966 |
|
---|
1967 | /**
|
---|
1968 | * Locks the async I/O thread of a specific HDA audio stream.
|
---|
1969 | *
|
---|
1970 | * @param pStream HDA stream to lock async I/O thread for.
|
---|
1971 | */
|
---|
1972 | void hdaR3StreamAsyncIOLock(PHDASTREAM pStream)
|
---|
1973 | {
|
---|
1974 | PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
|
---|
1975 |
|
---|
1976 | if (!ASMAtomicReadBool(&pAIO->fStarted))
|
---|
1977 | return;
|
---|
1978 |
|
---|
1979 | int rc2 = RTCritSectEnter(&pAIO->CritSect);
|
---|
1980 | AssertRC(rc2);
|
---|
1981 | }
|
---|
1982 |
|
---|
1983 | /**
|
---|
1984 | * Unlocks the async I/O thread of a specific HDA audio stream.
|
---|
1985 | *
|
---|
1986 | * @param pStream HDA stream to unlock async I/O thread for.
|
---|
1987 | */
|
---|
1988 | void hdaR3StreamAsyncIOUnlock(PHDASTREAM pStream)
|
---|
1989 | {
|
---|
1990 | PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
|
---|
1991 |
|
---|
1992 | if (!ASMAtomicReadBool(&pAIO->fStarted))
|
---|
1993 | return;
|
---|
1994 |
|
---|
1995 | int rc2 = RTCritSectLeave(&pAIO->CritSect);
|
---|
1996 | AssertRC(rc2);
|
---|
1997 | }
|
---|
1998 |
|
---|
1999 | /**
|
---|
2000 | * Enables (resumes) or disables (pauses) the async I/O thread.
|
---|
2001 | *
|
---|
2002 | * @param pStream HDA stream to enable/disable async I/O thread for.
|
---|
2003 | * @param fEnable Whether to enable or disable the I/O thread.
|
---|
2004 | *
|
---|
2005 | * @remarks Does not do locking.
|
---|
2006 | */
|
---|
2007 | void hdaR3StreamAsyncIOEnable(PHDASTREAM pStream, bool fEnable)
|
---|
2008 | {
|
---|
2009 | PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
|
---|
2010 | ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
|
---|
2011 | }
|
---|
2012 | # endif /* VBOX_WITH_AUDIO_HDA_ASYNC_IO */
|
---|
2013 |
|
---|
2014 | #endif /* IN_RING3 */
|
---|
2015 |
|
---|