1 | /* $Id: DevEFI.cpp 26208 2010-02-03 16:38:54Z vboxsync $ */
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2 | /** @file
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3 | * DevEFI - EFI <-> VirtualBox Integration Framework.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2009 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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19 | * additional information or have any questions.
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20 | */
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21 |
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22 | /*******************************************************************************
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23 | * Header Files *
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24 | *******************************************************************************/
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25 | #define LOG_GROUP LOG_GROUP_DEV_EFI
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26 |
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27 | #include <VBox/pdmdev.h>
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28 | #include <VBox/pgm.h>
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29 | #include <VBox/mm.h>
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30 | #include <VBox/log.h>
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31 | #include <VBox/err.h>
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32 | #include <VBox/param.h>
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33 | #include <VBox/dbgf.h>
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34 |
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35 | #include <iprt/assert.h>
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36 | #include <iprt/alloc.h>
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37 | #include <iprt/file.h>
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38 | #include <iprt/string.h>
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39 | #include <iprt/uuid.h>
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40 | #include <iprt/path.h>
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41 | #include <iprt/string.h>
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42 | #ifdef DEBUG
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43 | # include <iprt/stream.h>
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44 | # define DEVEFI_WITH_VBOXDBG_SCRIPT
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45 | #endif
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46 |
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47 | #include "Firmware2/VBoxPkg/Include/DevEFI.h"
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48 | #include "../Builtins.h"
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49 | #include "../Builtins2.h"
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50 | #include "../PC/DevFwCommon.h"
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51 |
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52 | /* EFI includes */
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53 | #include <ProcessorBind.h>
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54 | #include <Common/UefiBaseTypes.h>
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55 | #include <Common/PiFirmwareVolume.h>
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56 | #include <Common/PiFirmwareFile.h>
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57 | #include <IndustryStandard/PeImage.h>
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58 |
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59 | /*******************************************************************************
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60 | * Structures and Typedefs *
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61 | *******************************************************************************/
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62 | typedef struct DEVEFI
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63 | {
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64 | /** Pointer back to the device instance. */
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65 | PPDMDEVINS pDevIns;
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66 | /** EFI message buffer. */
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67 | char szMsg[VBOX_EFI_DEBUG_BUFFER];
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68 | /** EFI message buffer index. */
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69 | uint32_t iMsg;
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70 | /** EFI panic message buffer. */
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71 | char szPanicMsg[2048];
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72 | /** EFI panic message buffer index. */
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73 | uint32_t iPanicMsg;
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74 | /** The system EFI ROM data. */
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75 | uint8_t *pu8EfiRom;
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76 | /** The size of the system EFI ROM. */
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77 | uint64_t cbEfiRom;
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78 | /** The name of the EFI ROM file. */
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79 | char *pszEfiRomFile;
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80 | /** Thunk page pointer. */
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81 | uint8_t *pu8EfiThunk;
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82 | /** First entry point of the EFI firmware */
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83 | RTGCPHYS GCEntryPoint0;
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84 | /* Second Entry Point (PeiCore)*/
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85 | RTGCPHYS GCEntryPoint1;
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86 | /** EFI firmware physical load address */
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87 | RTGCPHYS GCLoadAddress;
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88 | /** Current info selector */
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89 | uint32_t iInfoSelector;
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90 | /** Current info position */
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91 | int32_t iInfoPosition;
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92 |
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93 | /** Number of virtual CPUs. (Config) */
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94 | uint32_t cCpus;
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95 | /** RAM below 4GB (in bytes). (Config) */
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96 | uint32_t cbBelow4GB;
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97 | /** RAM above 4GB (in bytes). (Config) */
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98 | uint64_t cbAbove4GB;
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99 |
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100 | uint64_t cbRam;
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101 |
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102 | uint64_t cbRamHole;
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103 |
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104 | /** The DMI tables. */
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105 | uint8_t au8DMIPage[0x1000];
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106 |
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107 | /** I/O-APIC enabled? */
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108 | uint8_t u8IOAPIC;
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109 |
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110 | /* Boot parameters passed to the firmware */
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111 | char szBootArgs[256];
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112 |
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113 | /* Host UUID (for DMI) */
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114 | RTUUID aUuid;
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115 |
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116 | /* Device properties string */
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117 | char* pszDeviceProps;
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118 |
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119 | /* Virtual machine front side bus frequency */
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120 | uint64_t u64FsbFrequency;
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121 | /* Virtual machine time stamp counter frequency */
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122 | uint64_t u64TscFrequency;
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123 | /* Virtual machine CPU frequency */
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124 | uint64_t u64CpuFrequency;
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125 | } DEVEFI;
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126 | typedef DEVEFI *PDEVEFI;
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127 |
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128 | /**
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129 | * Write to CMOS memory.
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130 | * This is used by the init complete code.
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131 | */
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132 | static void cmosWrite(PPDMDEVINS pDevIns, int off, uint32_t u32Val)
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133 | {
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134 | Assert(off < 128);
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135 | Assert(u32Val < 256);
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136 |
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137 | int rc = PDMDevHlpCMOSWrite(pDevIns, off, u32Val);
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138 | AssertRC(rc);
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139 | }
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140 |
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141 |
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142 | static uint32_t efiInfoSize(PDEVEFI pThis)
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143 | {
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144 | switch (pThis->iInfoSelector)
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145 | {
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146 | case EFI_INFO_INDEX_VOLUME_BASE:
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147 | case EFI_INFO_INDEX_VOLUME_SIZE:
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148 | case EFI_INFO_INDEX_TEMPMEM_BASE:
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149 | case EFI_INFO_INDEX_TEMPMEM_SIZE:
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150 | case EFI_INFO_INDEX_STACK_BASE:
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151 | case EFI_INFO_INDEX_STACK_SIZE:
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152 | return 4;
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153 | case EFI_INFO_INDEX_BOOT_ARGS:
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154 | return RTStrNLen(pThis->szBootArgs, sizeof pThis->szBootArgs) + 1;
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155 | case EFI_INFO_INDEX_DEVICE_PROPS:
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156 | return RTStrNLen(pThis->pszDeviceProps, RTSTR_MAX) + 1;
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157 | case EFI_INFO_INDEX_FSB_FREQUENCY:
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158 | case EFI_INFO_INDEX_CPU_FREQUENCY:
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159 | case EFI_INFO_INDEX_TSC_FREQUENCY:
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160 | return 8;
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161 | }
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162 | Assert(false);
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163 | return 0;
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164 | }
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165 |
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166 | static uint8_t efiInfoNextByte(PDEVEFI pThis)
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167 | {
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168 | union
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169 | {
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170 | uint32_t u32;
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171 | uint64_t u64;
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172 | } value;
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173 |
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174 | switch (pThis->iInfoSelector)
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175 | {
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176 | case EFI_INFO_INDEX_VOLUME_BASE:
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177 | value.u32 = pThis->GCLoadAddress;
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178 | break;
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179 | case EFI_INFO_INDEX_VOLUME_SIZE:
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180 | value.u32 = pThis->cbEfiRom;
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181 | break;
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182 | case EFI_INFO_INDEX_TEMPMEM_BASE:
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183 | value.u32 = VBOX_EFI_TOP_OF_STACK; /* just after stack */
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184 | break;
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185 | case EFI_INFO_INDEX_TEMPMEM_SIZE:
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186 | value.u32 = 512 * 1024; /* 512 K */
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187 | break;
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188 | case EFI_INFO_INDEX_STACK_BASE:
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189 | /* Keep in sync with value in EfiThunk.asm */
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190 | value.u32 = VBOX_EFI_TOP_OF_STACK - 128*1024; /* 2M - 128 K */
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191 | break;
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192 | case EFI_INFO_INDEX_STACK_SIZE:
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193 | value.u32 = 128*1024; /* 128 K */
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194 | break;
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195 | case EFI_INFO_INDEX_FSB_FREQUENCY:
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196 | value.u64 = pThis->u64FsbFrequency;
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197 | break;
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198 | case EFI_INFO_INDEX_TSC_FREQUENCY:
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199 | value.u64 = pThis->u64TscFrequency;
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200 | break;
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201 | case EFI_INFO_INDEX_CPU_FREQUENCY:
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202 | value.u64 = pThis->u64CpuFrequency;
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203 | break;
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204 | case EFI_INFO_INDEX_BOOT_ARGS:
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205 | return pThis->szBootArgs[pThis->iInfoPosition];
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206 | case EFI_INFO_INDEX_DEVICE_PROPS:
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207 | return pThis->pszDeviceProps[pThis->iInfoPosition];
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208 | default:
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209 | Assert(false);
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210 | value.u64 = 0;
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211 | break;
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212 | }
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213 |
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214 | return *((uint8_t*)&value+pThis->iInfoPosition);
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215 | }
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216 |
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217 | /**
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218 | * Port I/O Handler for IN operations.
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219 | *
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220 | * @returns VBox status code.
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221 | *
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222 | * @param pDevIns The device instance.
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223 | * @param pvUser User argument - ignored.
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224 | * @param Port Port number used for the IN operation.
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225 | * @param pu32 Where to store the result.
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226 | * @param cb Number of bytes read.
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227 | */
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228 | static DECLCALLBACK(int) efiIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
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229 | {
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230 | PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
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231 | Log4(("EFI in: %x %x\n", Port, cb));
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232 |
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233 | switch (Port)
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234 | {
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235 | case EFI_INFO_PORT:
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236 | if (pThis->iInfoPosition == -1 && cb == 4)
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237 | {
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238 | *pu32 = efiInfoSize(pThis);
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239 | pThis->iInfoPosition = 0;
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240 | }
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241 | else
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242 | {
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243 | /* So far */
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244 | if (cb != 1)
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245 | return VERR_IOM_IOPORT_UNUSED;
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246 | *pu32 = efiInfoNextByte(pThis);
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247 | pThis->iInfoPosition++;
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248 | }
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249 | return VINF_SUCCESS;
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250 |
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251 | case EFI_PANIC_PORT:
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252 | #ifdef IN_RING3
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253 | LogRel(("Panic port read!\n"));
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254 | /* Insert special code here on panic reads */
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255 | return VINF_SUCCESS;
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256 | #else
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257 | /* Reschedule to R3 */
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258 | return VINF_IOM_HC_IOPORT_READ;
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259 | #endif
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260 | }
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261 |
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262 | return VERR_IOM_IOPORT_UNUSED;
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263 | }
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264 |
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265 |
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266 | /**
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267 | * Port I/O Handler for OUT operations.
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268 | *
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269 | * @returns VBox status code.
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270 | *
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271 | * @param pDevIns The device instance.
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272 | * @param pvUser User argument - ignored.
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273 | * @param Port Port number used for the IN operation.
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274 | * @param u32 The value to output.
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275 | * @param cb The value size in bytes.
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276 | */
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277 | static DECLCALLBACK(int) efiIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
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278 | {
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279 | PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
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280 | Log4(("efi: out %x %x %d\n", Port, u32, cb));
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281 |
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282 | switch (Port)
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283 | {
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284 | case EFI_INFO_PORT:
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285 | pThis->iInfoSelector = u32;
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286 | pThis->iInfoPosition = -1;
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287 | break;
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288 | case EFI_DEBUG_PORT:
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289 | {
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290 | /* The raw version. */
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291 | switch (u32)
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292 | {
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293 | case '\r': Log3(("efi: <return>\n")); break;
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294 | case '\n': Log3(("efi: <newline>\n")); break;
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295 | case '\t': Log3(("efi: <tab>\n")); break;
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296 | default: Log3(("efi: %c (%02x)\n", u32, u32)); break;
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297 | }
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298 | /* The readable, buffered version. */
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299 | if (u32 == '\n' || u32 == '\r')
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300 | {
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301 | pThis->szMsg[pThis->iMsg] = '\0';
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302 | if (pThis->iMsg)
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303 | {
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304 | Log(("efi: %s\n", pThis->szMsg));
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305 | #ifdef DEVEFI_WITH_VBOXDBG_SCRIPT
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306 | const char *pszVBoxDbg = strstr(pThis->szMsg, "VBoxDbg> ");
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307 | if (pszVBoxDbg)
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308 | {
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309 | pszVBoxDbg += sizeof("VBoxDbg> ") - 1;
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310 |
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311 | PRTSTREAM pStrm;
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312 | int rc = RTStrmOpen("./DevEFI.VBoxDbg", "a", &pStrm);
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313 | if (RT_SUCCESS(rc))
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314 | {
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315 | RTStrmPutStr(pStrm, pszVBoxDbg);
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316 | RTStrmPutCh(pStrm, '\n');
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317 | RTStrmClose(pStrm);
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318 | }
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319 | }
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320 | #endif
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321 | }
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322 | pThis->iMsg = 0;
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323 | }
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324 | else
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325 | {
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326 | if (pThis->iMsg >= sizeof(pThis->szMsg)-1)
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327 | {
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328 | pThis->szMsg[pThis->iMsg] = '\0';
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329 | Log(("efi: %s\n", pThis->szMsg));
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330 | pThis->iMsg = 0;
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331 | }
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332 | pThis->szMsg[pThis->iMsg] = (char )u32;
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333 | pThis->szMsg[++pThis->iMsg] = '\0';
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334 | }
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335 | break;
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336 | }
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337 |
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338 | case EFI_PANIC_PORT:
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339 | {
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340 | switch (u32)
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341 | {
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342 | case EFI_PANIC_CMD_BAD_ORG:
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343 | LogRel(("EFI Panic: You have to fix ORG offset in EfiThunk.asm! Must be 0x%x\n",
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344 | g_cbEfiThunkBinary));
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345 | RTAssertMsg2Weak("Fix ORG offset in EfiThunk.asm: must be 0x%x\n",
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346 | g_cbEfiThunkBinary);
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347 | break;
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348 |
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349 | case EFI_PANIC_CMD_THUNK_TRAP:
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350 | LogRel(("EFI Panic: Unexpected trap!!\n"));
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351 | #ifdef VBOX_STRICT
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352 | return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "EFI Panic: Unexpected trap during early bootstrap!\n");
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353 | #else
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354 | AssertReleaseMsgFailed(("Unexpected trap during early EFI bootstrap!!\n"));
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355 | #endif
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356 | break;
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357 |
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358 | case EFI_PANIC_CMD_START_MSG:
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359 | pThis->iPanicMsg = 0;
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360 | pThis->szPanicMsg[0] = '\0';
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361 | break;
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362 |
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363 | case EFI_PANIC_CMD_END_MSG:
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364 | LogRel(("EFI Panic: %s\n", pThis->szPanicMsg));
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365 | #ifdef VBOX_STRICT
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366 | return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "EFI Panic: %s\n", pThis->szPanicMsg);
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367 | #else
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368 | return VERR_INTERNAL_ERROR;
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369 | #endif
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370 |
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371 | default:
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372 | if ( u32 >= EFI_PANIC_CMD_MSG_FIRST
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373 | && u32 <= EFI_PANIC_CMD_MSG_LAST)
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374 | {
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375 | /* Add the message char to the buffer. */
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376 | uint32_t i = pThis->iPanicMsg;
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377 | if (i + 1 < sizeof(pThis->szPanicMsg))
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378 | {
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379 | char ch = EFI_PANIC_CMD_MSG_GET_CHAR(u32);
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380 | if ( ch == '\n'
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381 | && i > 0
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382 | && pThis->szPanicMsg[i - 1] == '\r')
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383 | i--;
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384 | pThis->szPanicMsg[i] = ch;
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385 | pThis->szPanicMsg[i + 1] = '\0';
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386 | pThis->iPanicMsg = i + 1;
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387 | }
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388 | }
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389 | else
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390 | Log(("EFI: Unknown panic command: %#x (cb=%d)\n", u32, cb));
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391 | break;
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392 | }
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393 | break;
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394 | }
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395 |
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396 | default:
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397 | Log(("EFI: Write to reserved port %RTiop: %#x (cb=%d)\n", Port, u32, cb));
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398 | break;
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399 | }
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400 | return VINF_SUCCESS;
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401 | }
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402 |
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403 | /**
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404 | * Init complete notification.
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405 | *
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406 | * @returns VBOX status code.
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407 | * @param pDevIns The device instance.
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408 | */
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409 | static DECLCALLBACK(int) efiInitComplete(PPDMDEVINS pDevIns)
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410 | {
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411 | /* PC Bios */
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412 | PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
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413 | uint32_t u32;
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414 |
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415 | /*
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416 | * Memory sizes.
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417 | */
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418 | uint64_t const offRamHole = _4G - pThis->cbRamHole;
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419 | if (pThis->cbRam > 16 * _1M)
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420 | u32 = (uint32_t)( (RT_MIN(RT_MIN(pThis->cbRam, offRamHole), UINT32_C(0xffe00000)) - 16U * _1M) / _64K );
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421 | else
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422 | u32 = 0;
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423 | cmosWrite(pDevIns, 0x34, u32 & 0xff);
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424 | cmosWrite(pDevIns, 0x35, u32 >> 8);
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425 |
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426 | /*
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427 | * Number of CPUs.
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428 | */
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429 | cmosWrite(pDevIns, 0x60, pThis->cCpus & 0xff);
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430 |
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431 | return VINF_SUCCESS;
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432 | }
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433 |
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434 | /**
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435 | * Reset notification.
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436 | *
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437 | * @returns VBox status.
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438 | * @param pDevIns The device instance data.
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439 | */
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440 | static DECLCALLBACK(void) efiReset(PPDMDEVINS pDevIns)
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441 | {
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442 | PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
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443 | int rc;
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444 |
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445 | LogFlow(("efiReset\n"));
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---|
446 |
|
---|
447 | pThis->iInfoSelector = 0;
|
---|
448 | pThis->iInfoPosition = -1;
|
---|
449 |
|
---|
450 | pThis->iMsg = 0;
|
---|
451 | pThis->szMsg[0] = '\0';
|
---|
452 | pThis->iPanicMsg = 0;
|
---|
453 | pThis->szPanicMsg[0] = '\0';
|
---|
454 |
|
---|
455 | /* Plant DMI and MPS tables */
|
---|
456 | rc = FwCommonPlantDMITable(pDevIns,
|
---|
457 | pThis->au8DMIPage,
|
---|
458 | VBOX_DMI_TABLE_SIZE,
|
---|
459 | &pThis->aUuid,
|
---|
460 | pDevIns->pCfg,
|
---|
461 | true /* fPutSmbiosHeaders */);
|
---|
462 | Assert(RT_SUCCESS(rc));
|
---|
463 |
|
---|
464 | FwCommonPlantMpsTable(pDevIns,
|
---|
465 | pThis->au8DMIPage + VBOX_DMI_TABLE_SIZE,
|
---|
466 | pThis->cCpus);
|
---|
467 |
|
---|
468 | /*
|
---|
469 | * Re-shadow the Firmware Volume and make it RAM/RAM.
|
---|
470 | */
|
---|
471 | uint32_t cPages = RT_ALIGN_64(pThis->cbEfiRom, PAGE_SIZE) >> PAGE_SHIFT;
|
---|
472 | RTGCPHYS GCPhys = pThis->GCLoadAddress;
|
---|
473 | while (cPages > 0)
|
---|
474 | {
|
---|
475 | uint8_t abPage[PAGE_SIZE];
|
---|
476 |
|
---|
477 | /* Read the (original) ROM page and write it back to the RAM page. */
|
---|
478 | rc = PDMDevHlpROMProtectShadow(pDevIns, GCPhys, PAGE_SIZE, PGMROMPROT_READ_ROM_WRITE_RAM);
|
---|
479 | AssertLogRelRC(rc);
|
---|
480 |
|
---|
481 | rc = PDMDevHlpPhysRead(pDevIns, GCPhys, abPage, PAGE_SIZE);
|
---|
482 | AssertLogRelRC(rc);
|
---|
483 | if (RT_FAILURE(rc))
|
---|
484 | memset(abPage, 0xcc, sizeof(abPage));
|
---|
485 |
|
---|
486 | rc = PDMDevHlpPhysWrite(pDevIns, GCPhys, abPage, PAGE_SIZE);
|
---|
487 | AssertLogRelRC(rc);
|
---|
488 |
|
---|
489 | /* Switch to the RAM/RAM mode. */
|
---|
490 | rc = PDMDevHlpROMProtectShadow(pDevIns, GCPhys, PAGE_SIZE, PGMROMPROT_READ_RAM_WRITE_RAM);
|
---|
491 | AssertLogRelRC(rc);
|
---|
492 |
|
---|
493 | /* Advance */
|
---|
494 | GCPhys += PAGE_SIZE;
|
---|
495 | cPages--;
|
---|
496 | }
|
---|
497 | }
|
---|
498 |
|
---|
499 | /**
|
---|
500 | * Destruct a device instance.
|
---|
501 | *
|
---|
502 | * Most VM resources are freed by the VM. This callback is provided so that any non-VM
|
---|
503 | * resources can be freed correctly.
|
---|
504 | *
|
---|
505 | * @param pDevIns The device instance data.
|
---|
506 | */
|
---|
507 | static DECLCALLBACK(int) efiDestruct(PPDMDEVINS pDevIns)
|
---|
508 | {
|
---|
509 | PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
|
---|
510 |
|
---|
511 | /*
|
---|
512 | * Free MM heap pointers.
|
---|
513 | */
|
---|
514 | if (pThis->pu8EfiRom)
|
---|
515 | {
|
---|
516 | RTFileReadAllFree(pThis->pu8EfiRom, (size_t)pThis->cbEfiRom);
|
---|
517 | pThis->pu8EfiRom = NULL;
|
---|
518 | }
|
---|
519 |
|
---|
520 | if (pThis->pszEfiRomFile)
|
---|
521 | {
|
---|
522 | MMR3HeapFree(pThis->pszEfiRomFile);
|
---|
523 | pThis->pszEfiRomFile = NULL;
|
---|
524 | }
|
---|
525 |
|
---|
526 | if (pThis->pu8EfiThunk)
|
---|
527 | {
|
---|
528 | MMR3HeapFree(pThis->pu8EfiThunk);
|
---|
529 | pThis->pu8EfiThunk = NULL;
|
---|
530 | }
|
---|
531 |
|
---|
532 | if (pThis->pszDeviceProps)
|
---|
533 | {
|
---|
534 | MMR3HeapFree(pThis->pszDeviceProps);
|
---|
535 | pThis->pszDeviceProps = NULL;
|
---|
536 | }
|
---|
537 |
|
---|
538 | return VINF_SUCCESS;
|
---|
539 | }
|
---|
540 |
|
---|
541 | /**
|
---|
542 | * Helper that searches for a FFS file of a given type.
|
---|
543 | *
|
---|
544 | * @returns Pointer to the FFS file header if found, NULL if not.
|
---|
545 | *
|
---|
546 | * @param pFfsFile Pointer to the FFS file header to start searching at.
|
---|
547 | * @param pbEnd The end of the firmware volume.
|
---|
548 | * @param FileType The file type to look for.
|
---|
549 | * @param pcbFfsFile Where to store the FFS file size (includes header).
|
---|
550 | */
|
---|
551 | DECLINLINE(EFI_FFS_FILE_HEADER const *)
|
---|
552 | efiFwVolFindFileByType(EFI_FFS_FILE_HEADER const *pFfsFile, uint8_t const *pbEnd, EFI_FV_FILETYPE FileType, uint32_t *pcbFile)
|
---|
553 | {
|
---|
554 | #define FFS_SIZE(hdr) RT_MAKE_U32_FROM_U8((hdr)->Size[0], (hdr)->Size[1], (hdr)->Size[2], 0)
|
---|
555 | while ((uintptr_t)pFfsFile < (uintptr_t)pbEnd)
|
---|
556 | {
|
---|
557 | if (pFfsFile->Type == FileType)
|
---|
558 | {
|
---|
559 | *pcbFile = FFS_SIZE(pFfsFile);
|
---|
560 | return pFfsFile;
|
---|
561 | }
|
---|
562 | pFfsFile = (EFI_FFS_FILE_HEADER *)((uintptr_t)pFfsFile + RT_ALIGN(FFS_SIZE(pFfsFile), 8));
|
---|
563 | }
|
---|
564 | return NULL;
|
---|
565 | }
|
---|
566 |
|
---|
567 | static int efiFindEntryPoint(EFI_FFS_FILE_HEADER const *pFfsFile, uint32_t cbFfsFile, RTGCPHYS *pImageBase, uint8_t **ppbImage)
|
---|
568 | {
|
---|
569 | /*
|
---|
570 | * Sections headers are lays at the begining of block it describes,
|
---|
571 | * the first section header is located immidiately after FFS header.
|
---|
572 | */
|
---|
573 | EFI_FILE_SECTION_POINTER uSecHdrPtr;
|
---|
574 | uint8_t const * const pbFfsFileEnd = (uint8_t *)pFfsFile + cbFfsFile;
|
---|
575 | uint8_t const *pbImage = NULL;
|
---|
576 | uint8_t const *pbSecHdr = (uint8_t const *)&pFfsFile[1]; /* FFS header has fixed size */
|
---|
577 | for (; (uintptr_t)pbSecHdr < (uintptr_t)pbFfsFileEnd;
|
---|
578 | pbSecHdr += SECTION_SIZE(uSecHdrPtr.CommonHeader))
|
---|
579 | {
|
---|
580 | uSecHdrPtr.CommonHeader = (EFI_COMMON_SECTION_HEADER *)pbSecHdr;
|
---|
581 | if ( uSecHdrPtr.CommonHeader->Type == EFI_SECTION_PE32
|
---|
582 | || uSecHdrPtr.CommonHeader->Type == EFI_SECTION_TE)
|
---|
583 | {
|
---|
584 | /*Here should be other code containing sections*/
|
---|
585 | pbImage = (uint8_t const *)&uSecHdrPtr.Pe32Section[1]; /* the PE/PE+/TE headers begins just after the Section Header */
|
---|
586 | break;
|
---|
587 | }
|
---|
588 | Log2(("EFI: Section of type:%d has been detected\n", uSecHdrPtr.CommonHeader->Type));
|
---|
589 | }
|
---|
590 | AssertLogRelMsgReturn(pbImage, ("Failed to find PE32 or TE section for the SECURITY_CORE FFS\n"), VERR_INVALID_PARAMETER);
|
---|
591 |
|
---|
592 | /*
|
---|
593 | * Parse the image extracting the ImageBase and the EntryPoint.
|
---|
594 | */
|
---|
595 | int rc = VINF_SUCCESS;
|
---|
596 | union EfiHdrUnion
|
---|
597 | {
|
---|
598 | EFI_IMAGE_DOS_HEADER Dos;
|
---|
599 | EFI_IMAGE_NT_HEADERS32 Nt32;
|
---|
600 | EFI_IMAGE_NT_HEADERS64 Nt64;
|
---|
601 | EFI_TE_IMAGE_HEADER Te;
|
---|
602 | } const *pHdr = (EfiHdrUnion const *)pbImage;
|
---|
603 |
|
---|
604 | /* Skip MZ if found. */
|
---|
605 | if (pHdr->Dos.e_magic == RT_MAKE_U16('M', 'Z'))
|
---|
606 | {
|
---|
607 | uint8_t const *pbNewHdr = (uint8_t const *)pHdr + pHdr->Dos.e_lfanew;
|
---|
608 | AssertLogRelMsgReturn( (uintptr_t)pbNewHdr < (uintptr_t)pbFfsFileEnd
|
---|
609 | && (uintptr_t)pbNewHdr >= (uintptr_t)&pHdr->Dos.e_lfanew + sizeof(pHdr->Dos.e_lfanew),
|
---|
610 | ("%x\n", pHdr->Dos.e_lfanew),
|
---|
611 | VERR_BAD_EXE_FORMAT);
|
---|
612 | pHdr = (EfiHdrUnion const *)pbNewHdr;
|
---|
613 | }
|
---|
614 |
|
---|
615 | RTGCPHYS ImageBase;
|
---|
616 | RTGCPHYS EpRVA;
|
---|
617 | if (pHdr->Nt32.Signature == RT_MAKE_U32_FROM_U8('P', 'E', 0, 0))
|
---|
618 | {
|
---|
619 | AssertLogRelMsgReturn( ( pHdr->Nt32.FileHeader.Machine == EFI_IMAGE_FILE_MACHINE_I386
|
---|
620 | && pHdr->Nt32.FileHeader.SizeOfOptionalHeader == sizeof(pHdr->Nt32.OptionalHeader))
|
---|
621 | || ( pHdr->Nt32.FileHeader.Machine == EFI_IMAGE_MACHINE_X64
|
---|
622 | && pHdr->Nt32.FileHeader.SizeOfOptionalHeader == sizeof(pHdr->Nt64.OptionalHeader)),
|
---|
623 | ("%x / %x\n", pHdr->Nt32.FileHeader.Machine, pHdr->Nt32.FileHeader.SizeOfOptionalHeader),
|
---|
624 | VERR_LDR_ARCH_MISMATCH);
|
---|
625 | if (pHdr->Nt32.FileHeader.Machine == EFI_IMAGE_FILE_MACHINE_I386)
|
---|
626 | {
|
---|
627 | Log2(("EFI: PE32/i386\n"));
|
---|
628 | AssertLogRelMsgReturn(pHdr->Nt32.OptionalHeader.SizeOfImage < cbFfsFile,
|
---|
629 | ("%#x / %#x\n", pHdr->Nt32.OptionalHeader.SizeOfImage, cbFfsFile),
|
---|
630 | VERR_BAD_EXE_FORMAT);
|
---|
631 | ImageBase = pHdr->Nt32.OptionalHeader.ImageBase;
|
---|
632 | EpRVA = pHdr->Nt32.OptionalHeader.AddressOfEntryPoint;
|
---|
633 | AssertLogRelMsgReturn(EpRVA < pHdr->Nt32.OptionalHeader.SizeOfImage,
|
---|
634 | ("%#RGp / %#x\n", EpRVA, pHdr->Nt32.OptionalHeader.SizeOfImage),
|
---|
635 | VERR_BAD_EXE_FORMAT);
|
---|
636 | }
|
---|
637 | else
|
---|
638 | {
|
---|
639 | Log2(("EFI: PE+/AMD64\n"));
|
---|
640 | AssertLogRelMsgReturn(pHdr->Nt64.OptionalHeader.SizeOfImage < cbFfsFile,
|
---|
641 | ("%#x / %#x\n", pHdr->Nt64.OptionalHeader.SizeOfImage, cbFfsFile),
|
---|
642 | VERR_BAD_EXE_FORMAT);
|
---|
643 | ImageBase = pHdr->Nt64.OptionalHeader.ImageBase;
|
---|
644 | EpRVA = pHdr->Nt64.OptionalHeader.AddressOfEntryPoint;
|
---|
645 | AssertLogRelMsgReturn(EpRVA < pHdr->Nt64.OptionalHeader.SizeOfImage,
|
---|
646 | ("%#RGp / %#x\n", EpRVA, pHdr->Nt64.OptionalHeader.SizeOfImage),
|
---|
647 | VERR_BAD_EXE_FORMAT);
|
---|
648 | }
|
---|
649 | }
|
---|
650 | else if (pHdr->Te.Signature == RT_MAKE_U16('V', 'Z'))
|
---|
651 | {
|
---|
652 | /* TE header */
|
---|
653 | Log2(("EFI: TE header\n"));
|
---|
654 | AssertLogRelMsgReturn( pHdr->Te.Machine == EFI_IMAGE_FILE_MACHINE_I386
|
---|
655 | || pHdr->Te.Machine == EFI_IMAGE_MACHINE_X64,
|
---|
656 | ("%x\n", pHdr->Te.Machine),
|
---|
657 | VERR_LDR_ARCH_MISMATCH);
|
---|
658 | ImageBase = pHdr->Te.ImageBase;
|
---|
659 | EpRVA = pHdr->Te.AddressOfEntryPoint;
|
---|
660 | AssertLogRelMsgReturn(EpRVA < cbFfsFile,
|
---|
661 | ("%#RGp / %#x\n", EpRVA, cbFfsFile),
|
---|
662 | VERR_BAD_EXE_FORMAT);
|
---|
663 | }
|
---|
664 | else
|
---|
665 | AssertLogRelMsgFailedReturn(("%#x\n", pHdr->Nt32.Signature), VERR_INVALID_EXE_SIGNATURE);
|
---|
666 |
|
---|
667 | Log2(("EFI: EpRVA=%RGp ImageBase=%RGp EntryPoint=%RGp\n", EpRVA, ImageBase, EpRVA + ImageBase));
|
---|
668 | if (pImageBase != NULL)
|
---|
669 | *pImageBase = ImageBase;
|
---|
670 | if (ppbImage != NULL)
|
---|
671 | *ppbImage = (uint8_t *)pbImage;
|
---|
672 | return ImageBase + EpRVA;
|
---|
673 | }
|
---|
674 |
|
---|
675 | /**
|
---|
676 | * Parse EFI ROM headers and find entry points.
|
---|
677 | *
|
---|
678 | * @returns VBox status.
|
---|
679 | * @param pThis The device instance data.
|
---|
680 | */
|
---|
681 | static int efiParseFirmware(PDEVEFI pThis)
|
---|
682 | {
|
---|
683 | EFI_FIRMWARE_VOLUME_HEADER const *pFwVolHdr = (EFI_FIRMWARE_VOLUME_HEADER const *)pThis->pu8EfiRom;
|
---|
684 |
|
---|
685 | /*
|
---|
686 | * Validate firmware volume header.
|
---|
687 | */
|
---|
688 | AssertLogRelMsgReturn(pFwVolHdr->Signature == RT_MAKE_U32_FROM_U8('_', 'F', 'V', 'H'),
|
---|
689 | ("%#x, expected %#x\n", pFwVolHdr->Signature, RT_MAKE_U32_FROM_U8('_', 'F', 'V', 'H')),
|
---|
690 | VERR_INVALID_MAGIC);
|
---|
691 | AssertLogRelMsgReturn(pFwVolHdr->Revision == EFI_FVH_REVISION,
|
---|
692 | ("%#x, expected %#x\n", pFwVolHdr->Signature, EFI_FVH_REVISION),
|
---|
693 | VERR_VERSION_MISMATCH);
|
---|
694 | /** @todo check checksum, see PE spec vol. 3 */
|
---|
695 | AssertLogRelMsgReturn(pFwVolHdr->FvLength <= pThis->cbEfiRom,
|
---|
696 | ("%#llx, expected %#llx\n", pFwVolHdr->FvLength, pThis->cbEfiRom),
|
---|
697 | VERR_INVALID_PARAMETER);
|
---|
698 | AssertLogRelMsgReturn( pFwVolHdr->BlockMap[0].Length > 0
|
---|
699 | && pFwVolHdr->BlockMap[0].NumBlocks > 0,
|
---|
700 | ("%#x, %x\n", pFwVolHdr->BlockMap[0].Length, pFwVolHdr->BlockMap[0].NumBlocks),
|
---|
701 | VERR_INVALID_PARAMETER);
|
---|
702 |
|
---|
703 | AssertLogRelMsgReturn(!(pThis->cbEfiRom & PAGE_OFFSET_MASK), ("%RX64\n", pThis->cbEfiRom), VERR_INVALID_PARAMETER);
|
---|
704 |
|
---|
705 | uint8_t const * const pbFwVolEnd = pThis->pu8EfiRom + pFwVolHdr->FvLength;
|
---|
706 |
|
---|
707 | /*
|
---|
708 | * Ffs files are stored one by one, so to find SECURITY_CORE we've to
|
---|
709 | * search thru every one on the way.
|
---|
710 | */
|
---|
711 | uint32_t cbFfsFile = 0; /* shut up gcc */
|
---|
712 | EFI_FFS_FILE_HEADER const *pFfsFile = (EFI_FFS_FILE_HEADER const *)(pThis->pu8EfiRom + pFwVolHdr->HeaderLength);
|
---|
713 | pFfsFile = efiFwVolFindFileByType(pFfsFile, pbFwVolEnd, EFI_FV_FILETYPE_SECURITY_CORE, &cbFfsFile);
|
---|
714 | AssertLogRelMsgReturn(pFfsFile, ("No SECURITY_CORE found in the firmware volume\n"), VERR_FILE_NOT_FOUND);
|
---|
715 |
|
---|
716 | RTGCPHYS ImageBase;
|
---|
717 | uint8_t *pbImage;
|
---|
718 | pThis->GCEntryPoint0 = efiFindEntryPoint(pFfsFile, cbFfsFile, &ImageBase, &pbImage);
|
---|
719 |
|
---|
720 | /*
|
---|
721 | * Calc the firmware load address from the image base and validate it.
|
---|
722 | */
|
---|
723 | pThis->GCLoadAddress = ImageBase - (pbImage - pThis->pu8EfiRom);
|
---|
724 | AssertLogRelMsgReturn(~(pThis->GCLoadAddress & PAGE_OFFSET_MASK),
|
---|
725 | ("%RGp\n", pThis->GCLoadAddress),
|
---|
726 | VERR_INVALID_PARAMETER);
|
---|
727 | AssertLogRelMsgReturn(pThis->GCLoadAddress > UINT32_C(0xf0000000),
|
---|
728 | ("%RGp\n", pThis->GCLoadAddress),
|
---|
729 | VERR_OUT_OF_RANGE);
|
---|
730 | AssertLogRelMsgReturn( pThis->GCLoadAddress + (pThis->cbEfiRom - 1) > UINT32_C(0xf0000000)
|
---|
731 | && pThis->GCLoadAddress + (pThis->cbEfiRom - 1) < UINT32_C(0xffffe000),
|
---|
732 | ("%RGp + %RX64\n", pThis->GCLoadAddress, pThis->cbEfiRom),
|
---|
733 | VERR_OUT_OF_RANGE);
|
---|
734 |
|
---|
735 | LogRel(("EFI: Firmware volume loading at %RGp, SEC CORE at %RGp with EP at %RGp\n",
|
---|
736 | pThis->GCLoadAddress, ImageBase, pThis->GCEntryPoint0));
|
---|
737 |
|
---|
738 | pFfsFile = efiFwVolFindFileByType(pFfsFile, pbFwVolEnd, EFI_FV_FILETYPE_PEI_CORE, &cbFfsFile);
|
---|
739 | pThis->GCEntryPoint1 = efiFindEntryPoint(pFfsFile, cbFfsFile, NULL, NULL);
|
---|
740 | LogRel(("EFI: Firmware volume loading at %RGp, PEI CORE at with EP at %RGp\n",
|
---|
741 | pThis->GCLoadAddress, pThis->GCEntryPoint1));
|
---|
742 | return VINF_SUCCESS;
|
---|
743 | }
|
---|
744 |
|
---|
745 | /**
|
---|
746 | * Load EFI ROM file into the memory.
|
---|
747 | *
|
---|
748 | * @returns VBox status.
|
---|
749 | * @param pThis The device instance data.
|
---|
750 | * @param pCfg Configuration node handle for the device.
|
---|
751 | */
|
---|
752 | static int efiLoadRom(PDEVEFI pThis, PCFGMNODE pCfg)
|
---|
753 | {
|
---|
754 | /*
|
---|
755 | * Read the entire firmware volume into memory.
|
---|
756 | */
|
---|
757 | void *pvFile;
|
---|
758 | size_t cbFile;
|
---|
759 | int rc = RTFileReadAllEx(pThis->pszEfiRomFile,
|
---|
760 | 0 /*off*/,
|
---|
761 | RTFOFF_MAX /*cbMax*/,
|
---|
762 | RTFILE_RDALL_O_DENY_WRITE,
|
---|
763 | &pvFile,
|
---|
764 | &cbFile);
|
---|
765 | if (RT_FAILURE(rc))
|
---|
766 | return PDMDevHlpVMSetError(pThis->pDevIns, rc, RT_SRC_POS,
|
---|
767 | N_("Loading the EFI firmware volume '%s' failed with rc=%Rrc"),
|
---|
768 | pThis->pszEfiRomFile, rc);
|
---|
769 | pThis->pu8EfiRom = (uint8_t *)pvFile;
|
---|
770 | pThis->cbEfiRom = cbFile;
|
---|
771 |
|
---|
772 | /*
|
---|
773 | * Validate firmware volume and figure out the load address as well as the SEC entry point.
|
---|
774 | */
|
---|
775 | rc = efiParseFirmware(pThis);
|
---|
776 | if (RT_FAILURE(rc))
|
---|
777 | return PDMDevHlpVMSetError(pThis->pDevIns, rc, RT_SRC_POS,
|
---|
778 | N_("Parsing the EFI firmware volume '%s' failed with rc=%Rrc"),
|
---|
779 | pThis->pszEfiRomFile, rc);
|
---|
780 |
|
---|
781 | /*
|
---|
782 | * Map the firmware volume into memory as shadowed ROM.
|
---|
783 | */
|
---|
784 | /** @todo fix PGMR3PhysRomRegister so it doesn't mess up in SUPLib when mapping a big ROM image. */
|
---|
785 | RTGCPHYS cbQuart = RT_ALIGN_64(pThis->cbEfiRom / 4, PAGE_SIZE);
|
---|
786 | rc = PDMDevHlpROMRegister(pThis->pDevIns,
|
---|
787 | pThis->GCLoadAddress,
|
---|
788 | cbQuart,
|
---|
789 | pThis->pu8EfiRom,
|
---|
790 | PGMPHYS_ROM_FLAGS_SHADOWED | PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
|
---|
791 | "EFI Firmware Volume");
|
---|
792 | if (RT_FAILURE(rc))
|
---|
793 | return rc;
|
---|
794 | rc = PDMDevHlpROMRegister(pThis->pDevIns,
|
---|
795 | pThis->GCLoadAddress + cbQuart,
|
---|
796 | cbQuart,
|
---|
797 | pThis->pu8EfiRom + cbQuart,
|
---|
798 | PGMPHYS_ROM_FLAGS_SHADOWED | PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
|
---|
799 | "EFI Firmware Volume (Part 2)");
|
---|
800 | if (RT_FAILURE(rc))
|
---|
801 | return rc;
|
---|
802 | rc = PDMDevHlpROMRegister(pThis->pDevIns,
|
---|
803 | pThis->GCLoadAddress + cbQuart * 2,
|
---|
804 | cbQuart,
|
---|
805 | pThis->pu8EfiRom + cbQuart * 2,
|
---|
806 | PGMPHYS_ROM_FLAGS_SHADOWED | PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
|
---|
807 | "EFI Firmware Volume (Part 3)");
|
---|
808 | if (RT_FAILURE(rc))
|
---|
809 | return rc;
|
---|
810 | rc = PDMDevHlpROMRegister(pThis->pDevIns,
|
---|
811 | pThis->GCLoadAddress + cbQuart * 3,
|
---|
812 | pThis->cbEfiRom - cbQuart * 3,
|
---|
813 | pThis->pu8EfiRom + cbQuart * 3,
|
---|
814 | PGMPHYS_ROM_FLAGS_SHADOWED | PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
|
---|
815 | "EFI Firmware Volume (Part 4)");
|
---|
816 | if (RT_FAILURE(rc))
|
---|
817 | return rc;
|
---|
818 | return VINF_SUCCESS;
|
---|
819 | }
|
---|
820 |
|
---|
821 | /**
|
---|
822 | * Patches and loads the EfiThunk ROM image.
|
---|
823 | *
|
---|
824 | * The thunk image is where the CPU starts and will switch it into
|
---|
825 | * 32-bit protected or long mode and invoke the SEC CORE image in the
|
---|
826 | * firmware volume. It also contains some static VM configuration data
|
---|
827 | * at the very beginning of the page, see DEVEFIINFO.
|
---|
828 | *
|
---|
829 | * @returns VBox status code.
|
---|
830 | * @param pThis The device instance data.
|
---|
831 | * @param pCfg Configuration node handle for the device.
|
---|
832 | */
|
---|
833 | static int efiLoadThunk(PDEVEFI pThis, PCFGMNODE pCfg)
|
---|
834 | {
|
---|
835 | uint8_t f64BitEntry = 0;
|
---|
836 | int rc;
|
---|
837 |
|
---|
838 | rc = CFGMR3QueryU8Def(pCfg, "64BitEntry", &f64BitEntry, 0);
|
---|
839 | if (RT_FAILURE (rc))
|
---|
840 | return PDMDEV_SET_ERROR(pThis->pDevIns, rc,
|
---|
841 | N_("Configuration error: Failed to read \"64BitEntry\""));
|
---|
842 |
|
---|
843 | /*
|
---|
844 | * Make a copy of the page and set the values of the DEVEFIINFO structure
|
---|
845 | * found at the beginning of it.
|
---|
846 | */
|
---|
847 |
|
---|
848 | if (f64BitEntry)
|
---|
849 | LogRel(("Using 64-bit EFI firmware\n"));
|
---|
850 |
|
---|
851 | /* Duplicate the page so we can change it. */
|
---|
852 | AssertRelease(g_cbEfiThunkBinary == PAGE_SIZE);
|
---|
853 | pThis->pu8EfiThunk = (uint8_t *)PDMDevHlpMMHeapAlloc(pThis->pDevIns, PAGE_SIZE);
|
---|
854 | if (pThis->pu8EfiThunk == NULL)
|
---|
855 | return VERR_NO_MEMORY;
|
---|
856 | memcpy(pThis->pu8EfiThunk, &g_abEfiThunkBinary[0], PAGE_SIZE);
|
---|
857 |
|
---|
858 | /* Fill in the info. */
|
---|
859 | PDEVEFIINFO pEfiInfo = (PDEVEFIINFO)pThis->pu8EfiThunk;
|
---|
860 | pEfiInfo->pfnFirmwareEP = (uint32_t)pThis->GCEntryPoint0;
|
---|
861 | //AssertRelease(pEfiInfo->pfnFirmwareEP == pThis->GCEntryPoint0);
|
---|
862 | pEfiInfo->HighEPAddress = 0;
|
---|
863 | pEfiInfo->PhysFwVol = pThis->GCLoadAddress;
|
---|
864 | pEfiInfo->cbFwVol = (uint32_t)pThis->cbEfiRom;
|
---|
865 | AssertRelease(pEfiInfo->cbFwVol == (uint32_t)pThis->cbEfiRom);
|
---|
866 | pEfiInfo->cbBelow4GB = pThis->cbBelow4GB;
|
---|
867 | pEfiInfo->cbAbove4GB = pThis->cbAbove4GB;
|
---|
868 | /* zeroth bit controls use of 64-bit entry point in fw */
|
---|
869 | pEfiInfo->fFlags = f64BitEntry ? 1 : 0;
|
---|
870 | pEfiInfo->cCpus = pThis->cCpus;
|
---|
871 | pEfiInfo->pfnPeiEP = (uint32_t)pThis->GCEntryPoint1;
|
---|
872 | pEfiInfo->u32Reserved2 = 0;
|
---|
873 |
|
---|
874 | /* Register the page as a ROM (data will be copied). */
|
---|
875 | rc = PDMDevHlpROMRegister(pThis->pDevIns, UINT32_C(0xfffff000), PAGE_SIZE,
|
---|
876 | pThis->pu8EfiThunk,
|
---|
877 | PGMPHYS_ROM_FLAGS_PERMANENT_BINARY, "EFI Thunk");
|
---|
878 | if (RT_FAILURE(rc))
|
---|
879 | return rc;
|
---|
880 |
|
---|
881 | #if 1 /** @todo this is probably not necessary. */
|
---|
882 | /*
|
---|
883 | * Map thunk page also at low address, so that real->protected mode jump code can
|
---|
884 | * store GDT/IDT in code segment in low memory and load them during switch to the
|
---|
885 | * protected mode, while being in 16-bits mode.
|
---|
886 | *
|
---|
887 | * @todo: maybe need to unregister later or place somewhere else (although could
|
---|
888 | * be needed during reset)
|
---|
889 | */
|
---|
890 | rc = PDMDevHlpROMRegister(pThis->pDevIns, 0xff000, PAGE_SIZE,
|
---|
891 | pThis->pu8EfiThunk,
|
---|
892 | PGMPHYS_ROM_FLAGS_PERMANENT_BINARY, "EFI Thunk (2)");
|
---|
893 | if (RT_FAILURE(rc))
|
---|
894 | return rc;
|
---|
895 | #endif
|
---|
896 |
|
---|
897 | return rc;
|
---|
898 | }
|
---|
899 |
|
---|
900 |
|
---|
901 | /**
|
---|
902 | * @interface_method_impl{PDMDEVREG,pfnConstruct}
|
---|
903 | */
|
---|
904 | static DECLCALLBACK(int) efiConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
|
---|
905 | {
|
---|
906 | PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
|
---|
907 | int rc;
|
---|
908 |
|
---|
909 | Assert(iInstance == 0);
|
---|
910 |
|
---|
911 | pThis->pDevIns = pDevIns;
|
---|
912 |
|
---|
913 | /*
|
---|
914 | * Validate and read the configuration.
|
---|
915 | */
|
---|
916 | if (!CFGMR3AreValuesValid(pCfg,
|
---|
917 | "EfiRom\0"
|
---|
918 | "RamSize\0"
|
---|
919 | "RamHoleSize\0"
|
---|
920 | "NumCPUs\0"
|
---|
921 | "UUID\0"
|
---|
922 | "IOAPIC\0"
|
---|
923 | "DmiBIOSVendor\0"
|
---|
924 | "DmiBIOSVersion\0"
|
---|
925 | "DmiBIOSReleaseDate\0"
|
---|
926 | "DmiBIOSReleaseMajor\0"
|
---|
927 | "DmiBIOSReleaseMinor\0"
|
---|
928 | "DmiBIOSFirmwareMajor\0"
|
---|
929 | "DmiBIOSFirmwareMinor\0"
|
---|
930 | "DmiSystemFamily\0"
|
---|
931 | "DmiSystemProduct\0"
|
---|
932 | "DmiSystemSerial\0"
|
---|
933 | "DmiSystemUuid\0"
|
---|
934 | "DmiSystemVendor\0"
|
---|
935 | "DmiSystemVersion\0"
|
---|
936 | "DmiChassisVendor\0"
|
---|
937 | "DmiChassisVersion\0"
|
---|
938 | "DmiChassisSerial\0"
|
---|
939 | "DmiChassisAssetTag\0"
|
---|
940 | #ifdef VBOX_WITH_DMI_OEMSTRINGS
|
---|
941 | "DmiOEMVBoxVer\0"
|
---|
942 | "DmiOEMVBoxRev\0"
|
---|
943 | #endif
|
---|
944 | "64BitEntry\0"
|
---|
945 | "BootArgs\0"
|
---|
946 | "DeviceProps\0"
|
---|
947 | ))
|
---|
948 | return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
|
---|
949 | N_("Configuration error: Invalid config value(s) for the EFI device"));
|
---|
950 |
|
---|
951 | /* CPU count (optional). */
|
---|
952 | rc = CFGMR3QueryU32Def(pCfg, "NumCPUs", &pThis->cCpus, 1);
|
---|
953 | AssertLogRelRCReturn(rc, rc);
|
---|
954 |
|
---|
955 | rc = CFGMR3QueryU8Def(pCfg, "IOAPIC", &pThis->u8IOAPIC, 1);
|
---|
956 | if (RT_FAILURE (rc))
|
---|
957 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
958 | N_("Configuration error: Failed to read \"IOAPIC\""));
|
---|
959 |
|
---|
960 | /*
|
---|
961 | * Query the machine's UUID for SMBIOS/DMI use.
|
---|
962 | */
|
---|
963 | RTUUID uuid;
|
---|
964 | rc = CFGMR3QueryBytes(pCfg, "UUID", &uuid, sizeof(uuid));
|
---|
965 | if (RT_FAILURE(rc))
|
---|
966 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
967 | N_("Configuration error: Querying \"UUID\" failed"));
|
---|
968 |
|
---|
969 | /*
|
---|
970 | * Convert the UUID to network byte order. Not entirely straightforward as
|
---|
971 | * parts are MSB already...
|
---|
972 | */
|
---|
973 | uuid.Gen.u32TimeLow = RT_H2BE_U32(uuid.Gen.u32TimeLow);
|
---|
974 | uuid.Gen.u16TimeMid = RT_H2BE_U16(uuid.Gen.u16TimeMid);
|
---|
975 | uuid.Gen.u16TimeHiAndVersion = RT_H2BE_U16(uuid.Gen.u16TimeHiAndVersion);
|
---|
976 | memcpy(&pThis->aUuid, &uuid, sizeof pThis->aUuid);
|
---|
977 |
|
---|
978 |
|
---|
979 | /*
|
---|
980 | * RAM sizes
|
---|
981 | */
|
---|
982 | rc = CFGMR3QueryU64(pCfg, "RamSize", &pThis->cbRam);
|
---|
983 | AssertLogRelRCReturn(rc, rc);
|
---|
984 | rc = CFGMR3QueryU64(pCfg, "RamHoleSize", &pThis->cbRamHole);
|
---|
985 | AssertLogRelRCReturn(rc, rc);
|
---|
986 | pThis->cbBelow4GB = RT_MIN(pThis->cbRam, _4G - pThis->cbRamHole);
|
---|
987 | pThis->cbAbove4GB = pThis->cbRam - pThis->cbBelow4GB;
|
---|
988 |
|
---|
989 | /*
|
---|
990 | * Get the system EFI ROM file name.
|
---|
991 | */
|
---|
992 | rc = CFGMR3QueryStringAlloc(pCfg, "EfiRom", &pThis->pszEfiRomFile);
|
---|
993 | if (rc == VERR_CFGM_VALUE_NOT_FOUND)
|
---|
994 | {
|
---|
995 | pThis->pszEfiRomFile = (char*)PDMDevHlpMMHeapAlloc(pDevIns, RTPATH_MAX);
|
---|
996 | if (!pThis->pszEfiRomFile)
|
---|
997 | return VERR_NO_MEMORY;
|
---|
998 |
|
---|
999 | rc = RTPathAppPrivateArch(pThis->pszEfiRomFile, RTPATH_MAX - 32);
|
---|
1000 | AssertRCReturn(rc, rc);
|
---|
1001 |
|
---|
1002 | size_t offFilename = RTStrNLen(pThis->pszEfiRomFile, RTPATH_MAX);
|
---|
1003 | strcpy(pThis->pszEfiRomFile+offFilename, "/VBoxEFI32.fd");
|
---|
1004 | rc = VINF_SUCCESS;
|
---|
1005 | }
|
---|
1006 | else if (RT_FAILURE(rc))
|
---|
1007 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
|
---|
1008 | N_("Configuration error: Querying \"EfiRom\" as a string failed"));
|
---|
1009 | else if (!*pThis->pszEfiRomFile)
|
---|
1010 | {
|
---|
1011 | MMR3HeapFree(pThis->pszEfiRomFile);
|
---|
1012 | pThis->pszEfiRomFile = NULL;
|
---|
1013 | }
|
---|
1014 |
|
---|
1015 | /*
|
---|
1016 | * Get boot args.
|
---|
1017 | */
|
---|
1018 | rc = CFGMR3QueryString(pCfg, "BootArgs",
|
---|
1019 | pThis->szBootArgs, sizeof pThis->szBootArgs);
|
---|
1020 | if (rc == VERR_CFGM_VALUE_NOT_FOUND)
|
---|
1021 | {
|
---|
1022 | strcpy(pThis->szBootArgs, "");
|
---|
1023 | rc = VINF_SUCCESS;
|
---|
1024 | }
|
---|
1025 | if (RT_FAILURE(rc))
|
---|
1026 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
|
---|
1027 | N_("Configuration error: Querying \"BootArgs\" as a string failed"));
|
---|
1028 |
|
---|
1029 | LogRel(("EFI boot args: %s\n", pThis->szBootArgs));
|
---|
1030 |
|
---|
1031 | /*
|
---|
1032 | * Get device props.
|
---|
1033 | */
|
---|
1034 | rc = CFGMR3QueryStringAlloc(pCfg, "DeviceProps", &pThis->pszDeviceProps);
|
---|
1035 | if (rc == VERR_CFGM_VALUE_NOT_FOUND)
|
---|
1036 | {
|
---|
1037 | pThis->pszDeviceProps = RTStrDup("");
|
---|
1038 | rc = VINF_SUCCESS;
|
---|
1039 | }
|
---|
1040 | if (RT_FAILURE(rc))
|
---|
1041 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
|
---|
1042 | N_("Configuration error: Querying \"DeviceProps\" as a string failed"));
|
---|
1043 | LogRel(("EFI device props: %s\n", pThis->pszDeviceProps));
|
---|
1044 |
|
---|
1045 | pThis->u64FsbFrequency = 1333000000;
|
---|
1046 | pThis->u64TscFrequency = pThis->u64FsbFrequency * 3;
|
---|
1047 | pThis->u64CpuFrequency = pThis->u64TscFrequency;
|
---|
1048 |
|
---|
1049 |
|
---|
1050 | #ifdef DEVEFI_WITH_VBOXDBG_SCRIPT
|
---|
1051 | /*
|
---|
1052 | * Zap the debugger script
|
---|
1053 | */
|
---|
1054 | RTFileDelete("./DevEFI.VBoxDbg");
|
---|
1055 | #endif
|
---|
1056 |
|
---|
1057 | /*
|
---|
1058 | * Load firmware volume and thunk ROM.
|
---|
1059 | */
|
---|
1060 | rc = efiLoadRom(pThis, pCfg);
|
---|
1061 | if (RT_FAILURE(rc))
|
---|
1062 | return rc;
|
---|
1063 |
|
---|
1064 | rc = efiLoadThunk(pThis, pCfg);
|
---|
1065 | if (RT_FAILURE(rc))
|
---|
1066 | return rc;
|
---|
1067 |
|
---|
1068 | /*
|
---|
1069 | * Register our communication ports.
|
---|
1070 | */
|
---|
1071 | rc = PDMDevHlpIOPortRegister(pDevIns, EFI_PORT_BASE, EFI_PORT_COUNT, NULL,
|
---|
1072 | efiIOPortWrite, efiIOPortRead,
|
---|
1073 | NULL, NULL, "EFI communication ports");
|
---|
1074 | if (RT_FAILURE(rc))
|
---|
1075 | return rc;
|
---|
1076 |
|
---|
1077 | rc = PDMDevHlpROMRegister(pDevIns, VBOX_DMI_TABLE_BASE, _4K,
|
---|
1078 | pThis->au8DMIPage,
|
---|
1079 | PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
|
---|
1080 | "DMI tables");
|
---|
1081 | if (RT_FAILURE(rc))
|
---|
1082 | return rc;
|
---|
1083 |
|
---|
1084 | /*
|
---|
1085 | * Call reset to set things up.
|
---|
1086 | */
|
---|
1087 | efiReset(pDevIns);
|
---|
1088 |
|
---|
1089 | return VINF_SUCCESS;
|
---|
1090 | }
|
---|
1091 |
|
---|
1092 | /**
|
---|
1093 | * The device registration structure.
|
---|
1094 | */
|
---|
1095 | const PDMDEVREG g_DeviceEFI =
|
---|
1096 | {
|
---|
1097 | /* u32Version */
|
---|
1098 | PDM_DEVREG_VERSION,
|
---|
1099 | /* szName */
|
---|
1100 | "efi",
|
---|
1101 | /* szRCMod */
|
---|
1102 | "",
|
---|
1103 | /* szR0Mod */
|
---|
1104 | "",
|
---|
1105 | /* pszDescription */
|
---|
1106 | "Extensible Firmware Interface Device",
|
---|
1107 | /* fFlags */
|
---|
1108 | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32_64,
|
---|
1109 | /* fClass */
|
---|
1110 | PDM_DEVREG_CLASS_ARCH_BIOS,
|
---|
1111 | /* cMaxInstances */
|
---|
1112 | 1,
|
---|
1113 | /* cbInstance */
|
---|
1114 | sizeof(DEVEFI),
|
---|
1115 | /* pfnConstruct */
|
---|
1116 | efiConstruct,
|
---|
1117 | /* pfnDestruct */
|
---|
1118 | efiDestruct,
|
---|
1119 | /* pfnRelocate */
|
---|
1120 | NULL,
|
---|
1121 | /* pfnIOCtl */
|
---|
1122 | NULL,
|
---|
1123 | /* pfnPowerOn */
|
---|
1124 | NULL,
|
---|
1125 | /* pfnReset */
|
---|
1126 | efiReset,
|
---|
1127 | /* pfnSuspend */
|
---|
1128 | NULL,
|
---|
1129 | /* pfnResume */
|
---|
1130 | NULL,
|
---|
1131 | /* pfnAttach */
|
---|
1132 | NULL,
|
---|
1133 | /* pfnDetach */
|
---|
1134 | NULL,
|
---|
1135 | /* pfnQueryInterface. */
|
---|
1136 | NULL,
|
---|
1137 | /* pfnInitComplete. */
|
---|
1138 | efiInitComplete,
|
---|
1139 | /* pfnPowerOff */
|
---|
1140 | NULL,
|
---|
1141 | /* pfnSoftReset */
|
---|
1142 | NULL,
|
---|
1143 | /* u32VersionEnd */
|
---|
1144 | PDM_DEVREG_VERSION
|
---|
1145 | };
|
---|