DevEFI.cpp@ 28414

Last change on this file since 28414 was 28414, checked in by vboxsync, 15 years ago
EFI: fix reset once again
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1	/* $Id: DevEFI.cpp 28414 2010-04-16 12:54:33Z vboxsync $ */
2	/** @file
3	* DevEFI - EFI <-> VirtualBox Integration Framework.
4	*/
5
6	/*
7	* Copyright (C) 2006-2009 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Header Files *
24	*******************************************************************************/
25	#define LOG_GROUP LOG_GROUP_DEV_EFI
26
27	#include <VBox/pdmdev.h>
28	#include <VBox/pgm.h>
29	#include <VBox/mm.h>
30	#include <VBox/log.h>
31	#include <VBox/err.h>
32	#include <VBox/param.h>
33	#include <VBox/dbgf.h>
34
35	#include <iprt/assert.h>
36	#include <iprt/alloc.h>
37	#include <iprt/file.h>
38	#include <iprt/string.h>
39	#include <iprt/uuid.h>
40	#include <iprt/path.h>
41	#include <iprt/string.h>
42	#include <iprt/mp.h>
43	#ifdef DEBUG
44	# include <iprt/stream.h>
45	# define DEVEFI_WITH_VBOXDBG_SCRIPT
46	#endif
47
48	#include "Firmware2/VBoxPkg/Include/DevEFI.h"
49	#include "../Builtins.h"
50	#include "../Builtins2.h"
51	#include "../PC/DevFwCommon.h"
52
53	/* EFI includes */
54	#include <ProcessorBind.h>
55	#include <Common/UefiBaseTypes.h>
56	#include <Common/PiFirmwareVolume.h>
57	#include <Common/PiFirmwareFile.h>
58	#include <IndustryStandard/PeImage.h>
59
60	/*******************************************************************************
61	* Structures and Typedefs *
62	*******************************************************************************/
63	typedef struct DEVEFI
64	{
65	/** Pointer back to the device instance. */
66	PPDMDEVINS pDevIns;
67	/** EFI message buffer. */
68	char szMsg[VBOX_EFI_DEBUG_BUFFER];
69	/** EFI message buffer index. */
70	uint32_t iMsg;
71	/** EFI panic message buffer. */
72	char szPanicMsg[2048];
73	/** EFI panic message buffer index. */
74	uint32_t iPanicMsg;
75	/** The system EFI ROM data. */
76	uint8_t *pu8EfiRom;
77	/** The size of the system EFI ROM. */
78	uint64_t cbEfiRom;
79	/** The name of the EFI ROM file. */
80	char *pszEfiRomFile;
81	/** Thunk page pointer. */
82	uint8_t *pu8EfiThunk;
83	/** First entry point of the EFI firmware */
84	RTGCPHYS GCEntryPoint0;
85	/* Second Entry Point (PeiCore)*/
86	RTGCPHYS GCEntryPoint1;
87	/** EFI firmware physical load address */
88	RTGCPHYS GCLoadAddress;
89	/** Current info selector */
90	uint32_t iInfoSelector;
91	/** Current info position */
92	int32_t iInfoPosition;
93
94	/** Number of virtual CPUs. (Config) */
95	uint32_t cCpus;
96	/** RAM below 4GB (in bytes). (Config) */
97	uint32_t cbBelow4GB;
98	/** RAM above 4GB (in bytes). (Config) */
99	uint64_t cbAbove4GB;
100
101	uint64_t cbRam;
102
103	uint64_t cbRamHole;
104
105	/** The DMI tables. */
106	uint8_t au8DMIPage[0x1000];
107
108	/** I/O-APIC enabled? */
109	uint8_t u8IOAPIC;
110
111	/* Boot parameters passed to the firmware */
112	char szBootArgs[256];
113
114	/* Host UUID (for DMI) */
115	RTUUID aUuid;
116
117	/* Device properties buffer */
118	uint8_t* pu8DeviceProps;
119	/* Device properties buffer size */
120	uint32_t u32DevicePropsLen;
121
122	/* Virtual machine front side bus frequency */
123	uint64_t u64FsbFrequency;
124	/* Virtual machine time stamp counter frequency */
125	uint64_t u64TscFrequency;
126	/* Virtual machine CPU frequency */
127	uint64_t u64CpuFrequency;
128	/* GOP mode */
129	uint32_t u32GopMode;
130	/* Uga mode resolutions */
131	uint32_t u32UgaHorisontal;
132	uint32_t u32UgaVertical;
133	} DEVEFI;
134	typedef DEVEFI *PDEVEFI;
135
136	/**
137	* Write to CMOS memory.
138	* This is used by the init complete code.
139	*/
140	static void cmosWrite(PPDMDEVINS pDevIns, int off, uint32_t u32Val)
141	{
142	Assert(off < 128);
143	Assert(u32Val < 256);
144
145	int rc = PDMDevHlpCMOSWrite(pDevIns, off, u32Val);
146	AssertRC(rc);
147	}
148
149
150	static uint32_t efiInfoSize(PDEVEFI pThis)
151	{
152	switch (pThis->iInfoSelector)
153	{
154	case EFI_INFO_INDEX_VOLUME_BASE:
155	case EFI_INFO_INDEX_VOLUME_SIZE:
156	case EFI_INFO_INDEX_TEMPMEM_BASE:
157	case EFI_INFO_INDEX_TEMPMEM_SIZE:
158	case EFI_INFO_INDEX_STACK_BASE:
159	case EFI_INFO_INDEX_STACK_SIZE:
160	case EFI_INFO_INDEX_GOP_MODE:
161	case EFI_INFO_INDEX_UGA_VERTICAL_RESOLUTION:
162	case EFI_INFO_INDEX_UGA_HORISONTAL_RESOLUTION:
163	return 4;
164	case EFI_INFO_INDEX_BOOT_ARGS:
165	return (uint32_t)RTStrNLen(pThis->szBootArgs,
166	sizeof pThis->szBootArgs) + 1;
167	case EFI_INFO_INDEX_DEVICE_PROPS:
168	return pThis->u32DevicePropsLen;
169	case EFI_INFO_INDEX_FSB_FREQUENCY:
170	case EFI_INFO_INDEX_CPU_FREQUENCY:
171	case EFI_INFO_INDEX_TSC_FREQUENCY:
172	return 8;
173	}
174	Assert(false);
175	return 0;
176	}
177
178	static uint8_t efiInfoNextByte(PDEVEFI pThis)
179	{
180	union
181	{
182	uint32_t u32;
183	uint64_t u64;
184	} value;
185
186	switch (pThis->iInfoSelector)
187	{
188	case EFI_INFO_INDEX_VOLUME_BASE:
189	value.u32 = pThis->GCLoadAddress;
190	break;
191	case EFI_INFO_INDEX_VOLUME_SIZE:
192	value.u32 = pThis->cbEfiRom;
193	break;
194	case EFI_INFO_INDEX_TEMPMEM_BASE:
195	value.u32 = VBOX_EFI_TOP_OF_STACK; /* just after stack */
196	break;
197	case EFI_INFO_INDEX_TEMPMEM_SIZE:
198	value.u32 = 512 * 1024; /* 512 K */
199	break;
200	case EFI_INFO_INDEX_STACK_BASE:
201	/* Keep in sync with value in EfiThunk.asm */
202	value.u32 = VBOX_EFI_TOP_OF_STACK - 1281024; / 2M - 128 K */
203	break;
204	case EFI_INFO_INDEX_STACK_SIZE:
205	value.u32 = 1281024; / 128 K */
206	break;
207	case EFI_INFO_INDEX_FSB_FREQUENCY:
208	value.u64 = pThis->u64FsbFrequency;
209	break;
210	case EFI_INFO_INDEX_TSC_FREQUENCY:
211	value.u64 = pThis->u64TscFrequency;
212	break;
213	case EFI_INFO_INDEX_CPU_FREQUENCY:
214	value.u64 = pThis->u64CpuFrequency;
215	break;
216	case EFI_INFO_INDEX_BOOT_ARGS:
217	return pThis->szBootArgs[pThis->iInfoPosition];
218	case EFI_INFO_INDEX_DEVICE_PROPS:
219	return pThis->pu8DeviceProps[pThis->iInfoPosition];
220	case EFI_INFO_INDEX_GOP_MODE:
221	value.u32 = pThis->u32GopMode;
222	break;
223	case EFI_INFO_INDEX_UGA_HORISONTAL_RESOLUTION:
224	value.u32 = pThis->u32UgaHorisontal;
225	break;
226	case EFI_INFO_INDEX_UGA_VERTICAL_RESOLUTION:
227	value.u32 = pThis->u32UgaVertical;
228	break;
229	default:
230	Assert(false);
231	value.u64 = 0;
232	break;
233	}
234
235	return ((uint8_t)&value+pThis->iInfoPosition);
236	}
237
238	/**
239	* Port I/O Handler for IN operations.
240	*
241	* @returns VBox status code.
242	*
243	* @param pDevIns The device instance.
244	* @param pvUser User argument - ignored.
245	* @param Port Port number used for the IN operation.
246	* @param pu32 Where to store the result.
247	* @param cb Number of bytes read.
248	*/
249	static DECLCALLBACK(int) efiIOPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32, unsigned cb)
250	{
251	PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
252	Log4(("EFI in: %x %x\n", Port, cb));
253
254	switch (Port)
255	{
256	case EFI_INFO_PORT:
257	if (pThis->iInfoPosition == -1 && cb == 4)
258	{
259	*pu32 = efiInfoSize(pThis);
260	pThis->iInfoPosition = 0;
261	}
262	else
263	{
264	/* So far */
265	if (cb != 1)
266	return VERR_IOM_IOPORT_UNUSED;
267	*pu32 = efiInfoNextByte(pThis);
268	pThis->iInfoPosition++;
269	}
270	return VINF_SUCCESS;
271
272	case EFI_PANIC_PORT:
273	#ifdef IN_RING3
274	LogRel(("Panic port read!\n"));
275	/* Insert special code here on panic reads */
276	return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "EFI Panic: panic port read!\n");
277	#else
278	/* Reschedule to R3 */
279	return VINF_IOM_HC_IOPORT_READ;
280	#endif
281	}
282
283	return VERR_IOM_IOPORT_UNUSED;
284	}
285
286
287	/**
288	* Port I/O Handler for OUT operations.
289	*
290	* @returns VBox status code.
291	*
292	* @param pDevIns The device instance.
293	* @param pvUser User argument - ignored.
294	* @param Port Port number used for the IN operation.
295	* @param u32 The value to output.
296	* @param cb The value size in bytes.
297	*/
298	static DECLCALLBACK(int) efiIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
299	{
300	PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
301	Log4(("efi: out %x %x %d\n", Port, u32, cb));
302
303	switch (Port)
304	{
305	case EFI_INFO_PORT:
306	pThis->iInfoSelector = u32;
307	pThis->iInfoPosition = -1;
308	break;
309	case EFI_DEBUG_PORT:
310	{
311	/* The raw version. */
312	switch (u32)
313	{
314	case '\r': Log3(("efi: <return>\n")); break;
315	case '\n': Log3(("efi: <newline>\n")); break;
316	case '\t': Log3(("efi: <tab>\n")); break;
317	default: Log3(("efi: %c (%02x)\n", u32, u32)); break;
318	}
319	/* The readable, buffered version. */
320	if (u32 == '\n' \|\| u32 == '\r')
321	{
322	pThis->szMsg[pThis->iMsg] = '\0';
323	if (pThis->iMsg)
324	{
325	Log(("efi: %s\n", pThis->szMsg));
326	#ifdef DEVEFI_WITH_VBOXDBG_SCRIPT
327	const char *pszVBoxDbg = strstr(pThis->szMsg, "VBoxDbg> ");
328	if (pszVBoxDbg)
329	{
330	pszVBoxDbg += sizeof("VBoxDbg> ") - 1;
331
332	PRTSTREAM pStrm;
333	int rc = RTStrmOpen("./DevEFI.VBoxDbg", "a", &pStrm);
334	if (RT_SUCCESS(rc))
335	{
336	RTStrmPutStr(pStrm, pszVBoxDbg);
337	RTStrmPutCh(pStrm, '\n');
338	RTStrmClose(pStrm);
339	}
340	}
341	#endif
342	}
343	pThis->iMsg = 0;
344	}
345	else
346	{
347	if (pThis->iMsg >= sizeof(pThis->szMsg)-1)
348	{
349	pThis->szMsg[pThis->iMsg] = '\0';
350	Log(("efi: %s\n", pThis->szMsg));
351	pThis->iMsg = 0;
352	}
353	pThis->szMsg[pThis->iMsg] = (char )u32;
354	pThis->szMsg[++pThis->iMsg] = '\0';
355	}
356	break;
357	}
358
359	case EFI_PANIC_PORT:
360	{
361	switch (u32)
362	{
363	case EFI_PANIC_CMD_BAD_ORG:
364	LogRel(("EFI Panic: You have to fix ORG offset in EfiThunk.asm! Must be 0x%x\n",
365	g_cbEfiThunkBinary));
366	RTAssertMsg2Weak("Fix ORG offset in EfiThunk.asm: must be 0x%x\n",
367	g_cbEfiThunkBinary);
368	break;
369
370	case EFI_PANIC_CMD_THUNK_TRAP:
371	LogRel(("EFI Panic: Unexpected trap!!\n"));
372	#ifdef VBOX_STRICT
373	return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "EFI Panic: Unexpected trap during early bootstrap!\n");
374	#else
375	AssertReleaseMsgFailed(("Unexpected trap during early EFI bootstrap!!\n"));
376	#endif
377	break;
378
379	case EFI_PANIC_CMD_START_MSG:
380	pThis->iPanicMsg = 0;
381	pThis->szPanicMsg[0] = '\0';
382	break;
383
384	case EFI_PANIC_CMD_END_MSG:
385	LogRel(("EFI Panic: %s\n", pThis->szPanicMsg));
386	#ifdef VBOX_STRICT
387	return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "EFI Panic: %s\n", pThis->szPanicMsg);
388	#else
389	return VERR_INTERNAL_ERROR;
390	#endif
391
392	default:
393	if ( u32 >= EFI_PANIC_CMD_MSG_FIRST
394	&& u32 <= EFI_PANIC_CMD_MSG_LAST)
395	{
396	/* Add the message char to the buffer. */
397	uint32_t i = pThis->iPanicMsg;
398	if (i + 1 < sizeof(pThis->szPanicMsg))
399	{
400	char ch = EFI_PANIC_CMD_MSG_GET_CHAR(u32);
401	if ( ch == '\n'
402	&& i > 0
403	&& pThis->szPanicMsg[i - 1] == '\r')
404	i--;
405	pThis->szPanicMsg[i] = ch;
406	pThis->szPanicMsg[i + 1] = '\0';
407	pThis->iPanicMsg = i + 1;
408	}
409	}
410	else
411	Log(("EFI: Unknown panic command: %#x (cb=%d)\n", u32, cb));
412	break;
413	}
414	break;
415	}
416
417	default:
418	Log(("EFI: Write to reserved port %RTiop: %#x (cb=%d)\n", Port, u32, cb));
419	break;
420	}
421	return VINF_SUCCESS;
422	}
423
424	/**
425	* Init complete notification.
426	*
427	* @returns VBOX status code.
428	* @param pDevIns The device instance.
429	*/
430	static DECLCALLBACK(int) efiInitComplete(PPDMDEVINS pDevIns)
431	{
432	/* PC Bios */
433	PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
434	uint32_t u32;
435
436	/*
437	* Memory sizes.
438	*/
439	uint64_t const offRamHole = _4G - pThis->cbRamHole;
440	if (pThis->cbRam > 16 * _1M)
441	u32 = (uint32_t)( (RT_MIN(RT_MIN(pThis->cbRam, offRamHole), UINT32_C(0xffe00000)) - 16U * _1M) / _64K );
442	else
443	u32 = 0;
444	cmosWrite(pDevIns, 0x34, u32 & 0xff);
445	cmosWrite(pDevIns, 0x35, u32 >> 8);
446
447	/*
448	* Number of CPUs.
449	*/
450	cmosWrite(pDevIns, 0x60, pThis->cCpus & 0xff);
451
452	return VINF_SUCCESS;
453	}
454
455	/**
456	* Reset notification.
457	*
458	* @returns VBox status.
459	* @param pDevIns The device instance data.
460	*/
461	static DECLCALLBACK(void) efiReset(PPDMDEVINS pDevIns)
462	{
463	PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
464	int rc;
465
466	LogFlow(("efiReset\n"));
467
468	pThis->iInfoSelector = 0;
469	pThis->iInfoPosition = -1;
470
471	pThis->iMsg = 0;
472	pThis->szMsg[0] = '\0';
473	pThis->iPanicMsg = 0;
474	pThis->szPanicMsg[0] = '\0';
475
476	if (pThis->u8IOAPIC)
477	FwCommonPlantMpsFloatPtr(pDevIns);
478
479	/*
480	* Plant DMI and MPS tables
481	*/
482	rc = FwCommonPlantDMITable(pDevIns,
483	pThis->au8DMIPage,
484	VBOX_DMI_TABLE_SIZE,
485	&pThis->aUuid,
486	pDevIns->pCfg,
487	true /fPutSmbiosHeaders/);
488	AssertRC(rc);
489	if (pThis->u8IOAPIC)
490	FwCommonPlantMpsTable(pDevIns,
491	pThis->au8DMIPage + VBOX_DMI_TABLE_SIZE,
492	_4K - VBOX_DMI_TABLE_SIZE,
493	pThis->cCpus);
494
495
496	/*
497	* Re-shadow the Firmware Volume and make it RAM/RAM.
498	*/
499	uint32_t cPages = RT_ALIGN_64(pThis->cbEfiRom, PAGE_SIZE) >> PAGE_SHIFT;
500	RTGCPHYS GCPhys = pThis->GCLoadAddress;
501	while (cPages > 0)
502	{
503	uint8_t abPage[PAGE_SIZE];
504
505	/* Read the (original) ROM page and write it back to the RAM page. */
506	rc = PDMDevHlpROMProtectShadow(pDevIns, GCPhys, PAGE_SIZE, PGMROMPROT_READ_ROM_WRITE_RAM);
507	AssertLogRelRC(rc);
508
509	rc = PDMDevHlpPhysRead(pDevIns, GCPhys, abPage, PAGE_SIZE);
510	AssertLogRelRC(rc);
511	if (RT_FAILURE(rc))
512	memset(abPage, 0xcc, sizeof(abPage));
513
514	rc = PDMDevHlpPhysWrite(pDevIns, GCPhys, abPage, PAGE_SIZE);
515	AssertLogRelRC(rc);
516
517	/* Switch to the RAM/RAM mode. */
518	rc = PDMDevHlpROMProtectShadow(pDevIns, GCPhys, PAGE_SIZE, PGMROMPROT_READ_RAM_WRITE_RAM);
519	AssertLogRelRC(rc);
520
521	/* Advance */
522	GCPhys += PAGE_SIZE;
523	cPages--;
524	}
525	}
526
527	/**
528	* Destruct a device instance.
529	*
530	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
531	* resources can be freed correctly.
532	*
533	* @param pDevIns The device instance data.
534	*/
535	static DECLCALLBACK(int) efiDestruct(PPDMDEVINS pDevIns)
536	{
537	PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
538
539	/*
540	* Free MM heap pointers.
541	*/
542	if (pThis->pu8EfiRom)
543	{
544	RTFileReadAllFree(pThis->pu8EfiRom, (size_t)pThis->cbEfiRom);
545	pThis->pu8EfiRom = NULL;
546	}
547
548	if (pThis->pszEfiRomFile)
549	{
550	MMR3HeapFree(pThis->pszEfiRomFile);
551	pThis->pszEfiRomFile = NULL;
552	}
553
554	if (pThis->pu8EfiThunk)
555	{
556	MMR3HeapFree(pThis->pu8EfiThunk);
557	pThis->pu8EfiThunk = NULL;
558	}
559
560	if (pThis->pu8DeviceProps)
561	{
562	MMR3HeapFree(pThis->pu8DeviceProps);
563	pThis->pu8DeviceProps = NULL;
564	pThis->u32DevicePropsLen = 0;
565	}
566
567	return VINF_SUCCESS;
568	}
569
570	/**
571	* Helper that searches for a FFS file of a given type.
572	*
573	* @returns Pointer to the FFS file header if found, NULL if not.
574	*
575	* @param pFfsFile Pointer to the FFS file header to start searching at.
576	* @param pbEnd The end of the firmware volume.
577	* @param FileType The file type to look for.
578	* @param pcbFfsFile Where to store the FFS file size (includes header).
579	*/
580	DECLINLINE(EFI_FFS_FILE_HEADER const *)
581	efiFwVolFindFileByType(EFI_FFS_FILE_HEADER const pFfsFile, uint8_t const pbEnd, EFI_FV_FILETYPE FileType, uint32_t *pcbFile)
582	{
583	#define FFS_SIZE(hdr) RT_MAKE_U32_FROM_U8((hdr)->Size[0], (hdr)->Size[1], (hdr)->Size[2], 0)
584	while ((uintptr_t)pFfsFile < (uintptr_t)pbEnd)
585	{
586	if (pFfsFile->Type == FileType)
587	{
588	*pcbFile = FFS_SIZE(pFfsFile);
589	return pFfsFile;
590	}
591	pFfsFile = (EFI_FFS_FILE_HEADER *)((uintptr_t)pFfsFile + RT_ALIGN(FFS_SIZE(pFfsFile), 8));
592	}
593	return NULL;
594	}
595
596	static int efiFindEntryPoint(EFI_FFS_FILE_HEADER const pFfsFile, uint32_t cbFfsFile, RTGCPHYS pImageBase, uint8_t **ppbImage)
597	{
598	/*
599	* Sections headers are lays at the begining of block it describes,
600	* the first section header is located immidiately after FFS header.
601	*/
602	EFI_FILE_SECTION_POINTER uSecHdrPtr;
603	uint8_t const * const pbFfsFileEnd = (uint8_t *)pFfsFile + cbFfsFile;
604	uint8_t const *pbImage = NULL;
605	uint8_t const pbSecHdr = (uint8_t const )&pFfsFile[1]; /* FFS header has fixed size */
606	for (; (uintptr_t)pbSecHdr < (uintptr_t)pbFfsFileEnd;
607	pbSecHdr += SECTION_SIZE(uSecHdrPtr.CommonHeader))
608	{
609	uSecHdrPtr.CommonHeader = (EFI_COMMON_SECTION_HEADER *)pbSecHdr;
610	if ( uSecHdrPtr.CommonHeader->Type == EFI_SECTION_PE32
611	\|\| uSecHdrPtr.CommonHeader->Type == EFI_SECTION_TE)
612	{
613	/Here should be other code containing sections/
614	pbImage = (uint8_t const )&uSecHdrPtr.Pe32Section[1]; / the PE/PE+/TE headers begins just after the Section Header */
615	break;
616	}
617	Log2(("EFI: Section of type:%d has been detected\n", uSecHdrPtr.CommonHeader->Type));
618	}
619	AssertLogRelMsgReturn(pbImage, ("Failed to find PE32 or TE section for the SECURITY_CORE FFS\n"), VERR_INVALID_PARAMETER);
620
621	/*
622	* Parse the image extracting the ImageBase and the EntryPoint.
623	*/
624	int rc = VINF_SUCCESS;
625	union EfiHdrUnion
626	{
627	EFI_IMAGE_DOS_HEADER Dos;
628	EFI_IMAGE_NT_HEADERS32 Nt32;
629	EFI_IMAGE_NT_HEADERS64 Nt64;
630	EFI_TE_IMAGE_HEADER Te;
631	} const pHdr = (EfiHdrUnion const )pbImage;
632
633	/* Skip MZ if found. */
634	if (pHdr->Dos.e_magic == RT_MAKE_U16('M', 'Z'))
635	{
636	uint8_t const pbNewHdr = (uint8_t const )pHdr + pHdr->Dos.e_lfanew;
637	AssertLogRelMsgReturn( (uintptr_t)pbNewHdr < (uintptr_t)pbFfsFileEnd
638	&& (uintptr_t)pbNewHdr >= (uintptr_t)&pHdr->Dos.e_lfanew + sizeof(pHdr->Dos.e_lfanew),
639	("%x\n", pHdr->Dos.e_lfanew),
640	VERR_BAD_EXE_FORMAT);
641	pHdr = (EfiHdrUnion const *)pbNewHdr;
642	}
643
644	RTGCPHYS ImageBase;
645	RTGCPHYS EpRVA;
646	if (pHdr->Nt32.Signature == RT_MAKE_U32_FROM_U8('P', 'E', 0, 0))
647	{
648	AssertLogRelMsgReturn( ( pHdr->Nt32.FileHeader.Machine == EFI_IMAGE_FILE_MACHINE_I386
649	&& pHdr->Nt32.FileHeader.SizeOfOptionalHeader == sizeof(pHdr->Nt32.OptionalHeader))
650	\|\| ( pHdr->Nt32.FileHeader.Machine == EFI_IMAGE_MACHINE_X64
651	&& pHdr->Nt32.FileHeader.SizeOfOptionalHeader == sizeof(pHdr->Nt64.OptionalHeader)),
652	("%x / %x\n", pHdr->Nt32.FileHeader.Machine, pHdr->Nt32.FileHeader.SizeOfOptionalHeader),
653	VERR_LDR_ARCH_MISMATCH);
654	if (pHdr->Nt32.FileHeader.Machine == EFI_IMAGE_FILE_MACHINE_I386)
655	{
656	Log2(("EFI: PE32/i386\n"));
657	AssertLogRelMsgReturn(pHdr->Nt32.OptionalHeader.SizeOfImage < cbFfsFile,
658	("%#x / %#x\n", pHdr->Nt32.OptionalHeader.SizeOfImage, cbFfsFile),
659	VERR_BAD_EXE_FORMAT);
660	ImageBase = pHdr->Nt32.OptionalHeader.ImageBase;
661	EpRVA = pHdr->Nt32.OptionalHeader.AddressOfEntryPoint;
662	AssertLogRelMsgReturn(EpRVA < pHdr->Nt32.OptionalHeader.SizeOfImage,
663	("%#RGp / %#x\n", EpRVA, pHdr->Nt32.OptionalHeader.SizeOfImage),
664	VERR_BAD_EXE_FORMAT);
665	}
666	else
667	{
668	Log2(("EFI: PE+/AMD64\n"));
669	AssertLogRelMsgReturn(pHdr->Nt64.OptionalHeader.SizeOfImage < cbFfsFile,
670	("%#x / %#x\n", pHdr->Nt64.OptionalHeader.SizeOfImage, cbFfsFile),
671	VERR_BAD_EXE_FORMAT);
672	ImageBase = pHdr->Nt64.OptionalHeader.ImageBase;
673	EpRVA = pHdr->Nt64.OptionalHeader.AddressOfEntryPoint;
674	AssertLogRelMsgReturn(EpRVA < pHdr->Nt64.OptionalHeader.SizeOfImage,
675	("%#RGp / %#x\n", EpRVA, pHdr->Nt64.OptionalHeader.SizeOfImage),
676	VERR_BAD_EXE_FORMAT);
677	}
678	}
679	else if (pHdr->Te.Signature == RT_MAKE_U16('V', 'Z'))
680	{
681	/* TE header */
682	Log2(("EFI: TE header\n"));
683	AssertLogRelMsgReturn( pHdr->Te.Machine == EFI_IMAGE_FILE_MACHINE_I386
684	\|\| pHdr->Te.Machine == EFI_IMAGE_MACHINE_X64,
685	("%x\n", pHdr->Te.Machine),
686	VERR_LDR_ARCH_MISMATCH);
687	ImageBase = pHdr->Te.ImageBase;
688	EpRVA = pHdr->Te.AddressOfEntryPoint;
689	AssertLogRelMsgReturn(EpRVA < cbFfsFile,
690	("%#RGp / %#x\n", EpRVA, cbFfsFile),
691	VERR_BAD_EXE_FORMAT);
692	}
693	else
694	AssertLogRelMsgFailedReturn(("%#x\n", pHdr->Nt32.Signature), VERR_INVALID_EXE_SIGNATURE);
695
696	Log2(("EFI: EpRVA=%RGp ImageBase=%RGp EntryPoint=%RGp\n", EpRVA, ImageBase, EpRVA + ImageBase));
697	if (pImageBase != NULL)
698	*pImageBase = ImageBase;
699	if (ppbImage != NULL)
700	ppbImage = (uint8_t )pbImage;
701	return ImageBase + EpRVA;
702	}
703
704	/**
705	* Parse EFI ROM headers and find entry points.
706	*
707	* @returns VBox status.
708	* @param pThis The device instance data.
709	*/
710	static int efiParseFirmware(PDEVEFI pThis)
711	{
712	EFI_FIRMWARE_VOLUME_HEADER const pFwVolHdr = (EFI_FIRMWARE_VOLUME_HEADER const )pThis->pu8EfiRom;
713
714	/*
715	* Validate firmware volume header.
716	*/
717	AssertLogRelMsgReturn(pFwVolHdr->Signature == RT_MAKE_U32_FROM_U8('_', 'F', 'V', 'H'),
718	("%#x, expected %#x\n", pFwVolHdr->Signature, RT_MAKE_U32_FROM_U8('_', 'F', 'V', 'H')),
719	VERR_INVALID_MAGIC);
720	AssertLogRelMsgReturn(pFwVolHdr->Revision == EFI_FVH_REVISION,
721	("%#x, expected %#x\n", pFwVolHdr->Signature, EFI_FVH_REVISION),
722	VERR_VERSION_MISMATCH);
723	/** @todo check checksum, see PE spec vol. 3 */
724	AssertLogRelMsgReturn(pFwVolHdr->FvLength <= pThis->cbEfiRom,
725	("%#llx, expected %#llx\n", pFwVolHdr->FvLength, pThis->cbEfiRom),
726	VERR_INVALID_PARAMETER);
727	AssertLogRelMsgReturn( pFwVolHdr->BlockMap[0].Length > 0
728	&& pFwVolHdr->BlockMap[0].NumBlocks > 0,
729	("%#x, %x\n", pFwVolHdr->BlockMap[0].Length, pFwVolHdr->BlockMap[0].NumBlocks),
730	VERR_INVALID_PARAMETER);
731
732	AssertLogRelMsgReturn(!(pThis->cbEfiRom & PAGE_OFFSET_MASK), ("%RX64\n", pThis->cbEfiRom), VERR_INVALID_PARAMETER);
733
734	uint8_t const * const pbFwVolEnd = pThis->pu8EfiRom + pFwVolHdr->FvLength;
735
736	/*
737	* Ffs files are stored one by one, so to find SECURITY_CORE we've to
738	* search thru every one on the way.
739	*/
740	uint32_t cbFfsFile = 0; /* shut up gcc */
741	EFI_FFS_FILE_HEADER const pFfsFile = (EFI_FFS_FILE_HEADER const )(pThis->pu8EfiRom + pFwVolHdr->HeaderLength);
742	pFfsFile = efiFwVolFindFileByType(pFfsFile, pbFwVolEnd, EFI_FV_FILETYPE_SECURITY_CORE, &cbFfsFile);
743	AssertLogRelMsgReturn(pFfsFile, ("No SECURITY_CORE found in the firmware volume\n"), VERR_FILE_NOT_FOUND);
744
745	RTGCPHYS ImageBase;
746	uint8_t *pbImage;
747	pThis->GCEntryPoint0 = efiFindEntryPoint(pFfsFile, cbFfsFile, &ImageBase, &pbImage);
748
749	/*
750	* Calc the firmware load address from the image base and validate it.
751	*/
752	pThis->GCLoadAddress = ImageBase - (pbImage - pThis->pu8EfiRom);
753	AssertLogRelMsgReturn(~(pThis->GCLoadAddress & PAGE_OFFSET_MASK),
754	("%RGp\n", pThis->GCLoadAddress),
755	VERR_INVALID_PARAMETER);
756	AssertLogRelMsgReturn(pThis->GCLoadAddress > UINT32_C(0xf0000000),
757	("%RGp\n", pThis->GCLoadAddress),
758	VERR_OUT_OF_RANGE);
759	AssertLogRelMsgReturn( pThis->GCLoadAddress + (pThis->cbEfiRom - 1) > UINT32_C(0xf0000000)
760	&& pThis->GCLoadAddress + (pThis->cbEfiRom - 1) < UINT32_C(0xffffe000),
761	("%RGp + %RX64\n", pThis->GCLoadAddress, pThis->cbEfiRom),
762	VERR_OUT_OF_RANGE);
763
764	LogRel(("EFI: Firmware volume loading at %RGp, SEC CORE at %RGp with EP at %RGp\n",
765	pThis->GCLoadAddress, ImageBase, pThis->GCEntryPoint0));
766
767	pFfsFile = efiFwVolFindFileByType(pFfsFile, pbFwVolEnd, EFI_FV_FILETYPE_PEI_CORE, &cbFfsFile);
768	pThis->GCEntryPoint1 = efiFindEntryPoint(pFfsFile, cbFfsFile, NULL, NULL);
769	LogRel(("EFI: Firmware volume loading at %RGp, PEI CORE at with EP at %RGp\n",
770	pThis->GCLoadAddress, pThis->GCEntryPoint1));
771	return VINF_SUCCESS;
772	}
773
774	/**
775	* Load EFI ROM file into the memory.
776	*
777	* @returns VBox status.
778	* @param pThis The device instance data.
779	* @param pCfg Configuration node handle for the device.
780	*/
781	static int efiLoadRom(PDEVEFI pThis, PCFGMNODE pCfg)
782	{
783	/*
784	* Read the entire firmware volume into memory.
785	*/
786	void *pvFile;
787	size_t cbFile;
788	int rc = RTFileReadAllEx(pThis->pszEfiRomFile,
789	0 /off/,
790	RTFOFF_MAX /cbMax/,
791	RTFILE_RDALL_O_DENY_WRITE,
792	&pvFile,
793	&cbFile);
794	if (RT_FAILURE(rc))
795	return PDMDevHlpVMSetError(pThis->pDevIns, rc, RT_SRC_POS,
796	N_("Loading the EFI firmware volume '%s' failed with rc=%Rrc"),
797	pThis->pszEfiRomFile, rc);
798	pThis->pu8EfiRom = (uint8_t *)pvFile;
799	pThis->cbEfiRom = cbFile;
800
801	/*
802	* Validate firmware volume and figure out the load address as well as the SEC entry point.
803	*/
804	rc = efiParseFirmware(pThis);
805	if (RT_FAILURE(rc))
806	return PDMDevHlpVMSetError(pThis->pDevIns, rc, RT_SRC_POS,
807	N_("Parsing the EFI firmware volume '%s' failed with rc=%Rrc"),
808	pThis->pszEfiRomFile, rc);
809
810	/*
811	* Map the firmware volume into memory as shadowed ROM.
812	*/
813	/** @todo fix PGMR3PhysRomRegister so it doesn't mess up in SUPLib when mapping a big ROM image. */
814	RTGCPHYS cbQuart = RT_ALIGN_64(pThis->cbEfiRom / 4, PAGE_SIZE);
815	rc = PDMDevHlpROMRegister(pThis->pDevIns,
816	pThis->GCLoadAddress,
817	cbQuart,
818	pThis->pu8EfiRom,
819	PGMPHYS_ROM_FLAGS_SHADOWED \| PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
820	"EFI Firmware Volume");
821	if (RT_FAILURE(rc))
822	return rc;
823	rc = PDMDevHlpROMRegister(pThis->pDevIns,
824	pThis->GCLoadAddress + cbQuart,
825	cbQuart,
826	pThis->pu8EfiRom + cbQuart,
827	PGMPHYS_ROM_FLAGS_SHADOWED \| PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
828	"EFI Firmware Volume (Part 2)");
829	if (RT_FAILURE(rc))
830	return rc;
831	rc = PDMDevHlpROMRegister(pThis->pDevIns,
832	pThis->GCLoadAddress + cbQuart * 2,
833	cbQuart,
834	pThis->pu8EfiRom + cbQuart * 2,
835	PGMPHYS_ROM_FLAGS_SHADOWED \| PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
836	"EFI Firmware Volume (Part 3)");
837	if (RT_FAILURE(rc))
838	return rc;
839	rc = PDMDevHlpROMRegister(pThis->pDevIns,
840	pThis->GCLoadAddress + cbQuart * 3,
841	pThis->cbEfiRom - cbQuart * 3,
842	pThis->pu8EfiRom + cbQuart * 3,
843	PGMPHYS_ROM_FLAGS_SHADOWED \| PGMPHYS_ROM_FLAGS_PERMANENT_BINARY,
844	"EFI Firmware Volume (Part 4)");
845	if (RT_FAILURE(rc))
846	return rc;
847	return VINF_SUCCESS;
848	}
849
850	/**
851	* Patches and loads the EfiThunk ROM image.
852	*
853	* The thunk image is where the CPU starts and will switch it into
854	* 32-bit protected or long mode and invoke the SEC CORE image in the
855	* firmware volume. It also contains some static VM configuration data
856	* at the very beginning of the page, see DEVEFIINFO.
857	*
858	* @returns VBox status code.
859	* @param pThis The device instance data.
860	* @param pCfg Configuration node handle for the device.
861	*/
862	static int efiLoadThunk(PDEVEFI pThis, PCFGMNODE pCfg)
863	{
864	uint8_t f64BitEntry = 0;
865	int rc;
866
867	rc = CFGMR3QueryU8Def(pCfg, "64BitEntry", &f64BitEntry, 0);
868	if (RT_FAILURE (rc))
869	return PDMDEV_SET_ERROR(pThis->pDevIns, rc,
870	N_("Configuration error: Failed to read \"64BitEntry\""));
871
872	/*
873	* Make a copy of the page and set the values of the DEVEFIINFO structure
874	* found at the beginning of it.
875	*/
876
877	if (f64BitEntry)
878	LogRel(("Using 64-bit EFI firmware\n"));
879
880	/* Duplicate the page so we can change it. */
881	AssertRelease(g_cbEfiThunkBinary == PAGE_SIZE);
882	pThis->pu8EfiThunk = (uint8_t *)PDMDevHlpMMHeapAlloc(pThis->pDevIns, PAGE_SIZE);
883	if (pThis->pu8EfiThunk == NULL)
884	return VERR_NO_MEMORY;
885	memcpy(pThis->pu8EfiThunk, &g_abEfiThunkBinary[0], PAGE_SIZE);
886
887	/* Fill in the info. */
888	PDEVEFIINFO pEfiInfo = (PDEVEFIINFO)pThis->pu8EfiThunk;
889	pEfiInfo->pfnFirmwareEP = (uint32_t)pThis->GCEntryPoint0;
890	//AssertRelease(pEfiInfo->pfnFirmwareEP == pThis->GCEntryPoint0);
891	pEfiInfo->HighEPAddress = 0;
892	pEfiInfo->PhysFwVol = pThis->GCLoadAddress;
893	pEfiInfo->cbFwVol = (uint32_t)pThis->cbEfiRom;
894	AssertRelease(pEfiInfo->cbFwVol == (uint32_t)pThis->cbEfiRom);
895	pEfiInfo->cbBelow4GB = pThis->cbBelow4GB;
896	pEfiInfo->cbAbove4GB = pThis->cbAbove4GB;
897	/* zeroth bit controls use of 64-bit entry point in fw */
898	pEfiInfo->fFlags = f64BitEntry ? 1 : 0;
899	pEfiInfo->cCpus = pThis->cCpus;
900	pEfiInfo->pfnPeiEP = (uint32_t)pThis->GCEntryPoint1;
901	pEfiInfo->u32Reserved2 = 0;
902
903	/* Register the page as a ROM (data will be copied). */
904	rc = PDMDevHlpROMRegister(pThis->pDevIns, UINT32_C(0xfffff000), PAGE_SIZE,
905	pThis->pu8EfiThunk,
906	PGMPHYS_ROM_FLAGS_PERMANENT_BINARY, "EFI Thunk");
907	if (RT_FAILURE(rc))
908	return rc;
909
910	#if 1 /** @todo this is probably not necessary. */
911	/*
912	* Map thunk page also at low address, so that real->protected mode jump code can
913	* store GDT/IDT in code segment in low memory and load them during switch to the
914	* protected mode, while being in 16-bits mode.
915	*
916	* @todo: maybe need to unregister later or place somewhere else (although could
917	* be needed during reset)
918	*/
919	rc = PDMDevHlpROMRegister(pThis->pDevIns, 0xff000, PAGE_SIZE,
920	pThis->pu8EfiThunk,
921	PGMPHYS_ROM_FLAGS_PERMANENT_BINARY, "EFI Thunk (2)");
922	if (RT_FAILURE(rc))
923	return rc;
924	#endif
925
926	return rc;
927	}
928
929
930	static uint8_t efiGetHalfByte(char ch)
931	{
932	uint8_t val;
933
934	if (ch >= '0' && ch <= '9')
935	val = ch - '0';
936	else if (ch >= 'A' && ch <= 'F')
937	val = ch - 'A' + 10;
938	else if(ch >= 'a' && ch <= 'f')
939	val = ch - 'a' + 10;
940	else
941	val = 0xff;
942
943	return val;
944
945	}
946
947
948	static int efiParseDeviceString(PDEVEFI pThis, char* pszDeviceProps)
949	{
950	int rc = 0;
951	uint32_t iStr, iHex, u32OutLen;
952	uint8_t u8Value = 0; /* (shut up gcc) */
953	bool fUpper = true;
954
955	u32OutLen = (uint32_t)RTStrNLen(pszDeviceProps, RTSTR_MAX) / 2 + 1;
956
957	pThis->pu8DeviceProps =
958	(uint8_t*)PDMDevHlpMMHeapAlloc(pThis->pDevIns, u32OutLen);
959	if (!pThis->pu8DeviceProps)
960	return VERR_NO_MEMORY;
961
962	for (iStr=0, iHex = 0; pszDeviceProps[iStr]; iStr++)
963	{
964	uint8_t u8Hb = efiGetHalfByte(pszDeviceProps[iStr]);
965	if (u8Hb > 0xf)
966	continue;
967
968	if (fUpper)
969	u8Value = u8Hb << 4;
970	else
971	pThis->pu8DeviceProps[iHex++] = u8Hb \| u8Value;
972
973	Assert(iHex < u32OutLen);
974	fUpper = !fUpper;
975	}
976
977	Assert(iHex == 0 \|\| fUpper);
978	pThis->u32DevicePropsLen = iHex;
979
980	return rc;
981	}
982
983	/**
984	* @interface_method_impl{PDMDEVREG,pfnConstruct}
985	*/
986	static DECLCALLBACK(int) efiConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
987	{
988	PDEVEFI pThis = PDMINS_2_DATA(pDevIns, PDEVEFI);
989	int rc;
990
991	Assert(iInstance == 0);
992
993	pThis->pDevIns = pDevIns;
994
995	/*
996	* Validate and read the configuration.
997	*/
998	if (!CFGMR3AreValuesValid(pCfg,
999	"EfiRom\0"
1000	"RamSize\0"
1001	"RamHoleSize\0"
1002	"NumCPUs\0"
1003	"UUID\0"
1004	"IOAPIC\0"
1005	"DmiBIOSVendor\0"
1006	"DmiBIOSVersion\0"
1007	"DmiBIOSReleaseDate\0"
1008	"DmiBIOSReleaseMajor\0"
1009	"DmiBIOSReleaseMinor\0"
1010	"DmiBIOSFirmwareMajor\0"
1011	"DmiBIOSFirmwareMinor\0"
1012	"DmiSystemFamily\0"
1013	"DmiSystemProduct\0"
1014	"DmiSystemSerial\0"
1015	"DmiSystemUuid\0"
1016	"DmiSystemVendor\0"
1017	"DmiSystemVersion\0"
1018	"DmiChassisVendor\0"
1019	"DmiChassisVersion\0"
1020	"DmiChassisSerial\0"
1021	"DmiChassisAssetTag\0"
1022	#ifdef VBOX_WITH_DMI_OEMSTRINGS
1023	"DmiOEMVBoxVer\0"
1024	"DmiOEMVBoxRev\0"
1025	#endif
1026	"DmiUseHostInfo\0"
1027	"64BitEntry\0"
1028	"BootArgs\0"
1029	"DeviceProps\0"
1030	"GopMode\0"
1031	"UgaHorizontalResolution\0"
1032	"UgaVerticalResolution\0"
1033	))
1034	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
1035	N_("Configuration error: Invalid config value(s) for the EFI device"));
1036
1037	/* CPU count (optional). */
1038	rc = CFGMR3QueryU32Def(pCfg, "NumCPUs", &pThis->cCpus, 1);
1039	AssertLogRelRCReturn(rc, rc);
1040
1041	rc = CFGMR3QueryU8Def(pCfg, "IOAPIC", &pThis->u8IOAPIC, 1);
1042	if (RT_FAILURE (rc))
1043	return PDMDEV_SET_ERROR(pDevIns, rc,
1044	N_("Configuration error: Failed to read \"IOAPIC\""));
1045
1046	/*
1047	* Query the machine's UUID for SMBIOS/DMI use.
1048	*/
1049	RTUUID uuid;
1050	rc = CFGMR3QueryBytes(pCfg, "UUID", &uuid, sizeof(uuid));
1051	if (RT_FAILURE(rc))
1052	return PDMDEV_SET_ERROR(pDevIns, rc,
1053	N_("Configuration error: Querying \"UUID\" failed"));
1054
1055	/*
1056	* Convert the UUID to network byte order. Not entirely straightforward as
1057	* parts are MSB already...
1058	*/
1059	uuid.Gen.u32TimeLow = RT_H2BE_U32(uuid.Gen.u32TimeLow);
1060	uuid.Gen.u16TimeMid = RT_H2BE_U16(uuid.Gen.u16TimeMid);
1061	uuid.Gen.u16TimeHiAndVersion = RT_H2BE_U16(uuid.Gen.u16TimeHiAndVersion);
1062	memcpy(&pThis->aUuid, &uuid, sizeof pThis->aUuid);
1063
1064
1065	/*
1066	* RAM sizes
1067	*/
1068	rc = CFGMR3QueryU64(pCfg, "RamSize", &pThis->cbRam);
1069	AssertLogRelRCReturn(rc, rc);
1070	rc = CFGMR3QueryU64(pCfg, "RamHoleSize", &pThis->cbRamHole);
1071	AssertLogRelRCReturn(rc, rc);
1072	pThis->cbBelow4GB = RT_MIN(pThis->cbRam, _4G - pThis->cbRamHole);
1073	pThis->cbAbove4GB = pThis->cbRam - pThis->cbBelow4GB;
1074
1075	/*
1076	* Get the system EFI ROM file name.
1077	*/
1078	rc = CFGMR3QueryStringAlloc(pCfg, "EfiRom", &pThis->pszEfiRomFile);
1079	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1080	{
1081	pThis->pszEfiRomFile = (char *)PDMDevHlpMMHeapAlloc(pDevIns, RTPATH_MAX);
1082	if (!pThis->pszEfiRomFile)
1083	return VERR_NO_MEMORY;
1084
1085	rc = RTPathAppPrivateArch(pThis->pszEfiRomFile, RTPATH_MAX);
1086	AssertRCReturn(rc, rc);
1087	rc = RTPathAppend(pThis->pszEfiRomFile, RTPATH_MAX, "VBoxEFI32.fd");
1088	AssertRCReturn(rc, rc);
1089	}
1090	else if (RT_FAILURE(rc))
1091	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
1092	N_("Configuration error: Querying \"EfiRom\" as a string failed"));
1093	else if (!*pThis->pszEfiRomFile)
1094	{
1095	MMR3HeapFree(pThis->pszEfiRomFile);
1096	pThis->pszEfiRomFile = NULL;
1097	}
1098
1099	/*
1100	* Get boot args.
1101	*/
1102	rc = CFGMR3QueryString(pCfg, "BootArgs",
1103	pThis->szBootArgs, sizeof pThis->szBootArgs);
1104	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1105	{
1106	strcpy(pThis->szBootArgs, "");
1107	rc = VINF_SUCCESS;
1108	}
1109	if (RT_FAILURE(rc))
1110	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
1111	N_("Configuration error: Querying \"BootArgs\" as a string failed"));
1112
1113	LogRel(("EFI boot args: %s\n", pThis->szBootArgs));
1114
1115	/*
1116	* Get device props.
1117	*/
1118	char* pszDeviceProps;
1119	rc = CFGMR3QueryStringAlloc(pCfg, "DeviceProps", &pszDeviceProps);
1120	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1121	{
1122	pszDeviceProps = NULL;
1123	rc = VINF_SUCCESS;
1124	}
1125	if (RT_FAILURE(rc))
1126	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
1127	N_("Configuration error: Querying \"DeviceProps\" as a string failed"));
1128	if (pszDeviceProps)
1129	{
1130	LogRel(("EFI device props: %s\n", pszDeviceProps));
1131	rc = efiParseDeviceString(pThis, pszDeviceProps);
1132	MMR3HeapFree(pszDeviceProps);
1133	if (RT_FAILURE(rc))
1134	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
1135	N_("Configuration error: Cannot parse device properties"));
1136	}
1137	else
1138	{
1139	pThis->pu8DeviceProps = NULL;
1140	pThis->u32DevicePropsLen = 0;
1141	}
1142
1143	/*
1144	* CPU frequencies
1145	*/
1146	// @todo: we need to have VMM API to access TSC increase speed, for now provide reasonable default
1147	pThis->u64TscFrequency = RTMpGetMaxFrequency(0) * 1024 * 1024;// TMCpuTicksPerSecond(PDMDevHlpGetVM(pDevIns));
1148	if (pThis->u64TscFrequency == 0)
1149	pThis->u64TscFrequency = UINT64_C(2500000000);
1150	/* Multiplier is read from MSR_IA32_PERF_STATUS, and now is hardcoded as 4 */
1151	pThis->u64FsbFrequency = pThis->u64TscFrequency / 4;
1152	pThis->u64CpuFrequency = pThis->u64TscFrequency;
1153
1154	/*
1155	* GOP graphics
1156	*/
1157	rc = CFGMR3QueryU32(pCfg, "GopMode", &pThis->u32GopMode);
1158	AssertRC(rc);
1159	if (pThis->u32GopMode == UINT32_MAX)
1160	{
1161	pThis->u32GopMode = 2; /* 1024x768 */
1162	}
1163
1164	/*
1165	* Uga graphics
1166	*/
1167	rc = CFGMR3QueryU32(pCfg, "UgaHorizontalResolution", &pThis->u32UgaHorisontal);
1168	AssertRC(rc);
1169	if (pThis->u32UgaHorisontal == 0)
1170	{
1171	pThis->u32UgaHorisontal = 1024; /* 1024x768 */
1172	}
1173	rc = CFGMR3QueryU32(pCfg, "UgaVerticalResolution", &pThis->u32UgaVertical);
1174	AssertRC(rc);
1175	if (pThis->u32UgaVertical == 0)
1176	{
1177	pThis->u32UgaVertical = 768; /* 1024x768 */
1178	}
1179
1180	#ifdef DEVEFI_WITH_VBOXDBG_SCRIPT
1181	/*
1182	* Zap the debugger script
1183	*/
1184	RTFileDelete("./DevEFI.VBoxDbg");
1185	#endif
1186
1187	/*
1188	* Load firmware volume and thunk ROM.
1189	*/
1190	rc = efiLoadRom(pThis, pCfg);
1191	if (RT_FAILURE(rc))
1192	return rc;
1193
1194	rc = efiLoadThunk(pThis, pCfg);
1195	if (RT_FAILURE(rc))
1196	return rc;
1197
1198	/*
1199	* Register our communication ports.
1200	*/
1201	rc = PDMDevHlpIOPortRegister(pDevIns, EFI_PORT_BASE, EFI_PORT_COUNT, NULL,
1202	efiIOPortWrite, efiIOPortRead,
1203	NULL, NULL, "EFI communication ports");
1204	if (RT_FAILURE(rc))
1205	return rc;
1206
1207	/*
1208	* Call reset to set things up.
1209	*/
1210	efiReset(pDevIns);
1211
1212
1213	rc = PDMDevHlpROMRegister(pDevIns, VBOX_DMI_TABLE_BASE, _4K, pThis->au8DMIPage,
1214	PGMPHYS_ROM_FLAGS_PERMANENT_BINARY, "DMI tables");
1215
1216	AssertRCReturn(rc, rc);
1217
1218
1219
1220	return VINF_SUCCESS;
1221	}
1222
1223	/**
1224	* The device registration structure.
1225	*/
1226	const PDMDEVREG g_DeviceEFI =
1227	{
1228	/* u32Version */
1229	PDM_DEVREG_VERSION,
1230	/* szName */
1231	"efi",
1232	/* szRCMod */
1233	"",
1234	/* szR0Mod */
1235	"",
1236	/* pszDescription */
1237	"Extensible Firmware Interface Device",
1238	/* fFlags */
1239	PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT \| PDM_DEVREG_FLAGS_GUEST_BITS_32_64,
1240	/* fClass */
1241	PDM_DEVREG_CLASS_ARCH_BIOS,
1242	/* cMaxInstances */
1243	1,
1244	/* cbInstance */
1245	sizeof(DEVEFI),
1246	/* pfnConstruct */
1247	efiConstruct,
1248	/* pfnDestruct */
1249	efiDestruct,
1250	/* pfnRelocate */
1251	NULL,
1252	/* pfnIOCtl */
1253	NULL,
1254	/* pfnPowerOn */
1255	NULL,
1256	/* pfnReset */
1257	efiReset,
1258	/* pfnSuspend */
1259	NULL,
1260	/* pfnResume */
1261	NULL,
1262	/* pfnAttach */
1263	NULL,
1264	/* pfnDetach */
1265	NULL,
1266	/* pfnQueryInterface. */
1267	NULL,
1268	/* pfnInitComplete. */
1269	efiInitComplete,
1270	/* pfnPowerOff */
1271	NULL,
1272	/* pfnSoftReset */
1273	NULL,
1274	/* u32VersionEnd */
1275	PDM_DEVREG_VERSION
1276	};

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source: vbox/trunk/src/VBox/Devices/EFI/DevEFI.cpp@ 28414

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