| 1 | #/** @file
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| 2 | #
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| 3 | # Copyright (c) 2011-2021, ARM Limited. All rights reserved.
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| 4 | # Copyright (c) 2015, Intel Corporation. All rights reserved.
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| 5 | #
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| 6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
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| 7 | #
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| 8 | #**/
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| 9 |
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| 10 | [Defines]
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| 11 | DEC_SPECIFICATION = 0x00010005
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| 12 | PACKAGE_NAME = ArmPlatformPkg
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| 13 | PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b
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| 14 | PACKAGE_VERSION = 0.1
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| 15 |
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| 16 | ################################################################################
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| 17 | #
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| 18 | # Include Section - list of Include Paths that are provided by this package.
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| 19 | # Comments are used for Keywords and Module Types.
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| 20 | #
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| 21 | # Supported Module Types:
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| 22 | # BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
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| 23 | #
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| 24 | ################################################################################
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| 25 | [Includes.common]
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| 26 | Include # Root include for the package
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| 27 |
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| 28 | [LibraryClasses]
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| 29 | ## @libraryclass Provides an interface to query platform information.
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| 30 | #
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| 31 | ArmPlatformLib|Include/Library/ArmPlatformLib.h
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| 32 |
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| 33 | ## @libraryclass Provides an interface to initialize/shutdown a LCD screen.
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| 34 | #
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| 35 | LcdHwLib|Include/Library/LcdHwLib.h
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| 36 |
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| 37 | ## @libraryclass Provides an interface to configure a LCD screen.
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| 38 | #
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| 39 | LcdPlatformLib|Include/Library/LcdPlatformLib.h
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| 40 |
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| 41 | ## @libraryclass Provides an interface to the clock of a PL011 device.
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| 42 | #
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| 43 | PL011UartClockLib|Include/Library/PL011UartClockLib.h
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| 44 |
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| 45 | ## @libraryclass Provides an interface to a PL011 uart.
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| 46 | #
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| 47 | PL011UartLib|Include/Library/PL011UartLib.h
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| 48 |
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| 49 | [Guids.common]
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| 50 | gArmPlatformTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }
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| 51 |
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| 52 | [PcdsFeatureFlag.common]
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| 53 | gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
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| 54 |
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| 55 | # Disable the GOP controller on ExitBootServices(). By default the value is FALSE,
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| 56 | # we assume the OS will handle the FrameBuffer from the UEFI GOP information.
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| 57 | gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D
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| 58 |
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| 59 | [PcdsFixedAtBuild.common]
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| 60 | gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039
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| 61 | gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
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| 62 |
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| 63 | # Stack for CPU Cores in Non Secure Mode
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| 64 | gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009
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| 65 | gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
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| 66 | gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
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| 67 |
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| 68 | # Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
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| 69 | gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
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| 70 |
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| 71 | #
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| 72 | # ARM Primecells
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| 73 | #
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| 74 |
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| 75 | ## SP805 Watchdog
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| 76 | gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023
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| 77 | gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021
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| 78 | gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt|0|UINT32|0x0000002E
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| 79 |
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| 80 | ## PL011 UART
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| 81 | gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F
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| 82 | gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020
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| 83 | gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
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| 84 | gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F
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| 85 | gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E
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| 86 |
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| 87 | ## PL011 Serial Debug UART
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| 88 | gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030
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| 89 | gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|0x00000000|UINT64|0x00000031
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| 90 | gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|0x00000000|UINT32|0x00000032
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| 91 | gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt|0x00000000|UINT32|0x00000041
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| 92 |
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| 93 | ## PL061 GPIO
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| 94 | gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025
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| 95 |
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| 96 | ## PL111 Lcd & HdLcd
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| 97 | gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026
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| 98 | gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027
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| 99 |
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| 100 | ## Default size for display modes upto 1920x1080 (1920 * 1080 * 4 Bytes Per Pixel)
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| 101 | gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x7E9000|UINT32|0x00000043
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| 102 | ## If set, framebuffer memory will be reserved and mapped in the system RAM
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| 103 | gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x00000044
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| 104 |
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| 105 | ## ARM Mali Display Processor DP500/DP550/DP650
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| 106 | gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x00000050
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| 107 | gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x00000051
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| 108 |
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| 109 | # Graphics Output Pixel format
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| 110 | # 0 : PixelRedGreenBlueReserved8BitPerColor
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| 111 | # 1 : PixelBlueGreenRedReserved8BitPerColor
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| 112 | # 2 : PixelBitMask
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| 113 | # Default is set to UEFI console font format PixelBlueGreenRedReserved8BitPerColor
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| 114 | gArmPlatformTokenSpaceGuid.PcdGopPixelFormat|0x00000001|UINT32|0x00000040
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| 115 |
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| 116 | ## If set, this will swap settings for HDLCD RED_SELECT and BLUE_SELECT registers
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| 117 | gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect|FALSE|BOOLEAN|0x00000045
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| 118 |
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| 119 | [PcdsFixedAtBuild.common,PcdsDynamic.common]
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| 120 | ## PL031 RealTimeClock
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| 121 | gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024
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| 122 | gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022
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| 123 |
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| 124 | gArmPlatformTokenSpaceGuid.PcdWatchdogCount|0x0|UINT32|0x00000033
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