| 1 | ## @file
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| 2 | # Provides drivers and definitions to support fsp in EDKII bios.
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| 3 | #
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| 4 | # Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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| 5 | # SPDX-License-Identifier: BSD-2-Clause-Patent
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| 6 | #
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| 7 | ##
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| 8 |
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| 9 | [Defines]
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| 10 | DEC_SPECIFICATION = 0x00010005
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| 11 | PACKAGE_NAME = IntelFsp2WrapperPkg
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| 12 | PACKAGE_GUID = FAFE06D4-7245-42D7-9FD2-E5D5E36AB0A0
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| 13 | PACKAGE_VERSION = 0.1
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| 14 |
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| 15 | [Includes]
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| 16 | Include
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| 17 |
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| 18 | [LibraryClasses]
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| 19 | ## @libraryclass Provide FSP API related function.
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| 20 | FspWrapperApiLib|Include/Library/FspWrapperApiLib.h
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| 21 | FspWrapperApiTestLib|Include/Library/FspWrapperApiTestLib.h
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| 22 |
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| 23 | ## @libraryclass Provide FSP hob process related function.
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| 24 | FspWrapperHobProcessLib|Include/Library/FspWrapperHobProcessLib.h
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| 25 |
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| 26 | ## @libraryclass Provide FSP platform related function.
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| 27 | FspWrapperPlatformLib|Include/Library/FspWrapperPlatformLib.h
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| 28 |
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| 29 | ## @libraryclass Provide FSP TPM measurement related function.
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| 30 | FspMeasurementLib|Include/Library/FspMeasurementLib.h
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| 31 |
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| 32 | ## @libraryclass Provide MultiPhase handling related functions.
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| 33 | FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProcessLib.h
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| 34 |
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| 35 | ## @libraryclass Provide MultiPhase platform actions related functions.
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| 36 | FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperPlatformMultiPhaseLib.h
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| 37 |
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| 38 |
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| 39 | [Guids]
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| 40 | #
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| 41 | # GUID defined in package
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| 42 | #
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| 43 | gIntelFsp2WrapperTokenSpaceGuid = { 0xa34cf082, 0xf50, 0x4f0d, { 0x89, 0x8a, 0x3d, 0x39, 0x30, 0x2b, 0xc5, 0x1e } }
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| 44 | gFspApiPerformanceGuid = { 0xc9122295, 0x56ed, 0x4d4e, { 0x06, 0xa6, 0x50, 0x8d, 0x89, 0x4d, 0x3e, 0x40 } }
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| 45 | gFspHobGuid = { 0x6d86fb36, 0xba90, 0x472c, { 0xb5, 0x83, 0x3f, 0xbe, 0xd3, 0xfb, 0x20, 0x9a } }
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| 46 |
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| 47 | [Ppis]
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| 48 | gFspSiliconInitDonePpiGuid = { 0x4eb6e09c, 0xd256, 0x4e1e, { 0xb5, 0x0a, 0x87, 0x4b, 0xd2, 0x84, 0xb3, 0xde } }
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| 49 | gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
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| 50 |
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| 51 | [Protocols]
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| 52 | gAddPerfRecordProtocolGuid = { 0xc4a58d6d, 0x3677, 0x49cb, { 0xa0, 0x0a, 0x94, 0x70, 0x76, 0x5f, 0xb5, 0x5e } }
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| 53 |
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| 54 | ################################################################################
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| 55 | #
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| 56 | # PCD Declarations section - list of all PCDs Declared by this Package
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| 57 | # Only this package should be providing the
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| 58 | # declaration, other packages should not.
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| 59 | #
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| 60 | ################################################################################
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| 61 | [PcdsFixedAtBuild, PcdsPatchableInModule]
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| 62 | ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.
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| 63 | gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001
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| 64 | ## Provides the size of the BIOS Flash Device.
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| 65 | gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002
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| 66 |
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| 67 | ## Indicate the PEI memory size platform want to report
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| 68 | gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004
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| 69 | ## Indicate the PEI memory size platform want to report
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| 70 | gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
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| 71 |
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| 72 | ## This is the base address of FSP-T
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| 73 | gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
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| 74 |
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| 75 | ## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
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| 76 | # If a bit is set, that means this FSP API is skipped.<BR>
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| 77 | # If a bit is clear, that means this FSP API is NOT skipped.<BR>
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| 78 | # NOTE: Only NotifyPhase Post PCI enumeration (BIT16) is implemented.<BR>
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| 79 | # BIT[15:0] is for function:<BR>
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| 80 | # BIT0 - Skip TempRamInit<BR>
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| 81 | # BIT1 - Skip MemoryInit<BR>
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| 82 | # BIT2 - Skip TempRamExit<BR>
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| 83 | # BIT3 - Skip SiliconInit<BR>
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| 84 | # BIT4 - Skip NotifyPhase<BR>
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| 85 | # BIT[32:16] is for sub-function:<BR>
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| 86 | # BIT16 - Skip NotifyPhase (AfterPciEnumeration)<BR>
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| 87 | # BIT17 - Skip NotifyPhase (ReadyToBoot)<BR>
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| 88 | # BIT18 - Skip NotifyPhase (EndOfFirmware)<BR>
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| 89 | # Any undefined BITs are reserved for future use.<BR>
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| 90 | # @Prompt Skip FSP API from FSP wrapper.
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| 91 | gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
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| 92 |
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| 93 | ## This PCD decides how FSP is measured
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| 94 | # 1) The BootGuard ACM may already measured the FSP component, such as FSPT/FSPM.
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| 95 | # We need a flag (PCD) to indicate if there is need to do such FSP measurement or NOT.
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| 96 | # 2) The FSP binary includes FSP code and FSP UPD region. The UPD region is considered
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| 97 | # as configuration block, and it may be updated by OEM by design.
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| 98 | # This flag (PCD) is to indicate if we need isolate the UPD region from the FSP code region.
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| 99 | # BIT0: Need measure FSP. (for FSP1.x) - reserved in FSP2.
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| 100 | # BIT1: Need measure FSPT. (for FSP 2.x)
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| 101 | # BIT2: Need measure FSPM. (for FSP 2.x)
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| 102 | # BIT3: Need measure FSPS. (for FSP 2.x)
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| 103 | # BIT4~30: reserved.
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| 104 | # BIT31: Need isolate UPD region measurement.
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| 105 | #0: measure FSP[T|M|S] as one binary in one record (PCR0).
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| 106 | #1: measure FSP UPD region in one record (PCR1), the FSP code without UPD in another record (PCR0).
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| 107 | #
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| 108 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig|0x00000000|UINT32|0x4000000B
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| 109 |
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| 110 | [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
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| 111 | ## This PCD decides how Wrapper code utilizes FSP
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| 112 | # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)
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| 113 | # 1: API mode (FSP Wrapper will call FSP API)
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| 114 | #
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| 115 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A
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| 116 |
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| 117 | #
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| 118 | ## These are the base address of FSP-M/S
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| 119 | #
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| 120 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000
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| 121 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
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| 122 | #
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| 123 | # To provide flexibility for platform to pre-allocate FSP UPD buffer
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| 124 | #
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| 125 | # The PCDs define the pre-allocated FSPM and FSPS UPD Data Buffer Address.
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| 126 | # 0x00000000 - Platform will not pre-allocate UPD buffer before FspWrapper module
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| 127 | # non-zero - Platform will pre-allocate UPD buffer and patch this value to
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| 128 | # buffer address before FspWrapper module executing.
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| 129 | #
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| 130 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0x00000000|UINT32|0x50000000
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| 131 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000|UINT32|0x50000001
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| 132 | #
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| 133 | # Non-0 means PcdFspmUpdDataAddress will be ignored, otherwise PcdFspmUpdDataAddress will be used.
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| 134 | #
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| 135 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress64|0x00000000|UINT64|0x50000002
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| 136 | #
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| 137 | # Non-0 means PcdFspsUpdDataAddress will be ignored, otherwise PcdFspsUpdDataAddress will be used.
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| 138 | #
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| 139 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress64|0x00000000|UINT64|0x50000003
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