| 1 | ## @file
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| 2 | # Provides driver and definitions to build fsp in EDKII bios.
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| 3 | #
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| 4 | # Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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| 5 | # This program and the accompanying materials are licensed and made available under
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| 6 | # the terms and conditions of the BSD License that accompanies this distribution.
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| 7 | # The full text of the license may be found at
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| 8 | # http://opensource.org/licenses/bsd-license.php.
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| 9 | #
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| 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 12 | #
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| 13 | ##
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| 14 |
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| 15 | [Defines]
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| 16 | DEC_SPECIFICATION = 0x00010005
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| 17 | PACKAGE_NAME = IntelFspPkg
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| 18 | PACKAGE_GUID = 444C6CDF-55BD-4744-8F74-AE98B003B955
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| 19 | PACKAGE_VERSION = 0.1
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| 20 |
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| 21 | [Includes]
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| 22 | Include
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| 23 | Include/Private
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| 24 |
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| 25 | [LibraryClasses]
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| 26 | ## @libraryclass Provides cache-as-ram support.
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| 27 | CacheAsRamLib|Include/Library/CacheAsRamLib.h
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| 28 |
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| 29 | ## @libraryclass Provides cache setting on MTRR.
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| 30 | CacheLib|Include/Library/CacheLib.h
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| 31 |
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| 32 | ## @libraryclass Provides debug device abstraction.
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| 33 | DebugDeviceLib|Include/Library/DebugDeviceLib.h
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| 34 |
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| 35 | ## @libraryclass Provides FSP related services.
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| 36 | FspCommonLib|Include/Library/FspCommonLib.h
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| 37 |
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| 38 | ## @libraryclass Provides FSP platform related actions.
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| 39 | FspPlatformLib|Include/Library/FspPlatformLib.h
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| 40 |
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| 41 | ## @libraryclass Provides FSP switch stack function.
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| 42 | FspSwitchStackLib|Include/Library/FspSwitchStackLib.h
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| 43 |
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| 44 | ## @libraryclass Provides FSP platform sec related actions.
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| 45 | FspSecPlatformLib|Include/Library/FspSecPlatformLib.h
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| 46 |
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| 47 | [Guids]
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| 48 | #
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| 49 | # GUID defined in package
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| 50 | #
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| 51 | gIntelFspPkgTokenSpaceGuid = { 0x834c0c5f, 0xadb3, 0x4372, { 0xae, 0xeb, 0x03, 0xe4, 0xe9, 0xe6, 0xc5, 0x91 } }
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| 52 |
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| 53 | # Guid define in FSP EAS
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| 54 | gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }
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| 55 | gFspBootLoaderTemporaryMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
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| 56 | gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
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| 57 | gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }
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| 58 | gFspBootLoaderTolumHobGuid = { 0x73ff4f56, 0xaa8e, 0x4451, { 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44 } } # FSP EAS v1.1
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| 59 |
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| 60 | # Guid defined by platform
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| 61 | gFspReservedMemoryResourceHobTsegGuid = { 0xd038747c, 0xd00c, 0x4980, { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } }
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| 62 | gFspReservedMemoryResourceHobGfxGuid = { 0x9c7c3aa7, 0x5332, 0x4917, { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } }
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| 63 | gFspReservedMemoryResourceHobMiscGuid = { 0x00d6b14b, 0x7dd0, 0x4062, { 0x88, 0x21, 0xe5, 0xf9, 0x6a, 0x2a, 0x1b, 0x00 } }
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| 64 |
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| 65 | [PcdsFixedAtBuild]
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| 66 | gIntelFspPkgTokenSpaceGuid.PcdGlobalDataPointerAddress |0xFED00108|UINT32|0x00000001
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| 67 | gIntelFspPkgTokenSpaceGuid.PcdTemporaryRamBase |0xFEF00000|UINT32|0x10001001
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| 68 | gIntelFspPkgTokenSpaceGuid.PcdTemporaryRamSize | 0x2000|UINT32|0x10001002
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| 69 | gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x1000|UINT32|0x10001003
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| 70 | gIntelFspPkgTokenSpaceGuid.PcdFspMaxPerfEntry | 32|UINT32|0x00002001
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| 71 | gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry | 6|UINT32|0x00002002
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| 72 | gIntelFspPkgTokenSpaceGuid.PcdFspAreaBaseAddress |0xFFF80000|UINT32|0x10000001
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| 73 | gIntelFspPkgTokenSpaceGuid.PcdFspAreaSize |0x00040000|UINT32|0x10000002
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| 74 | gIntelFspPkgTokenSpaceGuid.PcdFspBootFirmwareVolumeBase|0xFFF80000|UINT32|0x10000003
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| 75 |
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| 76 | [PcdsFixedAtBuild,PcdsDynamic,PcdsDynamicEx]
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| 77 | gIntelFspPkgTokenSpaceGuid.PcdFspReservedMemoryLength |0x00100000|UINT32|0x46530000
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| 78 | gIntelFspPkgTokenSpaceGuid.PcdBootLoaderEntry |0xFFFFFFE4|UINT32|0x46530100
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