| 1 | /** @file
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| 2 | SPI NOR Flash JEDEC Serial Flash Discoverable Parameters (SFDP)
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| 3 | header file.
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| 4 |
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| 5 | Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
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| 6 |
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| 7 | SPDX-License-Identifier: BSD-2-Clause-Patent
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| 8 |
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| 9 | @par Revision Reference:
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| 10 | - JEDEC Standard, JESD216F.02
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| 11 | https://www.jedec.org/document_search?search_api_views_fulltext=JESD216
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| 12 |
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| 13 | @par Glossary:
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| 14 | - SFDP - Serial Flash Discoverable Parameters
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| 15 | - PTP - Parameter Table Pointer
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| 16 | **/
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| 17 |
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| 18 | #ifndef SPI_NOR_FLASH_JEDEC_H_
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| 19 | #define SPI_NOR_FLASH_JEDEC_H_
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| 20 |
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| 21 | #include <Base.h>
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| 22 |
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| 23 | #define SFDP_HEADER_SIGNATURE 0x50444653
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| 24 | #define SFDP_SUPPORTED_MAJOR_REVISION 0x1ul
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| 25 |
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| 26 | /// JEDEC Basic Flash Parameter Header
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| 27 | #define SFDP_BASIC_PARAMETER_ID_LSB 0x00
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| 28 | #define SFDP_BASIC_PARAMETER_ID_MSB 0xFF
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| 29 |
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| 30 | ///
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| 31 | /// JDEC Sector Map Parameter Header and Table
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| 32 | ///
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| 33 | #define SFDP_SECTOR_MAP_PARAMETER_ID_LSB 0x81
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| 34 | #define SFDP_FOUR_BYTE_ADDRESS_INSTRUCTION_LSB 0x84
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| 35 | #define SFDP_SECTOR_MAP_PARAMETER_ID_MSB 0xFF
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| 36 |
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| 37 | #define SFDP_FLASH_MEMORY_DENSITY_4GBIT 0x80000000
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| 38 |
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| 39 | #pragma pack (1)
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| 40 | typedef struct _SFDP_HEADER {
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| 41 | UINT32 Signature;
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| 42 | UINT32 MinorRev : 8;
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| 43 | UINT32 MajorRev : 8;
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| 44 | UINT32 NumParameterHeaders : 8;
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| 45 | UINT32 AccessProtocol : 8;
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| 46 | } SFDP_HEADER;
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| 47 |
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| 48 | typedef struct _SFDP_PARAMETER_HEADER {
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| 49 | UINT32 IdLsb : 8;
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| 50 | UINT32 MinorRev : 8;
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| 51 | UINT32 MajorRev : 8;
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| 52 | UINT32 Length : 8;
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| 53 | UINT32 TablePointer : 24;
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| 54 | UINT32 IdMsb : 8;
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| 55 | } SFDP_PARAMETER_HEADER;
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| 56 |
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| 57 | typedef struct _SFDP_BASIC_FLASH_PARAMETER {
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| 58 | // DWORD 1
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| 59 | UINT32 EraseSizes : 2;
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| 60 | UINT32 WriteGranularity : 1;
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| 61 | UINT32 VolatileStatusBlockProtect : 1;
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| 62 | UINT32 WriteEnableVolatileStatus : 1;
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| 63 | UINT32 Unused1Dw1 : 3;
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| 64 | UINT32 FourKEraseInstr : 8;
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| 65 | UINT32 FastRead112 : 1;
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| 66 | UINT32 AddressBytes : 2;
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| 67 | UINT32 DtrClocking : 1;
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| 68 | UINT32 FastRead122 : 1;
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| 69 | UINT32 FastRead144 : 1;
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| 70 | UINT32 FastRead114 : 1;
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| 71 | UINT32 Unused2Dw1 : 9;
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| 72 | // DWORD 2
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| 73 | UINT32 Density;
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| 74 | // DWORD 3
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| 75 | // Fast Read 144
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| 76 | UINT32 FastRead144Dummy : 5;
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| 77 | UINT32 FastRead144ModeClk : 3;
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| 78 | UINT32 FastRead144Instr : 8;
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| 79 | // Fast Read 114
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| 80 | UINT32 FastRead114Dummy : 5;
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| 81 | UINT32 FastRead114ModeClk : 3;
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| 82 | UINT32 FastRead114Instr : 8;
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| 83 | // DWORD 4
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| 84 | // Fast Read 112
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| 85 | UINT32 FastRead112Dummy : 5;
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| 86 | UINT32 FastRead112ModeClk : 3;
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| 87 | UINT32 FastRead112Instr : 8;
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| 88 | // Fast Read 122
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| 89 | UINT32 FastRead122Dummy : 5;
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| 90 | UINT32 FastRead122ModeClk : 3;
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| 91 | UINT32 FastRead122Instr : 8;
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| 92 | // DWORD 5
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| 93 | UINT32 FastRead222 : 1;
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| 94 | UINT32 Unused1Dw5 : 3;
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| 95 | UINT32 FastRead444 : 1;
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| 96 | UINT32 Unused2Dw5 : 27;
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| 97 | // DWORD 6
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| 98 | UINT32 UnusedDw6 : 16;
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| 99 | // Fast Read 222
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| 100 | UINT32 FastRead222Dummy : 5;
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| 101 | UINT32 FastRead222ModeClk : 3;
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| 102 | UINT32 FastRead222Instr : 8;
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| 103 | // DWORD 7
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| 104 | UINT32 UnusedDw7 : 16;
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| 105 | // Fast Read 444
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| 106 | UINT32 FastRead444Dummy : 5;
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| 107 | UINT32 FastRead444ModeClk : 3;
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| 108 | UINT32 FastRead444Instr : 8;
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| 109 | // DWORD 8
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| 110 | UINT32 Erase1Size : 8;
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| 111 | UINT32 Erase1Instr : 8;
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| 112 | UINT32 Erase2Size : 8;
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| 113 | UINT32 Erase2Instr : 8;
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| 114 | // DWORD 9
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| 115 | UINT32 Erase3Size : 8;
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| 116 | UINT32 Erase3Instr : 8;
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| 117 | UINT32 Erase4Size : 8;
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| 118 | UINT32 Erase4Instr : 8;
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| 119 | // DWORD 10
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| 120 | UINT32 EraseMultiplier : 4;
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| 121 | UINT32 Erase1Time : 7;
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| 122 | UINT32 Erase2Time : 7;
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| 123 | UINT32 Erase3Time : 7;
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| 124 | UINT32 Erase4Time : 7;
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| 125 | // DWORD 11
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| 126 | UINT32 ProgramMultiplier : 4;
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| 127 | UINT32 PageSize : 4;
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| 128 | UINT32 PPTime : 6;
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| 129 | UINT32 BPFirstTime : 5;
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| 130 | UINT32 BPAdditionalTime : 5;
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| 131 | UINT32 ChipEraseTime : 7;
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| 132 | UINT32 Unused1Dw11 : 1;
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| 133 | // DWORD 12
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| 134 | UINT32 ProgSuspendProhibit : 4;
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| 135 | UINT32 EraseSuspendProhibit : 4;
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| 136 | UINT32 Unused1Dw13 : 1;
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| 137 | UINT32 ProgResumeToSuspend : 4;
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| 138 | UINT32 ProgSuspendInProgressTime : 7;
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| 139 | UINT32 EraseResumeToSuspend : 4;
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| 140 | UINT32 EraseSuspendInProgressTime : 7;
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| 141 | UINT32 SuspendResumeSupported : 1;
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| 142 | // DWORD 13
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| 143 | UINT32 Unused13;
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| 144 | // DWORD 14
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| 145 | UINT32 Unused14;
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| 146 | // DWORD 15
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| 147 | UINT32 Unused15;
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| 148 | // DWORD 16
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| 149 | UINT32 Unused16;
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| 150 | // DWORD 17
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| 151 | UINT32 FastRead188Dummy : 5;
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| 152 | UINT32 FastRead188ModeClk : 3;
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| 153 | UINT32 FastRead188Instr : 8;
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| 154 | UINT32 FastRead118Dummy : 5;
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| 155 | UINT32 FastRead118ModeClk : 3;
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| 156 | UINT32 FastRead118Instr : 8;
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| 157 | //
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| 158 | // Don't care about remaining DWORDs
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| 159 | // DWORD 18 to DWORD 23
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| 160 | //
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| 161 | UINT32 Unused18;
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| 162 | UINT32 Unused19;
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| 163 | UINT32 Unused20;
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| 164 | UINT32 Unused21;
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| 165 | UINT32 Unused22;
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| 166 | UINT32 Unused23;
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| 167 | } SFDP_BASIC_FLASH_PARAMETER;
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| 168 | #pragma pack ()
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| 169 |
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| 170 | #define SPI_UNIFORM_4K_ERASE_SUPPORTED 0x01
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| 171 | #define SPI_UNIFORM_4K_ERASE_UNSUPPORTED 0x03
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| 172 |
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| 173 | ///
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| 174 | /// Number of address bytes opcode can support
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| 175 | ///
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| 176 | #define SPI_ADDR_3BYTE_ONLY 0x00
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| 177 | #define SPI_ADDR_3OR4BYTE 0x01
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| 178 | #define SPI_ADDR_4BYTE_ONLY 0x02
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| 179 |
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| 180 | #define SFDP_ERASE_TYPES_NUMBER 4
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| 181 | #define SFDP_ERASE_TYPE_1 0x0001
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| 182 | #define SFDP_ERASE_TYPE_2 0x0002
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| 183 | #define SFDP_ERASE_TYPE_3 0x0003
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| 184 | #define SFDP_ERASE_TYPE_4 0x0004
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| 185 |
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| 186 | ///
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| 187 | /// Read/Write Array Commands
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| 188 | ///
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| 189 | #define SPI_FLASH_READ 0x03
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| 190 | #define SPI_FLASH_READ_DUMMY 0x00
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| 191 | #define SPI_FLASH_READ_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 192 | #define SPI_FLASH_FAST_READ 0x0B
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| 193 | #define SPI_FLASH_FAST_READ_DUMMY 0x01
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| 194 | #define SPI_FLASH_FAST_READ_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 195 | #define SPI_FLASH_PP 0x02
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| 196 | #define SPI_FLASH_PP_DUMMY 0x00
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| 197 | #define SPI_FLASH_PP_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 198 | #define SPI_FLASH_PAGE_SIZE 256
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| 199 | #define SPI_FLASH_SE 0x20
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| 200 | #define SPI_FLASH_SE_DUMMY 0x00
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| 201 | #define SPI_FLASH_SE_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 202 | #define SPI_FLASH_BE32K 0x52
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| 203 | #define SPI_FLASH_BE32K_DUMMY 0x00
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| 204 | #define SPI_FLASH_BE32K_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 205 | #define SPI_FLASH_BE 0xD8
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| 206 | #define SPI_FLASH_BE_DUMMY 0x00
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| 207 | #define SPI_FLASH_BE_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 208 | #define SPI_FLASH_CE 0x60
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| 209 | #define SPI_FLASH_CE_DUMMY 0x00
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| 210 | #define SPI_FLASH_CE_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 211 | #define SPI_FLASH_RDID 0x9F
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| 212 | #define SPI_FLASH_RDID_DUMMY 0x00
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| 213 | #define SPI_FLASH_RDID_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 214 |
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| 215 | ///
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| 216 | /// Register Setting Commands
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| 217 | ///
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| 218 | #define SPI_FLASH_WREN 0x06
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| 219 | #define SPI_FLASH_WREN_DUMMY 0x00
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| 220 | #define SPI_FLASH_WREN_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 221 | #define SPI_FLASH_WRDI 0x04
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| 222 | #define SPI_FLASH_WRDI_DUMMY 0x00
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| 223 | #define SPI_FLASH_WRDI_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 224 | #define SPI_FLASH_RDSR 0x05
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| 225 | #define SPI_FLASH_RDSR_DUMMY 0x00
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| 226 | #define SPI_FLASH_RDSR_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 227 | #define SPI_FLASH_SR_NOT_WIP 0x0
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| 228 | #define SPI_FLASH_SR_WIP BIT0
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| 229 | #define SPI_FLASH_SR_WEL BIT1
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| 230 | #define SPI_FLASH_WRSR 0x01
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| 231 | #define SPI_FLASH_WRSR_DUMMY 0x00
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| 232 | #define SPI_FLASH_WRSR_ADDR_BYTES SPI_ADDR_3OR4BYTE
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| 233 | #define SPI_FLASH_WREN_50H 0x50
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| 234 | #define SPI_FLASH_RDSFDP 0x5A
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| 235 | #define SPI_FLASH_RDSFDP_DUMMY 0x01
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| 236 | #define SPI_FLASH_RDSFDP_ADDR_BYTES SPI_ADDR_3BYTE_ONLY
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| 237 | #define ERASE_TYPICAL_TIME_UNITS_MASK 0x60
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| 238 | #define ERASE_TYPICAL_TIME_BIT_POSITION 5
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| 239 | #define ERASE_TYPICAL_TIME_UNIT_1_MS_BITMAP 0x00
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| 240 | #define ERASE_TYPICAL_TIME_UNIT_1_MS 1
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| 241 | #define ERASE_TYPICAL_TIME_UNIT_16_MS_BITMAP 0x01
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| 242 | #define ERASE_TYPICAL_TIME_UNIT_16_MS 16
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| 243 | #define ERASE_TYPICAL_TIME_UNIT_128_MS_BITMAP 0x02
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| 244 | #define ERASE_TYPICAL_TIME_UNIT_128_MS 128
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| 245 | #define ERASE_TYPICAL_TIME_UNIT_1000_MS_BITMAP 0x03
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| 246 | #define ERASE_TYPICAL_TIME_UNIT_1000_MS 1000
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| 247 | #define ERASE_TYPICAL_TIME_COUNT_MASK 0x1f
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| 248 |
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| 249 | ///
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| 250 | /// Flash Device Configuration Detection Command descriptor.
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| 251 | ///
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| 252 | typedef struct {
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| 253 | // DWORD 1
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| 254 | UINT32 DescriptorEnd : 1; ///< Descriptor Sequence End Indicator.
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| 255 | UINT32 DescriptorType : 1; ///< Descriptor Type.
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| 256 | UINT32 Reserve1 : 6; ///< Bit [7:2] is reserved.
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| 257 | UINT32 DetectionInstruction : 8; ///< Sector map configuration detection command.
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| 258 | UINT32 DetectionLatency : 4; ///< Configuration detection command read latency.
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| 259 | UINT32 Reserve2 : 2; ///< Bit [21:20] is reserved.
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| 260 | UINT32 DetectionCommandAddressLen : 2; ///< Configuration detection command address length.
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| 261 | UINT32 ReadDataMask : 8; ///< Bit mask of the interst bit of the returned
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| 262 | ///< byte read from the detection command.
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| 263 | // DWORD 2
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| 264 | UINT32 CommandAddress : 32; ///< Sector map configuration detection command address.
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| 265 | } SFDP_SECTOR_CONFIGURATION_COMMAND;
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| 266 |
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| 267 | #define SFDP_SECTOR_MAP_TABLE_ENTRY_TYPE_COMMAND 0
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| 268 | #define SFDP_SECTOR_MAP_TABLE_ENTRY_TYPE_MAP 1
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| 269 | #define SFDP_SECTOR_MAP_TABLE_ENTRY_LAST 1
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| 270 |
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| 271 | ///
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| 272 | /// Definition of Configuration detection command address length.
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| 273 | ///
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| 274 | typedef enum {
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| 275 | SpdfConfigurationCommandAddressNone = 0,
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| 276 | SpdfConfigurationCommandAddress3Byte = 1,
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| 277 | SpdfConfigurationCommandAddress4Byte = 2,
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| 278 | SpdfConfigurationCommandAddressVariable = 3
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| 279 | } SPDF_CONFIGURATION_COMMAND_ADDR_LENGTH;
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| 280 |
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| 281 | ///
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| 282 | /// Flash Device Configuration Map descriptor.
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| 283 | ///
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| 284 | typedef struct {
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| 285 | // DWORD 1
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| 286 | UINT32 DescriptorEnd : 1; ///< Descriptor Sequence End Indicator.
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| 287 | UINT32 DescriptorType : 1; ///< Descriptor Type.
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| 288 | UINT32 Reserve1 : 6; ///< Bit [7:2] is reserved.
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| 289 | UINT32 ConfigurationID : 8; ///< ID of this configuration.
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| 290 | UINT32 RegionCount : 8; ///< The region count of this configuration.
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| 291 | UINT32 Reserve2 : 8; ///< [31:24] is reserved.
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| 292 | } SFDP_SECTOR_CONFIGURATION_MAP;
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| 293 |
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| 294 | typedef struct {
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| 295 | UINT32 DescriptorEnd : 1; ///< Descriptor Sequence End Indicator.
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| 296 | UINT32 DescriptorType : 1; ///< Descriptor Type.
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| 297 | } SFDP_SECTOR_CONFIGURATION_GENERIC_HEADER;
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| 298 |
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| 299 | ///
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| 300 | /// Flash Device Region Definition.
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| 301 | ///
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| 302 | typedef struct _SFDP_SECTOR_REGION {
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| 303 | // DWORD 1
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| 304 | UINT32 EraseType1 : 1; ///< Earse type 1 is supported.
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| 305 | UINT32 EraseType2 : 1; ///< Earse type 2 is supported.
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| 306 | UINT32 EraseType3 : 1; ///< Earse type 3 is supported.
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| 307 | UINT32 EraseType4 : 1; ///< Earse type 4 is supported.
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| 308 | UINT32 Reserve1 : 4; ///< Bit [7:4] is reserved.
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| 309 | UINT32 RegionSize : 24; ///< Region size in 256 Byte unit.
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| 310 | } SFDP_SECTOR_REGION;
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| 311 | #define SFDP_SECTOR_REGION_SIZE_UNIT 256
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| 312 |
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| 313 | ///
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| 314 | /// Sector Map Table structure, the entry could be
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| 315 | /// either Configuration Detection Command descriptor,
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| 316 | /// or Configuration Map descriptor.
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| 317 | ///
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| 318 | typedef union _SFDP_SECTOR_MAP_TABLE {
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| 319 | SFDP_SECTOR_CONFIGURATION_GENERIC_HEADER GenericHeader;
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| 320 | SFDP_SECTOR_CONFIGURATION_COMMAND ConfigurationCommand; ///< Fash configuration detection command.
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| 321 | SFDP_SECTOR_CONFIGURATION_MAP ConfigurationMap; ///< Flash map descriptor.
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| 322 | } SFDP_SECTOR_MAP_TABLE;
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| 323 |
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| 324 | #endif // SPI_NOR_FLASH_JEDEC_H_
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