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source: vbox/trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S

Last change on this file was 108794, checked in by vboxsync, 8 weeks ago

Devices/EFI/FirmwareNew: Merge edk2-stable202502 from the vendor branch and make it build for the important platforms, bugref:4643

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1#------------------------------------------------------------------------------
2#
3# LoongArch ASM CSR operation functions
4#
5# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
6#
7# SPDX-License-Identifier: BSD-2-Clause-Patent
8#
9#------------------------------------------------------------------------------
10
11#include <Register/LoongArch64/Csr.h>
12
13ASM_GLOBAL ASM_PFX (AsmCsrRead)
14ASM_GLOBAL ASM_PFX (AsmCsrWrite)
15ASM_GLOBAL ASM_PFX (AsmCsrXChg)
16
17.macro AsmCsrRd Sel
18 csrrd $a0, \Sel
19 jirl $zero, $ra, 0
20.endm
21
22.macro AsmCsrWr Sel
23 csrwr $a0, \Sel
24 jirl $zero, $ra, 0
25.endm
26
27.macro AsmCsrXChange Sel
28 csrxchg $a0, $a1, \Sel
29 jirl $zero, $ra, 0
30.endm
31
32ASM_PFX(AsmCsrRead):
33 blt $a0, $zero, ReadSelNumErr
34 li.w $t0, LOONGARCH_CSR_EBASE
35 bltu $t0, $a0, TlbCsrRd
36
37BasicCsrRd:
38 la.pcrel $t0, BasicCsrRead
39 alsl.d $t0, $a0, $t0, 3
40 jirl $zero, $t0, 0
41
42TlbCsrRd:
43 li.w $t0, LOONGARCH_CSR_TLBIDX
44 bltu $a0, $t0, ReadSelNumErr
45 li.w $t0, LOONGARCH_CSR_RVACFG
46 bltu $t0, $a0, CfgCsrRd
47 la.pcrel $t0, TlbCsrRead
48 addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX
49 alsl.d $t0, $t1, $t0, 3
50 jirl $zero, $t0, 0
51
52CfgCsrRd:
53 li.w $t0, LOONGARCH_CSR_CPUID
54 bltu $a0, $t0, ReadSelNumErr
55 li.w $t0, LOONGARCH_CSR_PRCFG3
56 bltu $t0, $a0, KcsCsrRd
57 la.pcrel $t0, CfgCsrRead
58 addi.w $t1, $a0, -LOONGARCH_CSR_CPUID
59 alsl.d $t0, $t1, $t0, 3
60 jirl $zero, $t0, 0
61
62KcsCsrRd:
63 li.w $t0, LOONGARCH_CSR_KS0
64 bltu $a0, $t0, ReadSelNumErr
65 li.w $t0, LOONGARCH_CSR_KS8
66 bltu $t0, $a0, StableTimerCsrRd
67 la.pcrel $t0, KcsCsrRead
68 addi.w $t1, $a0, -LOONGARCH_CSR_KS0
69 alsl.d $t0, $t1, $t0, 3
70 jirl $zero, $t0, 0
71
72StableTimerCsrRd:
73 li.w $t0, LOONGARCH_CSR_TMID
74 bltu $a0, $t0, ReadSelNumErr
75 li.w $t0, LOONGARCH_CSR_TINTCLR
76 bltu $t0, $a0, TlbRefillCsrRd
77 la.pcrel $t0, StableTimerCsrRead
78 addi.w $t1, $a0, -LOONGARCH_CSR_TMID
79 alsl.d $t0, $t1, $t0, 3
80 jirl $zero, $t0, 0
81
82TlbRefillCsrRd:
83 li.w $t0, LOONGARCH_CSR_TLBREBASE
84 bltu $a0, $t0, ReadSelNumErr
85 li.w $t0, LOONGARCH_CSR_TLBREHI
86 bltu $t0, $a0, DirMapCsrRd
87 la.pcrel $t0, TlbRefillCsrRead
88 addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE
89 alsl.d $t0, $t1, $t0, 3
90 jirl $zero, $t0, 0
91
92DirMapCsrRd:
93 li.w $t0, LOONGARCH_CSR_DMWIN0
94 bltu $a0, $t0, ReadSelNumErr
95 li.w $t0, LOONGARCH_CSR_DMWIN3
96 bltu $t0, $a0, ReadSelNumErr
97 la.pcrel $t0, DirMapCsrRead
98 addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0
99 alsl.d $t0, $t1, $t0, 3
100 jirl $zero, $t0, 0
101
102ReadSelNumErr:
103 break 0
104
105BasicCsrRead:
106 CsrSel = LOONGARCH_CSR_CRMD
107 .rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1
108 AsmCsrRd CsrSel
109 CsrSel = CsrSel + 1
110 .endr
111
112TlbCsrRead:
113 CsrSel = LOONGARCH_CSR_TLBIDX
114 .rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1
115 AsmCsrRd CsrSel
116 CsrSel = CsrSel + 1
117 .endr
118
119CfgCsrRead:
120 CsrSel = LOONGARCH_CSR_CPUID
121 .rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUID + 1
122 AsmCsrRd CsrSel
123 CsrSel = CsrSel + 1
124 .endr
125
126KcsCsrRead:
127 CsrSel = LOONGARCH_CSR_KS0
128 .rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1
129 AsmCsrRd CsrSel
130 CsrSel = CsrSel + 1
131 .endr
132
133StableTimerCsrRead:
134 CsrSel = LOONGARCH_CSR_TMID
135 .rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1
136 AsmCsrRd CsrSel
137 CsrSel = CsrSel + 1
138 .endr
139
140TlbRefillCsrRead:
141 CsrSel = LOONGARCH_CSR_TLBREBASE
142 .rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1
143 AsmCsrRd CsrSel
144 CsrSel = CsrSel + 1
145 .endr
146
147DirMapCsrRead:
148 CsrSel = LOONGARCH_CSR_DMWIN0
149 .rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1
150 AsmCsrRd CsrSel
151 CsrSel = CsrSel + 1
152 .endr
153
154ASM_PFX(AsmCsrWrite):
155 blt $a0, $zero, WriteSelNumErr
156 li.w $t0, LOONGARCH_CSR_EBASE
157 bltu $t0, $a0, TlbCsrWr
158
159BasicCsrWr:
160 la.pcrel $t0, BasicCsrWrite
161 alsl.d $t0, $a0, $t0, 3
162 move $a0, $a1
163 jirl $zero, $t0, 0
164
165TlbCsrWr:
166 li.w $t0, LOONGARCH_CSR_TLBIDX
167 bltu $a0, $t0, WriteSelNumErr
168 li.w $t0, LOONGARCH_CSR_RVACFG
169 bltu $t0, $a0, CfgCsrWr
170 la.pcrel $t0, TlbCsrWrite
171 addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX
172 alsl.d $t0, $t1, $t0, 3
173 move $a0, $a1
174 jirl $zero, $t0, 0
175
176CfgCsrWr:
177 li.w $t0, LOONGARCH_CSR_CPUID
178 bltu $a0, $t0, WriteSelNumErr
179 li.w $t0, LOONGARCH_CSR_PRCFG3
180 bltu $t0, $a0, KcsCsrWr
181 la.pcrel $t0, CfgCsrWrite
182 addi.w $t1, $a0, -LOONGARCH_CSR_CPUID
183 alsl.d $t0, $t1, $t0, 3
184 move $a0, $a1
185 jirl $zero, $t0, 0
186
187KcsCsrWr:
188 li.w $t0, LOONGARCH_CSR_KS0
189 bltu $a0, $t0, WriteSelNumErr
190 li.w $t0, LOONGARCH_CSR_KS8
191 bltu $t0, $a0, StableTimerCsrWr
192 la.pcrel $t0, KcsCsrWrite
193 addi.w $t1, $a0, -LOONGARCH_CSR_KS0
194 alsl.d $t0, $t1, $t0, 3
195 move $a0, $a1
196 jirl $zero, $t0, 0
197
198StableTimerCsrWr:
199 li.w $t0, LOONGARCH_CSR_TMID
200 bltu $a0, $t0, WriteSelNumErr
201 li.w $t0, LOONGARCH_CSR_TINTCLR
202 bltu $t0, $a0, TlbRefillCsrWr
203 la.pcrel $t0, StableTimerCsrWrite
204 addi.w $t1, $a0, -LOONGARCH_CSR_TMID
205 alsl.d $t0, $t1, $t0, 3
206 move $a0, $a1
207 jirl $zero, $t0, 0
208
209TlbRefillCsrWr:
210 li.w $t0, LOONGARCH_CSR_TLBREBASE
211 bltu $a0, $t0, WriteSelNumErr
212 li.w $t0, LOONGARCH_CSR_TLBREHI
213 bltu $t0, $a0, DirMapCsrWr
214 la.pcrel $t0, TlbRefillCsrWrite
215 addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE
216 alsl.d $t0, $t1, $t0, 3
217 move $a0, $a1
218 jirl $zero, $t0, 0
219
220DirMapCsrWr:
221 li.w $t0, LOONGARCH_CSR_DMWIN0
222 bltu $a0, $t0, WriteSelNumErr
223 li.w $t0, LOONGARCH_CSR_DMWIN3
224 bltu $t0, $a0, WriteSelNumErr
225 la.pcrel $t0, DirMapCsrWrite
226 addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0
227 alsl.d $t0, $t1, $t0, 3
228 move $a0, $a1
229 jirl $zero, $t0, 0
230
231WriteSelNumErr:
232 break 0
233
234BasicCsrWrite:
235 CsrSel = LOONGARCH_CSR_CRMD
236 .rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1
237 AsmCsrWr CsrSel
238 CsrSel = CsrSel + 1
239 .endr
240
241TlbCsrWrite:
242 CsrSel = LOONGARCH_CSR_TLBIDX
243 .rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1
244 AsmCsrWr CsrSel
245 CsrSel = CsrSel + 1
246 .endr
247
248CfgCsrWrite:
249 CsrSel = LOONGARCH_CSR_CPUID
250 .rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUID + 1
251 AsmCsrWr CsrSel
252 CsrSel = CsrSel + 1
253 .endr
254
255KcsCsrWrite:
256 CsrSel = LOONGARCH_CSR_KS0
257 .rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1
258 AsmCsrWr CsrSel
259 CsrSel = CsrSel + 1
260 .endr
261
262StableTimerCsrWrite:
263 CsrSel = LOONGARCH_CSR_TMID
264 .rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1
265 AsmCsrWr CsrSel
266 CsrSel = CsrSel + 1
267 .endr
268
269TlbRefillCsrWrite:
270 CsrSel = LOONGARCH_CSR_TLBREBASE
271 .rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1
272 AsmCsrWr CsrSel
273 CsrSel = CsrSel + 1
274 .endr
275
276DirMapCsrWrite:
277 CsrSel = LOONGARCH_CSR_DMWIN0
278 .rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1
279 AsmCsrWr CsrSel
280 CsrSel = CsrSel + 1
281 .endr
282
283
284ASM_PFX(AsmCsrXChg):
285 blt $a0, $zero, XchgSelNumErr
286 li.w $t0, LOONGARCH_CSR_EBASE
287 bltu $t0, $a0, TlbCsrXchg
288
289BasicCsrXchg:
290 la.pcrel $t0, BasicCsrXchange
291 alsl.d $t0, $a0, $t0, 3
292 move $a0, $a1
293 move $a1, $a2
294 jirl $zero, $t0, 0
295
296TlbCsrXchg:
297 li.w $t0, LOONGARCH_CSR_TLBIDX
298 bltu $a0, $t0, XchgSelNumErr
299 li.w $t0, LOONGARCH_CSR_RVACFG
300 bltu $t0, $a0, CfgCsrXchg
301 la.pcrel $t0, TlbCsrXchange
302 addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX
303 alsl.d $t0, $t1, $t0, 3
304 move $a0, $a1
305 move $a1, $a2
306 jirl $zero, $t0, 0
307
308CfgCsrXchg:
309 li.w $t0, LOONGARCH_CSR_CPUID
310 bltu $a0, $t0, XchgSelNumErr
311 li.w $t0, LOONGARCH_CSR_PRCFG3
312 bltu $t0, $a0, KcsCsrXchg
313 la.pcrel $t0, CfgCsrXchange
314 addi.w $t1, $a0, -LOONGARCH_CSR_CPUID
315 alsl.d $t0, $t1, $t0, 3
316 move $a0, $a1
317 move $a1, $a2
318 jirl $zero, $t0, 0
319
320KcsCsrXchg:
321 li.w $t0, LOONGARCH_CSR_KS0
322 bltu $a0, $t0, XchgSelNumErr
323 li.w $t0, LOONGARCH_CSR_KS8
324 bltu $t0, $a0, StableTimerCsrXchg
325 la.pcrel $t0, KcsCsrXchange
326 addi.w $t1, $a0, -LOONGARCH_CSR_KS0
327 alsl.d $t0, $t1, $t0, 3
328 move $a0, $a1
329 move $a1, $a2
330 jirl $zero, $t0, 0
331
332StableTimerCsrXchg:
333 li.w $t0, LOONGARCH_CSR_TMID
334 bltu $a0, $t0, XchgSelNumErr
335 li.w $t0, LOONGARCH_CSR_TINTCLR
336 bltu $t0, $a0, TlbRefillCsrXchg
337 la.pcrel $t0, StableTimerCsrXchange
338 addi.w $t1, $a0, -LOONGARCH_CSR_TMID
339 alsl.d $t0, $t1, $t0, 3
340 move $a0, $a1
341 move $a1, $a2
342 jirl $zero, $t0, 0
343
344TlbRefillCsrXchg:
345 li.w $t0, LOONGARCH_CSR_TLBREBASE
346 bltu $a0, $t0, XchgSelNumErr
347 li.w $t0, LOONGARCH_CSR_TLBREHI
348 bltu $t0, $a0, DirMapCsrXchg
349 la.pcrel $t0, TlbRefillCsrXchange
350 addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE
351 alsl.d $t0, $t1, $t0, 3
352 move $a0, $a1
353 move $a1, $a2
354 jirl $zero, $t0, 0
355
356DirMapCsrXchg:
357 li.w $t0, LOONGARCH_CSR_DMWIN0
358 bltu $a0, $t0, XchgSelNumErr
359 li.w $t0, LOONGARCH_CSR_DMWIN3
360 bltu $t0, $a0, XchgSelNumErr
361 la.pcrel $t0, DirMapCsrXchange
362 addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0
363 alsl.d $t0, $t1, $t0, 3
364 move $a0, $a1
365 move $a1, $a2
366 jirl $zero, $t0, 0
367
368XchgSelNumErr:
369 break 0
370
371BasicCsrXchange:
372 CsrSel = LOONGARCH_CSR_CRMD
373 .rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1
374 AsmCsrXChange CsrSel
375 CsrSel = CsrSel + 1
376 .endr
377
378TlbCsrXchange:
379 CsrSel = LOONGARCH_CSR_TLBIDX
380 .rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1
381 AsmCsrXChange CsrSel
382 CsrSel = CsrSel + 1
383 .endr
384
385CfgCsrXchange:
386 CsrSel = LOONGARCH_CSR_CPUID
387 .rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUID + 1
388 AsmCsrXChange CsrSel
389 CsrSel = CsrSel + 1
390 .endr
391
392KcsCsrXchange:
393 CsrSel = LOONGARCH_CSR_KS0
394 .rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1
395 AsmCsrXChange CsrSel
396 CsrSel = CsrSel + 1
397 .endr
398
399StableTimerCsrXchange:
400 CsrSel = LOONGARCH_CSR_TMID
401 .rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1
402 AsmCsrXChange CsrSel
403 CsrSel = CsrSel + 1
404 .endr
405
406TlbRefillCsrXchange:
407 CsrSel = LOONGARCH_CSR_TLBREBASE
408 .rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1
409 AsmCsrXChange CsrSel
410 CsrSel = CsrSel + 1
411 .endr
412
413DirMapCsrXchange:
414 CsrSel = LOONGARCH_CSR_DMWIN0
415 .rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1
416 AsmCsrXChange CsrSel
417 CsrSel = CsrSel + 1
418 .endr
419.end
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