1 | /** @file
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2 | PEI Services Table Pointer Library for IA-32 and x64.
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3 |
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4 | According to PI specification, the peiservice pointer is stored prior at IDT
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5 | table in IA32 and x64 architecture.
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6 |
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7 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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8 | SPDX-License-Identifier: BSD-2-Clause-Patent
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9 |
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10 | **/
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11 |
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12 | #include <PiPei.h>
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13 |
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14 | #include <Library/BaseLib.h>
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15 | #include <Library/PeiServicesTablePointerLib.h>
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16 | #include <Library/DebugLib.h>
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17 | #include <Library/BaseMemoryLib.h>
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18 |
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19 | /**
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20 | Retrieves the cached value of the PEI Services Table pointer.
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21 |
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22 | Returns the cached value of the PEI Services Table pointer in a CPU specific manner
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23 | as specified in the CPU binding section of the Platform Initialization Pre-EFI
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24 | Initialization Core Interface Specification.
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25 |
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26 | If the cached PEI Services Table pointer is NULL, then ASSERT().
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27 |
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28 | @return The pointer to PeiServices.
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29 |
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30 | **/
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31 | CONST EFI_PEI_SERVICES **
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32 | EFIAPI
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33 | GetPeiServicesTablePointer (
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34 | VOID
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35 | )
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36 | {
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37 | CONST EFI_PEI_SERVICES **PeiServices;
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38 | IA32_DESCRIPTOR Idtr;
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39 |
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40 | AsmReadIdtr (&Idtr);
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41 | PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));
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42 | ASSERT (PeiServices != NULL);
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43 | return PeiServices;
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44 | }
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45 |
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46 | /**
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47 | Caches a pointer PEI Services Table.
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48 |
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49 | Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
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50 | in a CPU specific manner as specified in the CPU binding section of the Platform Initialization
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51 | Pre-EFI Initialization Core Interface Specification.
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52 | The function set the pointer of PEI services immediately preceding the IDT table
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53 | according to PI specification.
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54 |
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55 | If PeiServicesTablePointer is NULL, then ASSERT().
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56 |
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57 | @param PeiServicesTablePointer The address of PeiServices pointer.
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58 | **/
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59 | VOID
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60 | EFIAPI
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61 | SetPeiServicesTablePointer (
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62 | IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
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63 | )
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64 | {
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65 | IA32_DESCRIPTOR Idtr;
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66 |
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67 | ASSERT (PeiServicesTablePointer != NULL);
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68 | AsmReadIdtr (&Idtr);
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69 | (*(UINTN*)(Idtr.Base - sizeof (UINTN))) = (UINTN)PeiServicesTablePointer;
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70 | }
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71 |
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72 | /**
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73 | Perform CPU specific actions required to migrate the PEI Services Table
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74 | pointer from temporary RAM to permanent RAM.
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75 |
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76 | For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
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77 | immediately preceding the Interrupt Descriptor Table (IDT) in memory.
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78 | For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
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79 | immediately preceding the Interrupt Descriptor Table (IDT) in memory.
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80 | For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
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81 | a dedicated CPU register. This means that there is no memory storage
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82 | associated with storing the PEI Services Table pointer, so no additional
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83 | migration actions are required for Itanium or ARM CPUs.
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84 |
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85 | If The cached PEI Services Table pointer is NULL, then ASSERT().
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86 | If the permanent memory is allocated failed, then ASSERT().
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87 | **/
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88 | VOID
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89 | EFIAPI
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90 | MigratePeiServicesTablePointer (
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91 | VOID
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92 | )
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93 | {
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94 | EFI_STATUS Status;
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95 | IA32_DESCRIPTOR Idtr;
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96 | EFI_PHYSICAL_ADDRESS IdtBase;
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97 | CONST EFI_PEI_SERVICES **PeiServices;
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98 |
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99 | //
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100 | // Get PEI Services Table pointer
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101 | //
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102 | AsmReadIdtr (&Idtr);
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103 | PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));
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104 | ASSERT (PeiServices != NULL);
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105 | //
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106 | // Allocate the permanent memory.
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107 | //
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108 | Status = (*PeiServices)->AllocatePages (
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109 | PeiServices,
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110 | EfiBootServicesCode,
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111 | EFI_SIZE_TO_PAGES(Idtr.Limit + 1 + sizeof (UINTN)),
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112 | &IdtBase
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113 | );
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114 | ASSERT_EFI_ERROR (Status);
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115 | //
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116 | // Idt table needs to be migrated into memory.
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117 | //
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118 | CopyMem ((VOID *) (UINTN) IdtBase, (VOID *) (Idtr.Base - sizeof (UINTN)), Idtr.Limit + 1 + sizeof (UINTN));
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119 | Idtr.Base = (UINTN) IdtBase + sizeof (UINTN);
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120 | AsmWriteIdtr (&Idtr);
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121 |
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122 | return;
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123 | }
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124 |
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125 |
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