1 | /**@file
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2 | Memory Detection for Virtual Machines.
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3 |
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4 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
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5 | This program and the accompanying materials
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6 | are licensed and made available under the terms and conditions of the BSD License
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7 | which accompanies this distribution. The full text of the license may be found at
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8 | http://opensource.org/licenses/bsd-license.php
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9 |
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10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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12 |
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13 | Module Name:
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14 |
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15 | MemDetect.c
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16 |
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17 | **/
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18 |
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19 | //
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20 | // The package level header files this module uses
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21 | //
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22 | #include <PiPei.h>
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23 |
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24 | //
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25 | // The Library classes this module consumes
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26 | //
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27 | #include <Library/BaseMemoryLib.h>
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28 | #include <Library/DebugLib.h>
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29 | #include <Library/HobLib.h>
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30 | #include <Library/IoLib.h>
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31 | #include <Library/PcdLib.h>
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32 | #include <Library/PeimEntryPoint.h>
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33 | #include <Library/ResourcePublicationLib.h>
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34 | #include <Library/MtrrLib.h>
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35 |
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36 | #include "Platform.h"
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37 | #include "Cmos.h"
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38 |
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39 | UINT32
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40 | GetSystemMemorySizeBelow4gb (
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41 | VOID
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42 | )
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43 | {
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44 | UINT8 Cmos0x34;
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45 | UINT8 Cmos0x35;
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46 |
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47 | //
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48 | // CMOS 0x34/0x35 specifies the system memory above 16 MB.
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49 | // * CMOS(0x35) is the high byte
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50 | // * CMOS(0x34) is the low byte
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51 | // * The size is specified in 64kb chunks
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52 | // * Since this is memory above 16MB, the 16MB must be added
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53 | // into the calculation to get the total memory size.
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54 | //
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55 |
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56 | Cmos0x34 = (UINT8) CmosRead8 (0x34);
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57 | Cmos0x35 = (UINT8) CmosRead8 (0x35);
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58 |
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59 | return (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
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60 | }
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61 |
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62 |
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63 | STATIC
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64 | UINT64
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65 | GetSystemMemorySizeAbove4gb (
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66 | )
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67 | {
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68 | UINT32 Size;
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69 | UINTN CmosIndex;
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70 |
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71 | //
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72 | // CMOS 0x5b-0x5d specifies the system memory above 4GB MB.
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73 | // * CMOS(0x5d) is the most significant size byte
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74 | // * CMOS(0x5c) is the middle size byte
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75 | // * CMOS(0x5b) is the least significant size byte
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76 | // * The size is specified in 64kb chunks
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77 | //
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78 |
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79 | Size = 0;
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80 | for (CmosIndex = 0x5d; CmosIndex >= 0x5b; CmosIndex--) {
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81 | Size = (UINT32) (Size << 8) + (UINT32) CmosRead8 (CmosIndex);
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82 | }
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83 |
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84 | return LShiftU64 (Size, 16);
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85 | }
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86 |
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87 | /**
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88 | Publish PEI core memory
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89 |
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90 | @return EFI_SUCCESS The PEIM initialized successfully.
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91 |
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92 | **/
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93 | EFI_STATUS
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94 | PublishPeiMemory (
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95 | VOID
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96 | )
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97 | {
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98 | EFI_STATUS Status;
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99 | EFI_PHYSICAL_ADDRESS MemoryBase;
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100 | UINT64 MemorySize;
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101 | UINT64 LowerMemorySize;
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102 |
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103 | if (mBootMode == BOOT_ON_S3_RESUME) {
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104 | MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase);
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105 | MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);
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106 | } else {
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107 | LowerMemorySize = GetSystemMemorySizeBelow4gb ();
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108 |
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109 | //
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110 | // Determine the range of memory to use during PEI
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111 | //
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112 | MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);
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113 | MemorySize = LowerMemorySize - MemoryBase;
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114 | if (MemorySize > SIZE_64MB) {
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115 | MemoryBase = LowerMemorySize - SIZE_64MB;
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116 | MemorySize = SIZE_64MB;
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117 | }
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118 | }
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119 | #ifdef VBOX
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120 | MemorySize -= BASE_64KB; /* Reserves 64KB for ACPI tables. */
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121 | #endif
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122 |
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123 | //
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124 | // Publish this memory to the PEI Core
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125 | //
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126 | Status = PublishSystemMemory(MemoryBase, MemorySize);
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127 | ASSERT_EFI_ERROR (Status);
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128 |
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129 | return Status;
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130 | }
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131 |
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132 |
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133 | #ifndef VBOX
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134 | /**
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135 | Peform Memory Detection for QEMU / KVM
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136 |
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137 | **/
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138 | STATIC
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139 | VOID
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140 | QemuInitializeRam (
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141 | VOID
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142 | )
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143 | {
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144 | UINT64 LowerMemorySize;
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145 | UINT64 UpperMemorySize;
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146 |
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147 | DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));
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148 |
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149 | //
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150 | // Determine total memory size available
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151 | //
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152 | LowerMemorySize = GetSystemMemorySizeBelow4gb ();
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153 | UpperMemorySize = GetSystemMemorySizeAbove4gb ();
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154 |
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155 | if (mBootMode != BOOT_ON_S3_RESUME) {
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156 | //
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157 | // Create memory HOBs
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158 | //
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159 | AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
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160 | AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
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161 | }
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162 |
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163 | MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack);
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164 |
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165 | MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);
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166 |
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167 | if (UpperMemorySize != 0) {
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168 | if (mBootMode != BOOT_ON_S3_RESUME) {
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169 | AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
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170 | }
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171 |
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172 | MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);
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173 | }
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174 | }
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175 | #else
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176 | VOID
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177 | VBoxInitializeRam (
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178 | VOID
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179 | )
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180 | {
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181 | UINT64 LowerMemorySize;
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182 | UINT64 UpperMemorySize;
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183 | EFI_PHYSICAL_ADDRESS MemoryBase;
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184 | UINT64 MemorySize;
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185 |
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186 | DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));
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187 |
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188 | //
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189 | // Determine total memory size available
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190 | //
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191 | LowerMemorySize = GetSystemMemorySizeBelow4gb ();
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192 | UpperMemorySize = GetSystemMemorySizeAbove4gb ();
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193 |
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194 | if (mBootMode == BOOT_ON_S3_RESUME) {
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195 | MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase);
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196 | MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);
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197 | } else {
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198 | LowerMemorySize = GetSystemMemorySizeBelow4gb ();
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199 |
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200 | //
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201 | // Determine the range of memory to use during PEI
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202 | //
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203 | MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);
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204 | MemorySize = LowerMemorySize - MemoryBase;
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205 | if (MemorySize > SIZE_64MB) {
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206 | MemoryBase = LowerMemorySize - SIZE_64MB;
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207 | MemorySize = SIZE_64MB;
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208 | }
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209 | }
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210 | MemorySize -= BASE_64KB; /* Reserves 64KB for ACPI tables. */
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211 |
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212 | //
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213 | // Create memory HOBs
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214 | //
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215 | AddMemoryBaseSizeHob (MemoryBase, MemorySize);
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216 | AddMemoryRangeHob (BASE_1MB, MemoryBase);
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217 | MtrrSetMemoryAttribute (BASE_1MB, MemoryBase + MemorySize - BASE_1MB, CacheWriteBack);
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218 | AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
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219 | MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);
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220 |
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221 | if (UpperMemorySize != 0) {
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222 | AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
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223 |
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224 | MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);
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225 | }
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226 | }
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227 | #endif
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228 |
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229 | /**
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230 | Publish system RAM and reserve memory regions
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231 |
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232 | **/
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233 | VOID
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234 | InitializeRamRegions (
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235 | VOID
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236 | )
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237 | {
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238 | #ifndef VBOX
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239 | if (!mXen) {
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240 | QemuInitializeRam ();
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241 | } else {
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242 | XenPublishRamRegions ();
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243 | }
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244 | #else
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245 | VBoxInitializeRam();
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246 | #endif
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247 |
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248 | if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {
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249 | //
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250 | // This is the memory range that will be used for PEI on S3 resume
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251 | //
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252 | BuildMemoryAllocationHob (
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253 | (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase),
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254 | (UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize),
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255 | EfiACPIMemoryNVS
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256 | );
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257 |
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258 | //
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259 | // Cover the initial RAM area used as stack and temporary PEI heap.
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260 | //
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261 | // This is reserved as ACPI NVS so it can be used on S3 resume.
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262 | //
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263 | BuildMemoryAllocationHob (
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264 | PcdGet32 (PcdOvmfSecPeiTempRamBase),
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265 | PcdGet32 (PcdOvmfSecPeiTempRamSize),
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266 | EfiACPIMemoryNVS
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267 | );
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268 |
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269 | //
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270 | // SEC stores its table of GUIDed section handlers here.
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271 | //
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272 | BuildMemoryAllocationHob (
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273 | PcdGet64 (PcdGuidedExtractHandlerTableAddress),
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274 | PcdGet32 (PcdGuidedExtractHandlerTableSize),
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275 | EfiACPIMemoryNVS
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276 | );
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277 |
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278 | #ifdef MDE_CPU_X64
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279 | //
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280 | // Reserve the initial page tables built by the reset vector code.
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281 | //
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282 | // Since this memory range will be used by the Reset Vector on S3
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283 | // resume, it must be reserved as ACPI NVS.
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284 | //
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285 | BuildMemoryAllocationHob (
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286 | (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase),
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287 | (UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),
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288 | EfiACPIMemoryNVS
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289 | );
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290 | #endif
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291 | }
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292 |
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293 | if (mBootMode != BOOT_ON_S3_RESUME) {
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294 | //
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295 | // Reserve the lock box storage area
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296 | //
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297 | // Since this memory range will be used on S3 resume, it must be
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298 | // reserved as ACPI NVS.
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299 | //
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300 | // If S3 is unsupported, then various drivers might still write to the
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301 | // LockBox area. We ought to prevent DXE from serving allocation requests
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302 | // such that they would overlap the LockBox storage.
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303 | //
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304 | ZeroMem (
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305 | (VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
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306 | (UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize)
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307 | );
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308 | BuildMemoryAllocationHob (
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309 | (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),
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310 | (UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize),
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311 | mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData
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312 | );
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313 | }
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314 | }
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