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source: vbox/trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c@ 81966

Last change on this file since 81966 was 80721, checked in by vboxsync, 6 years ago

Devices/EFI/FirmwareNew: Start upgrade process to edk2-stable201908 (compiles on Windows and works to some extent), bugref:4643
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1/** @file
2SMM MP service implementation
3
4Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
5Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7SPDX-License-Identifier: BSD-2-Clause-Patent
8
9**/
10
11#include "PiSmmCpuDxeSmm.h"
12
13//
14// Slots for all MTRR( FIXED MTRR + VARIABLE MTRR + MTRR_LIB_IA32_MTRR_DEF_TYPE)
15//
16MTRR_SETTINGS gSmiMtrrs;
17UINT64 gPhyMask;
18SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData = NULL;
19UINTN mSmmMpSyncDataSize;
20SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
21UINTN mSemaphoreSize;
22SPIN_LOCK *mPFLock = NULL;
23SMM_CPU_SYNC_MODE mCpuSmmSyncMode;
24BOOLEAN mMachineCheckSupported = FALSE;
25
26/**
27 Performs an atomic compare exchange operation to get semaphore.
28 The compare exchange operation must be performed using
29 MP safe mechanisms.
30
31 @param Sem IN: 32-bit unsigned integer
32 OUT: original integer - 1
33 @return Original integer - 1
34
35**/
36UINT32
37WaitForSemaphore (
38 IN OUT volatile UINT32 *Sem
39 )
40{
41 UINT32 Value;
42
43 do {
44 Value = *Sem;
45 } while (Value == 0 ||
46 InterlockedCompareExchange32 (
47 (UINT32*)Sem,
48 Value,
49 Value - 1
50 ) != Value);
51 return Value - 1;
52}
53
54
55/**
56 Performs an atomic compare exchange operation to release semaphore.
57 The compare exchange operation must be performed using
58 MP safe mechanisms.
59
60 @param Sem IN: 32-bit unsigned integer
61 OUT: original integer + 1
62 @return Original integer + 1
63
64**/
65UINT32
66ReleaseSemaphore (
67 IN OUT volatile UINT32 *Sem
68 )
69{
70 UINT32 Value;
71
72 do {
73 Value = *Sem;
74 } while (Value + 1 != 0 &&
75 InterlockedCompareExchange32 (
76 (UINT32*)Sem,
77 Value,
78 Value + 1
79 ) != Value);
80 return Value + 1;
81}
82
83/**
84 Performs an atomic compare exchange operation to lock semaphore.
85 The compare exchange operation must be performed using
86 MP safe mechanisms.
87
88 @param Sem IN: 32-bit unsigned integer
89 OUT: -1
90 @return Original integer
91
92**/
93UINT32
94LockdownSemaphore (
95 IN OUT volatile UINT32 *Sem
96 )
97{
98 UINT32 Value;
99
100 do {
101 Value = *Sem;
102 } while (InterlockedCompareExchange32 (
103 (UINT32*)Sem,
104 Value, (UINT32)-1
105 ) != Value);
106 return Value;
107}
108
109/**
110 Wait all APs to performs an atomic compare exchange operation to release semaphore.
111
112 @param NumberOfAPs AP number
113
114**/
115VOID
116WaitForAllAPs (
117 IN UINTN NumberOfAPs
118 )
119{
120 UINTN BspIndex;
121
122 BspIndex = mSmmMpSyncData->BspIndex;
123 while (NumberOfAPs-- > 0) {
124 WaitForSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
125 }
126}
127
128/**
129 Performs an atomic compare exchange operation to release semaphore
130 for each AP.
131
132**/
133VOID
134ReleaseAllAPs (
135 VOID
136 )
137{
138 UINTN Index;
139
140 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
141 if (IsPresentAp (Index)) {
142 ReleaseSemaphore (mSmmMpSyncData->CpuData[Index].Run);
143 }
144 }
145}
146
147/**
148 Checks if all CPUs (with certain exceptions) have checked in for this SMI run
149
150 @param Exceptions CPU Arrival exception flags.
151
152 @retval TRUE if all CPUs the have checked in.
153 @retval FALSE if at least one Normal AP hasn't checked in.
154
155**/
156BOOLEAN
157AllCpusInSmmWithExceptions (
158 SMM_CPU_ARRIVAL_EXCEPTIONS Exceptions
159 )
160{
161 UINTN Index;
162 SMM_CPU_DATA_BLOCK *CpuData;
163 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
164
165 ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);
166
167 if (*mSmmMpSyncData->Counter == mNumberOfCpus) {
168 return TRUE;
169 }
170
171 CpuData = mSmmMpSyncData->CpuData;
172 ProcessorInfo = gSmmCpuPrivate->ProcessorInfo;
173 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
174 if (!(*(CpuData[Index].Present)) && ProcessorInfo[Index].ProcessorId != INVALID_APIC_ID) {
175 if (((Exceptions & ARRIVAL_EXCEPTION_DELAYED) != 0) && SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmDelayed) != 0) {
176 continue;
177 }
178 if (((Exceptions & ARRIVAL_EXCEPTION_BLOCKED) != 0) && SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmBlocked) != 0) {
179 continue;
180 }
181 if (((Exceptions & ARRIVAL_EXCEPTION_SMI_DISABLED) != 0) && SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmEnable) != 0) {
182 continue;
183 }
184 return FALSE;
185 }
186 }
187
188
189 return TRUE;
190}
191
192/**
193 Has OS enabled Lmce in the MSR_IA32_MCG_EXT_CTL
194
195 @retval TRUE Os enable lmce.
196 @retval FALSE Os not enable lmce.
197
198**/
199BOOLEAN
200IsLmceOsEnabled (
201 VOID
202 )
203{
204 MSR_IA32_MCG_CAP_REGISTER McgCap;
205 MSR_IA32_FEATURE_CONTROL_REGISTER FeatureCtrl;
206 MSR_IA32_MCG_EXT_CTL_REGISTER McgExtCtrl;
207
208 McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
209 if (McgCap.Bits.MCG_LMCE_P == 0) {
210 return FALSE;
211 }
212
213 FeatureCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);
214 if (FeatureCtrl.Bits.LmceOn == 0) {
215 return FALSE;
216 }
217
218 McgExtCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_EXT_CTL);
219 return (BOOLEAN) (McgExtCtrl.Bits.LMCE_EN == 1);
220}
221
222/**
223 Return if Local machine check exception signaled.
224
225 Indicates (when set) that a local machine check exception was generated. This indicates that the current machine-check event was
226 delivered to only the logical processor.
227
228 @retval TRUE LMCE was signaled.
229 @retval FALSE LMCE was not signaled.
230
231**/
232BOOLEAN
233IsLmceSignaled (
234 VOID
235 )
236{
237 MSR_IA32_MCG_STATUS_REGISTER McgStatus;
238
239 McgStatus.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_STATUS);
240 return (BOOLEAN) (McgStatus.Bits.LMCE_S == 1);
241}
242
243/**
244 Given timeout constraint, wait for all APs to arrive, and insure when this function returns, no AP will execute normal mode code before
245 entering SMM, except SMI disabled APs.
246
247**/
248VOID
249SmmWaitForApArrival (
250 VOID
251 )
252{
253 UINT64 Timer;
254 UINTN Index;
255 BOOLEAN LmceEn;
256 BOOLEAN LmceSignal;
257
258 ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);
259
260 LmceEn = FALSE;
261 LmceSignal = FALSE;
262 if (mMachineCheckSupported) {
263 LmceEn = IsLmceOsEnabled ();
264 LmceSignal = IsLmceSignaled();
265 }
266
267 //
268 // Platform implementor should choose a timeout value appropriately:
269 // - The timeout value should balance the SMM time constrains and the likelihood that delayed CPUs are excluded in the SMM run. Note
270 // the SMI Handlers must ALWAYS take into account the cases that not all APs are available in an SMI run.
271 // - The timeout value must, in the case of 2nd timeout, be at least long enough to give time for all APs to receive the SMI IPI
272 // and either enter SMM or buffer the SMI, to insure there is no CPU running normal mode code when SMI handling starts. This will
273 // be TRUE even if a blocked CPU is brought out of the blocked state by a normal mode CPU (before the normal mode CPU received the
274 // SMI IPI), because with a buffered SMI, and CPU will enter SMM immediately after it is brought out of the blocked state.
275 // - The timeout value must be longer than longest possible IO operation in the system
276 //
277
278 //
279 // Sync with APs 1st timeout
280 //
281 for (Timer = StartSyncTimer ();
282 !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal) &&
283 !AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED );
284 ) {
285 CpuPause ();
286 }
287
288 //
289 // Not all APs have arrived, so we need 2nd round of timeout. IPIs should be sent to ALL none present APs,
290 // because:
291 // a) Delayed AP may have just come out of the delayed state. Blocked AP may have just been brought out of blocked state by some AP running
292 // normal mode code. These APs need to be guaranteed to have an SMI pending to insure that once they are out of delayed / blocked state, they
293 // enter SMI immediately without executing instructions in normal mode. Note traditional flow requires there are no APs doing normal mode
294 // work while SMI handling is on-going.
295 // b) As a consequence of SMI IPI sending, (spurious) SMI may occur after this SMM run.
296 // c) ** NOTE **: Use SMI disabling feature VERY CAREFULLY (if at all) for traditional flow, because a processor in SMI-disabled state
297 // will execute normal mode code, which breaks the traditional SMI handlers' assumption that no APs are doing normal
298 // mode work while SMI handling is on-going.
299 // d) We don't add code to check SMI disabling status to skip sending IPI to SMI disabled APs, because:
300 // - In traditional flow, SMI disabling is discouraged.
301 // - In relaxed flow, CheckApArrival() will check SMI disabling status before calling this function.
302 // In both cases, adding SMI-disabling checking code increases overhead.
303 //
304 if (*mSmmMpSyncData->Counter < mNumberOfCpus) {
305 //
306 // Send SMI IPIs to bring outside processors in
307 //
308 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
309 if (!(*(mSmmMpSyncData->CpuData[Index].Present)) && gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId != INVALID_APIC_ID) {
310 SendSmiIpi ((UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId);
311 }
312 }
313
314 //
315 // Sync with APs 2nd timeout.
316 //
317 for (Timer = StartSyncTimer ();
318 !IsSyncTimerTimeout (Timer) &&
319 !AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED );
320 ) {
321 CpuPause ();
322 }
323 }
324
325 return;
326}
327
328
329/**
330 Replace OS MTRR's with SMI MTRR's.
331
332 @param CpuIndex Processor Index
333
334**/
335VOID
336ReplaceOSMtrrs (
337 IN UINTN CpuIndex
338 )
339{
340 SmmCpuFeaturesDisableSmrr ();
341
342 //
343 // Replace all MTRRs registers
344 //
345 MtrrSetAllMtrrs (&gSmiMtrrs);
346}
347
348/**
349 Wheck whether task has been finished by all APs.
350
351 @param BlockMode Whether did it in block mode or non-block mode.
352
353 @retval TRUE Task has been finished by all APs.
354 @retval FALSE Task not has been finished by all APs.
355
356**/
357BOOLEAN
358WaitForAllAPsNotBusy (
359 IN BOOLEAN BlockMode
360 )
361{
362 UINTN Index;
363
364 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
365 //
366 // Ignore BSP and APs which not call in SMM.
367 //
368 if (!IsPresentAp(Index)) {
369 continue;
370 }
371
372 if (BlockMode) {
373 AcquireSpinLock(mSmmMpSyncData->CpuData[Index].Busy);
374 ReleaseSpinLock(mSmmMpSyncData->CpuData[Index].Busy);
375 } else {
376 if (AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[Index].Busy)) {
377 ReleaseSpinLock(mSmmMpSyncData->CpuData[Index].Busy);
378 } else {
379 return FALSE;
380 }
381 }
382 }
383
384 return TRUE;
385}
386
387/**
388 Check whether it is an present AP.
389
390 @param CpuIndex The AP index which calls this function.
391
392 @retval TRUE It's a present AP.
393 @retval TRUE This is not an AP or it is not present.
394
395**/
396BOOLEAN
397IsPresentAp (
398 IN UINTN CpuIndex
399 )
400{
401 return ((CpuIndex != gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) &&
402 *(mSmmMpSyncData->CpuData[CpuIndex].Present));
403}
404
405/**
406 Check whether execute in single AP or all APs.
407
408 Compare two Tokens used by different APs to know whether in StartAllAps call.
409
410 Whether is an valid AP base on AP's Present flag.
411
412 @retval TRUE IN StartAllAps call.
413 @retval FALSE Not in StartAllAps call.
414
415**/
416BOOLEAN
417InStartAllApsCall (
418 VOID
419 )
420{
421 UINTN ApIndex;
422 UINTN ApIndex2;
423
424 for (ApIndex = mMaxNumberOfCpus; ApIndex-- > 0;) {
425 if (IsPresentAp (ApIndex) && (mSmmMpSyncData->CpuData[ApIndex].Token != NULL)) {
426 for (ApIndex2 = ApIndex; ApIndex2-- > 0;) {
427 if (IsPresentAp (ApIndex2) && (mSmmMpSyncData->CpuData[ApIndex2].Token != NULL)) {
428 return mSmmMpSyncData->CpuData[ApIndex2].Token == mSmmMpSyncData->CpuData[ApIndex].Token;
429 }
430 }
431 }
432 }
433
434 return FALSE;
435}
436
437/**
438 Clean up the status flags used during executing the procedure.
439
440 @param CpuIndex The AP index which calls this function.
441
442**/
443VOID
444ReleaseToken (
445 IN UINTN CpuIndex
446 )
447{
448 UINTN Index;
449 BOOLEAN Released;
450
451 if (InStartAllApsCall ()) {
452 //
453 // In Start All APs mode, make sure all APs have finished task.
454 //
455 if (WaitForAllAPsNotBusy (FALSE)) {
456 //
457 // Clean the flags update in the function call.
458 //
459 Released = FALSE;
460 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
461 //
462 // Only In SMM APs need to be clean up.
463 //
464 if (mSmmMpSyncData->CpuData[Index].Present && mSmmMpSyncData->CpuData[Index].Token != NULL) {
465 if (!Released) {
466 ReleaseSpinLock (mSmmMpSyncData->CpuData[Index].Token);
467 Released = TRUE;
468 }
469 mSmmMpSyncData->CpuData[Index].Token = NULL;
470 }
471 }
472 }
473 } else {
474 //
475 // In single AP mode.
476 //
477 if (mSmmMpSyncData->CpuData[CpuIndex].Token != NULL) {
478 ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Token);
479 mSmmMpSyncData->CpuData[CpuIndex].Token = NULL;
480 }
481 }
482}
483
484/**
485 Free the tokens in the maintained list.
486
487**/
488VOID
489FreeTokens (
490 VOID
491 )
492{
493 LIST_ENTRY *Link;
494 PROCEDURE_TOKEN *ProcToken;
495
496 while (!IsListEmpty (&gSmmCpuPrivate->TokenList)) {
497 Link = GetFirstNode (&gSmmCpuPrivate->TokenList);
498 ProcToken = PROCEDURE_TOKEN_FROM_LINK (Link);
499
500 RemoveEntryList (&ProcToken->Link);
501
502 FreePool ((VOID *)ProcToken->ProcedureToken);
503 FreePool (ProcToken);
504 }
505}
506
507/**
508 SMI handler for BSP.
509
510 @param CpuIndex BSP processor Index
511 @param SyncMode SMM MP sync mode
512
513**/
514VOID
515BSPHandler (
516 IN UINTN CpuIndex,
517 IN SMM_CPU_SYNC_MODE SyncMode
518 )
519{
520 UINTN Index;
521 MTRR_SETTINGS Mtrrs;
522 UINTN ApCount;
523 BOOLEAN ClearTopLevelSmiResult;
524 UINTN PresentCount;
525
526 ASSERT (CpuIndex == mSmmMpSyncData->BspIndex);
527 ApCount = 0;
528
529 //
530 // Flag BSP's presence
531 //
532 *mSmmMpSyncData->InsideSmm = TRUE;
533
534 //
535 // Initialize Debug Agent to start source level debug in BSP handler
536 //
537 InitializeDebugAgent (DEBUG_AGENT_INIT_ENTER_SMI, NULL, NULL);
538
539 //
540 // Mark this processor's presence
541 //
542 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = TRUE;
543
544 //
545 // Clear platform top level SMI status bit before calling SMI handlers. If
546 // we cleared it after SMI handlers are run, we would miss the SMI that
547 // occurs after SMI handlers are done and before SMI status bit is cleared.
548 //
549 ClearTopLevelSmiResult = ClearTopLevelSmiStatus();
550 ASSERT (ClearTopLevelSmiResult == TRUE);
551
552 //
553 // Set running processor index
554 //
555 gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu = CpuIndex;
556
557 //
558 // If Traditional Sync Mode or need to configure MTRRs: gather all available APs.
559 //
560 if (SyncMode == SmmCpuSyncModeTradition || SmmCpuFeaturesNeedConfigureMtrrs()) {
561
562 //
563 // Wait for APs to arrive
564 //
565 SmmWaitForApArrival();
566
567 //
568 // Lock the counter down and retrieve the number of APs
569 //
570 *mSmmMpSyncData->AllCpusInSync = TRUE;
571 ApCount = LockdownSemaphore (mSmmMpSyncData->Counter) - 1;
572
573 //
574 // Wait for all APs to get ready for programming MTRRs
575 //
576 WaitForAllAPs (ApCount);
577
578 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
579 //
580 // Signal all APs it's time for backup MTRRs
581 //
582 ReleaseAllAPs ();
583
584 //
585 // WaitForSemaphore() may wait for ever if an AP happens to enter SMM at
586 // exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set
587 // to a large enough value to avoid this situation.
588 // Note: For HT capable CPUs, threads within a core share the same set of MTRRs.
589 // We do the backup first and then set MTRR to avoid race condition for threads
590 // in the same core.
591 //
592 MtrrGetAllMtrrs(&Mtrrs);
593
594 //
595 // Wait for all APs to complete their MTRR saving
596 //
597 WaitForAllAPs (ApCount);
598
599 //
600 // Let all processors program SMM MTRRs together
601 //
602 ReleaseAllAPs ();
603
604 //
605 // WaitForSemaphore() may wait for ever if an AP happens to enter SMM at
606 // exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set
607 // to a large enough value to avoid this situation.
608 //
609 ReplaceOSMtrrs (CpuIndex);
610
611 //
612 // Wait for all APs to complete their MTRR programming
613 //
614 WaitForAllAPs (ApCount);
615 }
616 }
617
618 //
619 // The BUSY lock is initialized to Acquired state
620 //
621 AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
622
623 //
624 // Perform the pre tasks
625 //
626 PerformPreTasks ();
627
628 //
629 // Invoke SMM Foundation EntryPoint with the processor information context.
630 //
631 gSmmCpuPrivate->SmmCoreEntry (&gSmmCpuPrivate->SmmCoreEntryContext);
632
633 //
634 // Make sure all APs have completed their pending none-block tasks
635 //
636 WaitForAllAPsNotBusy (TRUE);
637
638 //
639 // Perform the remaining tasks
640 //
641 PerformRemainingTasks ();
642
643 //
644 // If Relaxed-AP Sync Mode: gather all available APs after BSP SMM handlers are done, and
645 // make those APs to exit SMI synchronously. APs which arrive later will be excluded and
646 // will run through freely.
647 //
648 if (SyncMode != SmmCpuSyncModeTradition && !SmmCpuFeaturesNeedConfigureMtrrs()) {
649
650 //
651 // Lock the counter down and retrieve the number of APs
652 //
653 *mSmmMpSyncData->AllCpusInSync = TRUE;
654 ApCount = LockdownSemaphore (mSmmMpSyncData->Counter) - 1;
655 //
656 // Make sure all APs have their Present flag set
657 //
658 while (TRUE) {
659 PresentCount = 0;
660 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
661 if (*(mSmmMpSyncData->CpuData[Index].Present)) {
662 PresentCount ++;
663 }
664 }
665 if (PresentCount > ApCount) {
666 break;
667 }
668 }
669 }
670
671 //
672 // Notify all APs to exit
673 //
674 *mSmmMpSyncData->InsideSmm = FALSE;
675 ReleaseAllAPs ();
676
677 //
678 // Wait for all APs to complete their pending tasks
679 //
680 WaitForAllAPs (ApCount);
681
682 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
683 //
684 // Signal APs to restore MTRRs
685 //
686 ReleaseAllAPs ();
687
688 //
689 // Restore OS MTRRs
690 //
691 SmmCpuFeaturesReenableSmrr ();
692 MtrrSetAllMtrrs(&Mtrrs);
693
694 //
695 // Wait for all APs to complete MTRR programming
696 //
697 WaitForAllAPs (ApCount);
698 }
699
700 //
701 // Stop source level debug in BSP handler, the code below will not be
702 // debugged.
703 //
704 InitializeDebugAgent (DEBUG_AGENT_INIT_EXIT_SMI, NULL, NULL);
705
706 //
707 // Signal APs to Reset states/semaphore for this processor
708 //
709 ReleaseAllAPs ();
710
711 //
712 // Perform pending operations for hot-plug
713 //
714 SmmCpuUpdate ();
715
716 //
717 // Clear the Present flag of BSP
718 //
719 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;
720
721 //
722 // Gather APs to exit SMM synchronously. Note the Present flag is cleared by now but
723 // WaitForAllAps does not depend on the Present flag.
724 //
725 WaitForAllAPs (ApCount);
726
727 //
728 // Clean the tokens buffer.
729 //
730 FreeTokens ();
731
732 //
733 // Reset BspIndex to -1, meaning BSP has not been elected.
734 //
735 if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {
736 mSmmMpSyncData->BspIndex = (UINT32)-1;
737 }
738
739 //
740 // Allow APs to check in from this point on
741 //
742 *mSmmMpSyncData->Counter = 0;
743 *mSmmMpSyncData->AllCpusInSync = FALSE;
744}
745
746/**
747 SMI handler for AP.
748
749 @param CpuIndex AP processor Index.
750 @param ValidSmi Indicates that current SMI is a valid SMI or not.
751 @param SyncMode SMM MP sync mode.
752
753**/
754VOID
755APHandler (
756 IN UINTN CpuIndex,
757 IN BOOLEAN ValidSmi,
758 IN SMM_CPU_SYNC_MODE SyncMode
759 )
760{
761 UINT64 Timer;
762 UINTN BspIndex;
763 MTRR_SETTINGS Mtrrs;
764 EFI_STATUS ProcedureStatus;
765
766 //
767 // Timeout BSP
768 //
769 for (Timer = StartSyncTimer ();
770 !IsSyncTimerTimeout (Timer) &&
771 !(*mSmmMpSyncData->InsideSmm);
772 ) {
773 CpuPause ();
774 }
775
776 if (!(*mSmmMpSyncData->InsideSmm)) {
777 //
778 // BSP timeout in the first round
779 //
780 if (mSmmMpSyncData->BspIndex != -1) {
781 //
782 // BSP Index is known
783 //
784 BspIndex = mSmmMpSyncData->BspIndex;
785 ASSERT (CpuIndex != BspIndex);
786
787 //
788 // Send SMI IPI to bring BSP in
789 //
790 SendSmiIpi ((UINT32)gSmmCpuPrivate->ProcessorInfo[BspIndex].ProcessorId);
791
792 //
793 // Now clock BSP for the 2nd time
794 //
795 for (Timer = StartSyncTimer ();
796 !IsSyncTimerTimeout (Timer) &&
797 !(*mSmmMpSyncData->InsideSmm);
798 ) {
799 CpuPause ();
800 }
801
802 if (!(*mSmmMpSyncData->InsideSmm)) {
803 //
804 // Give up since BSP is unable to enter SMM
805 // and signal the completion of this AP
806 WaitForSemaphore (mSmmMpSyncData->Counter);
807 return;
808 }
809 } else {
810 //
811 // Don't know BSP index. Give up without sending IPI to BSP.
812 //
813 WaitForSemaphore (mSmmMpSyncData->Counter);
814 return;
815 }
816 }
817
818 //
819 // BSP is available
820 //
821 BspIndex = mSmmMpSyncData->BspIndex;
822 ASSERT (CpuIndex != BspIndex);
823
824 //
825 // Mark this processor's presence
826 //
827 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = TRUE;
828
829 if (SyncMode == SmmCpuSyncModeTradition || SmmCpuFeaturesNeedConfigureMtrrs()) {
830 //
831 // Notify BSP of arrival at this point
832 //
833 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
834 }
835
836 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
837 //
838 // Wait for the signal from BSP to backup MTRRs
839 //
840 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
841
842 //
843 // Backup OS MTRRs
844 //
845 MtrrGetAllMtrrs(&Mtrrs);
846
847 //
848 // Signal BSP the completion of this AP
849 //
850 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
851
852 //
853 // Wait for BSP's signal to program MTRRs
854 //
855 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
856
857 //
858 // Replace OS MTRRs with SMI MTRRs
859 //
860 ReplaceOSMtrrs (CpuIndex);
861
862 //
863 // Signal BSP the completion of this AP
864 //
865 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
866 }
867
868 while (TRUE) {
869 //
870 // Wait for something to happen
871 //
872 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
873
874 //
875 // Check if BSP wants to exit SMM
876 //
877 if (!(*mSmmMpSyncData->InsideSmm)) {
878 break;
879 }
880
881 //
882 // BUSY should be acquired by SmmStartupThisAp()
883 //
884 ASSERT (
885 !AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[CpuIndex].Busy)
886 );
887
888 //
889 // Invoke the scheduled procedure
890 //
891 ProcedureStatus = (*mSmmMpSyncData->CpuData[CpuIndex].Procedure) (
892 (VOID*)mSmmMpSyncData->CpuData[CpuIndex].Parameter
893 );
894 if (mSmmMpSyncData->CpuData[CpuIndex].Status != NULL) {
895 *mSmmMpSyncData->CpuData[CpuIndex].Status = ProcedureStatus;
896 }
897
898 //
899 // Release BUSY
900 //
901 ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
902
903 ReleaseToken (CpuIndex);
904 }
905
906 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
907 //
908 // Notify BSP the readiness of this AP to program MTRRs
909 //
910 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
911
912 //
913 // Wait for the signal from BSP to program MTRRs
914 //
915 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
916
917 //
918 // Restore OS MTRRs
919 //
920 SmmCpuFeaturesReenableSmrr ();
921 MtrrSetAllMtrrs(&Mtrrs);
922 }
923
924 //
925 // Notify BSP the readiness of this AP to Reset states/semaphore for this processor
926 //
927 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
928
929 //
930 // Wait for the signal from BSP to Reset states/semaphore for this processor
931 //
932 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
933
934 //
935 // Reset states/semaphore for this processor
936 //
937 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;
938
939 //
940 // Notify BSP the readiness of this AP to exit SMM
941 //
942 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
943
944}
945
946/**
947 Create 4G PageTable in SMRAM.
948
949 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
950 @return PageTable Address
951
952**/
953UINT32
954Gen4GPageTable (
955 IN BOOLEAN Is32BitPageTable
956 )
957{
958 VOID *PageTable;
959 UINTN Index;
960 UINT64 *Pte;
961 UINTN PagesNeeded;
962 UINTN Low2MBoundary;
963 UINTN High2MBoundary;
964 UINTN Pages;
965 UINTN GuardPage;
966 UINT64 *Pdpte;
967 UINTN PageIndex;
968 UINTN PageAddress;
969
970 Low2MBoundary = 0;
971 High2MBoundary = 0;
972 PagesNeeded = 0;
973 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {
974 //
975 // Add one more page for known good stack, then find the lower 2MB aligned address.
976 //
977 Low2MBoundary = (mSmmStackArrayBase + EFI_PAGE_SIZE) & ~(SIZE_2MB-1);
978 //
979 // Add two more pages for known good stack and stack guard page,
980 // then find the lower 2MB aligned address.
981 //
982 High2MBoundary = (mSmmStackArrayEnd - mSmmStackSize + EFI_PAGE_SIZE * 2) & ~(SIZE_2MB-1);
983 PagesNeeded = ((High2MBoundary - Low2MBoundary) / SIZE_2MB) + 1;
984 }
985 //
986 // Allocate the page table
987 //
988 PageTable = AllocatePageTableMemory (5 + PagesNeeded);
989 ASSERT (PageTable != NULL);
990
991 PageTable = (VOID *)((UINTN)PageTable);
992 Pte = (UINT64*)PageTable;
993
994 //
995 // Zero out all page table entries first
996 //
997 ZeroMem (Pte, EFI_PAGES_TO_SIZE (1));
998
999 //
1000 // Set Page Directory Pointers
1001 //
1002 for (Index = 0; Index < 4; Index++) {
1003 Pte[Index] = ((UINTN)PageTable + EFI_PAGE_SIZE * (Index + 1)) | mAddressEncMask |
1004 (Is32BitPageTable ? IA32_PAE_PDPTE_ATTRIBUTE_BITS : PAGE_ATTRIBUTE_BITS);
1005 }
1006 Pte += EFI_PAGE_SIZE / sizeof (*Pte);
1007
1008 //
1009 // Fill in Page Directory Entries
1010 //
1011 for (Index = 0; Index < EFI_PAGE_SIZE * 4 / sizeof (*Pte); Index++) {
1012 Pte[Index] = (Index << 21) | mAddressEncMask | IA32_PG_PS | PAGE_ATTRIBUTE_BITS;
1013 }
1014
1015 Pdpte = (UINT64*)PageTable;
1016 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {
1017 Pages = (UINTN)PageTable + EFI_PAGES_TO_SIZE (5);
1018 GuardPage = mSmmStackArrayBase + EFI_PAGE_SIZE;
1019 for (PageIndex = Low2MBoundary; PageIndex <= High2MBoundary; PageIndex += SIZE_2MB) {
1020 Pte = (UINT64*)(UINTN)(Pdpte[BitFieldRead32 ((UINT32)PageIndex, 30, 31)] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));
1021 Pte[BitFieldRead32 ((UINT32)PageIndex, 21, 29)] = (UINT64)Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS;
1022 //
1023 // Fill in Page Table Entries
1024 //
1025 Pte = (UINT64*)Pages;
1026 PageAddress = PageIndex;
1027 for (Index = 0; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) {
1028 if (PageAddress == GuardPage) {
1029 //
1030 // Mark the guard page as non-present
1031 //
1032 Pte[Index] = PageAddress | mAddressEncMask;
1033 GuardPage += mSmmStackSize;
1034 if (GuardPage > mSmmStackArrayEnd) {
1035 GuardPage = 0;
1036 }
1037 } else {
1038 Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS;
1039 }
1040 PageAddress+= EFI_PAGE_SIZE;
1041 }
1042 Pages += EFI_PAGE_SIZE;
1043 }
1044 }
1045
1046 if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0) {
1047 Pte = (UINT64*)(UINTN)(Pdpte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));
1048 if ((Pte[0] & IA32_PG_PS) == 0) {
1049 // 4K-page entries are already mapped. Just hide the first one anyway.
1050 Pte = (UINT64*)(UINTN)(Pte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));
1051 Pte[0] &= ~(UINT64)IA32_PG_P; // Hide page 0
1052 } else {
1053 // Create 4K-page entries
1054 Pages = (UINTN)AllocatePageTableMemory (1);
1055 ASSERT (Pages != 0);
1056
1057 Pte[0] = (UINT64)(Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS);
1058
1059 Pte = (UINT64*)Pages;
1060 PageAddress = 0;
1061 Pte[0] = PageAddress | mAddressEncMask; // Hide page 0 but present left
1062 for (Index = 1; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) {
1063 PageAddress += EFI_PAGE_SIZE;
1064 Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS;
1065 }
1066 }
1067 }
1068
1069 return (UINT32)(UINTN)PageTable;
1070}
1071
1072/**
1073 Checks whether the input token is the current used token.
1074
1075 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1076 BroadcastProcedure.
1077
1078 @retval TRUE The input token is the current used token.
1079 @retval FALSE The input token is not the current used token.
1080**/
1081BOOLEAN
1082IsTokenInUse (
1083 IN SPIN_LOCK *Token
1084 )
1085{
1086 LIST_ENTRY *Link;
1087 PROCEDURE_TOKEN *ProcToken;
1088
1089 if (Token == NULL) {
1090 return FALSE;
1091 }
1092
1093 Link = GetFirstNode (&gSmmCpuPrivate->TokenList);
1094 while (!IsNull (&gSmmCpuPrivate->TokenList, Link)) {
1095 ProcToken = PROCEDURE_TOKEN_FROM_LINK (Link);
1096
1097 if (ProcToken->ProcedureToken == Token) {
1098 return TRUE;
1099 }
1100
1101 Link = GetNextNode (&gSmmCpuPrivate->TokenList, Link);
1102 }
1103
1104 return FALSE;
1105}
1106
1107/**
1108 create token and save it to the maintain list.
1109
1110 @retval return the spin lock used as token.
1111
1112**/
1113SPIN_LOCK *
1114CreateToken (
1115 VOID
1116 )
1117{
1118 PROCEDURE_TOKEN *ProcToken;
1119 SPIN_LOCK *CpuToken;
1120 UINTN SpinLockSize;
1121
1122 SpinLockSize = GetSpinLockProperties ();
1123 CpuToken = AllocatePool (SpinLockSize);
1124 ASSERT (CpuToken != NULL);
1125 InitializeSpinLock (CpuToken);
1126 AcquireSpinLock (CpuToken);
1127
1128 ProcToken = AllocatePool (sizeof (PROCEDURE_TOKEN));
1129 ASSERT (ProcToken != NULL);
1130 ProcToken->Signature = PROCEDURE_TOKEN_SIGNATURE;
1131 ProcToken->ProcedureToken = CpuToken;
1132
1133 InsertTailList (&gSmmCpuPrivate->TokenList, &ProcToken->Link);
1134
1135 return CpuToken;
1136}
1137
1138/**
1139 Checks status of specified AP.
1140
1141 This function checks whether the specified AP has finished the task assigned
1142 by StartupThisAP(), and whether timeout expires.
1143
1144 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1145 BroadcastProcedure.
1146
1147 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().
1148 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.
1149**/
1150EFI_STATUS
1151IsApReady (
1152 IN SPIN_LOCK *Token
1153 )
1154{
1155 if (AcquireSpinLockOrFail (Token)) {
1156 ReleaseSpinLock (Token);
1157 return EFI_SUCCESS;
1158 }
1159
1160 return EFI_NOT_READY;
1161}
1162
1163/**
1164 Schedule a procedure to run on the specified CPU.
1165
1166 @param[in] Procedure The address of the procedure to run
1167 @param[in] CpuIndex Target CPU Index
1168 @param[in,out] ProcArguments The parameter to pass to the procedure
1169 @param[in] Token This is an optional parameter that allows the caller to execute the
1170 procedure in a blocking or non-blocking fashion. If it is NULL the
1171 call is blocking, and the call will not return until the AP has
1172 completed the procedure. If the token is not NULL, the call will
1173 return immediately. The caller can check whether the procedure has
1174 completed with CheckOnProcedure or WaitForProcedure.
1175 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish
1176 execution of Procedure, either for blocking or non-blocking mode.
1177 Zero means infinity. If the timeout expires before all APs return
1178 from Procedure, then Procedure on the failed APs is terminated. If
1179 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.
1180 If the timeout expires in non-blocking mode, the timeout determined
1181 can be through CheckOnProcedure or WaitForProcedure.
1182 Note that timeout support is optional. Whether an implementation
1183 supports this feature can be determined via the Attributes data
1184 member.
1185 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned
1186 by Procedure when it completes execution on the target AP, or with
1187 EFI_TIMEOUT if the Procedure fails to complete within the optional
1188 timeout. The implementation will update this variable with
1189 EFI_NOT_READY prior to starting Procedure on the target AP.
1190
1191 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1192 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1193 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1194 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1195 @retval EFI_SUCCESS The procedure has been successfully scheduled
1196
1197**/
1198EFI_STATUS
1199InternalSmmStartupThisAp (
1200 IN EFI_AP_PROCEDURE2 Procedure,
1201 IN UINTN CpuIndex,
1202 IN OUT VOID *ProcArguments OPTIONAL,
1203 IN MM_COMPLETION *Token,
1204 IN UINTN TimeoutInMicroseconds,
1205 IN OUT EFI_STATUS *CpuStatus
1206 )
1207{
1208 if (CpuIndex >= gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus) {
1209 DEBUG((DEBUG_ERROR, "CpuIndex(%d) >= gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus(%d)\n", CpuIndex, gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus));
1210 return EFI_INVALID_PARAMETER;
1211 }
1212 if (CpuIndex == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) {
1213 DEBUG((DEBUG_ERROR, "CpuIndex(%d) == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu\n", CpuIndex));
1214 return EFI_INVALID_PARAMETER;
1215 }
1216 if (gSmmCpuPrivate->ProcessorInfo[CpuIndex].ProcessorId == INVALID_APIC_ID) {
1217 return EFI_INVALID_PARAMETER;
1218 }
1219 if (!(*(mSmmMpSyncData->CpuData[CpuIndex].Present))) {
1220 if (mSmmMpSyncData->EffectiveSyncMode == SmmCpuSyncModeTradition) {
1221 DEBUG((DEBUG_ERROR, "!mSmmMpSyncData->CpuData[%d].Present\n", CpuIndex));
1222 }
1223 return EFI_INVALID_PARAMETER;
1224 }
1225 if (gSmmCpuPrivate->Operation[CpuIndex] == SmmCpuRemove) {
1226 if (!FeaturePcdGet (PcdCpuHotPlugSupport)) {
1227 DEBUG((DEBUG_ERROR, "gSmmCpuPrivate->Operation[%d] == SmmCpuRemove\n", CpuIndex));
1228 }
1229 return EFI_INVALID_PARAMETER;
1230 }
1231 if ((TimeoutInMicroseconds != 0) && ((mSmmMp.Attributes & EFI_MM_MP_TIMEOUT_SUPPORTED) == 0)) {
1232 return EFI_INVALID_PARAMETER;
1233 }
1234 if (Procedure == NULL) {
1235 return EFI_INVALID_PARAMETER;
1236 }
1237
1238 if (Token == NULL) {
1239 AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1240 } else {
1241 if (!AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[CpuIndex].Busy)) {
1242 DEBUG((DEBUG_ERROR, "Can't acquire mSmmMpSyncData->CpuData[%d].Busy\n", CpuIndex));
1243 return EFI_NOT_READY;
1244 }
1245
1246 *Token = (MM_COMPLETION) CreateToken ();
1247 }
1248
1249 mSmmMpSyncData->CpuData[CpuIndex].Procedure = Procedure;
1250 mSmmMpSyncData->CpuData[CpuIndex].Parameter = ProcArguments;
1251 if (Token != NULL) {
1252 mSmmMpSyncData->CpuData[CpuIndex].Token = (SPIN_LOCK *)(*Token);
1253 }
1254 mSmmMpSyncData->CpuData[CpuIndex].Status = CpuStatus;
1255 if (mSmmMpSyncData->CpuData[CpuIndex].Status != NULL) {
1256 *mSmmMpSyncData->CpuData[CpuIndex].Status = EFI_NOT_READY;
1257 }
1258
1259 ReleaseSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
1260
1261 if (Token == NULL) {
1262 AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1263 ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1264 }
1265
1266 return EFI_SUCCESS;
1267}
1268
1269/**
1270 Worker function to execute a caller provided function on all enabled APs.
1271
1272 @param[in] Procedure A pointer to the function to be run on
1273 enabled APs of the system.
1274 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
1275 APs to return from Procedure, either for
1276 blocking or non-blocking mode.
1277 @param[in,out] ProcedureArguments The parameter passed into Procedure for
1278 all APs.
1279 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1280 procedure in a blocking or non-blocking fashion. If it is NULL the
1281 call is blocking, and the call will not return until the AP has
1282 completed the procedure. If the token is not NULL, the call will
1283 return immediately. The caller can check whether the procedure has
1284 completed with CheckOnProcedure or WaitForProcedure.
1285 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned
1286 by Procedure when it completes execution on the target AP, or with
1287 EFI_TIMEOUT if the Procedure fails to complete within the optional
1288 timeout. The implementation will update this variable with
1289 EFI_NOT_READY prior to starting Procedure on the target AP.
1290
1291
1292 @retval EFI_SUCCESS In blocking mode, all APs have finished before
1293 the timeout expired.
1294 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
1295 to all enabled APs.
1296 @retval others Failed to Startup all APs.
1297
1298**/
1299EFI_STATUS
1300InternalSmmStartupAllAPs (
1301 IN EFI_AP_PROCEDURE2 Procedure,
1302 IN UINTN TimeoutInMicroseconds,
1303 IN OUT VOID *ProcedureArguments OPTIONAL,
1304 IN OUT MM_COMPLETION *Token,
1305 IN OUT EFI_STATUS *CPUStatus
1306 )
1307{
1308 UINTN Index;
1309 UINTN CpuCount;
1310
1311 if ((TimeoutInMicroseconds != 0) && ((mSmmMp.Attributes & EFI_MM_MP_TIMEOUT_SUPPORTED) == 0)) {
1312 return EFI_INVALID_PARAMETER;
1313 }
1314 if (Procedure == NULL) {
1315 return EFI_INVALID_PARAMETER;
1316 }
1317
1318 CpuCount = 0;
1319 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
1320 if (IsPresentAp (Index)) {
1321 CpuCount ++;
1322
1323 if (gSmmCpuPrivate->Operation[Index] == SmmCpuRemove) {
1324 return EFI_INVALID_PARAMETER;
1325 }
1326
1327 if (!AcquireSpinLockOrFail(mSmmMpSyncData->CpuData[Index].Busy)) {
1328 return EFI_NOT_READY;
1329 }
1330 ReleaseSpinLock (mSmmMpSyncData->CpuData[Index].Busy);
1331 }
1332 }
1333 if (CpuCount == 0) {
1334 return EFI_NOT_STARTED;
1335 }
1336
1337 if (Token != NULL) {
1338 *Token = (MM_COMPLETION) CreateToken ();
1339 }
1340
1341 //
1342 // Make sure all BUSY should be acquired.
1343 //
1344 // Because former code already check mSmmMpSyncData->CpuData[***].Busy for each AP.
1345 // Here code always use AcquireSpinLock instead of AcquireSpinLockOrFail for not
1346 // block mode.
1347 //
1348 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
1349 if (IsPresentAp (Index)) {
1350 AcquireSpinLock (mSmmMpSyncData->CpuData[Index].Busy);
1351 }
1352 }
1353
1354 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
1355 if (IsPresentAp (Index)) {
1356 mSmmMpSyncData->CpuData[Index].Procedure = (EFI_AP_PROCEDURE2) Procedure;
1357 mSmmMpSyncData->CpuData[Index].Parameter = ProcedureArguments;
1358 if (Token != NULL) {
1359 mSmmMpSyncData->CpuData[Index].Token = (SPIN_LOCK *)(*Token);
1360 }
1361 if (CPUStatus != NULL) {
1362 mSmmMpSyncData->CpuData[Index].Status = &CPUStatus[Index];
1363 if (mSmmMpSyncData->CpuData[Index].Status != NULL) {
1364 *mSmmMpSyncData->CpuData[Index].Status = EFI_NOT_READY;
1365 }
1366 }
1367 } else {
1368 //
1369 // PI spec requirement:
1370 // For every excluded processor, the array entry must contain a value of EFI_NOT_STARTED.
1371 //
1372 if (CPUStatus != NULL) {
1373 CPUStatus[Index] = EFI_NOT_STARTED;
1374 }
1375 }
1376 }
1377
1378 ReleaseAllAPs ();
1379
1380 if (Token == NULL) {
1381 //
1382 // Make sure all APs have completed their tasks.
1383 //
1384 WaitForAllAPsNotBusy (TRUE);
1385 }
1386
1387 return EFI_SUCCESS;
1388}
1389
1390/**
1391 ISO C99 6.5.2.2 "Function calls", paragraph 9:
1392 If the function is defined with a type that is not compatible with
1393 the type (of the expression) pointed to by the expression that
1394 denotes the called function, the behavior is undefined.
1395
1396 So add below wrapper function to convert between EFI_AP_PROCEDURE
1397 and EFI_AP_PROCEDURE2.
1398
1399 Wrapper for Procedures.
1400
1401 @param[in] Buffer Pointer to PROCEDURE_WRAPPER buffer.
1402
1403**/
1404EFI_STATUS
1405EFIAPI
1406ProcedureWrapper (
1407 IN VOID *Buffer
1408 )
1409{
1410 PROCEDURE_WRAPPER *Wrapper;
1411
1412 Wrapper = Buffer;
1413 Wrapper->Procedure (Wrapper->ProcedureArgument);
1414
1415 return EFI_SUCCESS;
1416}
1417
1418/**
1419 Schedule a procedure to run on the specified CPU in blocking mode.
1420
1421 @param[in] Procedure The address of the procedure to run
1422 @param[in] CpuIndex Target CPU Index
1423 @param[in, out] ProcArguments The parameter to pass to the procedure
1424
1425 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1426 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1427 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1428 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1429 @retval EFI_SUCCESS The procedure has been successfully scheduled
1430
1431**/
1432EFI_STATUS
1433EFIAPI
1434SmmBlockingStartupThisAp (
1435 IN EFI_AP_PROCEDURE Procedure,
1436 IN UINTN CpuIndex,
1437 IN OUT VOID *ProcArguments OPTIONAL
1438 )
1439{
1440 PROCEDURE_WRAPPER Wrapper;
1441
1442 Wrapper.Procedure = Procedure;
1443 Wrapper.ProcedureArgument = ProcArguments;
1444
1445 //
1446 // Use wrapper function to convert EFI_AP_PROCEDURE to EFI_AP_PROCEDURE2.
1447 //
1448 return InternalSmmStartupThisAp (ProcedureWrapper, CpuIndex, &Wrapper, NULL, 0, NULL);
1449}
1450
1451/**
1452 Schedule a procedure to run on the specified CPU.
1453
1454 @param Procedure The address of the procedure to run
1455 @param CpuIndex Target CPU Index
1456 @param ProcArguments The parameter to pass to the procedure
1457
1458 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1459 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1460 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1461 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1462 @retval EFI_SUCCESS The procedure has been successfully scheduled
1463
1464**/
1465EFI_STATUS
1466EFIAPI
1467SmmStartupThisAp (
1468 IN EFI_AP_PROCEDURE Procedure,
1469 IN UINTN CpuIndex,
1470 IN OUT VOID *ProcArguments OPTIONAL
1471 )
1472{
1473 MM_COMPLETION Token;
1474
1475 gSmmCpuPrivate->ApWrapperFunc[CpuIndex].Procedure = Procedure;
1476 gSmmCpuPrivate->ApWrapperFunc[CpuIndex].ProcedureArgument = ProcArguments;
1477
1478 //
1479 // Use wrapper function to convert EFI_AP_PROCEDURE to EFI_AP_PROCEDURE2.
1480 //
1481 return InternalSmmStartupThisAp (
1482 ProcedureWrapper,
1483 CpuIndex,
1484 &gSmmCpuPrivate->ApWrapperFunc[CpuIndex],
1485 FeaturePcdGet (PcdCpuSmmBlockStartupThisAp) ? NULL : &Token,
1486 0,
1487 NULL
1488 );
1489}
1490
1491/**
1492 This function sets DR6 & DR7 according to SMM save state, before running SMM C code.
1493 They are useful when you want to enable hardware breakpoints in SMM without entry SMM mode.
1494
1495 NOTE: It might not be appreciated in runtime since it might
1496 conflict with OS debugging facilities. Turn them off in RELEASE.
1497
1498 @param CpuIndex CPU Index
1499
1500**/
1501VOID
1502EFIAPI
1503CpuSmmDebugEntry (
1504 IN UINTN CpuIndex
1505 )
1506{
1507 SMRAM_SAVE_STATE_MAP *CpuSaveState;
1508
1509 if (FeaturePcdGet (PcdCpuSmmDebug)) {
1510 ASSERT(CpuIndex < mMaxNumberOfCpus);
1511 CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
1512 if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
1513 AsmWriteDr6 (CpuSaveState->x86._DR6);
1514 AsmWriteDr7 (CpuSaveState->x86._DR7);
1515 } else {
1516 AsmWriteDr6 ((UINTN)CpuSaveState->x64._DR6);
1517 AsmWriteDr7 ((UINTN)CpuSaveState->x64._DR7);
1518 }
1519 }
1520}
1521
1522/**
1523 This function restores DR6 & DR7 to SMM save state.
1524
1525 NOTE: It might not be appreciated in runtime since it might
1526 conflict with OS debugging facilities. Turn them off in RELEASE.
1527
1528 @param CpuIndex CPU Index
1529
1530**/
1531VOID
1532EFIAPI
1533CpuSmmDebugExit (
1534 IN UINTN CpuIndex
1535 )
1536{
1537 SMRAM_SAVE_STATE_MAP *CpuSaveState;
1538
1539 if (FeaturePcdGet (PcdCpuSmmDebug)) {
1540 ASSERT(CpuIndex < mMaxNumberOfCpus);
1541 CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
1542 if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
1543 CpuSaveState->x86._DR7 = (UINT32)AsmReadDr7 ();
1544 CpuSaveState->x86._DR6 = (UINT32)AsmReadDr6 ();
1545 } else {
1546 CpuSaveState->x64._DR7 = AsmReadDr7 ();
1547 CpuSaveState->x64._DR6 = AsmReadDr6 ();
1548 }
1549 }
1550}
1551
1552/**
1553 C function for SMI entry, each processor comes here upon SMI trigger.
1554
1555 @param CpuIndex CPU Index
1556
1557**/
1558VOID
1559EFIAPI
1560SmiRendezvous (
1561 IN UINTN CpuIndex
1562 )
1563{
1564 EFI_STATUS Status;
1565 BOOLEAN ValidSmi;
1566 BOOLEAN IsBsp;
1567 BOOLEAN BspInProgress;
1568 UINTN Index;
1569 UINTN Cr2;
1570
1571 ASSERT(CpuIndex < mMaxNumberOfCpus);
1572
1573 //
1574 // Save Cr2 because Page Fault exception in SMM may override its value,
1575 // when using on-demand paging for above 4G memory.
1576 //
1577 Cr2 = 0;
1578 SaveCr2 (&Cr2);
1579
1580 //
1581 // Call the user register Startup function first.
1582 //
1583 if (mSmmMpSyncData->StartupProcedure != NULL) {
1584 mSmmMpSyncData->StartupProcedure (mSmmMpSyncData->StartupProcArgs);
1585 }
1586
1587 //
1588 // Perform CPU specific entry hooks
1589 //
1590 SmmCpuFeaturesRendezvousEntry (CpuIndex);
1591
1592 //
1593 // Determine if this is a valid SMI
1594 //
1595 ValidSmi = PlatformValidSmi();
1596
1597 //
1598 // Determine if BSP has been already in progress. Note this must be checked after
1599 // ValidSmi because BSP may clear a valid SMI source after checking in.
1600 //
1601 BspInProgress = *mSmmMpSyncData->InsideSmm;
1602
1603 if (!BspInProgress && !ValidSmi) {
1604 //
1605 // If we reach here, it means when we sampled the ValidSmi flag, SMI status had not
1606 // been cleared by BSP in a new SMI run (so we have a truly invalid SMI), or SMI
1607 // status had been cleared by BSP and an existing SMI run has almost ended. (Note
1608 // we sampled ValidSmi flag BEFORE judging BSP-in-progress status.) In both cases, there
1609 // is nothing we need to do.
1610 //
1611 goto Exit;
1612 } else {
1613 //
1614 // Signal presence of this processor
1615 //
1616 if (ReleaseSemaphore (mSmmMpSyncData->Counter) == 0) {
1617 //
1618 // BSP has already ended the synchronization, so QUIT!!!
1619 //
1620
1621 //
1622 // Wait for BSP's signal to finish SMI
1623 //
1624 while (*mSmmMpSyncData->AllCpusInSync) {
1625 CpuPause ();
1626 }
1627 goto Exit;
1628 } else {
1629
1630 //
1631 // The BUSY lock is initialized to Released state.
1632 // This needs to be done early enough to be ready for BSP's SmmStartupThisAp() call.
1633 // E.g., with Relaxed AP flow, SmmStartupThisAp() may be called immediately
1634 // after AP's present flag is detected.
1635 //
1636 InitializeSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1637 }
1638
1639 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
1640 ActivateSmmProfile (CpuIndex);
1641 }
1642
1643 if (BspInProgress) {
1644 //
1645 // BSP has been elected. Follow AP path, regardless of ValidSmi flag
1646 // as BSP may have cleared the SMI status
1647 //
1648 APHandler (CpuIndex, ValidSmi, mSmmMpSyncData->EffectiveSyncMode);
1649 } else {
1650 //
1651 // We have a valid SMI
1652 //
1653
1654 //
1655 // Elect BSP
1656 //
1657 IsBsp = FALSE;
1658 if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {
1659 if (!mSmmMpSyncData->SwitchBsp || mSmmMpSyncData->CandidateBsp[CpuIndex]) {
1660 //
1661 // Call platform hook to do BSP election
1662 //
1663 Status = PlatformSmmBspElection (&IsBsp);
1664 if (EFI_SUCCESS == Status) {
1665 //
1666 // Platform hook determines successfully
1667 //
1668 if (IsBsp) {
1669 mSmmMpSyncData->BspIndex = (UINT32)CpuIndex;
1670 }
1671 } else {
1672 //
1673 // Platform hook fails to determine, use default BSP election method
1674 //
1675 InterlockedCompareExchange32 (
1676 (UINT32*)&mSmmMpSyncData->BspIndex,
1677 (UINT32)-1,
1678 (UINT32)CpuIndex
1679 );
1680 }
1681 }
1682 }
1683
1684 //
1685 // "mSmmMpSyncData->BspIndex == CpuIndex" means this is the BSP
1686 //
1687 if (mSmmMpSyncData->BspIndex == CpuIndex) {
1688
1689 //
1690 // Clear last request for SwitchBsp.
1691 //
1692 if (mSmmMpSyncData->SwitchBsp) {
1693 mSmmMpSyncData->SwitchBsp = FALSE;
1694 for (Index = 0; Index < mMaxNumberOfCpus; Index++) {
1695 mSmmMpSyncData->CandidateBsp[Index] = FALSE;
1696 }
1697 }
1698
1699 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
1700 SmmProfileRecordSmiNum ();
1701 }
1702
1703 //
1704 // BSP Handler is always called with a ValidSmi == TRUE
1705 //
1706 BSPHandler (CpuIndex, mSmmMpSyncData->EffectiveSyncMode);
1707 } else {
1708 APHandler (CpuIndex, ValidSmi, mSmmMpSyncData->EffectiveSyncMode);
1709 }
1710 }
1711
1712 ASSERT (*mSmmMpSyncData->CpuData[CpuIndex].Run == 0);
1713
1714 //
1715 // Wait for BSP's signal to exit SMI
1716 //
1717 while (*mSmmMpSyncData->AllCpusInSync) {
1718 CpuPause ();
1719 }
1720 }
1721
1722Exit:
1723 SmmCpuFeaturesRendezvousExit (CpuIndex);
1724
1725 //
1726 // Restore Cr2
1727 //
1728 RestoreCr2 (Cr2);
1729}
1730
1731/**
1732 Allocate buffer for SpinLock and Wrapper function buffer.
1733
1734**/
1735VOID
1736InitializeDataForMmMp (
1737 VOID
1738 )
1739{
1740 gSmmCpuPrivate->ApWrapperFunc = AllocatePool (sizeof (PROCEDURE_WRAPPER) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus);
1741 ASSERT (gSmmCpuPrivate->ApWrapperFunc != NULL);
1742
1743 InitializeListHead (&gSmmCpuPrivate->TokenList);
1744}
1745
1746/**
1747 Allocate buffer for all semaphores and spin locks.
1748
1749**/
1750VOID
1751InitializeSmmCpuSemaphores (
1752 VOID
1753 )
1754{
1755 UINTN ProcessorCount;
1756 UINTN TotalSize;
1757 UINTN GlobalSemaphoresSize;
1758 UINTN CpuSemaphoresSize;
1759 UINTN SemaphoreSize;
1760 UINTN Pages;
1761 UINTN *SemaphoreBlock;
1762 UINTN SemaphoreAddr;
1763
1764 SemaphoreSize = GetSpinLockProperties ();
1765 ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
1766 GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;
1767 CpuSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;
1768 TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize;
1769 DEBUG((EFI_D_INFO, "One Semaphore Size = 0x%x\n", SemaphoreSize));
1770 DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));
1771 Pages = EFI_SIZE_TO_PAGES (TotalSize);
1772 SemaphoreBlock = AllocatePages (Pages);
1773 ASSERT (SemaphoreBlock != NULL);
1774 ZeroMem (SemaphoreBlock, TotalSize);
1775
1776 SemaphoreAddr = (UINTN)SemaphoreBlock;
1777 mSmmCpuSemaphores.SemaphoreGlobal.Counter = (UINT32 *)SemaphoreAddr;
1778 SemaphoreAddr += SemaphoreSize;
1779 mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm = (BOOLEAN *)SemaphoreAddr;
1780 SemaphoreAddr += SemaphoreSize;
1781 mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync = (BOOLEAN *)SemaphoreAddr;
1782 SemaphoreAddr += SemaphoreSize;
1783 mSmmCpuSemaphores.SemaphoreGlobal.PFLock = (SPIN_LOCK *)SemaphoreAddr;
1784 SemaphoreAddr += SemaphoreSize;
1785 mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock
1786 = (SPIN_LOCK *)SemaphoreAddr;
1787 SemaphoreAddr += SemaphoreSize;
1788
1789 SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize;
1790 mSmmCpuSemaphores.SemaphoreCpu.Busy = (SPIN_LOCK *)SemaphoreAddr;
1791 SemaphoreAddr += ProcessorCount * SemaphoreSize;
1792 mSmmCpuSemaphores.SemaphoreCpu.Run = (UINT32 *)SemaphoreAddr;
1793 SemaphoreAddr += ProcessorCount * SemaphoreSize;
1794 mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;
1795
1796 mPFLock = mSmmCpuSemaphores.SemaphoreGlobal.PFLock;
1797 mConfigSmmCodeAccessCheckLock = mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock;
1798
1799 mSemaphoreSize = SemaphoreSize;
1800}
1801
1802/**
1803 Initialize un-cacheable data.
1804
1805**/
1806VOID
1807EFIAPI
1808InitializeMpSyncData (
1809 VOID
1810 )
1811{
1812 UINTN CpuIndex;
1813
1814 if (mSmmMpSyncData != NULL) {
1815 //
1816 // mSmmMpSyncDataSize includes one structure of SMM_DISPATCHER_MP_SYNC_DATA, one
1817 // CpuData array of SMM_CPU_DATA_BLOCK and one CandidateBsp array of BOOLEAN.
1818 //
1819 ZeroMem (mSmmMpSyncData, mSmmMpSyncDataSize);
1820 mSmmMpSyncData->CpuData = (SMM_CPU_DATA_BLOCK *)((UINT8 *)mSmmMpSyncData + sizeof (SMM_DISPATCHER_MP_SYNC_DATA));
1821 mSmmMpSyncData->CandidateBsp = (BOOLEAN *)(mSmmMpSyncData->CpuData + gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus);
1822 if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {
1823 //
1824 // Enable BSP election by setting BspIndex to -1
1825 //
1826 mSmmMpSyncData->BspIndex = (UINT32)-1;
1827 }
1828 mSmmMpSyncData->EffectiveSyncMode = mCpuSmmSyncMode;
1829
1830 mSmmMpSyncData->Counter = mSmmCpuSemaphores.SemaphoreGlobal.Counter;
1831 mSmmMpSyncData->InsideSmm = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;
1832 mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;
1833 ASSERT (mSmmMpSyncData->Counter != NULL && mSmmMpSyncData->InsideSmm != NULL &&
1834 mSmmMpSyncData->AllCpusInSync != NULL);
1835 *mSmmMpSyncData->Counter = 0;
1836 *mSmmMpSyncData->InsideSmm = FALSE;
1837 *mSmmMpSyncData->AllCpusInSync = FALSE;
1838
1839 for (CpuIndex = 0; CpuIndex < gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus; CpuIndex ++) {
1840 mSmmMpSyncData->CpuData[CpuIndex].Busy =
1841 (SPIN_LOCK *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Busy + mSemaphoreSize * CpuIndex);
1842 mSmmMpSyncData->CpuData[CpuIndex].Run =
1843 (UINT32 *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Run + mSemaphoreSize * CpuIndex);
1844 mSmmMpSyncData->CpuData[CpuIndex].Present =
1845 (BOOLEAN *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Present + mSemaphoreSize * CpuIndex);
1846 *(mSmmMpSyncData->CpuData[CpuIndex].Busy) = 0;
1847 *(mSmmMpSyncData->CpuData[CpuIndex].Run) = 0;
1848 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;
1849 }
1850 }
1851}
1852
1853/**
1854 Initialize global data for MP synchronization.
1855
1856 @param Stacks Base address of SMI stack buffer for all processors.
1857 @param StackSize Stack size for each processor in SMM.
1858 @param ShadowStackSize Shadow Stack size for each processor in SMM.
1859
1860**/
1861UINT32
1862InitializeMpServiceData (
1863 IN VOID *Stacks,
1864 IN UINTN StackSize,
1865 IN UINTN ShadowStackSize
1866 )
1867{
1868 UINT32 Cr3;
1869 UINTN Index;
1870 UINT8 *GdtTssTables;
1871 UINTN GdtTableStepSize;
1872 CPUID_VERSION_INFO_EDX RegEdx;
1873
1874 //
1875 // Determine if this CPU supports machine check
1876 //
1877 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx.Uint32);
1878 mMachineCheckSupported = (BOOLEAN)(RegEdx.Bits.MCA == 1);
1879
1880 //
1881 // Allocate memory for all locks and semaphores
1882 //
1883 InitializeSmmCpuSemaphores ();
1884
1885 //
1886 // Initialize mSmmMpSyncData
1887 //
1888 mSmmMpSyncDataSize = sizeof (SMM_DISPATCHER_MP_SYNC_DATA) +
1889 (sizeof (SMM_CPU_DATA_BLOCK) + sizeof (BOOLEAN)) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
1890 mSmmMpSyncData = (SMM_DISPATCHER_MP_SYNC_DATA*) AllocatePages (EFI_SIZE_TO_PAGES (mSmmMpSyncDataSize));
1891 ASSERT (mSmmMpSyncData != NULL);
1892 mCpuSmmSyncMode = (SMM_CPU_SYNC_MODE)PcdGet8 (PcdCpuSmmSyncMode);
1893 InitializeMpSyncData ();
1894
1895 //
1896 // Initialize physical address mask
1897 // NOTE: Physical memory above virtual address limit is not supported !!!
1898 //
1899 AsmCpuid (0x80000008, (UINT32*)&Index, NULL, NULL, NULL);
1900 gPhyMask = LShiftU64 (1, (UINT8)Index) - 1;
1901 gPhyMask &= (1ull << 48) - EFI_PAGE_SIZE;
1902
1903 //
1904 // Create page tables
1905 //
1906 Cr3 = SmmInitPageTable ();
1907
1908 GdtTssTables = InitGdt (Cr3, &GdtTableStepSize);
1909
1910 //
1911 // Install SMI handler for each CPU
1912 //
1913 for (Index = 0; Index < mMaxNumberOfCpus; Index++) {
1914 InstallSmiHandler (
1915 Index,
1916 (UINT32)mCpuHotPlugData.SmBase[Index],
1917 (VOID*)((UINTN)Stacks + (StackSize + ShadowStackSize) * Index),
1918 StackSize,
1919 (UINTN)(GdtTssTables + GdtTableStepSize * Index),
1920 gcSmiGdtr.Limit + 1,
1921 gcSmiIdtr.Base,
1922 gcSmiIdtr.Limit + 1,
1923 Cr3
1924 );
1925 }
1926
1927 //
1928 // Record current MTRR settings
1929 //
1930 ZeroMem (&gSmiMtrrs, sizeof (gSmiMtrrs));
1931 MtrrGetAllMtrrs (&gSmiMtrrs);
1932
1933 return Cr3;
1934}
1935
1936/**
1937
1938 Register the SMM Foundation entry point.
1939
1940 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
1941 @param SmmEntryPoint SMM Foundation EntryPoint
1942
1943 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
1944
1945**/
1946EFI_STATUS
1947EFIAPI
1948RegisterSmmEntry (
1949 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
1950 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
1951 )
1952{
1953 //
1954 // Record SMM Foundation EntryPoint, later invoke it on SMI entry vector.
1955 //
1956 gSmmCpuPrivate->SmmCoreEntry = SmmEntryPoint;
1957 return EFI_SUCCESS;
1958}
1959
1960/**
1961
1962 Register the SMM Foundation entry point.
1963
1964 @param[in] Procedure A pointer to the code stream to be run on the designated target AP
1965 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2
1966 with the related definitions of
1967 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.
1968 If caller may pass a value of NULL to deregister any existing
1969 startup procedure.
1970 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is
1971 run by the AP. It is an optional common mailbox between APs and
1972 the caller to share information
1973
1974 @retval EFI_SUCCESS The Procedure has been set successfully.
1975 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.
1976
1977**/
1978EFI_STATUS
1979RegisterStartupProcedure (
1980 IN EFI_AP_PROCEDURE Procedure,
1981 IN OUT VOID *ProcedureArguments OPTIONAL
1982 )
1983{
1984 if (Procedure == NULL && ProcedureArguments != NULL) {
1985 return EFI_INVALID_PARAMETER;
1986 }
1987 if (mSmmMpSyncData == NULL) {
1988 return EFI_NOT_READY;
1989 }
1990
1991 mSmmMpSyncData->StartupProcedure = Procedure;
1992 mSmmMpSyncData->StartupProcArgs = ProcedureArguments;
1993
1994 return EFI_SUCCESS;
1995}
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