1 | /* $Id: VBoxVgaI2c.c 98103 2023-01-17 14:15:46Z vboxsync $ */
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2 | /** @file
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3 | * VBoxVgaI2c.c
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2009-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * The contents of this file may alternatively be used under the terms
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26 | * of the Common Development and Distribution License Version 1.0
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27 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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28 | * in the VirtualBox distribution, in which case the provisions of the
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29 | * CDDL are applicable instead of those of the GPL.
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30 | *
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31 | * You may elect to license modified versions of this file under the
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32 | * terms and conditions of either the GPL or the CDDL or both.
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33 | *
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34 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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35 | */
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36 |
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37 | /*
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38 | This code is based on:
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39 |
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40 | I2C Bus implementation upon CirrusLogic.
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41 |
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42 | Copyright (c) 2008 - 2009, Intel Corporation
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43 | All rights reserved. This program and the accompanying materials
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44 | are licensed and made available under the terms and conditions of the BSD License
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45 | which accompanies this distribution. The full text of the license may be found at
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46 | http://opensource.org/licenses/bsd-license.php
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47 |
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48 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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49 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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50 |
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51 | */
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52 |
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53 | #include "VBoxVga.h"
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54 | #include "VBoxVgaI2c.h"
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55 |
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56 | #define SEQ_ADDRESS_REGISTER 0x3c4
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57 | #define SEQ_DATA_REGISTER 0x3c5
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58 |
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59 | #define I2C_CONTROL 0x08
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60 | #define I2CDAT_IN 7
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61 | #define I2CCLK_IN 2
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62 | #define I2CDAT_OUT 1
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63 | #define I2CCLK_OUT 0
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64 |
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65 | #define I2C_BUS_SPEED 100 //100kbps
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66 |
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67 | /**
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68 | PCI I/O byte write function.
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69 |
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70 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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71 | @param Address The bit map of I2C Data or I2C Clock pins.
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72 | @param Data The date to write.
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73 |
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74 | **/
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75 | VOID
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76 | I2cOutb (
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77 | EFI_PCI_IO_PROTOCOL *PciIo,
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78 | UINTN Address,
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79 | UINT8 Data
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80 | )
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81 | {
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82 | PciIo->Io.Write (
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83 | PciIo,
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84 | EfiPciIoWidthUint8,
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85 | EFI_PCI_IO_PASS_THROUGH_BAR,
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86 | Address,
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87 | 1,
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88 | &Data
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89 | );
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90 | }
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91 | /**
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92 | PCI I/O byte read function.
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93 |
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94 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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95 | @param Address The bit map of I2C Data or I2C Clock pins.
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96 |
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97 | return byte value read from PCI I/O space.
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98 |
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99 | **/
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100 | UINT8
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101 | I2cInb (
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102 | EFI_PCI_IO_PROTOCOL *PciIo,
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103 | UINTN Address
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104 | )
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105 | {
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106 | UINT8 Data;
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107 |
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108 | PciIo->Io.Read (
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109 | PciIo,
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110 | EfiPciIoWidthUint8,
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111 | EFI_PCI_IO_PASS_THROUGH_BAR,
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112 | Address,
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113 | 1,
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114 | &Data
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115 | );
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116 | return Data;
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117 | }
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118 |
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119 | /**
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120 | Read status of I2C Data and I2C Clock Pins.
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121 |
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122 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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123 | @param Blt The bit map of I2C Data or I2C Clock pins.
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124 |
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125 | @retval 0 Low on I2C Data or I2C Clock Pin.
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126 | @retval 1 High on I2C Data or I2C Clock Pin.
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127 |
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128 | **/
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129 | UINT8
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130 | I2cPinRead (
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131 | EFI_PCI_IO_PROTOCOL *PciIo,
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132 | UINT8 Bit
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133 | )
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134 | {
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135 | I2cOutb (PciIo, SEQ_ADDRESS_REGISTER, I2C_CONTROL);
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136 | return (UINT8) ((I2cInb (PciIo, SEQ_DATA_REGISTER) >> Bit ) & 0xfe);
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137 | }
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138 |
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139 |
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140 | /**
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141 | Set/Clear I2C Data and I2C Clock Pins.
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142 |
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143 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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144 | @param Blt The bit map to controller I2C Data or I2C Clock pins.
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145 | @param Value 1 or 0 stands for Set or Clear I2C Data and I2C Clock Pins.
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146 |
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147 | **/
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148 | VOID
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149 | I2cPinWrite (
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150 | EFI_PCI_IO_PROTOCOL *PciIo,
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151 | UINT8 Bit,
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152 | UINT8 Value
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153 | )
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154 | {
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155 | UINT8 Byte;
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156 | I2cOutb (PciIo, SEQ_ADDRESS_REGISTER, I2C_CONTROL);
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157 | Byte = (UINT8) (I2cInb (PciIo, SEQ_DATA_REGISTER) & (UINT8) ~(1 << Bit)) ;
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158 | Byte = (UINT8) (Byte | ((Value & 0x01) << Bit));
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159 | I2cOutb (PciIo, SEQ_DATA_REGISTER, (UINT8) (Byte | 0x40));
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160 | return;
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161 | }
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162 |
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163 | /**
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164 | Read/write delay according to I2C Bus Speed.
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165 |
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166 | **/
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167 | VOID
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168 | I2cDelay (
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169 | VOID
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170 | )
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171 | {
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172 | MicroSecondDelay (1000 / I2C_BUS_SPEED);
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173 | }
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174 |
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175 | /**
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176 | Write a 8-bit data onto I2C Data Pin.
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177 |
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178 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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179 | @param Data The byte data to write.
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180 |
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181 | **/
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182 | VOID
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183 | I2cSendByte (
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184 | EFI_PCI_IO_PROTOCOL *PciIo,
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185 | UINT8 Data
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186 | )
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187 | {
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188 | UINTN Index;
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189 | //
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190 | // Send byte data onto I2C Bus
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191 | //
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192 | for (Index = 0; Index < 8; Index --) {
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193 | I2cPinWrite (PciIo, I2CDAT_OUT, (UINT8) (Data >> (7 - Index)));
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194 | I2cPinWrite (PciIo, I2CCLK_OUT, 1);
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195 | I2cDelay ();
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196 | I2cPinWrite (PciIo, I2CCLK_OUT, 0);
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197 | }
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198 | }
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199 |
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200 | /**
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201 | Read a 8-bit data from I2C Data Pin.
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202 |
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203 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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204 |
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205 | Return the byte data read from I2C Data Pin.
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206 | **/
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207 | UINT8
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208 | I2cReceiveByte (
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209 | EFI_PCI_IO_PROTOCOL *PciIo
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210 | )
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211 | {
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212 | UINT8 Data;
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213 | UINTN Index;
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214 |
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215 | Data = 0;
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216 | //
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217 | // Read byte data from I2C Bus
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218 | //
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219 | for (Index = 0; Index < 8; Index --) {
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220 | I2cPinWrite (PciIo, I2CCLK_OUT, 1);
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221 | I2cDelay ();
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222 | Data = (UINT8) (Data << 1);
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223 | Data = (UINT8) (Data | I2cPinRead (PciIo, I2CDAT_IN));
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224 | I2cPinWrite (PciIo, I2CCLK_OUT, 0);
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225 | }
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226 |
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227 | return Data;
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228 | }
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229 |
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230 | /**
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231 | Receive an ACK signal from I2C Bus.
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232 |
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233 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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234 |
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235 | **/
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236 | BOOLEAN
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237 | I2cWaitAck (
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238 | EFI_PCI_IO_PROTOCOL *PciIo
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239 | )
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240 | {
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241 | //
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242 | // Wait for ACK signal
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243 | //
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244 | I2cPinWrite (PciIo, I2CDAT_OUT, 1);
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245 | I2cPinWrite (PciIo, I2CCLK_OUT, 1);
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246 | I2cDelay ();
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247 | if (I2cPinRead (PciIo, I2CDAT_IN) == 0) {
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248 | I2cPinWrite (PciIo, I2CDAT_OUT, 1);
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249 | return TRUE;
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250 | } else {
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251 | return FALSE;
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252 | }
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253 | }
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254 |
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255 | /**
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256 | Send an ACK signal onto I2C Bus.
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257 |
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258 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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259 |
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260 | **/
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261 | VOID
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262 | I2cSendAck (
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263 | EFI_PCI_IO_PROTOCOL *PciIo
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264 | )
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265 | {
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266 | I2cPinWrite (PciIo, I2CCLK_OUT, 1);
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267 | I2cPinWrite (PciIo, I2CDAT_OUT, 1);
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268 | I2cPinWrite (PciIo, I2CDAT_OUT, 0);
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269 | I2cPinWrite (PciIo, I2CCLK_OUT, 0);
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270 | }
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271 |
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272 | /**
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273 | Start a I2C transfer on I2C Bus.
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274 |
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275 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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276 |
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277 | **/
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278 | VOID
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279 | I2cStart (
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280 | EFI_PCI_IO_PROTOCOL *PciIo
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281 | )
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282 | {
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283 | //
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284 | // Init CLK and DAT pins
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285 | //
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286 | I2cPinWrite (PciIo, I2CCLK_OUT, 1);
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287 | I2cPinWrite (PciIo, I2CDAT_OUT, 1);
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288 | //
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289 | // Start a I2C transfer, set SDA low from high, when SCL is high
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290 | //
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291 | I2cPinWrite (PciIo, I2CDAT_OUT, 0);
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292 | I2cPinWrite (PciIo, I2CCLK_OUT, 0);
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293 | }
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294 |
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295 | /**
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296 | Stop a I2C transfer on I2C Bus.
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297 |
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298 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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299 |
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300 | **/
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301 | VOID
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302 | I2cStop (
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303 | EFI_PCI_IO_PROTOCOL *PciIo
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304 | )
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305 | {
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306 | //
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307 | // Stop a I2C transfer, set SDA high from low, when SCL is high
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308 | //
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309 | I2cPinWrite (PciIo, I2CDAT_OUT, 0);
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310 | I2cPinWrite (PciIo, I2CCLK_OUT, 1);
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311 | I2cPinWrite (PciIo, I2CDAT_OUT, 1);
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312 | }
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313 |
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314 | /**
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315 | Read one byte data on I2C Bus.
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316 |
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317 | Read one byte data from the slave device connected to I2C Bus.
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318 | If Data is NULL, then ASSERT().
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319 |
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320 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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321 | @param DeviceAddress Slave device's address.
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322 | @param RegisterAddress The register address on slave device.
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323 | @param Data The pointer to returned data if EFI_SUCCESS returned.
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324 |
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325 | @retval EFI_DEVICE_ERROR
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326 | @retval EFI_SUCCESS
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327 |
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328 | **/
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329 | EFI_STATUS
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330 | EFIAPI
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331 | I2cReadByte (
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332 | EFI_PCI_IO_PROTOCOL *PciIo,
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333 | UINT8 DeviceAddress,
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334 | UINT8 RegisterAddress,
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335 | UINT8 *Data
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336 | )
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337 | {
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338 | ASSERT (Data != NULL);
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339 |
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340 | //
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341 | // Start I2C transfer
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342 | //
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343 | I2cStart (PciIo);
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344 |
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345 | //
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346 | // Send slave address with enabling write flag
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347 | //
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348 | I2cSendByte (PciIo, (UINT8) (DeviceAddress & 0xfe));
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349 |
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350 | //
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351 | // Wait for ACK signal
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352 | //
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353 | if (I2cWaitAck (PciIo) == FALSE) {
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354 | return EFI_DEVICE_ERROR;
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355 | }
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356 |
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357 | //
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358 | // Send register address
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359 | //
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360 | I2cSendByte (PciIo, RegisterAddress);
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361 |
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362 | //
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363 | // Wait for ACK signal
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364 | //
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365 | if (I2cWaitAck (PciIo) == FALSE) {
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366 | return EFI_DEVICE_ERROR;
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367 | }
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368 |
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369 | //
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370 | // Send slave address with enabling read flag
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371 | //
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372 | I2cSendByte (PciIo, (UINT8) (DeviceAddress | 0x01));
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373 |
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374 | //
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375 | // Wait for ACK signal
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376 | //
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377 | if (I2cWaitAck (PciIo) == FALSE) {
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378 | return EFI_DEVICE_ERROR;
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379 | }
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380 |
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381 | //
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382 | // Read byte data from I2C Bus
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383 | //
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384 | *Data = I2cReceiveByte (PciIo);
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385 |
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386 | //
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387 | // Send ACK signal onto I2C Bus
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388 | //
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389 | I2cSendAck (PciIo);
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390 |
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391 | //
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392 | // Stop a I2C transfer
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393 | //
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394 | I2cStop (PciIo);
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395 |
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396 | return EFI_SUCCESS;
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397 | }
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398 |
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399 | /**
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400 | Write one byte data onto I2C Bus.
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401 |
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402 | Write one byte data to the slave device connected to I2C Bus.
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403 | If Data is NULL, then ASSERT().
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404 |
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405 | @param PciIo The pointer to PCI_IO_PROTOCOL.
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406 | @param DeviceAddress Slave device's address.
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407 | @param RegisterAddress The register address on slave device.
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408 | @param Data The pointer to write data.
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409 |
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410 | @retval EFI_DEVICE_ERROR
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411 | @retval EFI_SUCCESS
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412 |
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413 | **/
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414 | EFI_STATUS
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415 | EFIAPI
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416 | I2cWriteByte (
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417 | EFI_PCI_IO_PROTOCOL *PciIo,
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418 | UINT8 DeviceAddress,
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419 | UINT8 RegisterAddress,
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420 | UINT8 *Data
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421 | )
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422 | {
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423 | ASSERT (Data != NULL);
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424 |
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425 | I2cStart (PciIo);
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426 | //
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427 | // Send slave address with enabling write flag
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428 | //
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429 | I2cSendByte (PciIo, (UINT8) (DeviceAddress & 0xfe));
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430 |
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431 | //
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432 | // Wait for ACK signal
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433 | //
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434 | if (I2cWaitAck (PciIo) == FALSE) {
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435 | return EFI_DEVICE_ERROR;
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436 | }
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437 |
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438 | //
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439 | // Send register address
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440 | //
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441 | I2cSendByte (PciIo, RegisterAddress);
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442 |
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443 | //
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444 | // Wait for ACK signal
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445 | //
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446 | if (I2cWaitAck (PciIo) == FALSE) {
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447 | return EFI_DEVICE_ERROR;
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448 | }
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449 |
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450 | //
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451 | // Send byte data onto I2C Bus
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452 | //
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453 | I2cSendByte (PciIo, *Data);
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454 |
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455 | //
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456 | // Wait for ACK signal
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457 | //
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458 | if (I2cWaitAck (PciIo) == FALSE) {
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459 | return EFI_DEVICE_ERROR;
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460 | }
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461 |
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462 | //
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463 | // Stop a I2C transfer
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464 | //
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465 | I2cStop (PciIo);
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466 |
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467 | return EFI_SUCCESS;
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468 | }
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469 |
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