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Last change
on this file since 80721 was 80721, checked in by vboxsync, 5 years ago |
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Devices/EFI/FirmwareNew: Start upgrade process to edk2-stable201908 (compiles on Windows and works to some extent), bugref:4643
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| 1 | /** @file
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| 2 | Header file for FSP-M Arch Config PPI for Dispatch mode
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| 3 |
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| 4 | Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
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| 5 |
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| 6 | SPDX-License-Identifier: BSD-2-Clause-Patent
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| 7 |
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| 8 | **/
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| 9 |
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| 10 | #ifndef _FSPM_ARCH_CONFIG_PPI_H_
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| 11 | #define _FSPM_ARCH_CONFIG_PPI_H_
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| 12 |
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| 13 | #define FSPM_ARCH_CONFIG_PPI_REVISION 0x1
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| 14 |
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| 15 | ///
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| 16 | /// Global ID for the FSPM_ARCH_CONFIG_PPI.
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| 17 | ///
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| 18 | #define FSPM_ARCH_CONFIG_GUID \
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| 19 | { \
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| 20 | 0x824d5a3a, 0xaf92, 0x4c0c, { 0x9f, 0x19, 0x19, 0x52, 0x6d, 0xca, 0x4a, 0xbb } \
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| 21 | }
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| 22 |
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| 23 | ///
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| 24 | /// This PPI provides FSP-M Arch Config PPI.
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| 25 | ///
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| 26 | typedef struct {
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| 27 | ///
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| 28 | /// Revision of the structure
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| 29 | ///
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| 30 | UINT8 Revision;
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| 31 | UINT8 Reserved[3];
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| 32 | ///
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| 33 | /// Pointer to the non-volatile storage (NVS) data buffer.
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| 34 | /// If it is NULL it indicates the NVS data is not available.
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| 35 | ///
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| 36 | VOID *NvsBufferPtr;
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| 37 | ///
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| 38 | /// Size of memory to be reserved by FSP below "top
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| 39 | /// of low usable memory" for bootloader usage.
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| 40 | ///
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| 41 | UINT32 BootLoaderTolumSize;
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| 42 | UINT8 Reserved1[4];
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| 43 | } FSPM_ARCH_CONFIG_PPI;
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| 44 |
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| 45 | extern EFI_GUID gFspmArchConfigPpiGuid;
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| 46 |
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| 47 | #endif // _FSPM_ARCH_CONFIG_PPI_H_
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