1 | /** @file
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2 | EFI IOMMU Protocol.
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3 |
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4 | Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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6 |
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7 | **/
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8 |
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9 |
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10 | #ifndef __IOMMU_H__
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11 | #define __IOMMU_H__
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12 |
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13 | //
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14 | // IOMMU Protocol GUID value
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15 | //
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16 | #define EDKII_IOMMU_PROTOCOL_GUID \
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17 | { \
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18 | 0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \
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19 | }
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20 |
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21 | //
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22 | // Forward reference for pure ANSI compatability
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23 | //
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24 | typedef struct _EDKII_IOMMU_PROTOCOL EDKII_IOMMU_PROTOCOL;
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25 |
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26 | //
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27 | // Revision The revision to which the IOMMU interface adheres.
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28 | // All future revisions must be backwards compatible.
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29 | // If a future version is not back wards compatible it is not the same GUID.
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30 | //
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31 | #define EDKII_IOMMU_PROTOCOL_REVISION 0x00010000
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32 |
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33 | //
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34 | // IOMMU Access for SetAttribute
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35 | //
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36 | // These types can be "ORed" together as needed.
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37 | // Any undefined bits are reserved and must be zero.
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38 | //
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39 | #define EDKII_IOMMU_ACCESS_READ 0x1
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40 | #define EDKII_IOMMU_ACCESS_WRITE 0x2
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41 |
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42 | //
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43 | // IOMMU Operation for Map
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44 | //
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45 | typedef enum {
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46 | ///
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47 | /// A read operation from system memory by a bus master that is not capable of producing
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48 | /// PCI dual address cycles.
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49 | ///
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50 | EdkiiIoMmuOperationBusMasterRead,
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51 | ///
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52 | /// A write operation from system memory by a bus master that is not capable of producing
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53 | /// PCI dual address cycles.
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54 | ///
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55 | EdkiiIoMmuOperationBusMasterWrite,
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56 | ///
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57 | /// Provides both read and write access to system memory by both the processor and a bus
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58 | /// master that is not capable of producing PCI dual address cycles.
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59 | ///
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60 | EdkiiIoMmuOperationBusMasterCommonBuffer,
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61 | ///
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62 | /// A read operation from system memory by a bus master that is capable of producing PCI
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63 | /// dual address cycles.
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64 | ///
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65 | EdkiiIoMmuOperationBusMasterRead64,
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66 | ///
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67 | /// A write operation to system memory by a bus master that is capable of producing PCI
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68 | /// dual address cycles.
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69 | ///
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70 | EdkiiIoMmuOperationBusMasterWrite64,
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71 | ///
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72 | /// Provides both read and write access to system memory by both the processor and a bus
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73 | /// master that is capable of producing PCI dual address cycles.
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74 | ///
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75 | EdkiiIoMmuOperationBusMasterCommonBuffer64,
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76 | EdkiiIoMmuOperationMaximum
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77 | } EDKII_IOMMU_OPERATION;
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78 |
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79 | //
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80 | // IOMMU attribute for AllocateBuffer
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81 | // Any undefined bits are reserved and must be zero.
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82 | //
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83 | #define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
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84 | #define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED 0x0800
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85 | #define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
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86 |
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87 | #define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE | EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED | EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
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88 |
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89 | #define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
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90 |
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91 | /**
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92 | Set IOMMU attribute for a system memory.
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93 |
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94 | If the IOMMU protocol exists, the system memory cannot be used
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95 | for DMA by default.
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96 |
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97 | When a device requests a DMA access for a system memory,
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98 | the device driver need use SetAttribute() to update the IOMMU
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99 | attribute to request DMA access (read and/or write).
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100 |
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101 | The DeviceHandle is used to identify which device submits the request.
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102 | The IOMMU implementation need translate the device path to an IOMMU device ID,
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103 | and set IOMMU hardware register accordingly.
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104 | 1) DeviceHandle can be a standard PCI device.
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105 | The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.
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106 | The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.
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107 | The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ|EDKII_IOMMU_ACCESS_WRITE.
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108 | After the memory is used, the memory need set 0 to keep it being protected.
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109 | 2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).
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110 | The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.
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111 |
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112 | @param[in] This The protocol instance pointer.
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113 | @param[in] DeviceHandle The device who initiates the DMA access request.
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114 | @param[in] Mapping The mapping value returned from Map().
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115 | @param[in] IoMmuAccess The IOMMU access.
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116 |
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117 | @retval EFI_SUCCESS The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.
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118 | @retval EFI_INVALID_PARAMETER DeviceHandle is an invalid handle.
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119 | @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
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120 | @retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combination of access.
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121 | @retval EFI_UNSUPPORTED DeviceHandle is unknown by the IOMMU.
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122 | @retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not supported by the IOMMU.
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123 | @retval EFI_UNSUPPORTED The IOMMU does not support the memory range specified by Mapping.
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124 | @retval EFI_OUT_OF_RESOURCES There are not enough resources available to modify the IOMMU access.
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125 | @retval EFI_DEVICE_ERROR The IOMMU device reported an error while attempting the operation.
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126 |
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127 | **/
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128 | typedef
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129 | EFI_STATUS
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130 | (EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(
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131 | IN EDKII_IOMMU_PROTOCOL *This,
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132 | IN EFI_HANDLE DeviceHandle,
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133 | IN VOID *Mapping,
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134 | IN UINT64 IoMmuAccess
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135 | );
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136 |
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137 | /**
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138 | Provides the controller-specific addresses required to access system memory from a
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139 | DMA bus master.
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140 |
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141 | @param This The protocol instance pointer.
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142 | @param Operation Indicates if the bus master is going to read or write to system memory.
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143 | @param HostAddress The system memory address to map to the PCI controller.
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144 | @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
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145 | that were mapped.
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146 | @param DeviceAddress The resulting map address for the bus master PCI controller to use to
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147 | access the hosts HostAddress.
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148 | @param Mapping A resulting value to pass to Unmap().
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149 |
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150 | @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
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151 | @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
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152 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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153 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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154 | @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
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155 |
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156 | **/
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157 | typedef
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158 | EFI_STATUS
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159 | (EFIAPI *EDKII_IOMMU_MAP)(
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160 | IN EDKII_IOMMU_PROTOCOL *This,
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161 | IN EDKII_IOMMU_OPERATION Operation,
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162 | IN VOID *HostAddress,
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163 | IN OUT UINTN *NumberOfBytes,
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164 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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165 | OUT VOID **Mapping
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166 | );
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167 |
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168 | /**
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169 | Completes the Map() operation and releases any corresponding resources.
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170 |
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171 | @param This The protocol instance pointer.
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172 | @param Mapping The mapping value returned from Map().
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173 |
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174 | @retval EFI_SUCCESS The range was unmapped.
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175 | @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
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176 | @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
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177 | **/
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178 | typedef
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179 | EFI_STATUS
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180 | (EFIAPI *EDKII_IOMMU_UNMAP)(
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181 | IN EDKII_IOMMU_PROTOCOL *This,
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182 | IN VOID *Mapping
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183 | );
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184 |
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185 | /**
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186 | Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
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187 | OperationBusMasterCommonBuffer64 mapping.
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188 |
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189 | @param This The protocol instance pointer.
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190 | @param Type This parameter is not used and must be ignored.
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191 | @param MemoryType The type of memory to allocate, EfiBootServicesData or
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192 | EfiRuntimeServicesData.
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193 | @param Pages The number of pages to allocate.
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194 | @param HostAddress A pointer to store the base system memory address of the
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195 | allocated range.
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196 | @param Attributes The requested bit mask of attributes for the allocated range.
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197 |
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198 | @retval EFI_SUCCESS The requested memory pages were allocated.
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199 | @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
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200 | MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.
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201 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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202 | @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
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203 |
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204 | **/
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205 | typedef
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206 | EFI_STATUS
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207 | (EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(
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208 | IN EDKII_IOMMU_PROTOCOL *This,
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209 | IN EFI_ALLOCATE_TYPE Type,
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210 | IN EFI_MEMORY_TYPE MemoryType,
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211 | IN UINTN Pages,
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212 | IN OUT VOID **HostAddress,
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213 | IN UINT64 Attributes
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214 | );
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215 |
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216 | /**
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217 | Frees memory that was allocated with AllocateBuffer().
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218 |
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219 | @param This The protocol instance pointer.
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220 | @param Pages The number of pages to free.
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221 | @param HostAddress The base system memory address of the allocated range.
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222 |
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223 | @retval EFI_SUCCESS The requested memory pages were freed.
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224 | @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
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225 | was not allocated with AllocateBuffer().
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226 |
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227 | **/
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228 | typedef
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229 | EFI_STATUS
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230 | (EFIAPI *EDKII_IOMMU_FREE_BUFFER)(
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231 | IN EDKII_IOMMU_PROTOCOL *This,
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232 | IN UINTN Pages,
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233 | IN VOID *HostAddress
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234 | );
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235 |
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236 | ///
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237 | /// IOMMU Protocol structure.
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238 | ///
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239 | struct _EDKII_IOMMU_PROTOCOL {
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240 | UINT64 Revision;
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241 | EDKII_IOMMU_SET_ATTRIBUTE SetAttribute;
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242 | EDKII_IOMMU_MAP Map;
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243 | EDKII_IOMMU_UNMAP Unmap;
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244 | EDKII_IOMMU_ALLOCATE_BUFFER AllocateBuffer;
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245 | EDKII_IOMMU_FREE_BUFFER FreeBuffer;
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246 | };
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247 |
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248 | ///
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249 | /// IOMMU Protocol GUID variable.
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250 | ///
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251 | extern EFI_GUID gEdkiiIoMmuProtocolGuid;
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252 |
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253 | #endif
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