1 | /** @file
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2 | ACPI 2.0 definitions from the ACPI Specification, revision 2.0
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3 |
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4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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6 | **/
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7 |
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8 | #ifndef _ACPI_2_0_H_
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9 | #define _ACPI_2_0_H_
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10 |
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11 | #include <IndustryStandard/Acpi10.h>
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12 |
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13 | //
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14 | // Define for Desriptor
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15 | //
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16 | #define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
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17 |
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18 | #define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
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19 |
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20 | //
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21 | // Ensure proper structure formats
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22 | //
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23 | #pragma pack(1)
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24 |
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25 | ///
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26 | /// Generic Register Descriptor
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27 | ///
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28 | typedef PACKED struct {
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29 | ACPI_LARGE_RESOURCE_HEADER Header;
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30 | UINT8 AddressSpaceId;
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31 | UINT8 RegisterBitWidth;
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32 | UINT8 RegisterBitOffset;
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33 | UINT8 AddressSize;
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34 | UINT64 RegisterAddress;
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35 | } EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;
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36 |
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37 | #pragma pack()
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38 |
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39 | //
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40 | // Ensure proper structure formats
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41 | //
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42 | #pragma pack(1)
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43 |
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44 | ///
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45 | /// ACPI 2.0 Generic Address Space definition
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46 | ///
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47 | typedef struct {
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48 | UINT8 AddressSpaceId;
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49 | UINT8 RegisterBitWidth;
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50 | UINT8 RegisterBitOffset;
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51 | UINT8 Reserved;
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52 | UINT64 Address;
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53 | } EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
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54 |
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55 | //
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56 | // Generic Address Space Address IDs
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57 | //
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58 | #define EFI_ACPI_2_0_SYSTEM_MEMORY 0
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59 | #define EFI_ACPI_2_0_SYSTEM_IO 1
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60 | #define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2
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61 | #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3
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62 | #define EFI_ACPI_2_0_SMBUS 4
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63 | #define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
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64 |
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65 | //
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66 | // ACPI 2.0 table structures
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67 | //
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68 |
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69 | ///
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70 | /// Root System Description Pointer Structure
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71 | ///
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72 | typedef struct {
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73 | UINT64 Signature;
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74 | UINT8 Checksum;
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75 | UINT8 OemId[6];
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76 | UINT8 Revision;
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77 | UINT32 RsdtAddress;
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78 | UINT32 Length;
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79 | UINT64 XsdtAddress;
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80 | UINT8 ExtendedChecksum;
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81 | UINT8 Reserved[3];
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82 | } EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
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83 |
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84 | ///
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85 | /// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
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86 | ///
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87 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
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88 |
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89 | ///
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90 | /// Common table header, this prefaces all ACPI tables, including FACS, but
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91 | /// excluding the RSD PTR structure
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92 | ///
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93 | typedef struct {
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94 | UINT32 Signature;
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95 | UINT32 Length;
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96 | } EFI_ACPI_2_0_COMMON_HEADER;
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97 |
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98 | //
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99 | // Root System Description Table
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100 | // No definition needed as it is a common description table header, the same with
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101 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
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102 | //
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103 |
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104 | ///
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105 | /// RSDT Revision (as defined in ACPI 2.0 spec.)
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106 | ///
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107 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
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108 |
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109 | //
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110 | // Extended System Description Table
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111 | // No definition needed as it is a common description table header, the same with
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112 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
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113 | //
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114 |
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115 | ///
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116 | /// XSDT Revision (as defined in ACPI 2.0 spec.)
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117 | ///
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118 | #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
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119 |
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120 | ///
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121 | /// Fixed ACPI Description Table Structure (FADT)
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122 | ///
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123 | typedef struct {
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124 | EFI_ACPI_DESCRIPTION_HEADER Header;
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125 | UINT32 FirmwareCtrl;
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126 | UINT32 Dsdt;
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127 | UINT8 Reserved0;
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128 | UINT8 PreferredPmProfile;
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129 | UINT16 SciInt;
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130 | UINT32 SmiCmd;
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131 | UINT8 AcpiEnable;
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132 | UINT8 AcpiDisable;
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133 | UINT8 S4BiosReq;
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134 | UINT8 PstateCnt;
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135 | UINT32 Pm1aEvtBlk;
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136 | UINT32 Pm1bEvtBlk;
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137 | UINT32 Pm1aCntBlk;
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138 | UINT32 Pm1bCntBlk;
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139 | UINT32 Pm2CntBlk;
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140 | UINT32 PmTmrBlk;
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141 | UINT32 Gpe0Blk;
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142 | UINT32 Gpe1Blk;
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143 | UINT8 Pm1EvtLen;
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144 | UINT8 Pm1CntLen;
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145 | UINT8 Pm2CntLen;
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146 | UINT8 PmTmrLen;
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147 | UINT8 Gpe0BlkLen;
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148 | UINT8 Gpe1BlkLen;
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149 | UINT8 Gpe1Base;
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150 | UINT8 CstCnt;
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151 | UINT16 PLvl2Lat;
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152 | UINT16 PLvl3Lat;
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153 | UINT16 FlushSize;
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154 | UINT16 FlushStride;
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155 | UINT8 DutyOffset;
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156 | UINT8 DutyWidth;
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157 | UINT8 DayAlrm;
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158 | UINT8 MonAlrm;
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159 | UINT8 Century;
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160 | UINT16 IaPcBootArch;
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161 | UINT8 Reserved1;
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162 | UINT32 Flags;
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163 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
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164 | UINT8 ResetValue;
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165 | UINT8 Reserved2[3];
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166 | UINT64 XFirmwareCtrl;
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167 | UINT64 XDsdt;
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168 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
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169 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
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170 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
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171 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
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172 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
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173 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
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174 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
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175 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
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176 | } EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
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177 |
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178 | ///
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179 | /// FADT Version (as defined in ACPI 2.0 spec.)
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180 | ///
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181 | #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03
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182 |
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183 | //
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184 | // Fixed ACPI Description Table Preferred Power Management Profile
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185 | //
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186 | #define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
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187 | #define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
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188 | #define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
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189 | #define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
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190 | #define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
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191 | #define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
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192 | #define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
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193 |
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194 | //
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195 | // Fixed ACPI Description Table Boot Architecture Flags
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196 | // All other bits are reserved and must be set to 0.
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197 | //
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198 | #define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
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199 | #define EFI_ACPI_2_0_8042 BIT1
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200 |
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201 | //
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202 | // Fixed ACPI Description Table Fixed Feature Flags
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203 | // All other bits are reserved and must be set to 0.
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204 | //
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205 | #define EFI_ACPI_2_0_WBINVD BIT0
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206 | #define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
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207 | #define EFI_ACPI_2_0_PROC_C1 BIT2
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208 | #define EFI_ACPI_2_0_P_LVL2_UP BIT3
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209 | #define EFI_ACPI_2_0_PWR_BUTTON BIT4
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210 | #define EFI_ACPI_2_0_SLP_BUTTON BIT5
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211 | #define EFI_ACPI_2_0_FIX_RTC BIT6
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212 | #define EFI_ACPI_2_0_RTC_S4 BIT7
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213 | #define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
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214 | #define EFI_ACPI_2_0_DCK_CAP BIT9
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215 | #define EFI_ACPI_2_0_RESET_REG_SUP BIT10
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216 | #define EFI_ACPI_2_0_SEALED_CASE BIT11
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217 | #define EFI_ACPI_2_0_HEADLESS BIT12
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218 | #define EFI_ACPI_2_0_CPU_SW_SLP BIT13
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219 |
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220 | ///
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221 | /// Firmware ACPI Control Structure
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222 | ///
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223 | typedef struct {
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224 | UINT32 Signature;
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225 | UINT32 Length;
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226 | UINT32 HardwareSignature;
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227 | UINT32 FirmwareWakingVector;
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228 | UINT32 GlobalLock;
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229 | UINT32 Flags;
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230 | UINT64 XFirmwareWakingVector;
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231 | UINT8 Version;
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232 | UINT8 Reserved[31];
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233 | } EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
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234 |
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235 | ///
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236 | /// FACS Version (as defined in ACPI 2.0 spec.)
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237 | ///
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238 | #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
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239 |
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240 | ///
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241 | /// Firmware Control Structure Feature Flags
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242 | /// All other bits are reserved and must be set to 0.
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243 | ///
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244 | #define EFI_ACPI_2_0_S4BIOS_F BIT0
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245 |
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246 | ///
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247 | /// Multiple APIC Description Table header definition. The rest of the table
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248 | /// must be defined in a platform specific manner.
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249 | ///
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250 | typedef struct {
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251 | EFI_ACPI_DESCRIPTION_HEADER Header;
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252 | UINT32 LocalApicAddress;
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253 | UINT32 Flags;
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254 | } EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
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255 |
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256 | ///
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257 | /// MADT Revision (as defined in ACPI 2.0 spec.)
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258 | ///
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259 | #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
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260 |
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261 | ///
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262 | /// Multiple APIC Flags
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263 | /// All other bits are reserved and must be set to 0.
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264 | ///
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265 | #define EFI_ACPI_2_0_PCAT_COMPAT BIT0
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266 |
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267 | //
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268 | // Multiple APIC Description Table APIC structure types
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269 | // All other values between 0x09 an 0xFF are reserved and
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270 | // will be ignored by OSPM.
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271 | //
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272 | #define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00
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273 | #define EFI_ACPI_2_0_IO_APIC 0x01
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274 | #define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02
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275 | #define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
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276 | #define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04
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277 | #define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
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278 | #define EFI_ACPI_2_0_IO_SAPIC 0x06
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279 | #define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07
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280 | #define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08
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281 |
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282 | //
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283 | // APIC Structure Definitions
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284 | //
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285 |
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286 | ///
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287 | /// Processor Local APIC Structure Definition
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288 | ///
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289 | typedef struct {
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290 | UINT8 Type;
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291 | UINT8 Length;
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292 | UINT8 AcpiProcessorId;
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293 | UINT8 ApicId;
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294 | UINT32 Flags;
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295 | } EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
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296 |
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297 | ///
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298 | /// Local APIC Flags. All other bits are reserved and must be 0.
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299 | ///
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300 | #define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
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301 |
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302 | ///
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303 | /// IO APIC Structure
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304 | ///
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305 | typedef struct {
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306 | UINT8 Type;
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307 | UINT8 Length;
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308 | UINT8 IoApicId;
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309 | UINT8 Reserved;
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310 | UINT32 IoApicAddress;
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311 | UINT32 GlobalSystemInterruptBase;
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312 | } EFI_ACPI_2_0_IO_APIC_STRUCTURE;
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313 |
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314 | ///
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315 | /// Interrupt Source Override Structure
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316 | ///
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317 | typedef struct {
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318 | UINT8 Type;
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319 | UINT8 Length;
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320 | UINT8 Bus;
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321 | UINT8 Source;
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322 | UINT32 GlobalSystemInterrupt;
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323 | UINT16 Flags;
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324 | } EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
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325 |
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326 | ///
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327 | /// Non-Maskable Interrupt Source Structure
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328 | ///
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329 | typedef struct {
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330 | UINT8 Type;
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331 | UINT8 Length;
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332 | UINT16 Flags;
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333 | UINT32 GlobalSystemInterrupt;
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334 | } EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
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335 |
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336 | ///
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337 | /// Local APIC NMI Structure
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338 | ///
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339 | typedef struct {
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340 | UINT8 Type;
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341 | UINT8 Length;
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342 | UINT8 AcpiProcessorId;
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343 | UINT16 Flags;
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344 | UINT8 LocalApicLint;
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345 | } EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
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346 |
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347 | ///
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348 | /// Local APIC Address Override Structure
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349 | ///
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350 | typedef struct {
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351 | UINT8 Type;
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352 | UINT8 Length;
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353 | UINT16 Reserved;
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354 | UINT64 LocalApicAddress;
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355 | } EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
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356 |
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357 | ///
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358 | /// IO SAPIC Structure
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359 | ///
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360 | typedef struct {
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361 | UINT8 Type;
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362 | UINT8 Length;
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363 | UINT8 IoApicId;
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364 | UINT8 Reserved;
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365 | UINT32 GlobalSystemInterruptBase;
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366 | UINT64 IoSapicAddress;
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367 | } EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
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368 |
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369 | ///
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370 | /// Local SAPIC Structure
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371 | ///
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372 | typedef struct {
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373 | UINT8 Type;
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374 | UINT8 Length;
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375 | UINT8 AcpiProcessorId;
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376 | UINT8 LocalSapicId;
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377 | UINT8 LocalSapicEid;
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378 | UINT8 Reserved[3];
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379 | UINT32 Flags;
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380 | } EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
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381 |
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382 | ///
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383 | /// Platform Interrupt Sources Structure
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384 | ///
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385 | typedef struct {
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386 | UINT8 Type;
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387 | UINT8 Length;
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388 | UINT16 Flags;
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389 | UINT8 InterruptType;
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390 | UINT8 ProcessorId;
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391 | UINT8 ProcessorEid;
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392 | UINT8 IoSapicVector;
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393 | UINT32 GlobalSystemInterrupt;
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394 | UINT32 Reserved;
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395 | } EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
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396 |
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397 | ///
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398 | /// Smart Battery Description Table (SBST)
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399 | ///
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400 | typedef struct {
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401 | EFI_ACPI_DESCRIPTION_HEADER Header;
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402 | UINT32 WarningEnergyLevel;
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403 | UINT32 LowEnergyLevel;
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404 | UINT32 CriticalEnergyLevel;
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405 | } EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
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406 |
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407 | ///
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408 | /// SBST Version (as defined in ACPI 2.0 spec.)
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409 | ///
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410 | #define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
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411 |
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412 | ///
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413 | /// Embedded Controller Boot Resources Table (ECDT)
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414 | /// The table is followed by a null terminated ASCII string that contains
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415 | /// a fully qualified reference to the name space object.
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416 | ///
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417 | typedef struct {
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418 | EFI_ACPI_DESCRIPTION_HEADER Header;
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419 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
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420 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
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421 | UINT32 Uid;
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422 | UINT8 GpeBit;
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423 | } EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
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424 |
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425 | ///
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426 | /// ECDT Version (as defined in ACPI 2.0 spec.)
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427 | ///
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428 | #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
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429 |
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430 | //
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431 | // Known table signatures
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432 | //
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433 |
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434 | ///
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435 | /// "RSD PTR " Root System Description Pointer
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436 | ///
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437 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
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438 |
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439 | ///
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440 | /// "SPIC" Multiple SAPIC Description Table
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441 | ///
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442 | /// BUGBUG: Don't know where this came from except SR870BN4 uses it.
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443 | /// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
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444 | ///
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445 | #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
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446 |
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447 | ///
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448 | /// "BOOT" MS Simple Boot Spec
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449 | ///
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450 | #define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
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451 |
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452 | ///
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453 | /// "DBGP" MS Bebug Port Spec
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454 | ///
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455 | #define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
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456 |
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457 | ///
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458 | /// "DSDT" Differentiated System Description Table
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459 | ///
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460 | #define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
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461 |
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462 | ///
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463 | /// "ECDT" Embedded Controller Boot Resources Table
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464 | ///
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465 | #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
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466 |
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467 | ///
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468 | /// "ETDT" Event Timer Description Table
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469 | ///
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470 | #define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
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471 |
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472 | ///
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473 | /// "FACS" Firmware ACPI Control Structure
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474 | ///
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475 | #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
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476 |
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477 | ///
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478 | /// "FACP" Fixed ACPI Description Table
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479 | ///
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480 | #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
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481 |
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482 | ///
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483 | /// "APIC" Multiple APIC Description Table
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484 | ///
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485 | #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
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486 |
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487 | ///
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488 | /// "PSDT" Persistent System Description Table
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489 | ///
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490 | #define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
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491 |
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492 | ///
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493 | /// "RSDT" Root System Description Table
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494 | ///
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495 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
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496 |
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497 | ///
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498 | /// "SBST" Smart Battery Specification Table
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499 | ///
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500 | #define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
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501 |
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502 | ///
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503 | /// "SLIT" System Locality Information Table
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504 | ///
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505 | #define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
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506 |
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507 | ///
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508 | /// "SPCR" Serial Port Concole Redirection Table
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509 | ///
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510 | #define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
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511 |
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512 | ///
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513 | /// "SRAT" Static Resource Affinity Table
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514 | ///
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515 | #define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
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516 |
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517 | ///
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518 | /// "SSDT" Secondary System Description Table
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519 | ///
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520 | #define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
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521 |
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522 | ///
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523 | /// "SPMI" Server Platform Management Interface Table
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524 | ///
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525 | #define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
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526 |
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527 | ///
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528 | /// "XSDT" Extended System Description Table
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529 | ///
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530 | #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
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531 |
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532 | ///
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533 | /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
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534 | ///
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535 | #define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
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536 |
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537 | #pragma pack()
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538 |
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539 | #endif
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