Acpi63.h@ 108794

Last change on this file since 108794 was 108794, checked in by vboxsync, 2 weeks ago
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1	/** @file
2	ACPI 6.3 definitions from the ACPI Specification Revision 6.3 Jan, 2019.
3
4	Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
5	Copyright (c) 2019 - 2020, ARM Ltd. All rights reserved.<BR>
6
7	SPDX-License-Identifier: BSD-2-Clause-Patent
8	**/
9
10	#ifndef _ACPI_6_3_H_
11	#define _ACPI_6_3_H_
12
13	#include <IndustryStandard/Acpi62.h>
14
15	///
16	/// _PSD Revision for ACPI 6.3
17	///
18	#define EFI_ACPI_6_3_AML_PSD_REVISION 0
19
20	///
21	/// _CPC Revision for ACPI 6.3
22	///
23	#define EFI_ACPI_6_3_AML_CPC_REVISION 3
24
25	//
26	// Ensure proper structure formats
27	//
28	#pragma pack(1)
29
30	///
31	/// ACPI 6.3 Generic Address Space definition
32	///
33	typedef struct {
34	UINT8 AddressSpaceId;
35	UINT8 RegisterBitWidth;
36	UINT8 RegisterBitOffset;
37	UINT8 AccessSize;
38	UINT64 Address;
39	} EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE;
40
41	//
42	// Generic Address Space Address IDs
43	//
44	#define EFI_ACPI_6_3_SYSTEM_MEMORY 0x00
45	#define EFI_ACPI_6_3_SYSTEM_IO 0x01
46	#define EFI_ACPI_6_3_PCI_CONFIGURATION_SPACE 0x02
47	#define EFI_ACPI_6_3_EMBEDDED_CONTROLLER 0x03
48	#define EFI_ACPI_6_3_SMBUS 0x04
49	#define EFI_ACPI_6_3_SYSTEM_CMOS 0x05
50	#define EFI_ACPI_6_3_PCI_BAR_TARGET 0x06
51	#define EFI_ACPI_6_3_IPMI 0x07
52	#define EFI_ACPI_6_3_GENERAL_PURPOSE_IO 0x08
53	#define EFI_ACPI_6_3_GENERIC_SERIAL_BUS 0x09
54	#define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL 0x0A
55	#define EFI_ACPI_6_3_FUNCTIONAL_FIXED_HARDWARE 0x7F
56
57	//
58	// Generic Address Space Access Sizes
59	//
60	#define EFI_ACPI_6_3_UNDEFINED 0
61	#define EFI_ACPI_6_3_BYTE 1
62	#define EFI_ACPI_6_3_WORD 2
63	#define EFI_ACPI_6_3_DWORD 3
64	#define EFI_ACPI_6_3_QWORD 4
65
66	//
67	// ACPI 6.3 table structures
68	//
69
70	///
71	/// Root System Description Pointer Structure
72	///
73	typedef struct {
74	UINT64 Signature;
75	UINT8 Checksum;
76	UINT8 OemId[6];
77	UINT8 Revision;
78	UINT32 RsdtAddress;
79	UINT32 Length;
80	UINT64 XsdtAddress;
81	UINT8 ExtendedChecksum;
82	UINT8 Reserved[3];
83	} EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER;
84
85	///
86	/// RSD_PTR Revision (as defined in ACPI 6.3 spec.)
87	///
88	#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.3) says current value is 2
89
90	///
91	/// Common table header, this prefaces all ACPI tables, including FACS, but
92	/// excluding the RSD PTR structure
93	///
94	typedef struct {
95	UINT32 Signature;
96	UINT32 Length;
97	} EFI_ACPI_6_3_COMMON_HEADER;
98
99	//
100	// Root System Description Table
101	// No definition needed as it is a common description table header, the same with
102	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
103	//
104
105	///
106	/// RSDT Revision (as defined in ACPI 6.3 spec.)
107	///
108	#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
109
110	//
111	// Extended System Description Table
112	// No definition needed as it is a common description table header, the same with
113	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
114	//
115
116	///
117	/// XSDT Revision (as defined in ACPI 6.3 spec.)
118	///
119	#define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
120
121	///
122	/// Fixed ACPI Description Table Structure (FADT)
123	///
124	typedef struct {
125	EFI_ACPI_DESCRIPTION_HEADER Header;
126	UINT32 FirmwareCtrl;
127	UINT32 Dsdt;
128	UINT8 Reserved0;
129	UINT8 PreferredPmProfile;
130	UINT16 SciInt;
131	UINT32 SmiCmd;
132	UINT8 AcpiEnable;
133	UINT8 AcpiDisable;
134	UINT8 S4BiosReq;
135	UINT8 PstateCnt;
136	UINT32 Pm1aEvtBlk;
137	UINT32 Pm1bEvtBlk;
138	UINT32 Pm1aCntBlk;
139	UINT32 Pm1bCntBlk;
140	UINT32 Pm2CntBlk;
141	UINT32 PmTmrBlk;
142	UINT32 Gpe0Blk;
143	UINT32 Gpe1Blk;
144	UINT8 Pm1EvtLen;
145	UINT8 Pm1CntLen;
146	UINT8 Pm2CntLen;
147	UINT8 PmTmrLen;
148	UINT8 Gpe0BlkLen;
149	UINT8 Gpe1BlkLen;
150	UINT8 Gpe1Base;
151	UINT8 CstCnt;
152	UINT16 PLvl2Lat;
153	UINT16 PLvl3Lat;
154	UINT16 FlushSize;
155	UINT16 FlushStride;
156	UINT8 DutyOffset;
157	UINT8 DutyWidth;
158	UINT8 DayAlrm;
159	UINT8 MonAlrm;
160	UINT8 Century;
161	UINT16 IaPcBootArch;
162	UINT8 Reserved1;
163	UINT32 Flags;
164	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ResetReg;
165	UINT8 ResetValue;
166	UINT16 ArmBootArch;
167	UINT8 MinorVersion;
168	UINT64 XFirmwareCtrl;
169	UINT64 XDsdt;
170	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
171	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
172	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
173	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
174	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
175	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
176	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
177	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
178	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
179	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
180	UINT64 HypervisorVendorIdentity;
181	} EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE;
182
183	///
184	/// FADT Version (as defined in ACPI 6.3 spec.)
185	///
186	#define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
187	#define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x03
188
189	//
190	// Fixed ACPI Description Table Preferred Power Management Profile
191	//
192	#define EFI_ACPI_6_3_PM_PROFILE_UNSPECIFIED 0
193	#define EFI_ACPI_6_3_PM_PROFILE_DESKTOP 1
194	#define EFI_ACPI_6_3_PM_PROFILE_MOBILE 2
195	#define EFI_ACPI_6_3_PM_PROFILE_WORKSTATION 3
196	#define EFI_ACPI_6_3_PM_PROFILE_ENTERPRISE_SERVER 4
197	#define EFI_ACPI_6_3_PM_PROFILE_SOHO_SERVER 5
198	#define EFI_ACPI_6_3_PM_PROFILE_APPLIANCE_PC 6
199	#define EFI_ACPI_6_3_PM_PROFILE_PERFORMANCE_SERVER 7
200	#define EFI_ACPI_6_3_PM_PROFILE_TABLET 8
201
202	//
203	// Fixed ACPI Description Table Boot Architecture Flags
204	// All other bits are reserved and must be set to 0.
205	//
206	#define EFI_ACPI_6_3_LEGACY_DEVICES BIT0
207	#define EFI_ACPI_6_3_8042 BIT1
208	#define EFI_ACPI_6_3_VGA_NOT_PRESENT BIT2
209	#define EFI_ACPI_6_3_MSI_NOT_SUPPORTED BIT3
210	#define EFI_ACPI_6_3_PCIE_ASPM_CONTROLS BIT4
211	#define EFI_ACPI_6_3_CMOS_RTC_NOT_PRESENT BIT5
212
213	//
214	// Fixed ACPI Description Table Arm Boot Architecture Flags
215	// All other bits are reserved and must be set to 0.
216	//
217	#define EFI_ACPI_6_3_ARM_PSCI_COMPLIANT BIT0
218	#define EFI_ACPI_6_3_ARM_PSCI_USE_HVC BIT1
219
220	//
221	// Fixed ACPI Description Table Fixed Feature Flags
222	// All other bits are reserved and must be set to 0.
223	//
224	#define EFI_ACPI_6_3_WBINVD BIT0
225	#define EFI_ACPI_6_3_WBINVD_FLUSH BIT1
226	#define EFI_ACPI_6_3_PROC_C1 BIT2
227	#define EFI_ACPI_6_3_P_LVL2_UP BIT3
228	#define EFI_ACPI_6_3_PWR_BUTTON BIT4
229	#define EFI_ACPI_6_3_SLP_BUTTON BIT5
230	#define EFI_ACPI_6_3_FIX_RTC BIT6
231	#define EFI_ACPI_6_3_RTC_S4 BIT7
232	#define EFI_ACPI_6_3_TMR_VAL_EXT BIT8
233	#define EFI_ACPI_6_3_DCK_CAP BIT9
234	#define EFI_ACPI_6_3_RESET_REG_SUP BIT10
235	#define EFI_ACPI_6_3_SEALED_CASE BIT11
236	#define EFI_ACPI_6_3_HEADLESS BIT12
237	#define EFI_ACPI_6_3_CPU_SW_SLP BIT13
238	#define EFI_ACPI_6_3_PCI_EXP_WAK BIT14
239	#define EFI_ACPI_6_3_USE_PLATFORM_CLOCK BIT15
240	#define EFI_ACPI_6_3_S4_RTC_STS_VALID BIT16
241	#define EFI_ACPI_6_3_REMOTE_POWER_ON_CAPABLE BIT17
242	#define EFI_ACPI_6_3_FORCE_APIC_CLUSTER_MODEL BIT18
243	#define EFI_ACPI_6_3_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
244	#define EFI_ACPI_6_3_HW_REDUCED_ACPI BIT20
245	#define EFI_ACPI_6_3_LOW_POWER_S0_IDLE_CAPABLE BIT21
246
247	///
248	/// Firmware ACPI Control Structure
249	///
250	typedef struct {
251	UINT32 Signature;
252	UINT32 Length;
253	UINT32 HardwareSignature;
254	UINT32 FirmwareWakingVector;
255	UINT32 GlobalLock;
256	UINT32 Flags;
257	UINT64 XFirmwareWakingVector;
258	UINT8 Version;
259	UINT8 Reserved0[3];
260	UINT32 OspmFlags;
261	UINT8 Reserved1[24];
262	} EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE;
263
264	///
265	/// FACS Version (as defined in ACPI 6.3 spec.)
266	///
267	#define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
268
269	///
270	/// Firmware Control Structure Feature Flags
271	/// All other bits are reserved and must be set to 0.
272	///
273	#define EFI_ACPI_6_3_S4BIOS_F BIT0
274	#define EFI_ACPI_6_3_64BIT_WAKE_SUPPORTED_F BIT1
275
276	///
277	/// OSPM Enabled Firmware Control Structure Flags
278	/// All other bits are reserved and must be set to 0.
279	///
280	#define EFI_ACPI_6_3_OSPM_64BIT_WAKE_F BIT0
281
282	//
283	// Differentiated System Description Table,
284	// Secondary System Description Table
285	// and Persistent System Description Table,
286	// no definition needed as they are common description table header, the same with
287	// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
288	//
289	#define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
290	#define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
291
292	///
293	/// Multiple APIC Description Table header definition. The rest of the table
294	/// must be defined in a platform specific manner.
295	///
296	typedef struct {
297	EFI_ACPI_DESCRIPTION_HEADER Header;
298	UINT32 LocalApicAddress;
299	UINT32 Flags;
300	} EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
301
302	///
303	/// MADT Revision (as defined in ACPI 6.3 spec.)
304	///
305	#define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05
306
307	///
308	/// Multiple APIC Flags
309	/// All other bits are reserved and must be set to 0.
310	///
311	#define EFI_ACPI_6_3_PCAT_COMPAT BIT0
312
313	//
314	// Multiple APIC Description Table APIC structure types
315	// All other values between 0x0D and 0x7F are reserved and
316	// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
317	//
318	#define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC 0x00
319	#define EFI_ACPI_6_3_IO_APIC 0x01
320	#define EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE 0x02
321	#define EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE 0x03
322	#define EFI_ACPI_6_3_LOCAL_APIC_NMI 0x04
323	#define EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
324	#define EFI_ACPI_6_3_IO_SAPIC 0x06
325	#define EFI_ACPI_6_3_LOCAL_SAPIC 0x07
326	#define EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES 0x08
327	#define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC 0x09
328	#define EFI_ACPI_6_3_LOCAL_X2APIC_NMI 0x0A
329	#define EFI_ACPI_6_3_GIC 0x0B
330	#define EFI_ACPI_6_3_GICD 0x0C
331	#define EFI_ACPI_6_3_GIC_MSI_FRAME 0x0D
332	#define EFI_ACPI_6_3_GICR 0x0E
333	#define EFI_ACPI_6_3_GIC_ITS 0x0F
334
335	//
336	// APIC Structure Definitions
337	//
338
339	///
340	/// Processor Local APIC Structure Definition
341	///
342	typedef struct {
343	UINT8 Type;
344	UINT8 Length;
345	UINT8 AcpiProcessorUid;
346	UINT8 ApicId;
347	UINT32 Flags;
348	} EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE;
349
350	///
351	/// Local APIC Flags. All other bits are reserved and must be 0.
352	///
353	#define EFI_ACPI_6_3_LOCAL_APIC_ENABLED BIT0
354	#define EFI_ACPI_6_3_LOCAL_APIC_ONLINE_CAPABLE BIT1
355
356	///
357	/// IO APIC Structure
358	///
359	typedef struct {
360	UINT8 Type;
361	UINT8 Length;
362	UINT8 IoApicId;
363	UINT8 Reserved;
364	UINT32 IoApicAddress;
365	UINT32 GlobalSystemInterruptBase;
366	} EFI_ACPI_6_3_IO_APIC_STRUCTURE;
367
368	///
369	/// Interrupt Source Override Structure
370	///
371	typedef struct {
372	UINT8 Type;
373	UINT8 Length;
374	UINT8 Bus;
375	UINT8 Source;
376	UINT32 GlobalSystemInterrupt;
377	UINT16 Flags;
378	} EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
379
380	///
381	/// Platform Interrupt Sources Structure Definition
382	///
383	typedef struct {
384	UINT8 Type;
385	UINT8 Length;
386	UINT16 Flags;
387	UINT8 InterruptType;
388	UINT8 ProcessorId;
389	UINT8 ProcessorEid;
390	UINT8 IoSapicVector;
391	UINT32 GlobalSystemInterrupt;
392	UINT32 PlatformInterruptSourceFlags;
393	UINT8 CpeiProcessorOverride;
394	UINT8 Reserved[31];
395	} EFI_ACPI_6_3_PLATFORM_INTERRUPT_APIC_STRUCTURE;
396
397	//
398	// MPS INTI flags.
399	// All other bits are reserved and must be set to 0.
400	//
401	#define EFI_ACPI_6_3_POLARITY (3 << 0)
402	#define EFI_ACPI_6_3_TRIGGER_MODE (3 << 2)
403
404	///
405	/// Non-Maskable Interrupt Source Structure
406	///
407	typedef struct {
408	UINT8 Type;
409	UINT8 Length;
410	UINT16 Flags;
411	UINT32 GlobalSystemInterrupt;
412	} EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
413
414	///
415	/// Local APIC NMI Structure
416	///
417	typedef struct {
418	UINT8 Type;
419	UINT8 Length;
420	UINT8 AcpiProcessorUid;
421	UINT16 Flags;
422	UINT8 LocalApicLint;
423	} EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE;
424
425	///
426	/// Local APIC Address Override Structure
427	///
428	typedef struct {
429	UINT8 Type;
430	UINT8 Length;
431	UINT16 Reserved;
432	UINT64 LocalApicAddress;
433	} EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
434
435	///
436	/// IO SAPIC Structure
437	///
438	typedef struct {
439	UINT8 Type;
440	UINT8 Length;
441	UINT8 IoApicId;
442	UINT8 Reserved;
443	UINT32 GlobalSystemInterruptBase;
444	UINT64 IoSapicAddress;
445	} EFI_ACPI_6_3_IO_SAPIC_STRUCTURE;
446
447	///
448	/// Local SAPIC Structure
449	/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
450	///
451	typedef struct {
452	UINT8 Type;
453	UINT8 Length;
454	UINT8 AcpiProcessorId;
455	UINT8 LocalSapicId;
456	UINT8 LocalSapicEid;
457	UINT8 Reserved[3];
458	UINT32 Flags;
459	UINT32 ACPIProcessorUIDValue;
460	} EFI_ACPI_6_3_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
461
462	///
463	/// Platform Interrupt Sources Structure
464	///
465	typedef struct {
466	UINT8 Type;
467	UINT8 Length;
468	UINT16 Flags;
469	UINT8 InterruptType;
470	UINT8 ProcessorId;
471	UINT8 ProcessorEid;
472	UINT8 IoSapicVector;
473	UINT32 GlobalSystemInterrupt;
474	UINT32 PlatformInterruptSourceFlags;
475	} EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
476
477	///
478	/// Platform Interrupt Source Flags.
479	/// All other bits are reserved and must be set to 0.
480	///
481	#define EFI_ACPI_6_3_CPEI_PROCESSOR_OVERRIDE BIT0
482
483	///
484	/// Processor Local x2APIC Structure Definition
485	///
486	typedef struct {
487	UINT8 Type;
488	UINT8 Length;
489	UINT8 Reserved[2];
490	UINT32 X2ApicId;
491	UINT32 Flags;
492	UINT32 AcpiProcessorUid;
493	} EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
494
495	///
496	/// Local x2APIC NMI Structure
497	///
498	typedef struct {
499	UINT8 Type;
500	UINT8 Length;
501	UINT16 Flags;
502	UINT32 AcpiProcessorUid;
503	UINT8 LocalX2ApicLint;
504	UINT8 Reserved[3];
505	} EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE;
506
507	///
508	/// GIC Structure
509	///
510	typedef struct {
511	UINT8 Type;
512	UINT8 Length;
513	UINT16 Reserved;
514	UINT32 CPUInterfaceNumber;
515	UINT32 AcpiProcessorUid;
516	UINT32 Flags;
517	UINT32 ParkingProtocolVersion;
518	UINT32 PerformanceInterruptGsiv;
519	UINT64 ParkedAddress;
520	UINT64 PhysicalBaseAddress;
521	UINT64 GICV;
522	UINT64 GICH;
523	UINT32 VGICMaintenanceInterrupt;
524	UINT64 GICRBaseAddress;
525	UINT64 MPIDR;
526	UINT8 ProcessorPowerEfficiencyClass;
527	UINT8 Reserved2;
528	UINT16 SpeOverflowInterrupt;
529	} EFI_ACPI_6_3_GIC_STRUCTURE;
530
531	///
532	/// GIC Flags. All other bits are reserved and must be 0.
533	///
534	#define EFI_ACPI_6_3_GIC_ENABLED BIT0
535	#define EFI_ACPI_6_3_PERFORMANCE_INTERRUPT_MODEL BIT1
536	#define EFI_ACPI_6_3_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
537
538	///
539	/// GIC Distributor Structure
540	///
541	typedef struct {
542	UINT8 Type;
543	UINT8 Length;
544	UINT16 Reserved1;
545	UINT32 GicId;
546	UINT64 PhysicalBaseAddress;
547	UINT32 SystemVectorBase;
548	UINT8 GicVersion;
549	UINT8 Reserved2[3];
550	} EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE;
551
552	///
553	/// GIC Version
554	///
555	#define EFI_ACPI_6_3_GIC_V1 0x01
556	#define EFI_ACPI_6_3_GIC_V2 0x02
557	#define EFI_ACPI_6_3_GIC_V3 0x03
558	#define EFI_ACPI_6_3_GIC_V4 0x04
559
560	///
561	/// GIC MSI Frame Structure
562	///
563	typedef struct {
564	UINT8 Type;
565	UINT8 Length;
566	UINT16 Reserved1;
567	UINT32 GicMsiFrameId;
568	UINT64 PhysicalBaseAddress;
569	UINT32 Flags;
570	UINT16 SPICount;
571	UINT16 SPIBase;
572	} EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE;
573
574	///
575	/// GIC MSI Frame Flags. All other bits are reserved and must be 0.
576	///
577	#define EFI_ACPI_6_3_SPI_COUNT_BASE_SELECT BIT0
578
579	///
580	/// GICR Structure
581	///
582	typedef struct {
583	UINT8 Type;
584	UINT8 Length;
585	UINT16 Reserved;
586	UINT64 DiscoveryRangeBaseAddress;
587	UINT32 DiscoveryRangeLength;
588	} EFI_ACPI_6_3_GICR_STRUCTURE;
589
590	///
591	/// GIC Interrupt Translation Service Structure
592	///
593	typedef struct {
594	UINT8 Type;
595	UINT8 Length;
596	UINT16 Reserved;
597	UINT32 GicItsId;
598	UINT64 PhysicalBaseAddress;
599	UINT32 Reserved2;
600	} EFI_ACPI_6_3_GIC_ITS_STRUCTURE;
601
602	///
603	/// Smart Battery Description Table (SBST)
604	///
605	typedef struct {
606	EFI_ACPI_DESCRIPTION_HEADER Header;
607	UINT32 WarningEnergyLevel;
608	UINT32 LowEnergyLevel;
609	UINT32 CriticalEnergyLevel;
610	} EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE;
611
612	///
613	/// SBST Version (as defined in ACPI 6.3 spec.)
614	///
615	#define EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
616
617	///
618	/// Embedded Controller Boot Resources Table (ECDT)
619	/// The table is followed by a null terminated ASCII string that contains
620	/// a fully qualified reference to the name space object.
621	///
622	typedef struct {
623	EFI_ACPI_DESCRIPTION_HEADER Header;
624	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcControl;
625	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcData;
626	UINT32 Uid;
627	UINT8 GpeBit;
628	} EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
629
630	///
631	/// ECDT Version (as defined in ACPI 6.3 spec.)
632	///
633	#define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
634
635	///
636	/// System Resource Affinity Table (SRAT). The rest of the table
637	/// must be defined in a platform specific manner.
638	///
639	typedef struct {
640	EFI_ACPI_DESCRIPTION_HEADER Header;
641	UINT32 Reserved1; ///< Must be set to 1
642	UINT64 Reserved2;
643	} EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
644
645	///
646	/// SRAT Version (as defined in ACPI 6.3 spec.)
647	///
648	#define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
649
650	//
651	// SRAT structure types.
652	// All other values between 0x06 an 0xFF are reserved and
653	// will be ignored by OSPM.
654	//
655	#define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
656	#define EFI_ACPI_6_3_MEMORY_AFFINITY 0x01
657	#define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
658	#define EFI_ACPI_6_3_GICC_AFFINITY 0x03
659	#define EFI_ACPI_6_3_GIC_ITS_AFFINITY 0x04
660	#define EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY 0x05
661
662	///
663	/// Processor Local APIC/SAPIC Affinity Structure Definition
664	///
665	typedef struct {
666	UINT8 Type;
667	UINT8 Length;
668	UINT8 ProximityDomain7To0;
669	UINT8 ApicId;
670	UINT32 Flags;
671	UINT8 LocalSapicEid;
672	UINT8 ProximityDomain31To8[3];
673	UINT32 ClockDomain;
674	} EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
675
676	///
677	/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
678	///
679	#define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
680
681	///
682	/// Memory Affinity Structure Definition
683	///
684	typedef struct {
685	UINT8 Type;
686	UINT8 Length;
687	UINT32 ProximityDomain;
688	UINT16 Reserved1;
689	UINT32 AddressBaseLow;
690	UINT32 AddressBaseHigh;
691	UINT32 LengthLow;
692	UINT32 LengthHigh;
693	UINT32 Reserved2;
694	UINT32 Flags;
695	UINT64 Reserved3;
696	} EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE;
697
698	//
699	// Memory Flags. All other bits are reserved and must be 0.
700	//
701	#define EFI_ACPI_6_3_MEMORY_ENABLED (1 << 0)
702	#define EFI_ACPI_6_3_MEMORY_HOT_PLUGGABLE (1 << 1)
703	#define EFI_ACPI_6_3_MEMORY_NONVOLATILE (1 << 2)
704
705	///
706	/// Processor Local x2APIC Affinity Structure Definition
707	///
708	typedef struct {
709	UINT8 Type;
710	UINT8 Length;
711	UINT8 Reserved1[2];
712	UINT32 ProximityDomain;
713	UINT32 X2ApicId;
714	UINT32 Flags;
715	UINT32 ClockDomain;
716	UINT8 Reserved2[4];
717	} EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
718
719	///
720	/// GICC Affinity Structure Definition
721	///
722	typedef struct {
723	UINT8 Type;
724	UINT8 Length;
725	UINT32 ProximityDomain;
726	UINT32 AcpiProcessorUid;
727	UINT32 Flags;
728	UINT32 ClockDomain;
729	} EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE;
730
731	///
732	/// GICC Flags. All other bits are reserved and must be 0.
733	///
734	#define EFI_ACPI_6_3_GICC_ENABLED (1 << 0)
735
736	///
737	/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition
738	///
739	typedef struct {
740	UINT8 Type;
741	UINT8 Length;
742	UINT32 ProximityDomain;
743	UINT8 Reserved[2];
744	UINT32 ItsId;
745	} EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE;
746
747	//
748	// Generic Initiator Affinity Structure Device Handle Types
749	// All other values between 0x02 an 0xFF are reserved and
750	// will be ignored by OSPM.
751	//
752	#define EFI_ACPI_6_3_ACPI_DEVICE_HANDLE 0x00
753	#define EFI_ACPI_6_3_PCI_DEVICE_HANDLE 0x01
754
755	///
756	/// Device Handle - ACPI
757	///
758	typedef struct {
759	UINT64 AcpiHid;
760	UINT32 AcpiUid;
761	UINT8 Reserved[4];
762	} EFI_ACPI_6_3_DEVICE_HANDLE_ACPI;
763
764	///
765	/// Device Handle - PCI
766	///
767	typedef struct {
768	UINT16 PciSegment;
769	UINT16 PciBdfNumber;
770	UINT8 Reserved[12];
771	} EFI_ACPI_6_3_DEVICE_HANDLE_PCI;
772
773	///
774	/// Generic Initiator Affinity Structure
775	///
776	typedef struct {
777	UINT8 Type;
778	UINT8 Length;
779	UINT8 Reserved1;
780	UINT8 DeviceHandleType;
781	UINT32 ProximityDomain;
782
783	union {
784	EFI_ACPI_6_3_DEVICE_HANDLE_ACPI Acpi;
785	EFI_ACPI_6_3_DEVICE_HANDLE_PCI Pci;
786	} DeviceHandle;
787
788	UINT32 Flags;
789	UINT8 Reserved2[4];
790	} EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE;
791
792	///
793	/// Generic Initiator Affinity Structure Flags. All other bits are reserved
794	/// and must be 0.
795	///
796	#define EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED (1 << 0)
797
798	///
799	/// System Locality Distance Information Table (SLIT).
800	/// The rest of the table is a matrix.
801	///
802	typedef struct {
803	EFI_ACPI_DESCRIPTION_HEADER Header;
804	UINT64 NumberOfSystemLocalities;
805	} EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
806
807	///
808	/// SLIT Version (as defined in ACPI 6.3 spec.)
809	///
810	#define EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
811
812	///
813	/// Corrected Platform Error Polling Table (CPEP)
814	///
815	typedef struct {
816	EFI_ACPI_DESCRIPTION_HEADER Header;
817	UINT8 Reserved[8];
818	} EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
819
820	///
821	/// CPEP Version (as defined in ACPI 6.3 spec.)
822	///
823	#define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
824
825	//
826	// CPEP processor structure types.
827	//
828	#define EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC 0x00
829
830	///
831	/// Corrected Platform Error Polling Processor Structure Definition
832	///
833	typedef struct {
834	UINT8 Type;
835	UINT8 Length;
836	UINT8 ProcessorId;
837	UINT8 ProcessorEid;
838	UINT32 PollingInterval;
839	} EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
840
841	///
842	/// Maximum System Characteristics Table (MSCT)
843	///
844	typedef struct {
845	EFI_ACPI_DESCRIPTION_HEADER Header;
846	UINT32 OffsetProxDomInfo;
847	UINT32 MaximumNumberOfProximityDomains;
848	UINT32 MaximumNumberOfClockDomains;
849	UINT64 MaximumPhysicalAddress;
850	} EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
851
852	///
853	/// MSCT Version (as defined in ACPI 6.3 spec.)
854	///
855	#define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
856
857	///
858	/// Maximum Proximity Domain Information Structure Definition
859	///
860	typedef struct {
861	UINT8 Revision;
862	UINT8 Length;
863	UINT32 ProximityDomainRangeLow;
864	UINT32 ProximityDomainRangeHigh;
865	UINT32 MaximumProcessorCapacity;
866	UINT64 MaximumMemoryCapacity;
867	} EFI_ACPI_6_3_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
868
869	///
870	/// ACPI RAS Feature Table definition.
871	///
872	typedef struct {
873	EFI_ACPI_DESCRIPTION_HEADER Header;
874	UINT8 PlatformCommunicationChannelIdentifier[12];
875	} EFI_ACPI_6_3_RAS_FEATURE_TABLE;
876
877	///
878	/// RASF Version (as defined in ACPI 6.3 spec.)
879	///
880	#define EFI_ACPI_6_3_RAS_FEATURE_TABLE_REVISION 0x01
881
882	///
883	/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
884	///
885	typedef struct {
886	UINT32 Signature;
887	UINT16 Command;
888	UINT16 Status;
889	UINT16 Version;
890	UINT8 RASCapabilities[16];
891	UINT8 SetRASCapabilities[16];
892	UINT16 NumberOfRASFParameterBlocks;
893	UINT32 SetRASCapabilitiesStatus;
894	} EFI_ACPI_6_3_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
895
896	///
897	/// ACPI RASF PCC command code
898	///
899	#define EFI_ACPI_6_3_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
900
901	///
902	/// ACPI RASF Platform RAS Capabilities
903	///
904	#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0
905	#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1
906	#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2
907	#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3
908	#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4
909
910	///
911	/// ACPI RASF Parameter Block structure for PATROL_SCRUB
912	///
913	typedef struct {
914	UINT16 Type;
915	UINT16 Version;
916	UINT16 Length;
917	UINT16 PatrolScrubCommand;
918	UINT64 RequestedAddressRange[2];
919	UINT64 ActualAddressRange[2];
920	UINT16 Flags;
921	UINT8 RequestedSpeed;
922	} EFI_ACPI_6_3_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
923
924	///
925	/// ACPI RASF Patrol Scrub command
926	///
927	#define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
928	#define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
929	#define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
930
931	///
932	/// Memory Power State Table definition.
933	///
934	typedef struct {
935	EFI_ACPI_DESCRIPTION_HEADER Header;
936	UINT8 PlatformCommunicationChannelIdentifier;
937	UINT8 Reserved[3];
938	// Memory Power Node Structure
939	// Memory Power State Characteristics
940	} EFI_ACPI_6_3_MEMORY_POWER_STATUS_TABLE;
941
942	///
943	/// MPST Version (as defined in ACPI 6.3 spec.)
944	///
945	#define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_REVISION 0x01
946
947	///
948	/// MPST Platform Communication Channel Shared Memory Region definition.
949	///
950	typedef struct {
951	UINT32 Signature;
952	UINT16 Command;
953	UINT16 Status;
954	UINT32 MemoryPowerCommandRegister;
955	UINT32 MemoryPowerStatusRegister;
956	UINT32 PowerStateId;
957	UINT32 MemoryPowerNodeId;
958	UINT64 MemoryEnergyConsumed;
959	UINT64 ExpectedAveragePowerComsuned;
960	} EFI_ACPI_6_3_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
961
962	///
963	/// ACPI MPST PCC command code
964	///
965	#define EFI_ACPI_6_3_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
966
967	///
968	/// ACPI MPST Memory Power command
969	///
970	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
971	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
972	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
973	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
974
975	///
976	/// MPST Memory Power Node Table
977	///
978	typedef struct {
979	UINT8 PowerStateValue;
980	UINT8 PowerStateInformationIndex;
981	} EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE;
982
983	typedef struct {
984	UINT8 Flag;
985	UINT8 Reserved;
986	UINT16 MemoryPowerNodeId;
987	UINT32 Length;
988	UINT64 AddressBase;
989	UINT64 AddressLength;
990	UINT32 NumberOfPowerStates;
991	UINT32 NumberOfPhysicalComponents;
992	// EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
993	// UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
994	} EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE;
995
996	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
997	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
998	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
999
1000	typedef struct {
1001	UINT16 MemoryPowerNodeCount;
1002	UINT8 Reserved[2];
1003	} EFI_ACPI_6_3_MPST_MEMORY_POWER_NODE_TABLE;
1004
1005	///
1006	/// MPST Memory Power State Characteristics Table
1007	///
1008	typedef struct {
1009	UINT8 PowerStateStructureID;
1010	UINT8 Flag;
1011	UINT16 Reserved;
1012	UINT32 AveragePowerConsumedInMPS0;
1013	UINT32 RelativePowerSavingToMPS0;
1014	UINT64 ExitLatencyToMPS0;
1015	} EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
1016
1017	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
1018	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
1019	#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
1020
1021	typedef struct {
1022	UINT16 MemoryPowerStateCharacteristicsCount;
1023	UINT8 Reserved[2];
1024	} EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
1025
1026	///
1027	/// Memory Topology Table definition.
1028	///
1029	typedef struct {
1030	EFI_ACPI_DESCRIPTION_HEADER Header;
1031	UINT32 Reserved;
1032	} EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE;
1033
1034	///
1035	/// PMTT Version (as defined in ACPI 6.3 spec.)
1036	///
1037	#define EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
1038
1039	///
1040	/// Common Memory Aggregator Device Structure.
1041	///
1042	typedef struct {
1043	UINT8 Type;
1044	UINT8 Reserved;
1045	UINT16 Length;
1046	UINT16 Flags;
1047	UINT16 Reserved1;
1048	} EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1049
1050	///
1051	/// Memory Aggregator Device Type
1052	///
1053	#define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
1054	#define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
1055	#define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
1056
1057	///
1058	/// Socket Memory Aggregator Device Structure.
1059	///
1060	typedef struct {
1061	EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1062	UINT16 SocketIdentifier;
1063	UINT16 Reserved;
1064	// EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1065	} EFI_ACPI_6_3_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1066
1067	///
1068	/// MemoryController Memory Aggregator Device Structure.
1069	///
1070	typedef struct {
1071	EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1072	UINT32 ReadLatency;
1073	UINT32 WriteLatency;
1074	UINT32 ReadBandwidth;
1075	UINT32 WriteBandwidth;
1076	UINT16 OptimalAccessUnit;
1077	UINT16 OptimalAccessAlignment;
1078	UINT16 Reserved;
1079	UINT16 NumberOfProximityDomains;
1080	// UINT32 ProximityDomain[NumberOfProximityDomains];
1081	// EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1082	} EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1083
1084	///
1085	/// DIMM Memory Aggregator Device Structure.
1086	///
1087	typedef struct {
1088	EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1089	UINT16 PhysicalComponentIdentifier;
1090	UINT16 Reserved;
1091	UINT32 SizeOfDimm;
1092	UINT32 SmbiosHandle;
1093	} EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1094
1095	///
1096	/// Boot Graphics Resource Table definition.
1097	///
1098	typedef struct {
1099	EFI_ACPI_DESCRIPTION_HEADER Header;
1100	///
1101	/// 2-bytes (16 bit) version ID. This value must be 1.
1102	///
1103	UINT16 Version;
1104	///
1105	/// 1-byte status field indicating current status about the table.
1106	/// Bits[7:1] = Reserved (must be zero)
1107	/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1108	///
1109	UINT8 Status;
1110	///
1111	/// 1-byte enumerated type field indicating format of the image.
1112	/// 0 = Bitmap
1113	/// 1 - 255 Reserved (for future use)
1114	///
1115	UINT8 ImageType;
1116	///
1117	/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1118	/// of the image bitmap.
1119	///
1120	UINT64 ImageAddress;
1121	///
1122	/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1123	/// (X, Y) display offset of the top left corner of the boot image.
1124	/// The top left corner of the display is at offset (0, 0).
1125	///
1126	UINT32 ImageOffsetX;
1127	///
1128	/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1129	/// (X, Y) display offset of the top left corner of the boot image.
1130	/// The top left corner of the display is at offset (0, 0).
1131	///
1132	UINT32 ImageOffsetY;
1133	} EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE;
1134
1135	///
1136	/// BGRT Revision
1137	///
1138	#define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1139
1140	///
1141	/// BGRT Version
1142	///
1143	#define EFI_ACPI_6_3_BGRT_VERSION 0x01
1144
1145	///
1146	/// BGRT Status
1147	///
1148	#define EFI_ACPI_6_3_BGRT_STATUS_NOT_DISPLAYED 0x00
1149	#define EFI_ACPI_6_3_BGRT_STATUS_DISPLAYED 0x01
1150
1151	///
1152	/// BGRT Image Type
1153	///
1154	#define EFI_ACPI_6_3_BGRT_IMAGE_TYPE_BMP 0x00
1155
1156	///
1157	/// FPDT Version (as defined in ACPI 6.3 spec.)
1158	///
1159	#define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1160
1161	///
1162	/// FPDT Performance Record Types
1163	///
1164	#define EFI_ACPI_6_3_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1165	#define EFI_ACPI_6_3_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1166
1167	///
1168	/// FPDT Performance Record Revision
1169	///
1170	#define EFI_ACPI_6_3_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1171	#define EFI_ACPI_6_3_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1172
1173	///
1174	/// FPDT Runtime Performance Record Types
1175	///
1176	#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1177	#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1178	#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1179
1180	///
1181	/// FPDT Runtime Performance Record Revision
1182	///
1183	#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1184	#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1185	#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1186
1187	///
1188	/// FPDT Performance Record header
1189	///
1190	typedef struct {
1191	UINT16 Type;
1192	UINT8 Length;
1193	UINT8 Revision;
1194	} EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER;
1195
1196	///
1197	/// FPDT Performance Table header
1198	///
1199	typedef struct {
1200	UINT32 Signature;
1201	UINT32 Length;
1202	} EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER;
1203
1204	///
1205	/// FPDT Firmware Basic Boot Performance Pointer Record Structure
1206	///
1207	typedef struct {
1208	EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1209	UINT32 Reserved;
1210	///
1211	/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1212	///
1213	UINT64 BootPerformanceTablePointer;
1214	} EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1215
1216	///
1217	/// FPDT S3 Performance Table Pointer Record Structure
1218	///
1219	typedef struct {
1220	EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1221	UINT32 Reserved;
1222	///
1223	/// 64-bit processor-relative physical address of the S3 Performance Table.
1224	///
1225	UINT64 S3PerformanceTablePointer;
1226	} EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1227
1228	///
1229	/// FPDT Firmware Basic Boot Performance Record Structure
1230	///
1231	typedef struct {
1232	EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1233	UINT32 Reserved;
1234	///
1235	/// Timer value logged at the beginning of firmware image execution.
1236	/// This may not always be zero or near zero.
1237	///
1238	UINT64 ResetEnd;
1239	///
1240	/// Timer value logged just prior to loading the OS boot loader into memory.
1241	/// For non-UEFI compatible boots, this field must be zero.
1242	///
1243	UINT64 OsLoaderLoadImageStart;
1244	///
1245	/// Timer value logged just prior to launching the previously loaded OS boot loader image.
1246	/// For non-UEFI compatible boots, the timer value logged will be just prior
1247	/// to the INT 19h handler invocation.
1248	///
1249	UINT64 OsLoaderStartImageStart;
1250	///
1251	/// Timer value logged at the point when the OS loader calls the
1252	/// ExitBootServices function for UEFI compatible firmware.
1253	/// For non-UEFI compatible boots, this field must be zero.
1254	///
1255	UINT64 ExitBootServicesEntry;
1256	///
1257	/// Timer value logged at the point just prior towhen the OS loader gaining
1258	/// control back from calls the ExitBootServices function for UEFI compatible firmware.
1259	/// For non-UEFI compatible boots, this field must be zero.
1260	///
1261	UINT64 ExitBootServicesExit;
1262	} EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1263
1264	///
1265	/// FPDT Firmware Basic Boot Performance Table signature
1266	///
1267	#define EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1268
1269	//
1270	// FPDT Firmware Basic Boot Performance Table
1271	//
1272	typedef struct {
1273	EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header;
1274	//
1275	// one or more Performance Records.
1276	//
1277	} EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1278
1279	///
1280	/// FPDT "S3PT" S3 Performance Table
1281	///
1282	#define EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1283
1284	//
1285	// FPDT Firmware S3 Boot Performance Table
1286	//
1287	typedef struct {
1288	EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header;
1289	//
1290	// one or more Performance Records.
1291	//
1292	} EFI_ACPI_6_3_FPDT_FIRMWARE_S3_BOOT_TABLE;
1293
1294	///
1295	/// FPDT Basic S3 Resume Performance Record
1296	///
1297	typedef struct {
1298	EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1299	///
1300	/// A count of the number of S3 resume cycles since the last full boot sequence.
1301	///
1302	UINT32 ResumeCount;
1303	///
1304	/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1305	/// OS waking vector. Only the most recent resume cycle's time is retained.
1306	///
1307	UINT64 FullResume;
1308	///
1309	/// Average timer value of all resume cycles logged since the last full boot
1310	/// sequence, including the most recent resume. Note that the entire log of
1311	/// timer values does not need to be retained in order to calculate this average.
1312	///
1313	UINT64 AverageResume;
1314	} EFI_ACPI_6_3_FPDT_S3_RESUME_RECORD;
1315
1316	///
1317	/// FPDT Basic S3 Suspend Performance Record
1318	///
1319	typedef struct {
1320	EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1321	///
1322	/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1323	/// Only the most recent suspend cycle's timer value is retained.
1324	///
1325	UINT64 SuspendStart;
1326	///
1327	/// Timer value recorded at the final firmware write to SLP_TYP (or other
1328	/// mechanism) used to trigger hardware entry to S3.
1329	/// Only the most recent suspend cycle's timer value is retained.
1330	///
1331	UINT64 SuspendEnd;
1332	} EFI_ACPI_6_3_FPDT_S3_SUSPEND_RECORD;
1333
1334	///
1335	/// Firmware Performance Record Table definition.
1336	///
1337	typedef struct {
1338	EFI_ACPI_DESCRIPTION_HEADER Header;
1339	} EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1340
1341	///
1342	/// Generic Timer Description Table definition.
1343	///
1344	typedef struct {
1345	EFI_ACPI_DESCRIPTION_HEADER Header;
1346	UINT64 CntControlBasePhysicalAddress;
1347	UINT32 Reserved;
1348	UINT32 SecurePL1TimerGSIV;
1349	UINT32 SecurePL1TimerFlags;
1350	UINT32 NonSecurePL1TimerGSIV;
1351	UINT32 NonSecurePL1TimerFlags;
1352	UINT32 VirtualTimerGSIV;
1353	UINT32 VirtualTimerFlags;
1354	UINT32 NonSecurePL2TimerGSIV;
1355	UINT32 NonSecurePL2TimerFlags;
1356	UINT64 CntReadBasePhysicalAddress;
1357	UINT32 PlatformTimerCount;
1358	UINT32 PlatformTimerOffset;
1359	UINT32 VirtualPL2TimerGSIV;
1360	UINT32 VirtualPL2TimerFlags;
1361	} EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE;
1362
1363	///
1364	/// GTDT Version (as defined in ACPI 6.3 spec.)
1365	///
1366	#define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03
1367
1368	///
1369	/// Timer Flags. All other bits are reserved and must be 0.
1370	///
1371	#define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1372	#define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1373	#define EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1374
1375	///
1376	/// Platform Timer Type
1377	///
1378	#define EFI_ACPI_6_3_GTDT_GT_BLOCK 0
1379	#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG 1
1380
1381	///
1382	/// GT Block Structure
1383	///
1384	typedef struct {
1385	UINT8 Type;
1386	UINT16 Length;
1387	UINT8 Reserved;
1388	UINT64 CntCtlBase;
1389	UINT32 GTBlockTimerCount;
1390	UINT32 GTBlockTimerOffset;
1391	} EFI_ACPI_6_3_GTDT_GT_BLOCK_STRUCTURE;
1392
1393	///
1394	/// GT Block Timer Structure
1395	///
1396	typedef struct {
1397	UINT8 GTFrameNumber;
1398	UINT8 Reserved[3];
1399	UINT64 CntBaseX;
1400	UINT64 CntEL0BaseX;
1401	UINT32 GTxPhysicalTimerGSIV;
1402	UINT32 GTxPhysicalTimerFlags;
1403	UINT32 GTxVirtualTimerGSIV;
1404	UINT32 GTxVirtualTimerFlags;
1405	UINT32 GTxCommonFlags;
1406	} EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1407
1408	///
1409	/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1410	///
1411	#define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1412	#define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1413
1414	///
1415	/// Common Flags Flags. All other bits are reserved and must be 0.
1416	///
1417	#define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1418	#define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1419
1420	///
1421	/// SBSA Generic Watchdog Structure
1422	///
1423	typedef struct {
1424	UINT8 Type;
1425	UINT16 Length;
1426	UINT8 Reserved;
1427	UINT64 RefreshFramePhysicalAddress;
1428	UINT64 WatchdogControlFramePhysicalAddress;
1429	UINT32 WatchdogTimerGSIV;
1430	UINT32 WatchdogTimerFlags;
1431	} EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
1432
1433	///
1434	/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1435	///
1436	#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1437	#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1438	#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1439
1440	//
1441	// NVDIMM Firmware Interface Table definition.
1442	//
1443	typedef struct {
1444	EFI_ACPI_DESCRIPTION_HEADER Header;
1445	UINT32 Reserved;
1446	} EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE;
1447
1448	//
1449	// NFIT Version (as defined in ACPI 6.3 spec.)
1450	//
1451	#define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
1452
1453	//
1454	// Definition for NFIT Table Structure Types
1455	//
1456	#define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0
1457	#define EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1
1458	#define EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE_TYPE 2
1459	#define EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3
1460	#define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4
1461	#define EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5
1462	#define EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6
1463	#define EFI_ACPI_6_3_NFIT_PLATFORM_CAPABILITIES_STRUCTURE_TYPE 7
1464
1465	//
1466	// Definition for NFIT Structure Header
1467	//
1468	typedef struct {
1469	UINT16 Type;
1470	UINT16 Length;
1471	} EFI_ACPI_6_3_NFIT_STRUCTURE_HEADER;
1472
1473	//
1474	// Definition for System Physical Address Range Structure
1475	//
1476	#define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
1477	#define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
1478	#define EFI_ACPI_6_3_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
1479	#define EFI_ACPI_6_3_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
1480	#define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
1481	#define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
1482	#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
1483	#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
1484	#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
1485	#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
1486	typedef struct {
1487	UINT16 Type;
1488	UINT16 Length;
1489	UINT16 SPARangeStructureIndex;
1490	UINT16 Flags;
1491	UINT32 Reserved_8;
1492	UINT32 ProximityDomain;
1493	GUID AddressRangeTypeGUID;
1494	UINT64 SystemPhysicalAddressRangeBase;
1495	UINT64 SystemPhysicalAddressRangeLength;
1496	UINT64 AddressRangeMemoryMappingAttribute;
1497	} EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
1498
1499	//
1500	// Definition for Memory Device to System Physical Address Range Mapping Structure
1501	//
1502	typedef struct {
1503	UINT32 DIMMNumber : 4;
1504	UINT32 MemoryChannelNumber : 4;
1505	UINT32 MemoryControllerID : 4;
1506	UINT32 SocketID : 4;
1507	UINT32 NodeControllerID : 12;
1508	UINT32 Reserved_28 : 4;
1509	} EFI_ACPI_6_3_NFIT_DEVICE_HANDLE;
1510
1511	#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0
1512	#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1
1513	#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2
1514	#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3
1515	#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4
1516	#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5
1517	#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6
1518	typedef struct {
1519	UINT16 Type;
1520	UINT16 Length;
1521	EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1522	UINT16 NVDIMMPhysicalID;
1523	UINT16 NVDIMMRegionID;
1524	UINT16 SPARangeStructureIndex;
1525	UINT16 NVDIMMControlRegionStructureIndex;
1526	UINT64 NVDIMMRegionSize;
1527	UINT64 RegionOffset;
1528	UINT64 NVDIMMPhysicalAddressRegionBase;
1529	UINT16 InterleaveStructureIndex;
1530	UINT16 InterleaveWays;
1531	UINT16 NVDIMMStateFlags;
1532	UINT16 Reserved_46;
1533	} EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;
1534
1535	//
1536	// Definition for Interleave Structure
1537	//
1538	typedef struct {
1539	UINT16 Type;
1540	UINT16 Length;
1541	UINT16 InterleaveStructureIndex;
1542	UINT16 Reserved_6;
1543	UINT32 NumberOfLines;
1544	UINT32 LineSize;
1545	// UINT32 LineOffset[NumberOfLines];
1546	} EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE;
1547
1548	//
1549	// Definition for SMBIOS Management Information Structure
1550	//
1551	typedef struct {
1552	UINT16 Type;
1553	UINT16 Length;
1554	UINT32 Reserved_4;
1555	// UINT8 Data[];
1556	} EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
1557
1558	//
1559	// Definition for NVDIMM Control Region Structure
1560	//
1561	#define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0
1562
1563	#define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
1564	typedef struct {
1565	UINT16 Type;
1566	UINT16 Length;
1567	UINT16 NVDIMMControlRegionStructureIndex;
1568	UINT16 VendorID;
1569	UINT16 DeviceID;
1570	UINT16 RevisionID;
1571	UINT16 SubsystemVendorID;
1572	UINT16 SubsystemDeviceID;
1573	UINT16 SubsystemRevisionID;
1574	UINT8 ValidFields;
1575	UINT8 ManufacturingLocation;
1576	UINT16 ManufacturingDate;
1577	UINT8 Reserved_22[2];
1578	UINT32 SerialNumber;
1579	UINT16 RegionFormatInterfaceCode;
1580	UINT16 NumberOfBlockControlWindows;
1581	UINT64 SizeOfBlockControlWindow;
1582	UINT64 CommandRegisterOffsetInBlockControlWindow;
1583	UINT64 SizeOfCommandRegisterInBlockControlWindows;
1584	UINT64 StatusRegisterOffsetInBlockControlWindow;
1585	UINT64 SizeOfStatusRegisterInBlockControlWindows;
1586	UINT16 NVDIMMControlRegionFlag;
1587	UINT8 Reserved_74[6];
1588	} EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
1589
1590	//
1591	// Definition for NVDIMM Block Data Window Region Structure
1592	//
1593	typedef struct {
1594	UINT16 Type;
1595	UINT16 Length;
1596	UINT16 NVDIMMControlRegionStructureIndex;
1597	UINT16 NumberOfBlockDataWindows;
1598	UINT64 BlockDataWindowStartOffset;
1599	UINT64 SizeOfBlockDataWindow;
1600	UINT64 BlockAccessibleMemoryCapacity;
1601	UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
1602	} EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
1603
1604	//
1605	// Definition for Flush Hint Address Structure
1606	//
1607	typedef struct {
1608	UINT16 Type;
1609	UINT16 Length;
1610	EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1611	UINT16 NumberOfFlushHintAddresses;
1612	UINT8 Reserved_10[6];
1613	// UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
1614	} EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
1615
1616	//
1617	// Definition for Platform Capabilities Structure
1618	//
1619	typedef struct {
1620	UINT16 Type;
1621	UINT16 Length;
1622	UINT8 HighestValidCapability;
1623	UINT8 Reserved_5[3];
1624	UINT32 Capabilities;
1625	UINT8 Reserved_12[4];
1626	} EFI_ACPI_6_3_NFIT_PLATFORM_CAPABILITIES_STRUCTURE;
1627
1628	#define EFI_ACPI_6_3_NFIT_PLATFORM_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT0
1629	#define EFI_ACPI_6_3_NFIT_PLATFORM_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT1
1630	#define EFI_ACPI_6_3_NFIT_PLATFORM_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT2
1631
1632	///
1633	/// Secure DEVices Table (SDEV)
1634	///
1635	typedef struct {
1636	EFI_ACPI_DESCRIPTION_HEADER Header;
1637	} EFI_ACPI_6_3_SECURE_DEVICES_TABLE_HEADER;
1638
1639	///
1640	/// SDEV Revision (as defined in ACPI 6.3 spec.)
1641	///
1642	#define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_REVISION 0x01
1643
1644	///
1645	/// Secure Devcice types
1646	///
1647	#define EFI_ACPI_6_3_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01
1648	#define EFI_ACPI_6_3_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00
1649
1650	///
1651	/// Secure Devcice flags
1652	///
1653	#define EFI_ACPI_6_3_SDEV_FLAG_ALLOW_HANDOFF BIT0
1654
1655	///
1656	/// SDEV Structure Header
1657	///
1658	typedef struct {
1659	UINT8 Type;
1660	UINT8 Flags;
1661	UINT16 Length;
1662	} EFI_ACPI_6_3_SDEV_STRUCTURE_HEADER;
1663
1664	///
1665	/// PCIe Endpoint Device based Secure Device Structure
1666	///
1667	typedef struct {
1668	UINT8 Type;
1669	UINT8 Flags;
1670	UINT16 Length;
1671	UINT16 PciSegmentNumber;
1672	UINT16 StartBusNumber;
1673	UINT16 PciPathOffset;
1674	UINT16 PciPathLength;
1675	UINT16 VendorSpecificDataOffset;
1676	UINT16 VendorSpecificDataLength;
1677	} EFI_ACPI_6_3_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;
1678
1679	///
1680	/// ACPI_NAMESPACE_DEVICE based Secure Device Structure
1681	///
1682	typedef struct {
1683	UINT8 Type;
1684	UINT8 Flags;
1685	UINT16 Length;
1686	UINT16 DeviceIdentifierOffset;
1687	UINT16 DeviceIdentifierLength;
1688	UINT16 VendorSpecificDataOffset;
1689	UINT16 VendorSpecificDataLength;
1690	} EFI_ACPI_6_3_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;
1691
1692	///
1693	/// Boot Error Record Table (BERT)
1694	///
1695	typedef struct {
1696	EFI_ACPI_DESCRIPTION_HEADER Header;
1697	UINT32 BootErrorRegionLength;
1698	UINT64 BootErrorRegion;
1699	} EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_HEADER;
1700
1701	///
1702	/// BERT Version (as defined in ACPI 6.3 spec.)
1703	///
1704	#define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1705
1706	///
1707	/// Boot Error Region Block Status Definition
1708	///
1709	typedef struct {
1710	UINT32 UncorrectableErrorValid : 1;
1711	UINT32 CorrectableErrorValid : 1;
1712	UINT32 MultipleUncorrectableErrors : 1;
1713	UINT32 MultipleCorrectableErrors : 1;
1714	UINT32 ErrorDataEntryCount : 10;
1715	UINT32 Reserved : 18;
1716	} EFI_ACPI_6_3_ERROR_BLOCK_STATUS;
1717
1718	///
1719	/// Boot Error Region Definition
1720	///
1721	typedef struct {
1722	EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus;
1723	UINT32 RawDataOffset;
1724	UINT32 RawDataLength;
1725	UINT32 DataLength;
1726	UINT32 ErrorSeverity;
1727	} EFI_ACPI_6_3_BOOT_ERROR_REGION_STRUCTURE;
1728
1729	//
1730	// Boot Error Severity types
1731	//
1732	#define EFI_ACPI_6_3_ERROR_SEVERITY_RECOVERABLE 0x00
1733	#define EFI_ACPI_6_3_ERROR_SEVERITY_FATAL 0x01
1734	#define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED 0x02
1735	#define EFI_ACPI_6_3_ERROR_SEVERITY_NONE 0x03
1736	//
1737	// The term 'Correctable' is no longer being used as an error severity of the
1738	// reported error since ACPI Specification Version 5.1 Errata B.
1739	// The below macro is considered as deprecated and should no longer be used.
1740	//
1741	#define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTABLE 0x00
1742
1743	///
1744	/// Generic Error Data Entry Definition
1745	///
1746	typedef struct {
1747	UINT8 SectionType[16];
1748	UINT32 ErrorSeverity;
1749	UINT16 Revision;
1750	UINT8 ValidationBits;
1751	UINT8 Flags;
1752	UINT32 ErrorDataLength;
1753	UINT8 FruId[16];
1754	UINT8 FruText[20];
1755	UINT8 Timestamp[8];
1756	} EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1757
1758	///
1759	/// Generic Error Data Entry Version (as defined in ACPI 6.3 spec.)
1760	///
1761	#define EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300
1762
1763	///
1764	/// HEST - Hardware Error Source Table
1765	///
1766	typedef struct {
1767	EFI_ACPI_DESCRIPTION_HEADER Header;
1768	UINT32 ErrorSourceCount;
1769	} EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1770
1771	///
1772	/// HEST Version (as defined in ACPI 6.3 spec.)
1773	///
1774	#define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1775
1776	//
1777	// Error Source structure types.
1778	//
1779	#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1780	#define EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1781	#define EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR 0x02
1782	#define EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER 0x06
1783	#define EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER 0x07
1784	#define EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER 0x08
1785	#define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR 0x09
1786	#define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A
1787	#define EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B
1788
1789	//
1790	// Error Source structure flags.
1791	//
1792	#define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1793	#define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1794	#define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)
1795
1796	///
1797	/// IA-32 Architecture Machine Check Exception Structure Definition
1798	///
1799	typedef struct {
1800	UINT16 Type;
1801	UINT16 SourceId;
1802	UINT8 Reserved0[2];
1803	UINT8 Flags;
1804	UINT8 Enabled;
1805	UINT32 NumberOfRecordsToPreAllocate;
1806	UINT32 MaxSectionsPerRecord;
1807	UINT64 GlobalCapabilityInitData;
1808	UINT64 GlobalControlInitData;
1809	UINT8 NumberOfHardwareBanks;
1810	UINT8 Reserved1[7];
1811	} EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1812
1813	///
1814	/// IA-32 Architecture Machine Check Bank Structure Definition
1815	///
1816	typedef struct {
1817	UINT8 BankNumber;
1818	UINT8 ClearStatusOnInitialization;
1819	UINT8 StatusDataFormat;
1820	UINT8 Reserved0;
1821	UINT32 ControlRegisterMsrAddress;
1822	UINT64 ControlInitData;
1823	UINT32 StatusRegisterMsrAddress;
1824	UINT32 AddressRegisterMsrAddress;
1825	UINT32 MiscRegisterMsrAddress;
1826	} EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1827
1828	///
1829	/// IA-32 Architecture Machine Check Bank Structure MCA data format
1830	///
1831	#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1832	#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1833	#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1834
1835	//
1836	// Hardware Error Notification types. All other values are reserved
1837	//
1838	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1839	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1840	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1841	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1842	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1843	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
1844	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
1845	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
1846	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08
1847	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09
1848	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A
1849	#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B
1850
1851	///
1852	/// Hardware Error Notification Configuration Write Enable Structure Definition
1853	///
1854	typedef struct {
1855	UINT16 Type : 1;
1856	UINT16 PollInterval : 1;
1857	UINT16 SwitchToPollingThresholdValue : 1;
1858	UINT16 SwitchToPollingThresholdWindow : 1;
1859	UINT16 ErrorThresholdValue : 1;
1860	UINT16 ErrorThresholdWindow : 1;
1861	UINT16 Reserved : 10;
1862	} EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1863
1864	///
1865	/// Hardware Error Notification Structure Definition
1866	///
1867	typedef struct {
1868	UINT8 Type;
1869	UINT8 Length;
1870	EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1871	UINT32 PollInterval;
1872	UINT32 Vector;
1873	UINT32 SwitchToPollingThresholdValue;
1874	UINT32 SwitchToPollingThresholdWindow;
1875	UINT32 ErrorThresholdValue;
1876	UINT32 ErrorThresholdWindow;
1877	} EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1878
1879	///
1880	/// IA-32 Architecture Corrected Machine Check Structure Definition
1881	///
1882	typedef struct {
1883	UINT16 Type;
1884	UINT16 SourceId;
1885	UINT8 Reserved0[2];
1886	UINT8 Flags;
1887	UINT8 Enabled;
1888	UINT32 NumberOfRecordsToPreAllocate;
1889	UINT32 MaxSectionsPerRecord;
1890	EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1891	UINT8 NumberOfHardwareBanks;
1892	UINT8 Reserved1[3];
1893	} EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1894
1895	///
1896	/// IA-32 Architecture NMI Error Structure Definition
1897	///
1898	typedef struct {
1899	UINT16 Type;
1900	UINT16 SourceId;
1901	UINT8 Reserved0[2];
1902	UINT32 NumberOfRecordsToPreAllocate;
1903	UINT32 MaxSectionsPerRecord;
1904	UINT32 MaxRawDataLength;
1905	} EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1906
1907	///
1908	/// PCI Express Root Port AER Structure Definition
1909	///
1910	typedef struct {
1911	UINT16 Type;
1912	UINT16 SourceId;
1913	UINT8 Reserved0[2];
1914	UINT8 Flags;
1915	UINT8 Enabled;
1916	UINT32 NumberOfRecordsToPreAllocate;
1917	UINT32 MaxSectionsPerRecord;
1918	UINT32 Bus;
1919	UINT16 Device;
1920	UINT16 Function;
1921	UINT16 DeviceControl;
1922	UINT8 Reserved1[2];
1923	UINT32 UncorrectableErrorMask;
1924	UINT32 UncorrectableErrorSeverity;
1925	UINT32 CorrectableErrorMask;
1926	UINT32 AdvancedErrorCapabilitiesAndControl;
1927	UINT32 RootErrorCommand;
1928	} EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1929
1930	///
1931	/// PCI Express Device AER Structure Definition
1932	///
1933	typedef struct {
1934	UINT16 Type;
1935	UINT16 SourceId;
1936	UINT8 Reserved0[2];
1937	UINT8 Flags;
1938	UINT8 Enabled;
1939	UINT32 NumberOfRecordsToPreAllocate;
1940	UINT32 MaxSectionsPerRecord;
1941	UINT32 Bus;
1942	UINT16 Device;
1943	UINT16 Function;
1944	UINT16 DeviceControl;
1945	UINT8 Reserved1[2];
1946	UINT32 UncorrectableErrorMask;
1947	UINT32 UncorrectableErrorSeverity;
1948	UINT32 CorrectableErrorMask;
1949	UINT32 AdvancedErrorCapabilitiesAndControl;
1950	} EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1951
1952	///
1953	/// PCI Express Bridge AER Structure Definition
1954	///
1955	typedef struct {
1956	UINT16 Type;
1957	UINT16 SourceId;
1958	UINT8 Reserved0[2];
1959	UINT8 Flags;
1960	UINT8 Enabled;
1961	UINT32 NumberOfRecordsToPreAllocate;
1962	UINT32 MaxSectionsPerRecord;
1963	UINT32 Bus;
1964	UINT16 Device;
1965	UINT16 Function;
1966	UINT16 DeviceControl;
1967	UINT8 Reserved1[2];
1968	UINT32 UncorrectableErrorMask;
1969	UINT32 UncorrectableErrorSeverity;
1970	UINT32 CorrectableErrorMask;
1971	UINT32 AdvancedErrorCapabilitiesAndControl;
1972	UINT32 SecondaryUncorrectableErrorMask;
1973	UINT32 SecondaryUncorrectableErrorSeverity;
1974	UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1975	} EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1976
1977	///
1978	/// Generic Hardware Error Source Structure Definition
1979	///
1980	typedef struct {
1981	UINT16 Type;
1982	UINT16 SourceId;
1983	UINT16 RelatedSourceId;
1984	UINT8 Flags;
1985	UINT8 Enabled;
1986	UINT32 NumberOfRecordsToPreAllocate;
1987	UINT32 MaxSectionsPerRecord;
1988	UINT32 MaxRawDataLength;
1989	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1990	EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1991	UINT32 ErrorStatusBlockLength;
1992	} EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1993
1994	///
1995	/// Generic Hardware Error Source Version 2 Structure Definition
1996	///
1997	typedef struct {
1998	UINT16 Type;
1999	UINT16 SourceId;
2000	UINT16 RelatedSourceId;
2001	UINT8 Flags;
2002	UINT8 Enabled;
2003	UINT32 NumberOfRecordsToPreAllocate;
2004	UINT32 MaxSectionsPerRecord;
2005	UINT32 MaxRawDataLength;
2006	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
2007	EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2008	UINT32 ErrorStatusBlockLength;
2009	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;
2010	UINT64 ReadAckPreserve;
2011	UINT64 ReadAckWrite;
2012	} EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;
2013
2014	///
2015	/// Generic Error Status Definition
2016	///
2017	typedef struct {
2018	EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus;
2019	UINT32 RawDataOffset;
2020	UINT32 RawDataLength;
2021	UINT32 DataLength;
2022	UINT32 ErrorSeverity;
2023	} EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE;
2024
2025	///
2026	/// IA-32 Architecture Deferred Machine Check Structure Definition
2027	///
2028	typedef struct {
2029	UINT16 Type;
2030	UINT16 SourceId;
2031	UINT8 Reserved0[2];
2032	UINT8 Flags;
2033	UINT8 Enabled;
2034	UINT32 NumberOfRecordsToPreAllocate;
2035	UINT32 MaxSectionsPerRecord;
2036	EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2037	UINT8 NumberOfHardwareBanks;
2038	UINT8 Reserved1[3];
2039	} EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;
2040
2041	///
2042	/// HMAT - Heterogeneous Memory Attribute Table
2043	///
2044	typedef struct {
2045	EFI_ACPI_DESCRIPTION_HEADER Header;
2046	UINT8 Reserved[4];
2047	} EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;
2048
2049	///
2050	/// HMAT Revision (as defined in ACPI 6.3 spec.)
2051	///
2052	#define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02
2053
2054	///
2055	/// HMAT types
2056	///
2057	#define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00
2058	#define EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01
2059	#define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02
2060
2061	///
2062	/// HMAT Structure Header
2063	///
2064	typedef struct {
2065	UINT16 Type;
2066	UINT8 Reserved[2];
2067	UINT32 Length;
2068	} EFI_ACPI_6_3_HMAT_STRUCTURE_HEADER;
2069
2070	///
2071	/// Memory Proximity Domain Attributes Structure flags
2072	///
2073	typedef struct {
2074	UINT16 InitiatorProximityDomainValid : 1;
2075	UINT16 Reserved : 15;
2076	} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;
2077
2078	///
2079	/// Memory Proximity Domain Attributes Structure
2080	///
2081	typedef struct {
2082	UINT16 Type;
2083	UINT8 Reserved[2];
2084	UINT32 Length;
2085	EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;
2086	UINT8 Reserved1[2];
2087	UINT32 InitiatorProximityDomain;
2088	UINT32 MemoryProximityDomain;
2089	UINT8 Reserved2[20];
2090	} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;
2091
2092	///
2093	/// System Locality Latency and Bandwidth Information Structure flags
2094	///
2095	typedef struct {
2096	UINT8 MemoryHierarchy : 4;
2097	UINT8 Reserved : 4;
2098	} EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;
2099
2100	///
2101	/// System Locality Latency and Bandwidth Information Structure
2102	///
2103	typedef struct {
2104	UINT16 Type;
2105	UINT8 Reserved[2];
2106	UINT32 Length;
2107	EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;
2108	UINT8 DataType;
2109	UINT8 Reserved1[2];
2110	UINT32 NumberOfInitiatorProximityDomains;
2111	UINT32 NumberOfTargetProximityDomains;
2112	UINT8 Reserved2[4];
2113	UINT64 EntryBaseUnit;
2114	} EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;
2115
2116	///
2117	/// Memory Side Cache Information Structure cache attributes
2118	///
2119	typedef struct {
2120	UINT32 TotalCacheLevels : 4;
2121	UINT32 CacheLevel : 4;
2122	UINT32 CacheAssociativity : 4;
2123	UINT32 WritePolicy : 4;
2124	UINT32 CacheLineSize : 16;
2125	} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;
2126
2127	///
2128	/// Memory Side Cache Information Structure
2129	///
2130	typedef struct {
2131	UINT16 Type;
2132	UINT8 Reserved[2];
2133	UINT32 Length;
2134	UINT32 MemoryProximityDomain;
2135	UINT8 Reserved1[4];
2136	UINT64 MemorySideCacheSize;
2137	EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;
2138	UINT8 Reserved2[2];
2139	UINT16 NumberOfSmbiosHandles;
2140	} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;
2141
2142	///
2143	/// ERST - Error Record Serialization Table
2144	///
2145	typedef struct {
2146	EFI_ACPI_DESCRIPTION_HEADER Header;
2147	UINT32 SerializationHeaderSize;
2148	UINT8 Reserved0[4];
2149	UINT32 InstructionEntryCount;
2150	} EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
2151
2152	///
2153	/// ERST Version (as defined in ACPI 6.3 spec.)
2154	///
2155	#define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
2156
2157	///
2158	/// ERST Serialization Actions
2159	///
2160	#define EFI_ACPI_6_3_ERST_BEGIN_WRITE_OPERATION 0x00
2161	#define EFI_ACPI_6_3_ERST_BEGIN_READ_OPERATION 0x01
2162	#define EFI_ACPI_6_3_ERST_BEGIN_CLEAR_OPERATION 0x02
2163	#define EFI_ACPI_6_3_ERST_END_OPERATION 0x03
2164	#define EFI_ACPI_6_3_ERST_SET_RECORD_OFFSET 0x04
2165	#define EFI_ACPI_6_3_ERST_EXECUTE_OPERATION 0x05
2166	#define EFI_ACPI_6_3_ERST_CHECK_BUSY_STATUS 0x06
2167	#define EFI_ACPI_6_3_ERST_GET_COMMAND_STATUS 0x07
2168	#define EFI_ACPI_6_3_ERST_GET_RECORD_IDENTIFIER 0x08
2169	#define EFI_ACPI_6_3_ERST_SET_RECORD_IDENTIFIER 0x09
2170	#define EFI_ACPI_6_3_ERST_GET_RECORD_COUNT 0x0A
2171	#define EFI_ACPI_6_3_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
2172	#define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
2173	#define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
2174	#define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
2175	#define EFI_ACPI_6_3_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10
2176
2177	///
2178	/// ERST Action Command Status
2179	///
2180	#define EFI_ACPI_6_3_ERST_STATUS_SUCCESS 0x00
2181	#define EFI_ACPI_6_3_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
2182	#define EFI_ACPI_6_3_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
2183	#define EFI_ACPI_6_3_ERST_STATUS_FAILED 0x03
2184	#define EFI_ACPI_6_3_ERST_STATUS_RECORD_STORE_EMPTY 0x04
2185	#define EFI_ACPI_6_3_ERST_STATUS_RECORD_NOT_FOUND 0x05
2186
2187	///
2188	/// ERST Serialization Instructions
2189	///
2190	#define EFI_ACPI_6_3_ERST_READ_REGISTER 0x00
2191	#define EFI_ACPI_6_3_ERST_READ_REGISTER_VALUE 0x01
2192	#define EFI_ACPI_6_3_ERST_WRITE_REGISTER 0x02
2193	#define EFI_ACPI_6_3_ERST_WRITE_REGISTER_VALUE 0x03
2194	#define EFI_ACPI_6_3_ERST_NOOP 0x04
2195	#define EFI_ACPI_6_3_ERST_LOAD_VAR1 0x05
2196	#define EFI_ACPI_6_3_ERST_LOAD_VAR2 0x06
2197	#define EFI_ACPI_6_3_ERST_STORE_VAR1 0x07
2198	#define EFI_ACPI_6_3_ERST_ADD 0x08
2199	#define EFI_ACPI_6_3_ERST_SUBTRACT 0x09
2200	#define EFI_ACPI_6_3_ERST_ADD_VALUE 0x0A
2201	#define EFI_ACPI_6_3_ERST_SUBTRACT_VALUE 0x0B
2202	#define EFI_ACPI_6_3_ERST_STALL 0x0C
2203	#define EFI_ACPI_6_3_ERST_STALL_WHILE_TRUE 0x0D
2204	#define EFI_ACPI_6_3_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
2205	#define EFI_ACPI_6_3_ERST_GOTO 0x0F
2206	#define EFI_ACPI_6_3_ERST_SET_SRC_ADDRESS_BASE 0x10
2207	#define EFI_ACPI_6_3_ERST_SET_DST_ADDRESS_BASE 0x11
2208	#define EFI_ACPI_6_3_ERST_MOVE_DATA 0x12
2209
2210	///
2211	/// ERST Instruction Flags
2212	///
2213	#define EFI_ACPI_6_3_ERST_PRESERVE_REGISTER 0x01
2214
2215	///
2216	/// ERST Serialization Instruction Entry
2217	///
2218	typedef struct {
2219	UINT8 SerializationAction;
2220	UINT8 Instruction;
2221	UINT8 Flags;
2222	UINT8 Reserved0;
2223	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2224	UINT64 Value;
2225	UINT64 Mask;
2226	} EFI_ACPI_6_3_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
2227
2228	///
2229	/// EINJ - Error Injection Table
2230	///
2231	typedef struct {
2232	EFI_ACPI_DESCRIPTION_HEADER Header;
2233	UINT32 InjectionHeaderSize;
2234	UINT8 InjectionFlags;
2235	UINT8 Reserved0[3];
2236	UINT32 InjectionEntryCount;
2237	} EFI_ACPI_6_3_ERROR_INJECTION_TABLE_HEADER;
2238
2239	///
2240	/// EINJ Version (as defined in ACPI 6.3 spec.)
2241	///
2242	#define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_REVISION 0x01
2243
2244	///
2245	/// EINJ Error Injection Actions
2246	///
2247	#define EFI_ACPI_6_3_EINJ_BEGIN_INJECTION_OPERATION 0x00
2248	#define EFI_ACPI_6_3_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
2249	#define EFI_ACPI_6_3_EINJ_SET_ERROR_TYPE 0x02
2250	#define EFI_ACPI_6_3_EINJ_GET_ERROR_TYPE 0x03
2251	#define EFI_ACPI_6_3_EINJ_END_OPERATION 0x04
2252	#define EFI_ACPI_6_3_EINJ_EXECUTE_OPERATION 0x05
2253	#define EFI_ACPI_6_3_EINJ_CHECK_BUSY_STATUS 0x06
2254	#define EFI_ACPI_6_3_EINJ_GET_COMMAND_STATUS 0x07
2255	#define EFI_ACPI_6_3_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08
2256	#define EFI_ACPI_6_3_EINJ_GET_EXECUTE_OPERATION_TIMINGS 0x09
2257	#define EFI_ACPI_6_3_EINJ_TRIGGER_ERROR 0xFF
2258
2259	///
2260	/// EINJ Action Command Status
2261	///
2262	#define EFI_ACPI_6_3_EINJ_STATUS_SUCCESS 0x00
2263	#define EFI_ACPI_6_3_EINJ_STATUS_UNKNOWN_FAILURE 0x01
2264	#define EFI_ACPI_6_3_EINJ_STATUS_INVALID_ACCESS 0x02
2265
2266	///
2267	/// EINJ Error Type Definition
2268	///
2269	#define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
2270	#define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
2271	#define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
2272	#define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
2273	#define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
2274	#define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
2275	#define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
2276	#define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
2277	#define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
2278	#define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
2279	#define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
2280	#define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
2281
2282	///
2283	/// EINJ Injection Instructions
2284	///
2285	#define EFI_ACPI_6_3_EINJ_READ_REGISTER 0x00
2286	#define EFI_ACPI_6_3_EINJ_READ_REGISTER_VALUE 0x01
2287	#define EFI_ACPI_6_3_EINJ_WRITE_REGISTER 0x02
2288	#define EFI_ACPI_6_3_EINJ_WRITE_REGISTER_VALUE 0x03
2289	#define EFI_ACPI_6_3_EINJ_NOOP 0x04
2290
2291	///
2292	/// EINJ Instruction Flags
2293	///
2294	#define EFI_ACPI_6_3_EINJ_PRESERVE_REGISTER 0x01
2295
2296	///
2297	/// EINJ Injection Instruction Entry
2298	///
2299	typedef struct {
2300	UINT8 InjectionAction;
2301	UINT8 Instruction;
2302	UINT8 Flags;
2303	UINT8 Reserved0;
2304	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2305	UINT64 Value;
2306	UINT64 Mask;
2307	} EFI_ACPI_6_3_EINJ_INJECTION_INSTRUCTION_ENTRY;
2308
2309	///
2310	/// EINJ Trigger Action Table
2311	///
2312	typedef struct {
2313	UINT32 HeaderSize;
2314	UINT32 Revision;
2315	UINT32 TableSize;
2316	UINT32 EntryCount;
2317	} EFI_ACPI_6_3_EINJ_TRIGGER_ACTION_TABLE;
2318
2319	///
2320	/// Platform Communications Channel Table (PCCT)
2321	///
2322	typedef struct {
2323	EFI_ACPI_DESCRIPTION_HEADER Header;
2324	UINT32 Flags;
2325	UINT64 Reserved;
2326	} EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
2327
2328	///
2329	/// PCCT Version (as defined in ACPI 6.3 spec.)
2330	///
2331	#define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02
2332
2333	///
2334	/// PCCT Global Flags
2335	///
2336	#define EFI_ACPI_6_3_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0
2337
2338	//
2339	// PCCT Subspace type
2340	//
2341	#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_GENERIC 0x00
2342	#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01
2343	#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02
2344	#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03
2345	#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04
2346
2347	///
2348	/// PCC Subspace Structure Header
2349	///
2350	typedef struct {
2351	UINT8 Type;
2352	UINT8 Length;
2353	} EFI_ACPI_6_3_PCCT_SUBSPACE_HEADER;
2354
2355	///
2356	/// Generic Communications Subspace Structure
2357	///
2358	typedef struct {
2359	UINT8 Type;
2360	UINT8 Length;
2361	UINT8 Reserved[6];
2362	UINT64 BaseAddress;
2363	UINT64 AddressLength;
2364	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2365	UINT64 DoorbellPreserve;
2366	UINT64 DoorbellWrite;
2367	UINT32 NominalLatency;
2368	UINT32 MaximumPeriodicAccessRate;
2369	UINT16 MinimumRequestTurnaroundTime;
2370	} EFI_ACPI_6_3_PCCT_SUBSPACE_GENERIC;
2371
2372	///
2373	/// Generic Communications Channel Shared Memory Region
2374	///
2375
2376	typedef struct {
2377	UINT8 Command;
2378	UINT8 Reserved : 7;
2379	UINT8 NotifyOnCompletion : 1;
2380	} EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
2381
2382	typedef struct {
2383	UINT8 CommandComplete : 1;
2384	UINT8 PlatformInterrupt : 1;
2385	UINT8 Error : 1;
2386	UINT8 PlatformNotification : 1;
2387	UINT8 Reserved : 4;
2388	UINT8 Reserved1;
2389	} EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
2390
2391	typedef struct {
2392	UINT32 Signature;
2393	EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
2394	EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
2395	} EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
2396
2397	#define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0
2398	#define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1
2399
2400	///
2401	/// Type 1 HW-Reduced Communications Subspace Structure
2402	///
2403	typedef struct {
2404	UINT8 Type;
2405	UINT8 Length;
2406	UINT32 PlatformInterrupt;
2407	UINT8 PlatformInterruptFlags;
2408	UINT8 Reserved;
2409	UINT64 BaseAddress;
2410	UINT64 AddressLength;
2411	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2412	UINT64 DoorbellPreserve;
2413	UINT64 DoorbellWrite;
2414	UINT32 NominalLatency;
2415	UINT32 MaximumPeriodicAccessRate;
2416	UINT16 MinimumRequestTurnaroundTime;
2417	} EFI_ACPI_6_3_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
2418
2419	///
2420	/// Type 2 HW-Reduced Communications Subspace Structure
2421	///
2422	typedef struct {
2423	UINT8 Type;
2424	UINT8 Length;
2425	UINT32 PlatformInterrupt;
2426	UINT8 PlatformInterruptFlags;
2427	UINT8 Reserved;
2428	UINT64 BaseAddress;
2429	UINT64 AddressLength;
2430	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2431	UINT64 DoorbellPreserve;
2432	UINT64 DoorbellWrite;
2433	UINT32 NominalLatency;
2434	UINT32 MaximumPeriodicAccessRate;
2435	UINT16 MinimumRequestTurnaroundTime;
2436	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2437	UINT64 PlatformInterruptAckPreserve;
2438	UINT64 PlatformInterruptAckWrite;
2439	} EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
2440
2441	///
2442	/// Type 3 Extended PCC Subspace Structure
2443	///
2444	typedef struct {
2445	UINT8 Type;
2446	UINT8 Length;
2447	UINT32 PlatformInterrupt;
2448	UINT8 PlatformInterruptFlags;
2449	UINT8 Reserved;
2450	UINT64 BaseAddress;
2451	UINT32 AddressLength;
2452	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2453	UINT64 DoorbellPreserve;
2454	UINT64 DoorbellWrite;
2455	UINT32 NominalLatency;
2456	UINT32 MaximumPeriodicAccessRate;
2457	UINT32 MinimumRequestTurnaroundTime;
2458	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2459	UINT64 PlatformInterruptAckPreserve;
2460	UINT64 PlatformInterruptAckSet;
2461	UINT8 Reserved1[8];
2462	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;
2463	UINT64 CommandCompleteCheckMask;
2464	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;
2465	UINT64 CommandCompleteUpdatePreserve;
2466	UINT64 CommandCompleteUpdateSet;
2467	EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;
2468	UINT64 ErrorStatusMask;
2469	} EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC;
2470
2471	///
2472	/// Type 4 Extended PCC Subspace Structure
2473	///
2474	typedef EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_3_PCCT_SUBSPACE_4_EXTENDED_PCC;
2475
2476	#define EFI_ACPI_6_3_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0
2477
2478	typedef struct {
2479	UINT32 Signature;
2480	UINT32 Flags;
2481	UINT32 Length;
2482	UINT32 Command;
2483	} EFI_ACPI_6_3_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;
2484
2485	///
2486	/// Platform Debug Trigger Table (PDTT)
2487	///
2488	typedef struct {
2489	EFI_ACPI_DESCRIPTION_HEADER Header;
2490	UINT8 TriggerCount;
2491	UINT8 Reserved[3];
2492	UINT32 TriggerIdentifierArrayOffset;
2493	} EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;
2494
2495	///
2496	/// PDTT Revision (as defined in ACPI 6.3 spec.)
2497	///
2498	#define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00
2499
2500	///
2501	/// PDTT Platform Communication Channel Identifier Structure
2502	///
2503	typedef struct {
2504	UINT16 SubChannelIdentifer : 8;
2505	UINT16 Runtime : 1;
2506	UINT16 WaitForCompletion : 1;
2507	UINT16 TriggerOrder : 1;
2508	UINT16 Reserved : 5;
2509	} EFI_ACPI_6_3_PDTT_PCC_IDENTIFIER;
2510
2511	///
2512	/// PCC Commands Codes used by Platform Debug Trigger Table
2513	///
2514	#define EFI_ACPI_6_3_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00
2515	#define EFI_ACPI_6_3_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01
2516
2517	///
2518	/// PPTT Platform Communication Channel
2519	///
2520	typedef EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_3_PDTT_PCC;
2521
2522	///
2523	/// Processor Properties Topology Table (PPTT)
2524	///
2525	typedef struct {
2526	EFI_ACPI_DESCRIPTION_HEADER Header;
2527	} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;
2528
2529	///
2530	/// PPTT Revision (as defined in ACPI 6.3 spec.)
2531	///
2532	#define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x02
2533
2534	///
2535	/// PPTT types
2536	///
2537	#define EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR 0x00
2538	#define EFI_ACPI_6_3_PPTT_TYPE_CACHE 0x01
2539	#define EFI_ACPI_6_3_PPTT_TYPE_ID 0x02
2540
2541	///
2542	/// PPTT Structure Header
2543	///
2544	typedef struct {
2545	UINT8 Type;
2546	UINT8 Length;
2547	UINT8 Reserved[2];
2548	} EFI_ACPI_6_3_PPTT_STRUCTURE_HEADER;
2549
2550	///
2551	/// For PPTT struct processor flags
2552	///
2553	#define EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL 0x0
2554	#define EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL 0x1
2555	#define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID 0x0
2556	#define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID 0x1
2557	#define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD 0x0
2558	#define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD 0x1
2559	#define EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF 0x0
2560	#define EFI_ACPI_6_3_PPTT_NODE_IS_LEAF 0x1
2561	#define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0
2562	#define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL 0x1
2563
2564	///
2565	/// Processor hierarchy node structure flags
2566	///
2567	typedef struct {
2568	UINT32 PhysicalPackage : 1;
2569	UINT32 AcpiProcessorIdValid : 1;
2570	UINT32 ProcessorIsAThread : 1;
2571	UINT32 NodeIsALeaf : 1;
2572	UINT32 IdenticalImplementation : 1;
2573	UINT32 Reserved : 27;
2574	} EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS;
2575
2576	///
2577	/// Processor hierarchy node structure
2578	///
2579	typedef struct {
2580	UINT8 Type;
2581	UINT8 Length;
2582	UINT8 Reserved[2];
2583	EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;
2584	UINT32 Parent;
2585	UINT32 AcpiProcessorId;
2586	UINT32 NumberOfPrivateResources;
2587	} EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR;
2588
2589	///
2590	/// For PPTT struct cache flags
2591	///
2592	#define EFI_ACPI_6_3_PPTT_CACHE_SIZE_INVALID 0x0
2593	#define EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID 0x1
2594	#define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_INVALID 0x0
2595	#define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID 0x1
2596	#define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_INVALID 0x0
2597	#define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID 0x1
2598	#define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_INVALID 0x0
2599	#define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID 0x1
2600	#define EFI_ACPI_6_3_PPTT_CACHE_TYPE_INVALID 0x0
2601	#define EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID 0x1
2602	#define EFI_ACPI_6_3_PPTT_WRITE_POLICY_INVALID 0x0
2603	#define EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID 0x1
2604	#define EFI_ACPI_6_3_PPTT_LINE_SIZE_INVALID 0x0
2605	#define EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID 0x1
2606
2607	///
2608	/// Cache Type Structure flags
2609	///
2610	typedef struct {
2611	UINT32 SizePropertyValid : 1;
2612	UINT32 NumberOfSetsValid : 1;
2613	UINT32 AssociativityValid : 1;
2614	UINT32 AllocationTypeValid : 1;
2615	UINT32 CacheTypeValid : 1;
2616	UINT32 WritePolicyValid : 1;
2617	UINT32 LineSizeValid : 1;
2618	UINT32 Reserved : 25;
2619	} EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS;
2620
2621	///
2622	/// For cache attributes
2623	///
2624	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0
2625	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1
2626	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2
2627	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0
2628	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1
2629	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2
2630	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0
2631	#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1
2632
2633	///
2634	/// Cache Type Structure cache attributes
2635	///
2636	typedef struct {
2637	UINT8 AllocationType : 2;
2638	UINT8 CacheType : 2;
2639	UINT8 WritePolicy : 1;
2640	UINT8 Reserved : 3;
2641	} EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES;
2642
2643	///
2644	/// Cache Type Structure
2645	///
2646	typedef struct {
2647	UINT8 Type;
2648	UINT8 Length;
2649	UINT8 Reserved[2];
2650	EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS Flags;
2651	UINT32 NextLevelOfCache;
2652	UINT32 Size;
2653	UINT32 NumberOfSets;
2654	UINT8 Associativity;
2655	EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;
2656	UINT16 LineSize;
2657	} EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE;
2658
2659	///
2660	/// ID structure
2661	///
2662	typedef struct {
2663	UINT8 Type;
2664	UINT8 Length;
2665	UINT8 Reserved[2];
2666	UINT32 VendorId;
2667	UINT64 Level1Id;
2668	UINT64 Level2Id;
2669	UINT16 MajorRev;
2670	UINT16 MinorRev;
2671	UINT16 SpinRev;
2672	} EFI_ACPI_6_3_PPTT_STRUCTURE_ID;
2673
2674	//
2675	// Known table signatures
2676	//
2677
2678	///
2679	/// "RSD PTR " Root System Description Pointer
2680	///
2681	#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
2682
2683	///
2684	/// "APIC" Multiple APIC Description Table
2685	///
2686	#define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
2687
2688	///
2689	/// "BERT" Boot Error Record Table
2690	///
2691	#define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
2692
2693	///
2694	/// "BGRT" Boot Graphics Resource Table
2695	///
2696	#define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
2697
2698	///
2699	/// "CDIT" Component Distance Information Table
2700	///
2701	#define EFI_ACPI_6_3_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')
2702
2703	///
2704	/// "CPEP" Corrected Platform Error Polling Table
2705	///
2706	#define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
2707
2708	///
2709	/// "CRAT" Component Resource Attribute Table
2710	///
2711	#define EFI_ACPI_6_3_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')
2712
2713	///
2714	/// "DSDT" Differentiated System Description Table
2715	///
2716	#define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
2717
2718	///
2719	/// "ECDT" Embedded Controller Boot Resources Table
2720	///
2721	#define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
2722
2723	///
2724	/// "EINJ" Error Injection Table
2725	///
2726	#define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
2727
2728	///
2729	/// "ERST" Error Record Serialization Table
2730	///
2731	#define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
2732
2733	///
2734	/// "FACP" Fixed ACPI Description Table
2735	///
2736	#define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
2737
2738	///
2739	/// "FACS" Firmware ACPI Control Structure
2740	///
2741	#define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
2742
2743	///
2744	/// "FPDT" Firmware Performance Data Table
2745	///
2746	#define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
2747
2748	///
2749	/// "GTDT" Generic Timer Description Table
2750	///
2751	#define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
2752
2753	///
2754	/// "HEST" Hardware Error Source Table
2755	///
2756	#define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
2757
2758	///
2759	/// "HMAT" Heterogeneous Memory Attribute Table
2760	///
2761	#define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')
2762
2763	///
2764	/// "MPST" Memory Power State Table
2765	///
2766	#define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
2767
2768	///
2769	/// "MSCT" Maximum System Characteristics Table
2770	///
2771	#define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
2772
2773	///
2774	/// "NFIT" NVDIMM Firmware Interface Table
2775	///
2776	#define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')
2777
2778	///
2779	/// "PDTT" Platform Debug Trigger Table
2780	///
2781	#define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')
2782
2783	///
2784	/// "PMTT" Platform Memory Topology Table
2785	///
2786	#define EFI_ACPI_6_3_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
2787
2788	///
2789	/// "PPTT" Processor Properties Topology Table
2790	///
2791	#define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
2792
2793	///
2794	/// "PSDT" Persistent System Description Table
2795	///
2796	#define EFI_ACPI_6_3_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
2797
2798	///
2799	/// "RASF" ACPI RAS Feature Table
2800	///
2801	#define EFI_ACPI_6_3_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
2802
2803	///
2804	/// "RSDT" Root System Description Table
2805	///
2806	#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
2807
2808	///
2809	/// "SBST" Smart Battery Specification Table
2810	///
2811	#define EFI_ACPI_6_3_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
2812
2813	///
2814	/// "SDEV" Secure DEVices Table
2815	///
2816	#define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')
2817
2818	///
2819	/// "SLIT" System Locality Information Table
2820	///
2821	#define EFI_ACPI_6_3_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
2822
2823	///
2824	/// "SRAT" System Resource Affinity Table
2825	///
2826	#define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
2827
2828	///
2829	/// "SSDT" Secondary System Description Table
2830	///
2831	#define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
2832
2833	///
2834	/// "XSDT" Extended System Description Table
2835	///
2836	#define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
2837
2838	///
2839	/// "BOOT" MS Simple Boot Spec
2840	///
2841	#define EFI_ACPI_6_3_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2842
2843	///
2844	/// "CSRT" MS Core System Resource Table
2845	///
2846	#define EFI_ACPI_6_3_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2847
2848	///
2849	/// "DBG2" MS Debug Port 2 Spec
2850	///
2851	#define EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2852
2853	///
2854	/// "DBGP" MS Debug Port Spec
2855	///
2856	#define EFI_ACPI_6_3_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2857
2858	///
2859	/// "DMAR" DMA Remapping Table
2860	///
2861	#define EFI_ACPI_6_3_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2862
2863	///
2864	/// "DPPT" DMA Protection Policy Table
2865	///
2866	#define EFI_ACPI_6_3_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T')
2867
2868	///
2869	/// "DRTM" Dynamic Root of Trust for Measurement Table
2870	///
2871	#define EFI_ACPI_6_3_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2872
2873	///
2874	/// "ETDT" Event Timer Description Table
2875	///
2876	#define EFI_ACPI_6_3_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2877
2878	///
2879	/// "HPET" IA-PC High Precision Event Timer Table
2880	///
2881	#define EFI_ACPI_6_3_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2882
2883	///
2884	/// "iBFT" iSCSI Boot Firmware Table
2885	///
2886	#define EFI_ACPI_6_3_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2887
2888	///
2889	/// "IORT" I/O Remapping Table
2890	///
2891	#define EFI_ACPI_6_3_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')
2892
2893	///
2894	/// "IVRS" I/O Virtualization Reporting Structure
2895	///
2896	#define EFI_ACPI_6_3_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2897
2898	///
2899	/// "LPIT" Low Power Idle Table
2900	///
2901	#define EFI_ACPI_6_3_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
2902
2903	///
2904	/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2905	///
2906	#define EFI_ACPI_6_3_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2907
2908	///
2909	/// "MCHI" Management Controller Host Interface Table
2910	///
2911	#define EFI_ACPI_6_3_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2912
2913	///
2914	/// "MSDM" MS Data Management Table
2915	///
2916	#define EFI_ACPI_6_3_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2917
2918	///
2919	/// "PCCT" Platform Communications Channel Table
2920	///
2921	#define EFI_ACPI_6_3_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
2922
2923	///
2924	/// "SDEI" Software Delegated Exceptions Interface Table
2925	///
2926	#define EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')
2927
2928	///
2929	/// "SLIC" MS Software Licensing Table Specification
2930	///
2931	#define EFI_ACPI_6_3_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2932
2933	///
2934	/// "SPCR" Serial Port Concole Redirection Table
2935	///
2936	#define EFI_ACPI_6_3_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2937
2938	///
2939	/// "SPMI" Server Platform Management Interface Table
2940	///
2941	#define EFI_ACPI_6_3_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2942
2943	///
2944	/// "STAO" _STA Override Table
2945	///
2946	#define EFI_ACPI_6_3_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')
2947
2948	///
2949	/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2950	///
2951	#define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2952
2953	///
2954	/// "TPM2" Trusted Computing Platform 1 Table
2955	///
2956	#define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2957
2958	///
2959	/// "UEFI" UEFI ACPI Data Table
2960	///
2961	#define EFI_ACPI_6_3_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2962
2963	///
2964	/// "WAET" Windows ACPI Emulated Devices Table
2965	///
2966	#define EFI_ACPI_6_3_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2967
2968	///
2969	/// "WDAT" Watchdog Action Table
2970	///
2971	#define EFI_ACPI_6_3_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2972
2973	///
2974	/// "WDRT" Watchdog Resource Table
2975	///
2976	#define EFI_ACPI_6_3_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2977
2978	///
2979	/// "WPBT" MS Platform Binary Table
2980	///
2981	#define EFI_ACPI_6_3_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2982
2983	///
2984	/// "WSMT" Windows SMM Security Mitigation Table
2985	///
2986	#define EFI_ACPI_6_3_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')
2987
2988	///
2989	/// "XENV" Xen Project Table
2990	///
2991	#define EFI_ACPI_6_3_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')
2992
2993	#pragma pack()
2994
2995	#endif

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source: vbox/trunk/src/VBox/Devices/EFI/FirmwareNew/MdePkg/Include/IndustryStandard/Acpi63.h@ 108794

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