SmBios.h@ 85718

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1	/** @file
2	Industry Standard Definitions of SMBIOS Table Specification v3.3.0.
3
4	Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
5	(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
6	(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>
7	SPDX-License-Identifier: BSD-2-Clause-Patent
8
9	**/
10
11	#ifndef __SMBIOS_STANDARD_H__
12	#define __SMBIOS_STANDARD_H__
13
14	///
15	/// Reference SMBIOS 2.6, chapter 3.1.2.
16	/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
17	/// use by this specification.
18	///
19	#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00
20
21	///
22	/// Reference SMBIOS 2.7, chapter 6.1.2.
23	/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its
24	/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."
25	/// This number is not used for any other purpose by the SMBIOS specification.
26	///
27	#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE
28
29	///
30	/// Reference SMBIOS 2.6, chapter 3.1.3.
31	/// Each text string is limited to 64 significant characters due to system MIF limitations.
32	/// Reference SMBIOS 2.7, chapter 6.1.3.
33	/// It will have no limit on the length of each individual text string.
34	///
35	#define SMBIOS_STRING_MAX_LENGTH 64
36
37	//
38	// The length of the entire structure table (including all strings) must be reported
39	// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,
40	// which is a WORD field limited to 65,535 bytes.
41	//
42	#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF
43
44	//
45	// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.
46	//
47	#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
48
49	//
50	// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.
51	//
52	#define SMBIOS_TYPE_BIOS_INFORMATION 0
53	#define SMBIOS_TYPE_SYSTEM_INFORMATION 1
54	#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2
55	#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3
56	#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4
57	#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5
58	#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6
59	#define SMBIOS_TYPE_CACHE_INFORMATION 7
60	#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8
61	#define SMBIOS_TYPE_SYSTEM_SLOTS 9
62	#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10
63	#define SMBIOS_TYPE_OEM_STRINGS 11
64	#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12
65	#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13
66	#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14
67	#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15
68	#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16
69	#define SMBIOS_TYPE_MEMORY_DEVICE 17
70	#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18
71	#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19
72	#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20
73	#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21
74	#define SMBIOS_TYPE_PORTABLE_BATTERY 22
75	#define SMBIOS_TYPE_SYSTEM_RESET 23
76	#define SMBIOS_TYPE_HARDWARE_SECURITY 24
77	#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25
78	#define SMBIOS_TYPE_VOLTAGE_PROBE 26
79	#define SMBIOS_TYPE_COOLING_DEVICE 27
80	#define SMBIOS_TYPE_TEMPERATURE_PROBE 28
81	#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29
82	#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30
83	#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31
84	#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32
85	#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33
86	#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34
87	#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35
88	#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36
89	#define SMBIOS_TYPE_MEMORY_CHANNEL 37
90	#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38
91	#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39
92	#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40
93	#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41
94	#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42
95	#define SMBIOS_TYPE_TPM_DEVICE 43
96	#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44
97
98	///
99	/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
100	/// Upper-level software that interprets the SMBIOS structure-table should bypass an
101	/// Inactive structure just like a structure type that the software does not recognize.
102	///
103	#define SMBIOS_TYPE_INACTIVE 0x007E
104
105	///
106	/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.
107	/// The end-of-table indicator is used in the last physical structure in a table
108	///
109	#define SMBIOS_TYPE_END_OF_TABLE 0x007F
110
111	#define SMBIOS_OEM_BEGIN 128
112	#define SMBIOS_OEM_END 255
113
114	///
115	/// Types 0 through 127 (7Fh) are reserved for and defined by this
116	/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.
117	///
118	typedef UINT8 SMBIOS_TYPE;
119
120	///
121	/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version
122	/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS
123	/// Structure function to retrieve a specific structure; the handle numbers are not required to be
124	/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
125	/// use by this specification.
126	/// If the system configuration changes, a previously assigned handle might no longer exist.
127	/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle
128	/// number to another structure.
129	///
130	typedef UINT16 SMBIOS_HANDLE;
131
132	///
133	/// Smbios Table Entry Point Structure.
134	///
135	#pragma pack(1)
136	typedef struct {
137	UINT8 AnchorString[4];
138	UINT8 EntryPointStructureChecksum;
139	UINT8 EntryPointLength;
140	UINT8 MajorVersion;
141	UINT8 MinorVersion;
142	UINT16 MaxStructureSize;
143	UINT8 EntryPointRevision;
144	UINT8 FormattedArea[5];
145	UINT8 IntermediateAnchorString[5];
146	UINT8 IntermediateChecksum;
147	UINT16 TableLength;
148	UINT32 TableAddress;
149	UINT16 NumberOfSmbiosStructures;
150	UINT8 SmbiosBcdRevision;
151	} SMBIOS_TABLE_ENTRY_POINT;
152
153	typedef struct {
154	UINT8 AnchorString[5];
155	UINT8 EntryPointStructureChecksum;
156	UINT8 EntryPointLength;
157	UINT8 MajorVersion;
158	UINT8 MinorVersion;
159	UINT8 DocRev;
160	UINT8 EntryPointRevision;
161	UINT8 Reserved;
162	UINT32 TableMaximumSize;
163	UINT64 TableAddress;
164	} SMBIOS_TABLE_3_0_ENTRY_POINT;
165
166	///
167	/// The Smbios structure header.
168	///
169	typedef struct {
170	SMBIOS_TYPE Type;
171	UINT8 Length;
172	SMBIOS_HANDLE Handle;
173	} SMBIOS_STRUCTURE;
174
175	///
176	/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after
177	/// the formatted portion of the structure. This method of returning string information eliminates the need for
178	/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null
179	/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of
180	/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's
181	/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion
182	/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the
183	/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string
184	/// references), the formatted section of the structure is followed by two null (00h) BYTES.
185	///
186	typedef UINT8 SMBIOS_TABLE_STRING;
187
188	///
189	/// BIOS Characteristics
190	/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
191	///
192	typedef struct {
193	UINT32 Reserved :2; ///< Bits 0-1.
194	UINT32 Unknown :1;
195	UINT32 BiosCharacteristicsNotSupported :1;
196	UINT32 IsaIsSupported :1;
197	UINT32 McaIsSupported :1;
198	UINT32 EisaIsSupported :1;
199	UINT32 PciIsSupported :1;
200	UINT32 PcmciaIsSupported :1;
201	UINT32 PlugAndPlayIsSupported :1;
202	UINT32 ApmIsSupported :1;
203	UINT32 BiosIsUpgradable :1;
204	UINT32 BiosShadowingAllowed :1;
205	UINT32 VlVesaIsSupported :1;
206	UINT32 EscdSupportIsAvailable :1;
207	UINT32 BootFromCdIsSupported :1;
208	UINT32 SelectableBootIsSupported :1;
209	UINT32 RomBiosIsSocketed :1;
210	UINT32 BootFromPcmciaIsSupported :1;
211	UINT32 EDDSpecificationIsSupported :1;
212	UINT32 JapaneseNecFloppyIsSupported :1;
213	UINT32 JapaneseToshibaFloppyIsSupported :1;
214	UINT32 Floppy525_360IsSupported :1;
215	UINT32 Floppy525_12IsSupported :1;
216	UINT32 Floppy35_720IsSupported :1;
217	UINT32 Floppy35_288IsSupported :1;
218	UINT32 PrintScreenIsSupported :1;
219	UINT32 Keyboard8042IsSupported :1;
220	UINT32 SerialIsSupported :1;
221	UINT32 PrinterIsSupported :1;
222	UINT32 CgaMonoIsSupported :1;
223	UINT32 NecPc98 :1;
224	UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
225	///< and bits 48-63 reserved for System Vendor.
226	} MISC_BIOS_CHARACTERISTICS;
227
228	///
229	/// BIOS Characteristics Extension Byte 1.
230	/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
231	/// within the BIOS Information structure.
232	///
233	typedef struct {
234	UINT8 AcpiIsSupported :1;
235	UINT8 UsbLegacyIsSupported :1;
236	UINT8 AgpIsSupported :1;
237	UINT8 I2OBootIsSupported :1;
238	UINT8 Ls120BootIsSupported :1;
239	UINT8 AtapiZipDriveBootIsSupported :1;
240	UINT8 Boot1394IsSupported :1;
241	UINT8 SmartBatteryIsSupported :1;
242	} MBCE_BIOS_RESERVED;
243
244	///
245	/// BIOS Characteristics Extension Byte 2.
246	/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
247	/// within the BIOS Information structure.
248	///
249	typedef struct {
250	UINT8 BiosBootSpecIsSupported :1;
251	UINT8 FunctionKeyNetworkBootIsSupported :1;
252	UINT8 TargetContentDistributionEnabled :1;
253	UINT8 UefiSpecificationSupported :1;
254	UINT8 VirtualMachineSupported :1;
255	UINT8 ExtensionByte2Reserved :3;
256	} MBCE_SYSTEM_RESERVED;
257
258	///
259	/// BIOS Characteristics Extension Bytes.
260	///
261	typedef struct {
262	MBCE_BIOS_RESERVED BiosReserved;
263	MBCE_SYSTEM_RESERVED SystemReserved;
264	} MISC_BIOS_CHARACTERISTICS_EXTENSION;
265
266	///
267	/// Extended BIOS ROM size.
268	///
269	typedef struct {
270	UINT16 Size :14;
271	UINT16 Unit :2;
272	} EXTENDED_BIOS_ROM_SIZE;
273
274	///
275	/// BIOS Information (Type 0).
276	///
277	typedef struct {
278	SMBIOS_STRUCTURE Hdr;
279	SMBIOS_TABLE_STRING Vendor;
280	SMBIOS_TABLE_STRING BiosVersion;
281	UINT16 BiosSegment;
282	SMBIOS_TABLE_STRING BiosReleaseDate;
283	UINT8 BiosSize;
284	MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
285	UINT8 BIOSCharacteristicsExtensionBytes[2];
286	UINT8 SystemBiosMajorRelease;
287	UINT8 SystemBiosMinorRelease;
288	UINT8 EmbeddedControllerFirmwareMajorRelease;
289	UINT8 EmbeddedControllerFirmwareMinorRelease;
290	//
291	// Add for smbios 3.1.0
292	//
293	EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;
294	} SMBIOS_TABLE_TYPE0;
295
296	///
297	/// System Wake-up Type.
298	///
299	typedef enum {
300	SystemWakeupTypeReserved = 0x00,
301	SystemWakeupTypeOther = 0x01,
302	SystemWakeupTypeUnknown = 0x02,
303	SystemWakeupTypeApmTimer = 0x03,
304	SystemWakeupTypeModemRing = 0x04,
305	SystemWakeupTypeLanRemote = 0x05,
306	SystemWakeupTypePowerSwitch = 0x06,
307	SystemWakeupTypePciPme = 0x07,
308	SystemWakeupTypeAcPowerRestored = 0x08
309	} MISC_SYSTEM_WAKEUP_TYPE;
310
311	///
312	/// System Information (Type 1).
313	///
314	/// The information in this structure defines attributes of the overall system and is
315	/// intended to be associated with the Component ID group of the system's MIF.
316	/// An SMBIOS implementation is associated with a single system instance and contains
317	/// one and only one System Information (Type 1) structure.
318	///
319	typedef struct {
320	SMBIOS_STRUCTURE Hdr;
321	SMBIOS_TABLE_STRING Manufacturer;
322	SMBIOS_TABLE_STRING ProductName;
323	SMBIOS_TABLE_STRING Version;
324	SMBIOS_TABLE_STRING SerialNumber;
325	GUID Uuid;
326	UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.
327	SMBIOS_TABLE_STRING SKUNumber;
328	SMBIOS_TABLE_STRING Family;
329	} SMBIOS_TABLE_TYPE1;
330
331	///
332	/// Base Board - Feature Flags.
333	///
334	typedef struct {
335	UINT8 Motherboard :1;
336	UINT8 RequiresDaughterCard :1;
337	UINT8 Removable :1;
338	UINT8 Replaceable :1;
339	UINT8 HotSwappable :1;
340	UINT8 Reserved :3;
341	} BASE_BOARD_FEATURE_FLAGS;
342
343	///
344	/// Base Board - Board Type.
345	///
346	typedef enum {
347	BaseBoardTypeUnknown = 0x1,
348	BaseBoardTypeOther = 0x2,
349	BaseBoardTypeServerBlade = 0x3,
350	BaseBoardTypeConnectivitySwitch = 0x4,
351	BaseBoardTypeSystemManagementModule = 0x5,
352	BaseBoardTypeProcessorModule = 0x6,
353	BaseBoardTypeIOModule = 0x7,
354	BaseBoardTypeMemoryModule = 0x8,
355	BaseBoardTypeDaughterBoard = 0x9,
356	BaseBoardTypeMotherBoard = 0xA,
357	BaseBoardTypeProcessorMemoryModule = 0xB,
358	BaseBoardTypeProcessorIOModule = 0xC,
359	BaseBoardTypeInterconnectBoard = 0xD
360	} BASE_BOARD_TYPE;
361
362	///
363	/// Base Board (or Module) Information (Type 2).
364	///
365	/// The information in this structure defines attributes of a system baseboard -
366	/// for example a motherboard, planar, or server blade or other standard system module.
367	///
368	typedef struct {
369	SMBIOS_STRUCTURE Hdr;
370	SMBIOS_TABLE_STRING Manufacturer;
371	SMBIOS_TABLE_STRING ProductName;
372	SMBIOS_TABLE_STRING Version;
373	SMBIOS_TABLE_STRING SerialNumber;
374	SMBIOS_TABLE_STRING AssetTag;
375	BASE_BOARD_FEATURE_FLAGS FeatureFlag;
376	SMBIOS_TABLE_STRING LocationInChassis;
377	UINT16 ChassisHandle;
378	UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.
379	UINT8 NumberOfContainedObjectHandles;
380	UINT16 ContainedObjectHandles[1];
381	} SMBIOS_TABLE_TYPE2;
382
383	///
384	/// System Enclosure or Chassis Types
385	///
386	typedef enum {
387	MiscChassisTypeOther = 0x01,
388	MiscChassisTypeUnknown = 0x02,
389	MiscChassisTypeDeskTop = 0x03,
390	MiscChassisTypeLowProfileDesktop = 0x04,
391	MiscChassisTypePizzaBox = 0x05,
392	MiscChassisTypeMiniTower = 0x06,
393	MiscChassisTypeTower = 0x07,
394	MiscChassisTypePortable = 0x08,
395	MiscChassisTypeLapTop = 0x09,
396	MiscChassisTypeNotebook = 0x0A,
397	MiscChassisTypeHandHeld = 0x0B,
398	MiscChassisTypeDockingStation = 0x0C,
399	MiscChassisTypeAllInOne = 0x0D,
400	MiscChassisTypeSubNotebook = 0x0E,
401	MiscChassisTypeSpaceSaving = 0x0F,
402	MiscChassisTypeLunchBox = 0x10,
403	MiscChassisTypeMainServerChassis = 0x11,
404	MiscChassisTypeExpansionChassis = 0x12,
405	MiscChassisTypeSubChassis = 0x13,
406	MiscChassisTypeBusExpansionChassis = 0x14,
407	MiscChassisTypePeripheralChassis = 0x15,
408	MiscChassisTypeRaidChassis = 0x16,
409	MiscChassisTypeRackMountChassis = 0x17,
410	MiscChassisTypeSealedCasePc = 0x18,
411	MiscChassisMultiSystemChassis = 0x19,
412	MiscChassisCompactPCI = 0x1A,
413	MiscChassisAdvancedTCA = 0x1B,
414	MiscChassisBlade = 0x1C,
415	MiscChassisBladeEnclosure = 0x1D,
416	MiscChassisTablet = 0x1E,
417	MiscChassisConvertible = 0x1F,
418	MiscChassisDetachable = 0x20,
419	MiscChassisIoTGateway = 0x21,
420	MiscChassisEmbeddedPc = 0x22,
421	MiscChassisMiniPc = 0x23,
422	MiscChassisStickPc = 0x24
423	} MISC_CHASSIS_TYPE;
424
425	///
426	/// System Enclosure or Chassis States .
427	///
428	typedef enum {
429	ChassisStateOther = 0x01,
430	ChassisStateUnknown = 0x02,
431	ChassisStateSafe = 0x03,
432	ChassisStateWarning = 0x04,
433	ChassisStateCritical = 0x05,
434	ChassisStateNonRecoverable = 0x06
435	} MISC_CHASSIS_STATE;
436
437	///
438	/// System Enclosure or Chassis Security Status.
439	///
440	typedef enum {
441	ChassisSecurityStatusOther = 0x01,
442	ChassisSecurityStatusUnknown = 0x02,
443	ChassisSecurityStatusNone = 0x03,
444	ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
445	ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
446	} MISC_CHASSIS_SECURITY_STATE;
447
448	///
449	/// Contained Element record
450	///
451	typedef struct {
452	UINT8 ContainedElementType;
453	UINT8 ContainedElementMinimum;
454	UINT8 ContainedElementMaximum;
455	} CONTAINED_ELEMENT;
456
457
458	///
459	/// System Enclosure or Chassis (Type 3).
460	///
461	/// The information in this structure defines attributes of the system's mechanical enclosure(s).
462	/// For example, if a system included a separate enclosure for its peripheral devices,
463	/// two structures would be returned: one for the main, system enclosure and the second for
464	/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
465	/// support the population of the CIM_Chassis class.
466	///
467	typedef struct {
468	SMBIOS_STRUCTURE Hdr;
469	SMBIOS_TABLE_STRING Manufacturer;
470	UINT8 Type;
471	SMBIOS_TABLE_STRING Version;
472	SMBIOS_TABLE_STRING SerialNumber;
473	SMBIOS_TABLE_STRING AssetTag;
474	UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.
475	UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.
476	UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.
477	UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.
478	UINT8 OemDefined[4];
479	UINT8 Height;
480	UINT8 NumberofPowerCords;
481	UINT8 ContainedElementCount;
482	UINT8 ContainedElementRecordLength;
483	//
484	// Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements
485	//
486	CONTAINED_ELEMENT ContainedElements[1];
487	//
488	// Add for smbios 2.7
489	//
490	// Since ContainedElements has a variable number of entries, must not define SKUNumber in
491	// the structure. Need to reference it by starting at offset 0x15 and adding
492	// (ContainedElementCount * ContainedElementRecordLength) bytes.
493	//
494	// SMBIOS_TABLE_STRING SKUNumber;
495	} SMBIOS_TABLE_TYPE3;
496
497	///
498	/// Processor Information - Processor Type.
499	///
500	typedef enum {
501	ProcessorOther = 0x01,
502	ProcessorUnknown = 0x02,
503	CentralProcessor = 0x03,
504	MathProcessor = 0x04,
505	DspProcessor = 0x05,
506	VideoProcessor = 0x06
507	} PROCESSOR_TYPE_DATA;
508
509	///
510	/// Processor Information - Processor Family.
511	///
512	typedef enum {
513	ProcessorFamilyOther = 0x01,
514	ProcessorFamilyUnknown = 0x02,
515	ProcessorFamily8086 = 0x03,
516	ProcessorFamily80286 = 0x04,
517	ProcessorFamilyIntel386 = 0x05,
518	ProcessorFamilyIntel486 = 0x06,
519	ProcessorFamily8087 = 0x07,
520	ProcessorFamily80287 = 0x08,
521	ProcessorFamily80387 = 0x09,
522	ProcessorFamily80487 = 0x0A,
523	ProcessorFamilyPentium = 0x0B,
524	ProcessorFamilyPentiumPro = 0x0C,
525	ProcessorFamilyPentiumII = 0x0D,
526	ProcessorFamilyPentiumMMX = 0x0E,
527	ProcessorFamilyCeleron = 0x0F,
528	ProcessorFamilyPentiumIIXeon = 0x10,
529	ProcessorFamilyPentiumIII = 0x11,
530	ProcessorFamilyM1 = 0x12,
531	ProcessorFamilyM2 = 0x13,
532	ProcessorFamilyIntelCeleronM = 0x14,
533	ProcessorFamilyIntelPentium4Ht = 0x15,
534	ProcessorFamilyAmdDuron = 0x18,
535	ProcessorFamilyK5 = 0x19,
536	ProcessorFamilyK6 = 0x1A,
537	ProcessorFamilyK6_2 = 0x1B,
538	ProcessorFamilyK6_3 = 0x1C,
539	ProcessorFamilyAmdAthlon = 0x1D,
540	ProcessorFamilyAmd29000 = 0x1E,
541	ProcessorFamilyK6_2Plus = 0x1F,
542	ProcessorFamilyPowerPC = 0x20,
543	ProcessorFamilyPowerPC601 = 0x21,
544	ProcessorFamilyPowerPC603 = 0x22,
545	ProcessorFamilyPowerPC603Plus = 0x23,
546	ProcessorFamilyPowerPC604 = 0x24,
547	ProcessorFamilyPowerPC620 = 0x25,
548	ProcessorFamilyPowerPCx704 = 0x26,
549	ProcessorFamilyPowerPC750 = 0x27,
550	ProcessorFamilyIntelCoreDuo = 0x28,
551	ProcessorFamilyIntelCoreDuoMobile = 0x29,
552	ProcessorFamilyIntelCoreSoloMobile = 0x2A,
553	ProcessorFamilyIntelAtom = 0x2B,
554	ProcessorFamilyIntelCoreM = 0x2C,
555	ProcessorFamilyIntelCorem3 = 0x2D,
556	ProcessorFamilyIntelCorem5 = 0x2E,
557	ProcessorFamilyIntelCorem7 = 0x2F,
558	ProcessorFamilyAlpha = 0x30,
559	ProcessorFamilyAlpha21064 = 0x31,
560	ProcessorFamilyAlpha21066 = 0x32,
561	ProcessorFamilyAlpha21164 = 0x33,
562	ProcessorFamilyAlpha21164PC = 0x34,
563	ProcessorFamilyAlpha21164a = 0x35,
564	ProcessorFamilyAlpha21264 = 0x36,
565	ProcessorFamilyAlpha21364 = 0x37,
566	ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,
567	ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,
568	ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,
569	ProcessorFamilyAmdOpteron6100Series = 0x3B,
570	ProcessorFamilyAmdOpteron4100Series = 0x3C,
571	ProcessorFamilyAmdOpteron6200Series = 0x3D,
572	ProcessorFamilyAmdOpteron4200Series = 0x3E,
573	ProcessorFamilyAmdFxSeries = 0x3F,
574	ProcessorFamilyMips = 0x40,
575	ProcessorFamilyMIPSR4000 = 0x41,
576	ProcessorFamilyMIPSR4200 = 0x42,
577	ProcessorFamilyMIPSR4400 = 0x43,
578	ProcessorFamilyMIPSR4600 = 0x44,
579	ProcessorFamilyMIPSR10000 = 0x45,
580	ProcessorFamilyAmdCSeries = 0x46,
581	ProcessorFamilyAmdESeries = 0x47,
582	ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name
583	ProcessorFamilyAmdGSeries = 0x49,
584	ProcessorFamilyAmdZSeries = 0x4A,
585	ProcessorFamilyAmdRSeries = 0x4B,
586	ProcessorFamilyAmdOpteron4300 = 0x4C,
587	ProcessorFamilyAmdOpteron6300 = 0x4D,
588	ProcessorFamilyAmdOpteron3300 = 0x4E,
589	ProcessorFamilyAmdFireProSeries = 0x4F,
590	ProcessorFamilySparc = 0x50,
591	ProcessorFamilySuperSparc = 0x51,
592	ProcessorFamilymicroSparcII = 0x52,
593	ProcessorFamilymicroSparcIIep = 0x53,
594	ProcessorFamilyUltraSparc = 0x54,
595	ProcessorFamilyUltraSparcII = 0x55,
596	ProcessorFamilyUltraSparcIii = 0x56,
597	ProcessorFamilyUltraSparcIII = 0x57,
598	ProcessorFamilyUltraSparcIIIi = 0x58,
599	ProcessorFamily68040 = 0x60,
600	ProcessorFamily68xxx = 0x61,
601	ProcessorFamily68000 = 0x62,
602	ProcessorFamily68010 = 0x63,
603	ProcessorFamily68020 = 0x64,
604	ProcessorFamily68030 = 0x65,
605	ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
606	ProcessorFamilyAmdOpteronX1000Series = 0x67,
607	ProcessorFamilyAmdOpteronX2000Series = 0x68,
608	ProcessorFamilyAmdOpteronASeries = 0x69,
609	ProcessorFamilyAmdOpteronX3000Series = 0x6A,
610	ProcessorFamilyAmdZen = 0x6B,
611	ProcessorFamilyHobbit = 0x70,
612	ProcessorFamilyCrusoeTM5000 = 0x78,
613	ProcessorFamilyCrusoeTM3000 = 0x79,
614	ProcessorFamilyEfficeonTM8000 = 0x7A,
615	ProcessorFamilyWeitek = 0x80,
616	ProcessorFamilyItanium = 0x82,
617	ProcessorFamilyAmdAthlon64 = 0x83,
618	ProcessorFamilyAmdOpteron = 0x84,
619	ProcessorFamilyAmdSempron = 0x85,
620	ProcessorFamilyAmdTurion64Mobile = 0x86,
621	ProcessorFamilyDualCoreAmdOpteron = 0x87,
622	ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
623	ProcessorFamilyAmdTurion64X2Mobile = 0x89,
624	ProcessorFamilyQuadCoreAmdOpteron = 0x8A,
625	ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,
626	ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,
627	ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,
628	ProcessorFamilyAmdPhenomX2DualCore = 0x8E,
629	ProcessorFamilyAmdAthlonX2DualCore = 0x8F,
630	ProcessorFamilyPARISC = 0x90,
631	ProcessorFamilyPaRisc8500 = 0x91,
632	ProcessorFamilyPaRisc8000 = 0x92,
633	ProcessorFamilyPaRisc7300LC = 0x93,
634	ProcessorFamilyPaRisc7200 = 0x94,
635	ProcessorFamilyPaRisc7100LC = 0x95,
636	ProcessorFamilyPaRisc7100 = 0x96,
637	ProcessorFamilyV30 = 0xA0,
638	ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,
639	ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,
640	ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,
641	ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,
642	ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,
643	ProcessorFamilyDualCoreIntelXeonLV = 0xA6,
644	ProcessorFamilyDualCoreIntelXeonULV = 0xA7,
645	ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,
646	ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,
647	ProcessorFamilyQuadCoreIntelXeon = 0xAA,
648	ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,
649	ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,
650	ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,
651	ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,
652	ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,
653	ProcessorFamilyPentiumIIIXeon = 0xB0,
654	ProcessorFamilyPentiumIIISpeedStep = 0xB1,
655	ProcessorFamilyPentium4 = 0xB2,
656	ProcessorFamilyIntelXeon = 0xB3,
657	ProcessorFamilyAS400 = 0xB4,
658	ProcessorFamilyIntelXeonMP = 0xB5,
659	ProcessorFamilyAMDAthlonXP = 0xB6,
660	ProcessorFamilyAMDAthlonMP = 0xB7,
661	ProcessorFamilyIntelItanium2 = 0xB8,
662	ProcessorFamilyIntelPentiumM = 0xB9,
663	ProcessorFamilyIntelCeleronD = 0xBA,
664	ProcessorFamilyIntelPentiumD = 0xBB,
665	ProcessorFamilyIntelPentiumEx = 0xBC,
666	ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value
667	ProcessorFamilyReserved = 0xBE,
668	ProcessorFamilyIntelCore2 = 0xBF,
669	ProcessorFamilyIntelCore2Solo = 0xC0,
670	ProcessorFamilyIntelCore2Extreme = 0xC1,
671	ProcessorFamilyIntelCore2Quad = 0xC2,
672	ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,
673	ProcessorFamilyIntelCore2DuoMobile = 0xC4,
674	ProcessorFamilyIntelCore2SoloMobile = 0xC5,
675	ProcessorFamilyIntelCoreI7 = 0xC6,
676	ProcessorFamilyDualCoreIntelCeleron = 0xC7,
677	ProcessorFamilyIBM390 = 0xC8,
678	ProcessorFamilyG4 = 0xC9,
679	ProcessorFamilyG5 = 0xCA,
680	ProcessorFamilyG6 = 0xCB,
681	ProcessorFamilyzArchitecture = 0xCC,
682	ProcessorFamilyIntelCoreI5 = 0xCD,
683	ProcessorFamilyIntelCoreI3 = 0xCE,
684	ProcessorFamilyIntelCoreI9 = 0xCF,
685	ProcessorFamilyViaC7M = 0xD2,
686	ProcessorFamilyViaC7D = 0xD3,
687	ProcessorFamilyViaC7 = 0xD4,
688	ProcessorFamilyViaEden = 0xD5,
689	ProcessorFamilyMultiCoreIntelXeon = 0xD6,
690	ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
691	ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
692	ProcessorFamilyViaNano = 0xD9,
693	ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
694	ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
695	ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
696	ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
697	ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
698	ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,
699	ProcessorFamilyAmdOpteron3000Series = 0xE4,
700	ProcessorFamilyAmdSempronII = 0xE5,
701	ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
702	ProcessorFamilyAmdPhenomTripleCore = 0xE7,
703	ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
704	ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
705	ProcessorFamilyAmdAthlonDualCore = 0xEA,
706	ProcessorFamilyAmdSempronSI = 0xEB,
707	ProcessorFamilyAmdPhenomII = 0xEC,
708	ProcessorFamilyAmdAthlonII = 0xED,
709	ProcessorFamilySixCoreAmdOpteron = 0xEE,
710	ProcessorFamilyAmdSempronM = 0xEF,
711	ProcessorFamilyi860 = 0xFA,
712	ProcessorFamilyi960 = 0xFB,
713	ProcessorFamilyIndicatorFamily2 = 0xFE,
714	ProcessorFamilyReserved1 = 0xFF
715	} PROCESSOR_FAMILY_DATA;
716
717	///
718	/// Processor Information2 - Processor Family2.
719	///
720	typedef enum {
721	ProcessorFamilyARMv7 = 0x0100,
722	ProcessorFamilyARMv8 = 0x0101,
723	ProcessorFamilySH3 = 0x0104,
724	ProcessorFamilySH4 = 0x0105,
725	ProcessorFamilyARM = 0x0118,
726	ProcessorFamilyStrongARM = 0x0119,
727	ProcessorFamily6x86 = 0x012C,
728	ProcessorFamilyMediaGX = 0x012D,
729	ProcessorFamilyMII = 0x012E,
730	ProcessorFamilyWinChip = 0x0140,
731	ProcessorFamilyDSP = 0x015E,
732	ProcessorFamilyVideoProcessor = 0x01F4,
733	ProcessorFamilyRiscvRV32 = 0x0200,
734	ProcessorFamilyRiscVRV64 = 0x0201,
735	ProcessorFamilyRiscVRV128 = 0x0202
736	} PROCESSOR_FAMILY2_DATA;
737
738	///
739	/// Processor Information - Voltage.
740	///
741	typedef struct {
742	UINT8 ProcessorVoltageCapability5V :1;
743	UINT8 ProcessorVoltageCapability3_3V :1;
744	UINT8 ProcessorVoltageCapability2_9V :1;
745	UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
746	UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
747	UINT8 ProcessorVoltageIndicateLegacy :1;
748	} PROCESSOR_VOLTAGE;
749
750	///
751	/// Processor Information - Processor Upgrade.
752	///
753	typedef enum {
754	ProcessorUpgradeOther = 0x01,
755	ProcessorUpgradeUnknown = 0x02,
756	ProcessorUpgradeDaughterBoard = 0x03,
757	ProcessorUpgradeZIFSocket = 0x04,
758	ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.
759	ProcessorUpgradeNone = 0x06,
760	ProcessorUpgradeLIFSocket = 0x07,
761	ProcessorUpgradeSlot1 = 0x08,
762	ProcessorUpgradeSlot2 = 0x09,
763	ProcessorUpgrade370PinSocket = 0x0A,
764	ProcessorUpgradeSlotA = 0x0B,
765	ProcessorUpgradeSlotM = 0x0C,
766	ProcessorUpgradeSocket423 = 0x0D,
767	ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.
768	ProcessorUpgradeSocket478 = 0x0F,
769	ProcessorUpgradeSocket754 = 0x10,
770	ProcessorUpgradeSocket940 = 0x11,
771	ProcessorUpgradeSocket939 = 0x12,
772	ProcessorUpgradeSocketmPGA604 = 0x13,
773	ProcessorUpgradeSocketLGA771 = 0x14,
774	ProcessorUpgradeSocketLGA775 = 0x15,
775	ProcessorUpgradeSocketS1 = 0x16,
776	ProcessorUpgradeAM2 = 0x17,
777	ProcessorUpgradeF1207 = 0x18,
778	ProcessorSocketLGA1366 = 0x19,
779	ProcessorUpgradeSocketG34 = 0x1A,
780	ProcessorUpgradeSocketAM3 = 0x1B,
781	ProcessorUpgradeSocketC32 = 0x1C,
782	ProcessorUpgradeSocketLGA1156 = 0x1D,
783	ProcessorUpgradeSocketLGA1567 = 0x1E,
784	ProcessorUpgradeSocketPGA988A = 0x1F,
785	ProcessorUpgradeSocketBGA1288 = 0x20,
786	ProcessorUpgradeSocketrPGA988B = 0x21,
787	ProcessorUpgradeSocketBGA1023 = 0x22,
788	ProcessorUpgradeSocketBGA1224 = 0x23,
789	ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name
790	ProcessorUpgradeSocketLGA1356 = 0x25,
791	ProcessorUpgradeSocketLGA2011 = 0x26,
792	ProcessorUpgradeSocketFS1 = 0x27,
793	ProcessorUpgradeSocketFS2 = 0x28,
794	ProcessorUpgradeSocketFM1 = 0x29,
795	ProcessorUpgradeSocketFM2 = 0x2A,
796	ProcessorUpgradeSocketLGA2011_3 = 0x2B,
797	ProcessorUpgradeSocketLGA1356_3 = 0x2C,
798	ProcessorUpgradeSocketLGA1150 = 0x2D,
799	ProcessorUpgradeSocketBGA1168 = 0x2E,
800	ProcessorUpgradeSocketBGA1234 = 0x2F,
801	ProcessorUpgradeSocketBGA1364 = 0x30,
802	ProcessorUpgradeSocketAM4 = 0x31,
803	ProcessorUpgradeSocketLGA1151 = 0x32,
804	ProcessorUpgradeSocketBGA1356 = 0x33,
805	ProcessorUpgradeSocketBGA1440 = 0x34,
806	ProcessorUpgradeSocketBGA1515 = 0x35,
807	ProcessorUpgradeSocketLGA3647_1 = 0x36,
808	ProcessorUpgradeSocketSP3 = 0x37,
809	ProcessorUpgradeSocketSP3r2 = 0x38,
810	ProcessorUpgradeSocketLGA2066 = 0x39,
811	ProcessorUpgradeSocketBGA1392 = 0x3A,
812	ProcessorUpgradeSocketBGA1510 = 0x3B,
813	ProcessorUpgradeSocketBGA1528 = 0x3C
814	} PROCESSOR_UPGRADE;
815
816	///
817	/// Processor ID Field Description
818	///
819	typedef struct {
820	UINT32 ProcessorSteppingId:4;
821	UINT32 ProcessorModel: 4;
822	UINT32 ProcessorFamily: 4;
823	UINT32 ProcessorType: 2;
824	UINT32 ProcessorReserved1: 2;
825	UINT32 ProcessorXModel: 4;
826	UINT32 ProcessorXFamily: 8;
827	UINT32 ProcessorReserved2: 4;
828	} PROCESSOR_SIGNATURE;
829
830	typedef struct {
831	UINT32 ProcessorFpu :1;
832	UINT32 ProcessorVme :1;
833	UINT32 ProcessorDe :1;
834	UINT32 ProcessorPse :1;
835	UINT32 ProcessorTsc :1;
836	UINT32 ProcessorMsr :1;
837	UINT32 ProcessorPae :1;
838	UINT32 ProcessorMce :1;
839	UINT32 ProcessorCx8 :1;
840	UINT32 ProcessorApic :1;
841	UINT32 ProcessorReserved1 :1;
842	UINT32 ProcessorSep :1;
843	UINT32 ProcessorMtrr :1;
844	UINT32 ProcessorPge :1;
845	UINT32 ProcessorMca :1;
846	UINT32 ProcessorCmov :1;
847	UINT32 ProcessorPat :1;
848	UINT32 ProcessorPse36 :1;
849	UINT32 ProcessorPsn :1;
850	UINT32 ProcessorClfsh :1;
851	UINT32 ProcessorReserved2 :1;
852	UINT32 ProcessorDs :1;
853	UINT32 ProcessorAcpi :1;
854	UINT32 ProcessorMmx :1;
855	UINT32 ProcessorFxsr :1;
856	UINT32 ProcessorSse :1;
857	UINT32 ProcessorSse2 :1;
858	UINT32 ProcessorSs :1;
859	UINT32 ProcessorReserved3 :1;
860	UINT32 ProcessorTm :1;
861	UINT32 ProcessorReserved4 :2;
862	} PROCESSOR_FEATURE_FLAGS;
863
864	typedef struct {
865	UINT32 ProcessorReserved1 :1;
866	UINT32 ProcessorUnknown :1;
867	UINT32 Processor64BitCapble :1;
868	UINT32 ProcessorMultiCore :1;
869	UINT32 ProcessorHardwareThread :1;
870	UINT32 ProcessorExecuteProtection :1;
871	UINT32 ProcessorEnhancedVirtulization :1;
872	UINT32 ProcessorPowerPerformanceCtrl :1;
873	UINT32 Processor128bitCapble :1;
874	UINT32 ProcessorReserved2 :7;
875	} PROCESSOR_CHARACTERISTIC_FLAGS;
876
877	typedef struct {
878	PROCESSOR_SIGNATURE Signature;
879	PROCESSOR_FEATURE_FLAGS FeatureFlags;
880	} PROCESSOR_ID_DATA;
881
882	///
883	/// Processor Information (Type 4).
884	///
885	/// The information in this structure defines the attributes of a single processor;
886	/// a separate structure instance is provided for each system processor socket/slot.
887	/// For example, a system with an IntelDX2 processor would have a single
888	/// structure instance, while a system with an IntelSX2 processor would have a structure
889	/// to describe the main CPU, and a second structure to describe the 80487 co-processor.
890	///
891	typedef struct {
892	SMBIOS_STRUCTURE Hdr;
893	SMBIOS_TABLE_STRING Socket;
894	UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
895	UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.
896	SMBIOS_TABLE_STRING ProcessorManufacture;
897	PROCESSOR_ID_DATA ProcessorId;
898	SMBIOS_TABLE_STRING ProcessorVersion;
899	PROCESSOR_VOLTAGE Voltage;
900	UINT16 ExternalClock;
901	UINT16 MaxSpeed;
902	UINT16 CurrentSpeed;
903	UINT8 Status;
904	UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
905	UINT16 L1CacheHandle;
906	UINT16 L2CacheHandle;
907	UINT16 L3CacheHandle;
908	SMBIOS_TABLE_STRING SerialNumber;
909	SMBIOS_TABLE_STRING AssetTag;
910	SMBIOS_TABLE_STRING PartNumber;
911	//
912	// Add for smbios 2.5
913	//
914	UINT8 CoreCount;
915	UINT8 EnabledCoreCount;
916	UINT8 ThreadCount;
917	UINT16 ProcessorCharacteristics;
918	//
919	// Add for smbios 2.6
920	//
921	UINT16 ProcessorFamily2;
922	//
923	// Add for smbios 3.0
924	//
925	UINT16 CoreCount2;
926	UINT16 EnabledCoreCount2;
927	UINT16 ThreadCount2;
928	} SMBIOS_TABLE_TYPE4;
929
930	///
931	/// Memory Controller Error Detecting Method.
932	///
933	typedef enum {
934	ErrorDetectingMethodOther = 0x01,
935	ErrorDetectingMethodUnknown = 0x02,
936	ErrorDetectingMethodNone = 0x03,
937	ErrorDetectingMethodParity = 0x04,
938	ErrorDetectingMethod32Ecc = 0x05,
939	ErrorDetectingMethod64Ecc = 0x06,
940	ErrorDetectingMethod128Ecc = 0x07,
941	ErrorDetectingMethodCrc = 0x08
942	} MEMORY_ERROR_DETECT_METHOD;
943
944	///
945	/// Memory Controller Error Correcting Capability.
946	///
947	typedef struct {
948	UINT8 Other :1;
949	UINT8 Unknown :1;
950	UINT8 None :1;
951	UINT8 SingleBitErrorCorrect :1;
952	UINT8 DoubleBitErrorCorrect :1;
953	UINT8 ErrorScrubbing :1;
954	UINT8 Reserved :2;
955	} MEMORY_ERROR_CORRECT_CAPABILITY;
956
957	///
958	/// Memory Controller Information - Interleave Support.
959	///
960	typedef enum {
961	MemoryInterleaveOther = 0x01,
962	MemoryInterleaveUnknown = 0x02,
963	MemoryInterleaveOneWay = 0x03,
964	MemoryInterleaveTwoWay = 0x04,
965	MemoryInterleaveFourWay = 0x05,
966	MemoryInterleaveEightWay = 0x06,
967	MemoryInterleaveSixteenWay = 0x07
968	} MEMORY_SUPPORT_INTERLEAVE_TYPE;
969
970	///
971	/// Memory Controller Information - Memory Speeds.
972	///
973	typedef struct {
974	UINT16 Other :1;
975	UINT16 Unknown :1;
976	UINT16 SeventyNs:1;
977	UINT16 SixtyNs :1;
978	UINT16 FiftyNs :1;
979	UINT16 Reserved :11;
980	} MEMORY_SPEED_TYPE;
981
982	///
983	/// Memory Controller Information (Type 5, Obsolete).
984	///
985	/// The information in this structure defines the attributes of the system's memory controller(s)
986	/// and the supported attributes of any memory-modules present in the sockets controlled by
987	/// this controller.
988	/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
989	/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
990	/// and Memory Device (Type 17) structures should be used instead. BIOS providers might
991	/// choose to implement both memory description types to allow existing DMI browsers
992	/// to properly display the system's memory attributes.
993	///
994	typedef struct {
995	SMBIOS_STRUCTURE Hdr;
996	UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.
997	MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
998	UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.
999	UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .
1000	UINT8 MaxMemoryModuleSize;
1001	MEMORY_SPEED_TYPE SupportSpeed;
1002	UINT16 SupportMemoryType;
1003	UINT8 MemoryModuleVoltage;
1004	UINT8 AssociatedMemorySlotNum;
1005	UINT16 MemoryModuleConfigHandles[1];
1006	} SMBIOS_TABLE_TYPE5;
1007
1008	///
1009	/// Memory Module Information - Memory Types
1010	///
1011	typedef struct {
1012	UINT16 Other :1;
1013	UINT16 Unknown :1;
1014	UINT16 Standard :1;
1015	UINT16 FastPageMode:1;
1016	UINT16 Edo :1;
1017	UINT16 Parity :1;
1018	UINT16 Ecc :1;
1019	UINT16 Simm :1;
1020	UINT16 Dimm :1;
1021	UINT16 BurstEdo :1;
1022	UINT16 Sdram :1;
1023	UINT16 Reserved :5;
1024	} MEMORY_CURRENT_TYPE;
1025
1026	///
1027	/// Memory Module Information - Memory Size.
1028	///
1029	typedef struct {
1030	UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
1031	UINT8 SingleOrDoubleBank :1;
1032	} MEMORY_INSTALLED_ENABLED_SIZE;
1033
1034	///
1035	/// Memory Module Information (Type 6, Obsolete)
1036	///
1037	/// One Memory Module Information structure is included for each memory-module socket
1038	/// in the system. The structure describes the speed, type, size, and error status
1039	/// of each system memory module. The supported attributes of each module are described
1040	/// by the "owning" Memory Controller Information structure.
1041	/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
1042	/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
1043	/// and Memory Device (Type 17) structures should be used instead.
1044	///
1045	typedef struct {
1046	SMBIOS_STRUCTURE Hdr;
1047	SMBIOS_TABLE_STRING SocketDesignation;
1048	UINT8 BankConnections;
1049	UINT8 CurrentSpeed;
1050	MEMORY_CURRENT_TYPE CurrentMemoryType;
1051	MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
1052	MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
1053	UINT8 ErrorStatus;
1054	} SMBIOS_TABLE_TYPE6;
1055
1056	///
1057	/// Cache Information - SRAM Type.
1058	///
1059	typedef struct {
1060	UINT16 Other :1;
1061	UINT16 Unknown :1;
1062	UINT16 NonBurst :1;
1063	UINT16 Burst :1;
1064	UINT16 PipelineBurst :1;
1065	UINT16 Synchronous :1;
1066	UINT16 Asynchronous :1;
1067	UINT16 Reserved :9;
1068	} CACHE_SRAM_TYPE_DATA;
1069
1070	///
1071	/// Cache Information - Error Correction Type.
1072	///
1073	typedef enum {
1074	CacheErrorOther = 0x01,
1075	CacheErrorUnknown = 0x02,
1076	CacheErrorNone = 0x03,
1077	CacheErrorParity = 0x04,
1078	CacheErrorSingleBit = 0x05, ///< ECC
1079	CacheErrorMultiBit = 0x06 ///< ECC
1080	} CACHE_ERROR_TYPE_DATA;
1081
1082	///
1083	/// Cache Information - System Cache Type.
1084	///
1085	typedef enum {
1086	CacheTypeOther = 0x01,
1087	CacheTypeUnknown = 0x02,
1088	CacheTypeInstruction = 0x03,
1089	CacheTypeData = 0x04,
1090	CacheTypeUnified = 0x05
1091	} CACHE_TYPE_DATA;
1092
1093	///
1094	/// Cache Information - Associativity.
1095	///
1096	typedef enum {
1097	CacheAssociativityOther = 0x01,
1098	CacheAssociativityUnknown = 0x02,
1099	CacheAssociativityDirectMapped = 0x03,
1100	CacheAssociativity2Way = 0x04,
1101	CacheAssociativity4Way = 0x05,
1102	CacheAssociativityFully = 0x06,
1103	CacheAssociativity8Way = 0x07,
1104	CacheAssociativity16Way = 0x08,
1105	CacheAssociativity12Way = 0x09,
1106	CacheAssociativity24Way = 0x0A,
1107	CacheAssociativity32Way = 0x0B,
1108	CacheAssociativity48Way = 0x0C,
1109	CacheAssociativity64Way = 0x0D,
1110	CacheAssociativity20Way = 0x0E
1111	} CACHE_ASSOCIATIVITY_DATA;
1112
1113	///
1114	/// Cache Information (Type 7).
1115	///
1116	/// The information in this structure defines the attributes of CPU cache device in the system.
1117	/// One structure is specified for each such device, whether the device is internal to
1118	/// or external to the CPU module. Cache modules can be associated with a processor structure
1119	/// in one or two ways, depending on the SMBIOS version.
1120	///
1121	typedef struct {
1122	SMBIOS_STRUCTURE Hdr;
1123	SMBIOS_TABLE_STRING SocketDesignation;
1124	UINT16 CacheConfiguration;
1125	UINT16 MaximumCacheSize;
1126	UINT16 InstalledSize;
1127	CACHE_SRAM_TYPE_DATA SupportedSRAMType;
1128	CACHE_SRAM_TYPE_DATA CurrentSRAMType;
1129	UINT8 CacheSpeed;
1130	UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
1131	UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
1132	UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
1133	//
1134	// Add for smbios 3.1.0
1135	//
1136	UINT32 MaximumCacheSize2;
1137	UINT32 InstalledSize2;
1138	} SMBIOS_TABLE_TYPE7;
1139
1140	///
1141	/// Port Connector Information - Connector Types.
1142	///
1143	typedef enum {
1144	PortConnectorTypeNone = 0x00,
1145	PortConnectorTypeCentronics = 0x01,
1146	PortConnectorTypeMiniCentronics = 0x02,
1147	PortConnectorTypeProprietary = 0x03,
1148	PortConnectorTypeDB25Male = 0x04,
1149	PortConnectorTypeDB25Female = 0x05,
1150	PortConnectorTypeDB15Male = 0x06,
1151	PortConnectorTypeDB15Female = 0x07,
1152	PortConnectorTypeDB9Male = 0x08,
1153	PortConnectorTypeDB9Female = 0x09,
1154	PortConnectorTypeRJ11 = 0x0A,
1155	PortConnectorTypeRJ45 = 0x0B,
1156	PortConnectorType50PinMiniScsi = 0x0C,
1157	PortConnectorTypeMiniDin = 0x0D,
1158	PortConnectorTypeMicroDin = 0x0E,
1159	PortConnectorTypePS2 = 0x0F,
1160	PortConnectorTypeInfrared = 0x10,
1161	PortConnectorTypeHpHil = 0x11,
1162	PortConnectorTypeUsb = 0x12,
1163	PortConnectorTypeSsaScsi = 0x13,
1164	PortConnectorTypeCircularDin8Male = 0x14,
1165	PortConnectorTypeCircularDin8Female = 0x15,
1166	PortConnectorTypeOnboardIde = 0x16,
1167	PortConnectorTypeOnboardFloppy = 0x17,
1168	PortConnectorType9PinDualInline = 0x18,
1169	PortConnectorType25PinDualInline = 0x19,
1170	PortConnectorType50PinDualInline = 0x1A,
1171	PortConnectorType68PinDualInline = 0x1B,
1172	PortConnectorTypeOnboardSoundInput = 0x1C,
1173	PortConnectorTypeMiniCentronicsType14 = 0x1D,
1174	PortConnectorTypeMiniCentronicsType26 = 0x1E,
1175	PortConnectorTypeHeadPhoneMiniJack = 0x1F,
1176	PortConnectorTypeBNC = 0x20,
1177	PortConnectorType1394 = 0x21,
1178	PortConnectorTypeSasSata = 0x22,
1179	PortConnectorTypeUsbTypeC = 0x23,
1180	PortConnectorTypePC98 = 0xA0,
1181	PortConnectorTypePC98Hireso = 0xA1,
1182	PortConnectorTypePCH98 = 0xA2,
1183	PortConnectorTypePC98Note = 0xA3,
1184	PortConnectorTypePC98Full = 0xA4,
1185	PortConnectorTypeOther = 0xFF
1186	} MISC_PORT_CONNECTOR_TYPE;
1187
1188	///
1189	/// Port Connector Information - Port Types
1190	///
1191	typedef enum {
1192	PortTypeNone = 0x00,
1193	PortTypeParallelXtAtCompatible = 0x01,
1194	PortTypeParallelPortPs2 = 0x02,
1195	PortTypeParallelPortEcp = 0x03,
1196	PortTypeParallelPortEpp = 0x04,
1197	PortTypeParallelPortEcpEpp = 0x05,
1198	PortTypeSerialXtAtCompatible = 0x06,
1199	PortTypeSerial16450Compatible = 0x07,
1200	PortTypeSerial16550Compatible = 0x08,
1201	PortTypeSerial16550ACompatible = 0x09,
1202	PortTypeScsi = 0x0A,
1203	PortTypeMidi = 0x0B,
1204	PortTypeJoyStick = 0x0C,
1205	PortTypeKeyboard = 0x0D,
1206	PortTypeMouse = 0x0E,
1207	PortTypeSsaScsi = 0x0F,
1208	PortTypeUsb = 0x10,
1209	PortTypeFireWire = 0x11,
1210	PortTypePcmciaTypeI = 0x12,
1211	PortTypePcmciaTypeII = 0x13,
1212	PortTypePcmciaTypeIII = 0x14,
1213	PortTypeCardBus = 0x15,
1214	PortTypeAccessBusPort = 0x16,
1215	PortTypeScsiII = 0x17,
1216	PortTypeScsiWide = 0x18,
1217	PortTypePC98 = 0x19,
1218	PortTypePC98Hireso = 0x1A,
1219	PortTypePCH98 = 0x1B,
1220	PortTypeVideoPort = 0x1C,
1221	PortTypeAudioPort = 0x1D,
1222	PortTypeModemPort = 0x1E,
1223	PortTypeNetworkPort = 0x1F,
1224	PortTypeSata = 0x20,
1225	PortTypeSas = 0x21,
1226	PortTypeMfdp = 0x22, ///< Multi-Function Display Port
1227	PortTypeThunderbolt = 0x23,
1228	PortType8251Compatible = 0xA0,
1229	PortType8251FifoCompatible = 0xA1,
1230	PortTypeOther = 0xFF
1231	} MISC_PORT_TYPE;
1232
1233	///
1234	/// Port Connector Information (Type 8).
1235	///
1236	/// The information in this structure defines the attributes of a system port connector,
1237	/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
1238	/// are provided. One structure is present for each port provided by the system.
1239	///
1240	typedef struct {
1241	SMBIOS_STRUCTURE Hdr;
1242	SMBIOS_TABLE_STRING InternalReferenceDesignator;
1243	UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1244	SMBIOS_TABLE_STRING ExternalReferenceDesignator;
1245	UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1246	UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.
1247	} SMBIOS_TABLE_TYPE8;
1248
1249	///
1250	/// System Slots - Slot Type
1251	///
1252	typedef enum {
1253	SlotTypeOther = 0x01,
1254	SlotTypeUnknown = 0x02,
1255	SlotTypeIsa = 0x03,
1256	SlotTypeMca = 0x04,
1257	SlotTypeEisa = 0x05,
1258	SlotTypePci = 0x06,
1259	SlotTypePcmcia = 0x07,
1260	SlotTypeVlVesa = 0x08,
1261	SlotTypeProprietary = 0x09,
1262	SlotTypeProcessorCardSlot = 0x0A,
1263	SlotTypeProprietaryMemoryCardSlot = 0x0B,
1264	SlotTypeIORiserCardSlot = 0x0C,
1265	SlotTypeNuBus = 0x0D,
1266	SlotTypePci66MhzCapable = 0x0E,
1267	SlotTypeAgp = 0x0F,
1268	SlotTypeApg2X = 0x10,
1269	SlotTypeAgp4X = 0x11,
1270	SlotTypePciX = 0x12,
1271	SlotTypeAgp8X = 0x13,
1272	SlotTypeM2Socket1_DP = 0x14,
1273	SlotTypeM2Socket1_SD = 0x15,
1274	SlotTypeM2Socket2 = 0x16,
1275	SlotTypeM2Socket3 = 0x17,
1276	SlotTypeMxmTypeI = 0x18,
1277	SlotTypeMxmTypeII = 0x19,
1278	SlotTypeMxmTypeIIIStandard = 0x1A,
1279	SlotTypeMxmTypeIIIHe = 0x1B,
1280	SlotTypeMxmTypeIV = 0x1C,
1281	SlotTypeMxm30TypeA = 0x1D,
1282	SlotTypeMxm30TypeB = 0x1E,
1283	SlotTypePciExpressGen2Sff_8639 = 0x1F,
1284	SlotTypePciExpressGen3Sff_8639 = 0x20,
1285	SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
1286	SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
1287	SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
1288	SlotTypeCXLFlexbus10 = 0x30,
1289	SlotTypePC98C20 = 0xA0,
1290	SlotTypePC98C24 = 0xA1,
1291	SlotTypePC98E = 0xA2,
1292	SlotTypePC98LocalBus = 0xA3,
1293	SlotTypePC98Card = 0xA4,
1294	SlotTypePciExpress = 0xA5,
1295	SlotTypePciExpressX1 = 0xA6,
1296	SlotTypePciExpressX2 = 0xA7,
1297	SlotTypePciExpressX4 = 0xA8,
1298	SlotTypePciExpressX8 = 0xA9,
1299	SlotTypePciExpressX16 = 0xAA,
1300	SlotTypePciExpressGen2 = 0xAB,
1301	SlotTypePciExpressGen2X1 = 0xAC,
1302	SlotTypePciExpressGen2X2 = 0xAD,
1303	SlotTypePciExpressGen2X4 = 0xAE,
1304	SlotTypePciExpressGen2X8 = 0xAF,
1305	SlotTypePciExpressGen2X16 = 0xB0,
1306	SlotTypePciExpressGen3 = 0xB1,
1307	SlotTypePciExpressGen3X1 = 0xB2,
1308	SlotTypePciExpressGen3X2 = 0xB3,
1309	SlotTypePciExpressGen3X4 = 0xB4,
1310	SlotTypePciExpressGen3X8 = 0xB5,
1311	SlotTypePciExpressGen3X16 = 0xB6,
1312	SlotTypePciExpressGen4 = 0xB8,
1313	SlotTypePciExpressGen4X1 = 0xB9,
1314	SlotTypePciExpressGen4X2 = 0xBA,
1315	SlotTypePciExpressGen4X4 = 0xBB,
1316	SlotTypePciExpressGen4X8 = 0xBC,
1317	SlotTypePciExpressGen4X16 = 0xBD
1318	} MISC_SLOT_TYPE;
1319
1320	///
1321	/// System Slots - Slot Data Bus Width.
1322	///
1323	typedef enum {
1324	SlotDataBusWidthOther = 0x01,
1325	SlotDataBusWidthUnknown = 0x02,
1326	SlotDataBusWidth8Bit = 0x03,
1327	SlotDataBusWidth16Bit = 0x04,
1328	SlotDataBusWidth32Bit = 0x05,
1329	SlotDataBusWidth64Bit = 0x06,
1330	SlotDataBusWidth128Bit = 0x07,
1331	SlotDataBusWidth1X = 0x08, ///< Or X1
1332	SlotDataBusWidth2X = 0x09, ///< Or X2
1333	SlotDataBusWidth4X = 0x0A, ///< Or X4
1334	SlotDataBusWidth8X = 0x0B, ///< Or X8
1335	SlotDataBusWidth12X = 0x0C, ///< Or X12
1336	SlotDataBusWidth16X = 0x0D, ///< Or X16
1337	SlotDataBusWidth32X = 0x0E ///< Or X32
1338	} MISC_SLOT_DATA_BUS_WIDTH;
1339
1340	///
1341	/// System Slots - Current Usage.
1342	///
1343	typedef enum {
1344	SlotUsageOther = 0x01,
1345	SlotUsageUnknown = 0x02,
1346	SlotUsageAvailable = 0x03,
1347	SlotUsageInUse = 0x04,
1348	SlotUsageUnavailable = 0x05
1349	} MISC_SLOT_USAGE;
1350
1351	///
1352	/// System Slots - Slot Length.
1353	///
1354	typedef enum {
1355	SlotLengthOther = 0x01,
1356	SlotLengthUnknown = 0x02,
1357	SlotLengthShort = 0x03,
1358	SlotLengthLong = 0x04
1359	} MISC_SLOT_LENGTH;
1360
1361	///
1362	/// System Slots - Slot Characteristics 1.
1363	///
1364	typedef struct {
1365	UINT8 CharacteristicsUnknown :1;
1366	UINT8 Provides50Volts :1;
1367	UINT8 Provides33Volts :1;
1368	UINT8 SharedSlot :1;
1369	UINT8 PcCard16Supported :1;
1370	UINT8 CardBusSupported :1;
1371	UINT8 ZoomVideoSupported :1;
1372	UINT8 ModemRingResumeSupported:1;
1373	} MISC_SLOT_CHARACTERISTICS1;
1374	///
1375	/// System Slots - Slot Characteristics 2.
1376	///
1377	typedef struct {
1378	UINT8 PmeSignalSupported :1;
1379	UINT8 HotPlugDevicesSupported :1;
1380	UINT8 SmbusSignalSupported :1;
1381	UINT8 BifurcationSupported :1;
1382	UINT8 Reserved :4; ///< Set to 0.
1383	} MISC_SLOT_CHARACTERISTICS2;
1384
1385	///
1386	/// System Slots - Peer Segment/Bus/Device/Function/Width Groups
1387	///
1388	typedef struct {
1389	UINT16 SegmentGroupNum;
1390	UINT8 BusNum;
1391	UINT8 DevFuncNum;
1392	UINT8 DataBusWidth;
1393	} MISC_SLOT_PEER_GROUP;
1394
1395	///
1396	/// System Slots (Type 9)
1397	///
1398	/// The information in this structure defines the attributes of a system slot.
1399	/// One structure is provided for each slot in the system.
1400	///
1401	///
1402	typedef struct {
1403	SMBIOS_STRUCTURE Hdr;
1404	SMBIOS_TABLE_STRING SlotDesignation;
1405	UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.
1406	UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.
1407	UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.
1408	UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.
1409	UINT16 SlotID;
1410	MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
1411	MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
1412	//
1413	// Add for smbios 2.6
1414	//
1415	UINT16 SegmentGroupNum;
1416	UINT8 BusNum;
1417	UINT8 DevFuncNum;
1418	//
1419	// Add for smbios 3.2
1420	//
1421	UINT8 DataBusWidth;
1422	UINT8 PeerGroupingCount;
1423	MISC_SLOT_PEER_GROUP PeerGroups[1];
1424	} SMBIOS_TABLE_TYPE9;
1425
1426	///
1427	/// On Board Devices Information - Device Types.
1428	///
1429	typedef enum {
1430	OnBoardDeviceTypeOther = 0x01,
1431	OnBoardDeviceTypeUnknown = 0x02,
1432	OnBoardDeviceTypeVideo = 0x03,
1433	OnBoardDeviceTypeScsiController = 0x04,
1434	OnBoardDeviceTypeEthernet = 0x05,
1435	OnBoardDeviceTypeTokenRing = 0x06,
1436	OnBoardDeviceTypeSound = 0x07,
1437	OnBoardDeviceTypePATAController = 0x08,
1438	OnBoardDeviceTypeSATAController = 0x09,
1439	OnBoardDeviceTypeSASController = 0x0A
1440	} MISC_ONBOARD_DEVICE_TYPE;
1441
1442	///
1443	/// Device Item Entry
1444	///
1445	typedef struct {
1446	UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.
1447	///< Bit 7 - 1 : device enabled, 0 : device disabled.
1448	SMBIOS_TABLE_STRING DescriptionString;
1449	} DEVICE_STRUCT;
1450
1451	///
1452	/// On Board Devices Information (Type 10, obsolete).
1453	///
1454	/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1455	/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1456	/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1457	/// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1458	/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
1459	/// has some level of control over the enabling of the associated device for use by the system.
1460	///
1461	typedef struct {
1462	SMBIOS_STRUCTURE Hdr;
1463	DEVICE_STRUCT Device[1];
1464	} SMBIOS_TABLE_TYPE10;
1465
1466	///
1467	/// OEM Strings (Type 11).
1468	/// This structure contains free form strings defined by the OEM. Examples of this are:
1469	/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1470	///
1471	typedef struct {
1472	SMBIOS_STRUCTURE Hdr;
1473	UINT8 StringCount;
1474	} SMBIOS_TABLE_TYPE11;
1475
1476	///
1477	/// System Configuration Options (Type 12).
1478	///
1479	/// This structure contains information required to configure the base board's Jumpers and Switches.
1480	///
1481	typedef struct {
1482	SMBIOS_STRUCTURE Hdr;
1483	UINT8 StringCount;
1484	} SMBIOS_TABLE_TYPE12;
1485
1486
1487	///
1488	/// BIOS Language Information (Type 13).
1489	///
1490	/// The information in this structure defines the installable language attributes of the BIOS.
1491	///
1492	typedef struct {
1493	SMBIOS_STRUCTURE Hdr;
1494	UINT8 InstallableLanguages;
1495	UINT8 Flags;
1496	UINT8 Reserved[15];
1497	SMBIOS_TABLE_STRING CurrentLanguages;
1498	} SMBIOS_TABLE_TYPE13;
1499
1500	///
1501	/// Group Item Entry
1502	///
1503	typedef struct {
1504	UINT8 ItemType;
1505	UINT16 ItemHandle;
1506	} GROUP_STRUCT;
1507
1508	///
1509	/// Group Associations (Type 14).
1510	///
1511	/// The Group Associations structure is provided for OEMs who want to specify
1512	/// the arrangement or hierarchy of certain components (including other Group Associations)
1513	/// within the system.
1514	///
1515	typedef struct {
1516	SMBIOS_STRUCTURE Hdr;
1517	SMBIOS_TABLE_STRING GroupName;
1518	GROUP_STRUCT Group[1];
1519	} SMBIOS_TABLE_TYPE14;
1520
1521	///
1522	/// System Event Log - Event Log Types.
1523	///
1524	typedef enum {
1525	EventLogTypeReserved = 0x00,
1526	EventLogTypeSingleBitECC = 0x01,
1527	EventLogTypeMultiBitECC = 0x02,
1528	EventLogTypeParityMemErr = 0x03,
1529	EventLogTypeBusTimeOut = 0x04,
1530	EventLogTypeIOChannelCheck = 0x05,
1531	EventLogTypeSoftwareNMI = 0x06,
1532	EventLogTypePOSTMemResize = 0x07,
1533	EventLogTypePOSTErr = 0x08,
1534	EventLogTypePCIParityErr = 0x09,
1535	EventLogTypePCISystemErr = 0x0A,
1536	EventLogTypeCPUFailure = 0x0B,
1537	EventLogTypeEISATimeOut = 0x0C,
1538	EventLogTypeMemLogDisabled = 0x0D,
1539	EventLogTypeLoggingDisabled = 0x0E,
1540	EventLogTypeSysLimitExce = 0x10,
1541	EventLogTypeAsyncHWTimer = 0x11,
1542	EventLogTypeSysConfigInfo = 0x12,
1543	EventLogTypeHDInfo = 0x13,
1544	EventLogTypeSysReconfig = 0x14,
1545	EventLogTypeUncorrectCPUErr = 0x15,
1546	EventLogTypeAreaResetAndClr = 0x16,
1547	EventLogTypeSystemBoot = 0x17,
1548	EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
1549	EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
1550	EventLogTypeEndOfLog = 0xFF
1551	} EVENT_LOG_TYPE_DATA;
1552
1553	///
1554	/// System Event Log - Variable Data Format Types.
1555	///
1556	typedef enum {
1557	EventLogVariableNone = 0x00,
1558	EventLogVariableHandle = 0x01,
1559	EventLogVariableMutilEvent = 0x02,
1560	EventLogVariableMutilEventHandle = 0x03,
1561	EventLogVariablePOSTResultBitmap = 0x04,
1562	EventLogVariableSysManagementType = 0x05,
1563	EventLogVariableMutliEventSysManagmentType = 0x06,
1564	EventLogVariableUnused = 0x07,
1565	EventLogVariableOEMAssigned = 0x80
1566	} EVENT_LOG_VARIABLE_DATA;
1567
1568	///
1569	/// Event Log Type Descriptors
1570	///
1571	typedef struct {
1572	UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.
1573	UINT8 DataFormatType;
1574	} EVENT_LOG_TYPE;
1575
1576	///
1577	/// System Event Log (Type 15).
1578	///
1579	/// The presence of this structure within the SMBIOS data returned for a system indicates
1580	/// that the system supports an event log. An event log is a fixed-length area within a
1581	/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1582	/// record, followed by one or more variable-length log records.
1583	///
1584	typedef struct {
1585	SMBIOS_STRUCTURE Hdr;
1586	UINT16 LogAreaLength;
1587	UINT16 LogHeaderStartOffset;
1588	UINT16 LogDataStartOffset;
1589	UINT8 AccessMethod;
1590	UINT8 LogStatus;
1591	UINT32 LogChangeToken;
1592	UINT32 AccessMethodAddress;
1593	UINT8 LogHeaderFormat;
1594	UINT8 NumberOfSupportedLogTypeDescriptors;
1595	UINT8 LengthOfLogTypeDescriptor;
1596	EVENT_LOG_TYPE EventLogTypeDescriptors[1];
1597	} SMBIOS_TABLE_TYPE15;
1598
1599	///
1600	/// Physical Memory Array - Location.
1601	///
1602	typedef enum {
1603	MemoryArrayLocationOther = 0x01,
1604	MemoryArrayLocationUnknown = 0x02,
1605	MemoryArrayLocationSystemBoard = 0x03,
1606	MemoryArrayLocationIsaAddonCard = 0x04,
1607	MemoryArrayLocationEisaAddonCard = 0x05,
1608	MemoryArrayLocationPciAddonCard = 0x06,
1609	MemoryArrayLocationMcaAddonCard = 0x07,
1610	MemoryArrayLocationPcmciaAddonCard = 0x08,
1611	MemoryArrayLocationProprietaryAddonCard = 0x09,
1612	MemoryArrayLocationNuBus = 0x0A,
1613	MemoryArrayLocationPc98C20AddonCard = 0xA0,
1614	MemoryArrayLocationPc98C24AddonCard = 0xA1,
1615	MemoryArrayLocationPc98EAddonCard = 0xA2,
1616	MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,
1617	MemoryArrayLocationCXLFlexbus10AddonCard = 0xA4
1618	} MEMORY_ARRAY_LOCATION;
1619
1620	///
1621	/// Physical Memory Array - Use.
1622	///
1623	typedef enum {
1624	MemoryArrayUseOther = 0x01,
1625	MemoryArrayUseUnknown = 0x02,
1626	MemoryArrayUseSystemMemory = 0x03,
1627	MemoryArrayUseVideoMemory = 0x04,
1628	MemoryArrayUseFlashMemory = 0x05,
1629	MemoryArrayUseNonVolatileRam = 0x06,
1630	MemoryArrayUseCacheMemory = 0x07
1631	} MEMORY_ARRAY_USE;
1632
1633	///
1634	/// Physical Memory Array - Error Correction Types.
1635	///
1636	typedef enum {
1637	MemoryErrorCorrectionOther = 0x01,
1638	MemoryErrorCorrectionUnknown = 0x02,
1639	MemoryErrorCorrectionNone = 0x03,
1640	MemoryErrorCorrectionParity = 0x04,
1641	MemoryErrorCorrectionSingleBitEcc = 0x05,
1642	MemoryErrorCorrectionMultiBitEcc = 0x06,
1643	MemoryErrorCorrectionCrc = 0x07
1644	} MEMORY_ERROR_CORRECTION;
1645
1646	///
1647	/// Physical Memory Array (Type 16).
1648	///
1649	/// This structure describes a collection of memory devices that operate
1650	/// together to form a memory address space.
1651	///
1652	typedef struct {
1653	SMBIOS_STRUCTURE Hdr;
1654	UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.
1655	UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.
1656	UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.
1657	UINT32 MaximumCapacity;
1658	UINT16 MemoryErrorInformationHandle;
1659	UINT16 NumberOfMemoryDevices;
1660	//
1661	// Add for smbios 2.7
1662	//
1663	UINT64 ExtendedMaximumCapacity;
1664	} SMBIOS_TABLE_TYPE16;
1665
1666	///
1667	/// Memory Device - Form Factor.
1668	///
1669	typedef enum {
1670	MemoryFormFactorOther = 0x01,
1671	MemoryFormFactorUnknown = 0x02,
1672	MemoryFormFactorSimm = 0x03,
1673	MemoryFormFactorSip = 0x04,
1674	MemoryFormFactorChip = 0x05,
1675	MemoryFormFactorDip = 0x06,
1676	MemoryFormFactorZip = 0x07,
1677	MemoryFormFactorProprietaryCard = 0x08,
1678	MemoryFormFactorDimm = 0x09,
1679	MemoryFormFactorTsop = 0x0A,
1680	MemoryFormFactorRowOfChips = 0x0B,
1681	MemoryFormFactorRimm = 0x0C,
1682	MemoryFormFactorSodimm = 0x0D,
1683	MemoryFormFactorSrimm = 0x0E,
1684	MemoryFormFactorFbDimm = 0x0F,
1685	MemoryFormFactorDie = 0x10
1686	} MEMORY_FORM_FACTOR;
1687
1688	///
1689	/// Memory Device - Type
1690	///
1691	typedef enum {
1692	MemoryTypeOther = 0x01,
1693	MemoryTypeUnknown = 0x02,
1694	MemoryTypeDram = 0x03,
1695	MemoryTypeEdram = 0x04,
1696	MemoryTypeVram = 0x05,
1697	MemoryTypeSram = 0x06,
1698	MemoryTypeRam = 0x07,
1699	MemoryTypeRom = 0x08,
1700	MemoryTypeFlash = 0x09,
1701	MemoryTypeEeprom = 0x0A,
1702	MemoryTypeFeprom = 0x0B,
1703	MemoryTypeEprom = 0x0C,
1704	MemoryTypeCdram = 0x0D,
1705	MemoryType3Dram = 0x0E,
1706	MemoryTypeSdram = 0x0F,
1707	MemoryTypeSgram = 0x10,
1708	MemoryTypeRdram = 0x11,
1709	MemoryTypeDdr = 0x12,
1710	MemoryTypeDdr2 = 0x13,
1711	MemoryTypeDdr2FbDimm = 0x14,
1712	MemoryTypeDdr3 = 0x18,
1713	MemoryTypeFbd2 = 0x19,
1714	MemoryTypeDdr4 = 0x1A,
1715	MemoryTypeLpddr = 0x1B,
1716	MemoryTypeLpddr2 = 0x1C,
1717	MemoryTypeLpddr3 = 0x1D,
1718	MemoryTypeLpddr4 = 0x1E,
1719	MemoryTypeLogicalNonVolatileDevice = 0x1F,
1720	MemoryTypeHBM = 0x20,
1721	MemoryTypeHBM2 = 0x21
1722	} MEMORY_DEVICE_TYPE;
1723
1724	///
1725	/// Memory Device - Type Detail
1726	///
1727	typedef struct {
1728	UINT16 Reserved :1;
1729	UINT16 Other :1;
1730	UINT16 Unknown :1;
1731	UINT16 FastPaged :1;
1732	UINT16 StaticColumn :1;
1733	UINT16 PseudoStatic :1;
1734	UINT16 Rambus :1;
1735	UINT16 Synchronous :1;
1736	UINT16 Cmos :1;
1737	UINT16 Edo :1;
1738	UINT16 WindowDram :1;
1739	UINT16 CacheDram :1;
1740	UINT16 Nonvolatile :1;
1741	UINT16 Registered :1;
1742	UINT16 Unbuffered :1;
1743	UINT16 LrDimm :1;
1744	} MEMORY_DEVICE_TYPE_DETAIL;
1745
1746	///
1747	/// Memory Device - Memory Technology
1748	///
1749	typedef enum {
1750	MemoryTechnologyOther = 0x01,
1751	MemoryTechnologyUnknown = 0x02,
1752	MemoryTechnologyDram = 0x03,
1753	MemoryTechnologyNvdimmN = 0x04,
1754	MemoryTechnologyNvdimmF = 0x05,
1755	MemoryTechnologyNvdimmP = 0x06,
1756	//
1757	// This definition is updated to represent Intel
1758	// Optane DC Presistent Memory in SMBIOS spec 3.3.0
1759	//
1760	MemoryTechnologyIntelPersistentMemory = 0x07
1761	} MEMORY_DEVICE_TECHNOLOGY;
1762
1763	///
1764	/// Memory Device - Memory Operating Mode Capability
1765	///
1766	typedef union {
1767	///
1768	/// Individual bit fields
1769	///
1770	struct {
1771	UINT16 Reserved :1; ///< Set to 0.
1772	UINT16 Other :1;
1773	UINT16 Unknown :1;
1774	UINT16 VolatileMemory :1;
1775	UINT16 ByteAccessiblePersistentMemory :1;
1776	UINT16 BlockAccessiblePersistentMemory :1;
1777	UINT16 Reserved2 :10; ///< Set to 0.
1778	} Bits;
1779	///
1780	/// All bit fields as a 16-bit value
1781	///
1782	UINT16 Uint16;
1783	} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;
1784
1785	///
1786	/// Memory Device (Type 17).
1787	///
1788	/// This structure describes a single memory device that is part of
1789	/// a larger Physical Memory Array (Type 16).
1790	/// Note: If a system includes memory-device sockets, the SMBIOS implementation
1791	/// includes a Memory Device structure instance for each slot, whether or not the
1792	/// socket is currently populated.
1793	///
1794	typedef struct {
1795	SMBIOS_STRUCTURE Hdr;
1796	UINT16 MemoryArrayHandle;
1797	UINT16 MemoryErrorInformationHandle;
1798	UINT16 TotalWidth;
1799	UINT16 DataWidth;
1800	UINT16 Size;
1801	UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
1802	UINT8 DeviceSet;
1803	SMBIOS_TABLE_STRING DeviceLocator;
1804	SMBIOS_TABLE_STRING BankLocator;
1805	UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
1806	MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1807	UINT16 Speed;
1808	SMBIOS_TABLE_STRING Manufacturer;
1809	SMBIOS_TABLE_STRING SerialNumber;
1810	SMBIOS_TABLE_STRING AssetTag;
1811	SMBIOS_TABLE_STRING PartNumber;
1812	//
1813	// Add for smbios 2.6
1814	//
1815	UINT8 Attributes;
1816	//
1817	// Add for smbios 2.7
1818	//
1819	UINT32 ExtendedSize;
1820	//
1821	// Keep using name "ConfiguredMemoryClockSpeed" for compatibility
1822	// although this field is renamed from "Configured Memory Clock Speed"
1823	// to "Configured Memory Speed" in smbios 3.2.0.
1824	//
1825	UINT16 ConfiguredMemoryClockSpeed;
1826	//
1827	// Add for smbios 2.8.0
1828	//
1829	UINT16 MinimumVoltage;
1830	UINT16 MaximumVoltage;
1831	UINT16 ConfiguredVoltage;
1832	//
1833	// Add for smbios 3.2.0
1834	//
1835	UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY
1836	MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;
1837	SMBIOS_TABLE_STRING FirwareVersion;
1838	UINT16 ModuleManufacturerID;
1839	UINT16 ModuleProductID;
1840	UINT16 MemorySubsystemControllerManufacturerID;
1841	UINT16 MemorySubsystemControllerProductID;
1842	UINT64 NonVolatileSize;
1843	UINT64 VolatileSize;
1844	UINT64 CacheSize;
1845	UINT64 LogicalSize;
1846	//
1847	// Add for smbios 3.3.0
1848	//
1849	UINT32 ExtendedSpeed;
1850	UINT32 ExtendedConfiguredMemorySpeed;
1851	} SMBIOS_TABLE_TYPE17;
1852
1853	///
1854	/// 32-bit Memory Error Information - Error Type.
1855	///
1856	typedef enum {
1857	MemoryErrorOther = 0x01,
1858	MemoryErrorUnknown = 0x02,
1859	MemoryErrorOk = 0x03,
1860	MemoryErrorBadRead = 0x04,
1861	MemoryErrorParity = 0x05,
1862	MemoryErrorSigleBit = 0x06,
1863	MemoryErrorDoubleBit = 0x07,
1864	MemoryErrorMultiBit = 0x08,
1865	MemoryErrorNibble = 0x09,
1866	MemoryErrorChecksum = 0x0A,
1867	MemoryErrorCrc = 0x0B,
1868	MemoryErrorCorrectSingleBit = 0x0C,
1869	MemoryErrorCorrected = 0x0D,
1870	MemoryErrorUnCorrectable = 0x0E
1871	} MEMORY_ERROR_TYPE;
1872
1873	///
1874	/// 32-bit Memory Error Information - Error Granularity.
1875	///
1876	typedef enum {
1877	MemoryGranularityOther = 0x01,
1878	MemoryGranularityOtherUnknown = 0x02,
1879	MemoryGranularityDeviceLevel = 0x03,
1880	MemoryGranularityMemPartitionLevel = 0x04
1881	} MEMORY_ERROR_GRANULARITY;
1882
1883	///
1884	/// 32-bit Memory Error Information - Error Operation.
1885	///
1886	typedef enum {
1887	MemoryErrorOperationOther = 0x01,
1888	MemoryErrorOperationUnknown = 0x02,
1889	MemoryErrorOperationRead = 0x03,
1890	MemoryErrorOperationWrite = 0x04,
1891	MemoryErrorOperationPartialWrite = 0x05
1892	} MEMORY_ERROR_OPERATION;
1893
1894	///
1895	/// 32-bit Memory Error Information (Type 18).
1896	///
1897	/// This structure identifies the specifics of an error that might be detected
1898	/// within a Physical Memory Array.
1899	///
1900	typedef struct {
1901	SMBIOS_STRUCTURE Hdr;
1902	UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
1903	UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
1904	UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
1905	UINT32 VendorSyndrome;
1906	UINT32 MemoryArrayErrorAddress;
1907	UINT32 DeviceErrorAddress;
1908	UINT32 ErrorResolution;
1909	} SMBIOS_TABLE_TYPE18;
1910
1911	///
1912	/// Memory Array Mapped Address (Type 19).
1913	///
1914	/// This structure provides the address mapping for a Physical Memory Array.
1915	/// One structure is present for each contiguous address range described.
1916	///
1917	typedef struct {
1918	SMBIOS_STRUCTURE Hdr;
1919	UINT32 StartingAddress;
1920	UINT32 EndingAddress;
1921	UINT16 MemoryArrayHandle;
1922	UINT8 PartitionWidth;
1923	//
1924	// Add for smbios 2.7
1925	//
1926	UINT64 ExtendedStartingAddress;
1927	UINT64 ExtendedEndingAddress;
1928	} SMBIOS_TABLE_TYPE19;
1929
1930	///
1931	/// Memory Device Mapped Address (Type 20).
1932	///
1933	/// This structure maps memory address space usually to a device-level granularity.
1934	/// One structure is present for each contiguous address range described.
1935	///
1936	typedef struct {
1937	SMBIOS_STRUCTURE Hdr;
1938	UINT32 StartingAddress;
1939	UINT32 EndingAddress;
1940	UINT16 MemoryDeviceHandle;
1941	UINT16 MemoryArrayMappedAddressHandle;
1942	UINT8 PartitionRowPosition;
1943	UINT8 InterleavePosition;
1944	UINT8 InterleavedDataDepth;
1945	//
1946	// Add for smbios 2.7
1947	//
1948	UINT64 ExtendedStartingAddress;
1949	UINT64 ExtendedEndingAddress;
1950	} SMBIOS_TABLE_TYPE20;
1951
1952	///
1953	/// Built-in Pointing Device - Type
1954	///
1955	typedef enum {
1956	PointingDeviceTypeOther = 0x01,
1957	PointingDeviceTypeUnknown = 0x02,
1958	PointingDeviceTypeMouse = 0x03,
1959	PointingDeviceTypeTrackBall = 0x04,
1960	PointingDeviceTypeTrackPoint = 0x05,
1961	PointingDeviceTypeGlidePoint = 0x06,
1962	PointingDeviceTouchPad = 0x07,
1963	PointingDeviceTouchScreen = 0x08,
1964	PointingDeviceOpticalSensor = 0x09
1965	} BUILTIN_POINTING_DEVICE_TYPE;
1966
1967	///
1968	/// Built-in Pointing Device - Interface.
1969	///
1970	typedef enum {
1971	PointingDeviceInterfaceOther = 0x01,
1972	PointingDeviceInterfaceUnknown = 0x02,
1973	PointingDeviceInterfaceSerial = 0x03,
1974	PointingDeviceInterfacePs2 = 0x04,
1975	PointingDeviceInterfaceInfrared = 0x05,
1976	PointingDeviceInterfaceHpHil = 0x06,
1977	PointingDeviceInterfaceBusMouse = 0x07,
1978	PointingDeviceInterfaceADB = 0x08,
1979	PointingDeviceInterfaceBusMouseDB9 = 0xA0,
1980	PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
1981	PointingDeviceInterfaceUsb = 0xA2
1982	} BUILTIN_POINTING_DEVICE_INTERFACE;
1983
1984	///
1985	/// Built-in Pointing Device (Type 21).
1986	///
1987	/// This structure describes the attributes of the built-in pointing device for the
1988	/// system. The presence of this structure does not imply that the built-in
1989	/// pointing device is active for the system's use!
1990	///
1991	typedef struct {
1992	SMBIOS_STRUCTURE Hdr;
1993	UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.
1994	UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.
1995	UINT8 NumberOfButtons;
1996	} SMBIOS_TABLE_TYPE21;
1997
1998	///
1999	/// Portable Battery - Device Chemistry
2000	///
2001	typedef enum {
2002	PortableBatteryDeviceChemistryOther = 0x01,
2003	PortableBatteryDeviceChemistryUnknown = 0x02,
2004	PortableBatteryDeviceChemistryLeadAcid = 0x03,
2005	PortableBatteryDeviceChemistryNickelCadmium = 0x04,
2006	PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
2007	PortableBatteryDeviceChemistryLithiumIon = 0x06,
2008	PortableBatteryDeviceChemistryZincAir = 0x07,
2009	PortableBatteryDeviceChemistryLithiumPolymer = 0x08
2010	} PORTABLE_BATTERY_DEVICE_CHEMISTRY;
2011
2012	///
2013	/// Portable Battery (Type 22).
2014	///
2015	/// This structure describes the attributes of the portable battery(s) for the system.
2016	/// The structure contains the static attributes for the group. Each structure describes
2017	/// a single battery pack's attributes.
2018	///
2019	typedef struct {
2020	SMBIOS_STRUCTURE Hdr;
2021	SMBIOS_TABLE_STRING Location;
2022	SMBIOS_TABLE_STRING Manufacturer;
2023	SMBIOS_TABLE_STRING ManufactureDate;
2024	SMBIOS_TABLE_STRING SerialNumber;
2025	SMBIOS_TABLE_STRING DeviceName;
2026	UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.
2027	UINT16 DeviceCapacity;
2028	UINT16 DesignVoltage;
2029	SMBIOS_TABLE_STRING SBDSVersionNumber;
2030	UINT8 MaximumErrorInBatteryData;
2031	UINT16 SBDSSerialNumber;
2032	UINT16 SBDSManufactureDate;
2033	SMBIOS_TABLE_STRING SBDSDeviceChemistry;
2034	UINT8 DesignCapacityMultiplier;
2035	UINT32 OEMSpecific;
2036	} SMBIOS_TABLE_TYPE22;
2037
2038	///
2039	/// System Reset (Type 23)
2040	///
2041	/// This structure describes whether Automatic System Reset functions enabled (Status).
2042	/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
2043	/// before the Interval elapses, an automatic system reset will occur. The system will re-boot
2044	/// according to the Boot Option. This function may repeat until the Limit is reached, at which time
2045	/// the system will re-boot according to the Boot Option at Limit.
2046	///
2047	typedef struct {
2048	SMBIOS_STRUCTURE Hdr;
2049	UINT8 Capabilities;
2050	UINT16 ResetCount;
2051	UINT16 ResetLimit;
2052	UINT16 TimerInterval;
2053	UINT16 Timeout;
2054	} SMBIOS_TABLE_TYPE23;
2055
2056	///
2057	/// Hardware Security (Type 24).
2058	///
2059	/// This structure describes the system-wide hardware security settings.
2060	///
2061	typedef struct {
2062	SMBIOS_STRUCTURE Hdr;
2063	UINT8 HardwareSecuritySettings;
2064	} SMBIOS_TABLE_TYPE24;
2065
2066	///
2067	/// System Power Controls (Type 25).
2068	///
2069	/// This structure describes the attributes for controlling the main power supply to the system.
2070	/// Software that interprets this structure uses the month, day, hour, minute, and second values
2071	/// to determine the number of seconds until the next power-on of the system. The presence of
2072	/// this structure implies that a timed power-on facility is available for the system.
2073	///
2074	typedef struct {
2075	SMBIOS_STRUCTURE Hdr;
2076	UINT8 NextScheduledPowerOnMonth;
2077	UINT8 NextScheduledPowerOnDayOfMonth;
2078	UINT8 NextScheduledPowerOnHour;
2079	UINT8 NextScheduledPowerOnMinute;
2080	UINT8 NextScheduledPowerOnSecond;
2081	} SMBIOS_TABLE_TYPE25;
2082
2083	///
2084	/// Voltage Probe - Location and Status.
2085	///
2086	typedef struct {
2087	UINT8 VoltageProbeSite :5;
2088	UINT8 VoltageProbeStatus :3;
2089	} MISC_VOLTAGE_PROBE_LOCATION;
2090
2091	///
2092	/// Voltage Probe (Type 26)
2093	///
2094	/// This describes the attributes for a voltage probe in the system.
2095	/// Each structure describes a single voltage probe.
2096	///
2097	typedef struct {
2098	SMBIOS_STRUCTURE Hdr;
2099	SMBIOS_TABLE_STRING Description;
2100	MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
2101	UINT16 MaximumValue;
2102	UINT16 MinimumValue;
2103	UINT16 Resolution;
2104	UINT16 Tolerance;
2105	UINT16 Accuracy;
2106	UINT32 OEMDefined;
2107	UINT16 NominalValue;
2108	} SMBIOS_TABLE_TYPE26;
2109
2110	///
2111	/// Cooling Device - Device Type and Status.
2112	///
2113	typedef struct {
2114	UINT8 CoolingDevice :5;
2115	UINT8 CoolingDeviceStatus :3;
2116	} MISC_COOLING_DEVICE_TYPE;
2117
2118	///
2119	/// Cooling Device (Type 27)
2120	///
2121	/// This structure describes the attributes for a cooling device in the system.
2122	/// Each structure describes a single cooling device.
2123	///
2124	typedef struct {
2125	SMBIOS_STRUCTURE Hdr;
2126	UINT16 TemperatureProbeHandle;
2127	MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
2128	UINT8 CoolingUnitGroup;
2129	UINT32 OEMDefined;
2130	UINT16 NominalSpeed;
2131	//
2132	// Add for smbios 2.7
2133	//
2134	SMBIOS_TABLE_STRING Description;
2135	} SMBIOS_TABLE_TYPE27;
2136
2137	///
2138	/// Temperature Probe - Location and Status.
2139	///
2140	typedef struct {
2141	UINT8 TemperatureProbeSite :5;
2142	UINT8 TemperatureProbeStatus :3;
2143	} MISC_TEMPERATURE_PROBE_LOCATION;
2144
2145	///
2146	/// Temperature Probe (Type 28).
2147	///
2148	/// This structure describes the attributes for a temperature probe in the system.
2149	/// Each structure describes a single temperature probe.
2150	///
2151	typedef struct {
2152	SMBIOS_STRUCTURE Hdr;
2153	SMBIOS_TABLE_STRING Description;
2154	MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
2155	UINT16 MaximumValue;
2156	UINT16 MinimumValue;
2157	UINT16 Resolution;
2158	UINT16 Tolerance;
2159	UINT16 Accuracy;
2160	UINT32 OEMDefined;
2161	UINT16 NominalValue;
2162	} SMBIOS_TABLE_TYPE28;
2163
2164	///
2165	/// Electrical Current Probe - Location and Status.
2166	///
2167	typedef struct {
2168	UINT8 ElectricalCurrentProbeSite :5;
2169	UINT8 ElectricalCurrentProbeStatus :3;
2170	} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
2171
2172	///
2173	/// Electrical Current Probe (Type 29).
2174	///
2175	/// This structure describes the attributes for an electrical current probe in the system.
2176	/// Each structure describes a single electrical current probe.
2177	///
2178	typedef struct {
2179	SMBIOS_STRUCTURE Hdr;
2180	SMBIOS_TABLE_STRING Description;
2181	MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
2182	UINT16 MaximumValue;
2183	UINT16 MinimumValue;
2184	UINT16 Resolution;
2185	UINT16 Tolerance;
2186	UINT16 Accuracy;
2187	UINT32 OEMDefined;
2188	UINT16 NominalValue;
2189	} SMBIOS_TABLE_TYPE29;
2190
2191	///
2192	/// Out-of-Band Remote Access (Type 30).
2193	///
2194	/// This structure describes the attributes and policy settings of a hardware facility
2195	/// that may be used to gain remote access to a hardware system when the operating system
2196	/// is not available due to power-down status, hardware failures, or boot failures.
2197	///
2198	typedef struct {
2199	SMBIOS_STRUCTURE Hdr;
2200	SMBIOS_TABLE_STRING ManufacturerName;
2201	UINT8 Connections;
2202	} SMBIOS_TABLE_TYPE30;
2203
2204	///
2205	/// Boot Integrity Services (BIS) Entry Point (Type 31).
2206	///
2207	/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
2208	///
2209	typedef struct {
2210	SMBIOS_STRUCTURE Hdr;
2211	UINT8 Checksum;
2212	UINT8 Reserved1;
2213	UINT16 Reserved2;
2214	UINT32 BisEntry16;
2215	UINT32 BisEntry32;
2216	UINT64 Reserved3;
2217	UINT32 Reserved4;
2218	} SMBIOS_TABLE_TYPE31;
2219
2220	///
2221	/// System Boot Information - System Boot Status.
2222	///
2223	typedef enum {
2224	BootInformationStatusNoError = 0x00,
2225	BootInformationStatusNoBootableMedia = 0x01,
2226	BootInformationStatusNormalOSFailedLoading = 0x02,
2227	BootInformationStatusFirmwareDetectedFailure = 0x03,
2228	BootInformationStatusOSDetectedFailure = 0x04,
2229	BootInformationStatusUserRequestedBoot = 0x05,
2230	BootInformationStatusSystemSecurityViolation = 0x06,
2231	BootInformationStatusPreviousRequestedImage = 0x07,
2232	BootInformationStatusWatchdogTimerExpired = 0x08,
2233	BootInformationStatusStartReserved = 0x09,
2234	BootInformationStatusStartOemSpecific = 0x80,
2235	BootInformationStatusStartProductSpecific = 0xC0
2236	} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
2237
2238	///
2239	/// System Boot Information (Type 32).
2240	///
2241	/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
2242	/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
2243	/// application via this structure. When used in the PXE environment, for example,
2244	/// this code identifies the reason the PXE was initiated and can be used by boot-image
2245	/// software to further automate an enterprise's PXE sessions. For example, an enterprise
2246	/// could choose to automatically download a hardware-diagnostic image to a client whose
2247	/// reason code indicated either a firmware- or operating system-detected hardware failure.
2248	///
2249	typedef struct {
2250	SMBIOS_STRUCTURE Hdr;
2251	UINT8 Reserved[6];
2252	UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.
2253	} SMBIOS_TABLE_TYPE32;
2254
2255	///
2256	/// 64-bit Memory Error Information (Type 33).
2257	///
2258	/// This structure describes an error within a Physical Memory Array,
2259	/// when the error address is above 4G (0xFFFFFFFF).
2260	///
2261	typedef struct {
2262	SMBIOS_STRUCTURE Hdr;
2263	UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
2264	UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
2265	UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
2266	UINT32 VendorSyndrome;
2267	UINT64 MemoryArrayErrorAddress;
2268	UINT64 DeviceErrorAddress;
2269	UINT32 ErrorResolution;
2270	} SMBIOS_TABLE_TYPE33;
2271
2272	///
2273	/// Management Device - Type.
2274	///
2275	typedef enum {
2276	ManagementDeviceTypeOther = 0x01,
2277	ManagementDeviceTypeUnknown = 0x02,
2278	ManagementDeviceTypeLm75 = 0x03,
2279	ManagementDeviceTypeLm78 = 0x04,
2280	ManagementDeviceTypeLm79 = 0x05,
2281	ManagementDeviceTypeLm80 = 0x06,
2282	ManagementDeviceTypeLm81 = 0x07,
2283	ManagementDeviceTypeAdm9240 = 0x08,
2284	ManagementDeviceTypeDs1780 = 0x09,
2285	ManagementDeviceTypeMaxim1617 = 0x0A,
2286	ManagementDeviceTypeGl518Sm = 0x0B,
2287	ManagementDeviceTypeW83781D = 0x0C,
2288	ManagementDeviceTypeHt82H791 = 0x0D
2289	} MISC_MANAGEMENT_DEVICE_TYPE;
2290
2291	///
2292	/// Management Device - Address Type.
2293	///
2294	typedef enum {
2295	ManagementDeviceAddressTypeOther = 0x01,
2296	ManagementDeviceAddressTypeUnknown = 0x02,
2297	ManagementDeviceAddressTypeIOPort = 0x03,
2298	ManagementDeviceAddressTypeMemory = 0x04,
2299	ManagementDeviceAddressTypeSmbus = 0x05
2300	} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
2301
2302	///
2303	/// Management Device (Type 34).
2304	///
2305	/// The information in this structure defines the attributes of a Management Device.
2306	/// A Management Device might control one or more fans or voltage, current, or temperature
2307	/// probes as defined by one or more Management Device Component structures.
2308	///
2309	typedef struct {
2310	SMBIOS_STRUCTURE Hdr;
2311	SMBIOS_TABLE_STRING Description;
2312	UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.
2313	UINT32 Address;
2314	UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.
2315	} SMBIOS_TABLE_TYPE34;
2316
2317	///
2318	/// Management Device Component (Type 35)
2319	///
2320	/// This structure associates a cooling device or environmental probe with structures
2321	/// that define the controlling hardware device and (optionally) the component's thresholds.
2322	///
2323	typedef struct {
2324	SMBIOS_STRUCTURE Hdr;
2325	SMBIOS_TABLE_STRING Description;
2326	UINT16 ManagementDeviceHandle;
2327	UINT16 ComponentHandle;
2328	UINT16 ThresholdHandle;
2329	} SMBIOS_TABLE_TYPE35;
2330
2331	///
2332	/// Management Device Threshold Data (Type 36).
2333	///
2334	/// The information in this structure defines threshold information for
2335	/// a component (probe or cooling-unit) contained within a Management Device.
2336	///
2337	typedef struct {
2338	SMBIOS_STRUCTURE Hdr;
2339	UINT16 LowerThresholdNonCritical;
2340	UINT16 UpperThresholdNonCritical;
2341	UINT16 LowerThresholdCritical;
2342	UINT16 UpperThresholdCritical;
2343	UINT16 LowerThresholdNonRecoverable;
2344	UINT16 UpperThresholdNonRecoverable;
2345	} SMBIOS_TABLE_TYPE36;
2346
2347	///
2348	/// Memory Channel Entry.
2349	///
2350	typedef struct {
2351	UINT8 DeviceLoad;
2352	UINT16 DeviceHandle;
2353	} MEMORY_DEVICE;
2354
2355	///
2356	/// Memory Channel - Channel Type.
2357	///
2358	typedef enum {
2359	MemoryChannelTypeOther = 0x01,
2360	MemoryChannelTypeUnknown = 0x02,
2361	MemoryChannelTypeRambus = 0x03,
2362	MemoryChannelTypeSyncLink = 0x04
2363	} MEMORY_CHANNEL_TYPE;
2364
2365	///
2366	/// Memory Channel (Type 37)
2367	///
2368	/// The information in this structure provides the correlation between a Memory Channel
2369	/// and its associated Memory Devices. Each device presents one or more loads to the channel.
2370	/// The sum of all device loads cannot exceed the channel's defined maximum.
2371	///
2372	typedef struct {
2373	SMBIOS_STRUCTURE Hdr;
2374	UINT8 ChannelType;
2375	UINT8 MaximumChannelLoad;
2376	UINT8 MemoryDeviceCount;
2377	MEMORY_DEVICE MemoryDevice[1];
2378	} SMBIOS_TABLE_TYPE37;
2379
2380	///
2381	/// IPMI Device Information - BMC Interface Type
2382	///
2383	typedef enum {
2384	IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
2385	IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.
2386	IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.
2387	IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
2388	IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface
2389	} BMC_INTERFACE_TYPE;
2390
2391	///
2392	/// IPMI Device Information (Type 38).
2393	///
2394	/// The information in this structure defines the attributes of an
2395	/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
2396	///
2397	/// The Type 42 structure can also be used to describe a physical management controller
2398	/// host interface and one or more protocols that share that interface. If IPMI is not
2399	/// shared with other protocols, either the Type 38 or Type 42 structures can be used.
2400	/// Providing Type 38 is recommended for backward compatibility.
2401	///
2402	typedef struct {
2403	SMBIOS_STRUCTURE Hdr;
2404	UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.
2405	UINT8 IPMISpecificationRevision;
2406	UINT8 I2CSlaveAddress;
2407	UINT8 NVStorageDeviceAddress;
2408	UINT64 BaseAddress;
2409	UINT8 BaseAddressModifier_InterruptInfo;
2410	UINT8 InterruptNumber;
2411	} SMBIOS_TABLE_TYPE38;
2412
2413	///
2414	/// System Power Supply - Power Supply Characteristics.
2415	///
2416	typedef struct {
2417	UINT16 PowerSupplyHotReplaceable:1;
2418	UINT16 PowerSupplyPresent :1;
2419	UINT16 PowerSupplyUnplugged :1;
2420	UINT16 InputVoltageRangeSwitch :4;
2421	UINT16 PowerSupplyStatus :3;
2422	UINT16 PowerSupplyType :4;
2423	UINT16 Reserved :2;
2424	} SYS_POWER_SUPPLY_CHARACTERISTICS;
2425
2426	///
2427	/// System Power Supply (Type 39).
2428	///
2429	/// This structure identifies attributes of a system power supply. One instance
2430	/// of this record is present for each possible power supply in a system.
2431	///
2432	typedef struct {
2433	SMBIOS_STRUCTURE Hdr;
2434	UINT8 PowerUnitGroup;
2435	SMBIOS_TABLE_STRING Location;
2436	SMBIOS_TABLE_STRING DeviceName;
2437	SMBIOS_TABLE_STRING Manufacturer;
2438	SMBIOS_TABLE_STRING SerialNumber;
2439	SMBIOS_TABLE_STRING AssetTagNumber;
2440	SMBIOS_TABLE_STRING ModelPartNumber;
2441	SMBIOS_TABLE_STRING RevisionLevel;
2442	UINT16 MaxPowerCapacity;
2443	SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
2444	UINT16 InputVoltageProbeHandle;
2445	UINT16 CoolingDeviceHandle;
2446	UINT16 InputCurrentProbeHandle;
2447	} SMBIOS_TABLE_TYPE39;
2448
2449	///
2450	/// Additional Information Entry Format.
2451	///
2452	typedef struct {
2453	UINT8 EntryLength;
2454	UINT16 ReferencedHandle;
2455	UINT8 ReferencedOffset;
2456	SMBIOS_TABLE_STRING EntryString;
2457	UINT8 Value[1];
2458	} ADDITIONAL_INFORMATION_ENTRY;
2459
2460	///
2461	/// Additional Information (Type 40).
2462	///
2463	/// This structure is intended to provide additional information for handling unspecified
2464	/// enumerated values and interim field updates in another structure.
2465	///
2466	typedef struct {
2467	SMBIOS_STRUCTURE Hdr;
2468	UINT8 NumberOfAdditionalInformationEntries;
2469	ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
2470	} SMBIOS_TABLE_TYPE40;
2471
2472	///
2473	/// Onboard Devices Extended Information - Onboard Device Types.
2474	///
2475	typedef enum{
2476	OnBoardDeviceExtendedTypeOther = 0x01,
2477	OnBoardDeviceExtendedTypeUnknown = 0x02,
2478	OnBoardDeviceExtendedTypeVideo = 0x03,
2479	OnBoardDeviceExtendedTypeScsiController = 0x04,
2480	OnBoardDeviceExtendedTypeEthernet = 0x05,
2481	OnBoardDeviceExtendedTypeTokenRing = 0x06,
2482	OnBoardDeviceExtendedTypeSound = 0x07,
2483	OnBoardDeviceExtendedTypePATAController = 0x08,
2484	OnBoardDeviceExtendedTypeSATAController = 0x09,
2485	OnBoardDeviceExtendedTypeSASController = 0x0A
2486	} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
2487
2488	///
2489	/// Onboard Devices Extended Information (Type 41).
2490	///
2491	/// The information in this structure defines the attributes of devices that
2492	/// are onboard (soldered onto) a system element, usually the baseboard.
2493	/// In general, an entry in this table implies that the BIOS has some level of
2494	/// control over the enabling of the associated device for use by the system.
2495	///
2496	typedef struct {
2497	SMBIOS_STRUCTURE Hdr;
2498	SMBIOS_TABLE_STRING ReferenceDesignation;
2499	UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
2500	UINT8 DeviceTypeInstance;
2501	UINT16 SegmentGroupNum;
2502	UINT8 BusNum;
2503	UINT8 DevFuncNum;
2504	} SMBIOS_TABLE_TYPE41;
2505
2506	///
2507	/// Management Controller Host Interface - Interface Types.
2508	/// 00h - 3Fh: MCTP Host Interfaces
2509	///
2510	typedef enum{
2511	MCHostInterfaceTypeNetworkHostInterface = 0x40,
2512	MCHostInterfaceTypeOemDefined = 0xF0
2513	} MC_HOST_INTERFACE_TYPE;
2514
2515	///
2516	/// Management Controller Host Interface - Protocol Types.
2517	///
2518	typedef enum{
2519	MCHostInterfaceProtocolTypeIPMI = 0x02,
2520	MCHostInterfaceProtocolTypeMCTP = 0x03,
2521	MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,
2522	MCHostInterfaceProtocolTypeOemDefined = 0xF0
2523	} MC_HOST_INTERFACE_PROTOCOL_TYPE;
2524
2525	///
2526	/// Management Controller Host Interface (Type 42).
2527	///
2528	/// The information in this structure defines the attributes of a Management
2529	/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.
2530	///
2531	/// Type 42 should be used for management controller host interfaces that use protocols
2532	/// other than IPMI or that use multiple protocols on a single host interface type.
2533	///
2534	/// This structure should also be provided if IPMI is shared with other protocols
2535	/// over the same interface hardware. If IPMI is not shared with other protocols,
2536	/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is
2537	/// recommended for backward compatibility. The structures are not required to
2538	/// be mutually exclusive. Type 38 and Type 42 structures may be implemented
2539	/// simultaneously to provide backward compatibility with IPMI applications or drivers
2540	/// that do not yet recognize the Type 42 structure.
2541	///
2542	typedef struct {
2543	SMBIOS_STRUCTURE Hdr;
2544	UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE
2545	UINT8 InterfaceTypeSpecificDataLength;
2546	UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes
2547	} SMBIOS_TABLE_TYPE42;
2548
2549
2550	///
2551	/// Processor Specific Block - Processor Architecture Type
2552	///
2553	typedef enum{
2554	ProcessorSpecificBlockArchTypeReserved = 0x00,
2555	ProcessorSpecificBlockArchTypeIa32 = 0x01,
2556	ProcessorSpecificBlockArchTypeX64 = 0x02,
2557	ProcessorSpecificBlockArchTypeItanium = 0x03,
2558	ProcessorSpecificBlockArchTypeAarch32 = 0x04,
2559	ProcessorSpecificBlockArchTypeAarch64 = 0x05,
2560	ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,
2561	ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,
2562	ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08
2563	} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;
2564
2565	///
2566	/// Processor Specific Block is the standard container of processor-specific data.
2567	///
2568	typedef struct {
2569	UINT8 Length;
2570	UINT8 ProcessorArchType;
2571	///
2572	/// Below followed by Processor-specific data
2573	///
2574	///
2575	} PROCESSOR_SPECIFIC_BLOCK;
2576
2577	///
2578	/// Processor Additional Information(Type 44).
2579	///
2580	/// The information in this structure defines the processor additional information in case
2581	/// SMBIOS type 4 is not sufficient to describe processor characteristics.
2582	/// The SMBIOS type 44 structure has a reference handle field to link back to the related
2583	/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the
2584	/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,
2585	/// SMBIOS type 44 structures describe different core-specific information.
2586	///
2587	/// SMBIOS type 44 defines the standard header for the processor-specific block, while the
2588	/// contents of processor-specific data are maintained by processor
2589	/// architecture workgroups or vendors in separate documents.
2590	///
2591	typedef struct {
2592	SMBIOS_STRUCTURE Hdr;
2593	SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4
2594	///
2595	/// Below followed by Processor-specific block
2596	///
2597	PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;
2598	} SMBIOS_TABLE_TYPE44;
2599
2600	///
2601	/// TPM Device (Type 43).
2602	///
2603	typedef struct {
2604	SMBIOS_STRUCTURE Hdr;
2605	UINT8 VendorID[4];
2606	UINT8 MajorSpecVersion;
2607	UINT8 MinorSpecVersion;
2608	UINT32 FirmwareVersion1;
2609	UINT32 FirmwareVersion2;
2610	SMBIOS_TABLE_STRING Description;
2611	UINT64 Characteristics;
2612	UINT32 OemDefined;
2613	} SMBIOS_TABLE_TYPE43;
2614
2615	///
2616	/// Inactive (Type 126)
2617	///
2618	typedef struct {
2619	SMBIOS_STRUCTURE Hdr;
2620	} SMBIOS_TABLE_TYPE126;
2621
2622	///
2623	/// End-of-Table (Type 127)
2624	///
2625	typedef struct {
2626	SMBIOS_STRUCTURE Hdr;
2627	} SMBIOS_TABLE_TYPE127;
2628
2629	///
2630	/// Union of all the possible SMBIOS record types.
2631	///
2632	typedef union {
2633	SMBIOS_STRUCTURE *Hdr;
2634	SMBIOS_TABLE_TYPE0 *Type0;
2635	SMBIOS_TABLE_TYPE1 *Type1;
2636	SMBIOS_TABLE_TYPE2 *Type2;
2637	SMBIOS_TABLE_TYPE3 *Type3;
2638	SMBIOS_TABLE_TYPE4 *Type4;
2639	SMBIOS_TABLE_TYPE5 *Type5;
2640	SMBIOS_TABLE_TYPE6 *Type6;
2641	SMBIOS_TABLE_TYPE7 *Type7;
2642	SMBIOS_TABLE_TYPE8 *Type8;
2643	SMBIOS_TABLE_TYPE9 *Type9;
2644	SMBIOS_TABLE_TYPE10 *Type10;
2645	SMBIOS_TABLE_TYPE11 *Type11;
2646	SMBIOS_TABLE_TYPE12 *Type12;
2647	SMBIOS_TABLE_TYPE13 *Type13;
2648	SMBIOS_TABLE_TYPE14 *Type14;
2649	SMBIOS_TABLE_TYPE15 *Type15;
2650	SMBIOS_TABLE_TYPE16 *Type16;
2651	SMBIOS_TABLE_TYPE17 *Type17;
2652	SMBIOS_TABLE_TYPE18 *Type18;
2653	SMBIOS_TABLE_TYPE19 *Type19;
2654	SMBIOS_TABLE_TYPE20 *Type20;
2655	SMBIOS_TABLE_TYPE21 *Type21;
2656	SMBIOS_TABLE_TYPE22 *Type22;
2657	SMBIOS_TABLE_TYPE23 *Type23;
2658	SMBIOS_TABLE_TYPE24 *Type24;
2659	SMBIOS_TABLE_TYPE25 *Type25;
2660	SMBIOS_TABLE_TYPE26 *Type26;
2661	SMBIOS_TABLE_TYPE27 *Type27;
2662	SMBIOS_TABLE_TYPE28 *Type28;
2663	SMBIOS_TABLE_TYPE29 *Type29;
2664	SMBIOS_TABLE_TYPE30 *Type30;
2665	SMBIOS_TABLE_TYPE31 *Type31;
2666	SMBIOS_TABLE_TYPE32 *Type32;
2667	SMBIOS_TABLE_TYPE33 *Type33;
2668	SMBIOS_TABLE_TYPE34 *Type34;
2669	SMBIOS_TABLE_TYPE35 *Type35;
2670	SMBIOS_TABLE_TYPE36 *Type36;
2671	SMBIOS_TABLE_TYPE37 *Type37;
2672	SMBIOS_TABLE_TYPE38 *Type38;
2673	SMBIOS_TABLE_TYPE39 *Type39;
2674	SMBIOS_TABLE_TYPE40 *Type40;
2675	SMBIOS_TABLE_TYPE41 *Type41;
2676	SMBIOS_TABLE_TYPE42 *Type42;
2677	SMBIOS_TABLE_TYPE43 *Type43;
2678	SMBIOS_TABLE_TYPE44 *Type44;
2679	SMBIOS_TABLE_TYPE126 *Type126;
2680	SMBIOS_TABLE_TYPE127 *Type127;
2681	UINT8 *Raw;
2682	} SMBIOS_STRUCTURE_POINTER;
2683
2684	#pragma pack()
2685
2686	#endif

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source: vbox/trunk/src/VBox/Devices/EFI/FirmwareNew/MdePkg/Include/IndustryStandard/SmBios.h@ 85718

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