1 | /** @file
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2 | Timer Library functions built upon local APIC on IA32/x64.
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3 |
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4 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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6 |
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7 | **/
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8 |
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9 | #include <Base.h>
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10 | #include <Library/TimerLib.h>
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11 | #include <Library/BaseLib.h>
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12 | #include <Library/IoLib.h>
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13 | #include <Library/PcdLib.h>
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14 | #include <Library/DebugLib.h>
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15 |
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16 | #define APIC_SVR 0x0f0
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17 | #define APIC_LVTERR 0x370
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18 | #define APIC_TMICT 0x380
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19 | #define APIC_TMCCT 0x390
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20 | #define APIC_TDCR 0x3e0
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21 |
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22 | //
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23 | // The following array is used in calculating the frequency of local APIC
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24 | // timer. Refer to IA-32 developers' manual for more details.
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25 | //
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26 | GLOBAL_REMOVE_IF_UNREFERENCED
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27 | CONST UINT8 mTimerLibLocalApicDivisor[] = {
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28 | 0x02, 0x04, 0x08, 0x10,
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29 | 0x02, 0x04, 0x08, 0x10,
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30 | 0x20, 0x40, 0x80, 0x01,
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31 | 0x20, 0x40, 0x80, 0x01
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32 | };
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33 |
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34 | /**
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35 | Internal function to retrieve the base address of local APIC.
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36 |
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37 | This function will ASSERT if:
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38 | The local APIC is not globally enabled.
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39 | The local APIC is not working under XAPIC mode.
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40 | The local APIC is not software enabled.
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41 |
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42 | @return The base address of local APIC
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43 |
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44 | **/
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45 | UINTN
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46 | EFIAPI
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47 | InternalX86GetApicBase (
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48 | VOID
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49 | )
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50 | {
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51 | UINTN MsrValue;
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52 | UINTN ApicBase;
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53 |
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54 | MsrValue = (UINTN) AsmReadMsr64 (27);
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55 | ApicBase = MsrValue & 0xffffff000ULL;
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56 |
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57 | //
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58 | // Check the APIC Global Enable bit (bit 11) in IA32_APIC_BASE MSR.
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59 | // This bit will be 1, if local APIC is globally enabled.
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60 | //
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61 | ASSERT ((MsrValue & BIT11) != 0);
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62 |
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63 | //
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64 | // Check the APIC Extended Mode bit (bit 10) in IA32_APIC_BASE MSR.
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65 | // This bit will be 0, if local APIC is under XAPIC mode.
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66 | //
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67 | ASSERT ((MsrValue & BIT10) == 0);
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68 |
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69 | //
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70 | // Check the APIC Software Enable/Disable bit (bit 8) in Spurious-Interrupt
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71 | // Vector Register.
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72 | // This bit will be 1, if local APIC is software enabled.
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73 | //
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74 | ASSERT ((MmioRead32 (ApicBase + APIC_SVR) & BIT8) != 0);
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75 |
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76 | return ApicBase;
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77 | }
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78 |
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79 | /**
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80 | Internal function to return the frequency of the local APIC timer.
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81 |
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82 | @param ApicBase The base address of memory mapped registers of local APIC.
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83 |
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84 | @return The frequency of the timer in Hz.
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85 |
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86 | **/
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87 | UINT32
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88 | EFIAPI
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89 | InternalX86GetTimerFrequency (
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90 | IN UINTN ApicBase
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91 | )
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92 | {
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93 | return
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94 | PcdGet32(PcdFSBClock) /
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95 | mTimerLibLocalApicDivisor[MmioBitFieldRead32 (ApicBase + APIC_TDCR, 0, 3)];
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96 | }
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97 |
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98 | /**
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99 | Internal function to read the current tick counter of local APIC.
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100 |
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101 | @param ApicBase The base address of memory mapped registers of local APIC.
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102 |
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103 | @return The tick counter read.
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104 |
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105 | **/
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106 | INT32
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107 | EFIAPI
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108 | InternalX86GetTimerTick (
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109 | IN UINTN ApicBase
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110 | )
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111 | {
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112 | return MmioRead32 (ApicBase + APIC_TMCCT);
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113 | }
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114 |
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115 | /**
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116 | Internal function to read the initial timer count of local APIC.
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117 |
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118 | @param ApicBase The base address of memory mapped registers of local APIC.
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119 |
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120 | @return The initial timer count read.
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121 |
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122 | **/
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123 | UINT32
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124 | InternalX86GetInitTimerCount (
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125 | IN UINTN ApicBase
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126 | )
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127 | {
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128 | return MmioRead32 (ApicBase + APIC_TMICT);
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129 | }
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130 |
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131 | /**
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132 | Stalls the CPU for at least the given number of ticks.
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133 |
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134 | Stalls the CPU for at least the given number of ticks. It's invoked by
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135 | MicroSecondDelay() and NanoSecondDelay().
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136 |
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137 | This function will ASSERT if the APIC timer intial count returned from
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138 | InternalX86GetInitTimerCount() is zero.
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139 |
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140 | @param ApicBase The base address of memory mapped registers of local APIC.
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141 | @param Delay A period of time to delay in ticks.
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142 |
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143 | **/
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144 | VOID
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145 | EFIAPI
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146 | InternalX86Delay (
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147 | IN UINTN ApicBase,
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148 | IN UINT32 Delay
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149 | )
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150 | {
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151 | INT32 Ticks;
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152 | UINT32 Times;
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153 | UINT32 InitCount;
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154 | UINT32 StartTick;
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155 |
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156 | //
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157 | // In case Delay is too larger, separate it into several small delay slot.
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158 | // Devided Delay by half value of Init Count is to avoid Delay close to
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159 | // the Init Count, timeout maybe missing if the time consuming between 2
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160 | // GetApicTimerCurrentCount() invoking is larger than the time gap between
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161 | // Delay and the Init Count.
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162 | //
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163 | InitCount = InternalX86GetInitTimerCount (ApicBase);
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164 | ASSERT (InitCount != 0);
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165 | Times = Delay / (InitCount / 2);
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166 | Delay = Delay % (InitCount / 2);
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167 |
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168 | //
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169 | // Get Start Tick and do delay
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170 | //
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171 | StartTick = InternalX86GetTimerTick (ApicBase);
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172 | do {
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173 | //
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174 | // Wait until time out by Delay value
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175 | //
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176 | do {
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177 | CpuPause ();
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178 | //
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179 | // Get Ticks from Start to Current.
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180 | //
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181 | Ticks = StartTick - InternalX86GetTimerTick (ApicBase);
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182 | //
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183 | // Ticks < 0 means Timer wrap-arounds happens.
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184 | //
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185 | if (Ticks < 0) {
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186 | Ticks += InitCount;
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187 | }
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188 | } while ((UINT32)Ticks < Delay);
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189 |
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190 | //
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191 | // Update StartTick and Delay for next delay slot
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192 | //
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193 | StartTick -= (StartTick > Delay) ? Delay : (Delay - InitCount);
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194 | Delay = InitCount / 2;
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195 | } while (Times-- > 0);
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196 | }
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197 |
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198 | /**
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199 | Stalls the CPU for at least the given number of microseconds.
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200 |
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201 | Stalls the CPU for the number of microseconds specified by MicroSeconds.
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202 |
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203 | @param MicroSeconds The minimum number of microseconds to delay.
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204 |
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205 | @return The value of MicroSeconds inputted.
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206 |
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207 | **/
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208 | UINTN
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209 | EFIAPI
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210 | MicroSecondDelay (
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211 | IN UINTN MicroSeconds
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212 | )
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213 | {
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214 | UINTN ApicBase;
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215 |
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216 | ApicBase = InternalX86GetApicBase ();
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217 | InternalX86Delay (
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218 | ApicBase,
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219 | (UINT32)DivU64x32 (
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220 | MultU64x64 (
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221 | InternalX86GetTimerFrequency (ApicBase),
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222 | MicroSeconds
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223 | ),
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224 | 1000000u
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225 | )
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226 | );
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227 | return MicroSeconds;
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228 | }
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229 |
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230 | /**
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231 | Stalls the CPU for at least the given number of nanoseconds.
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232 |
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233 | Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
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234 |
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235 | @param NanoSeconds The minimum number of nanoseconds to delay.
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236 |
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237 | @return The value of NanoSeconds inputted.
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238 |
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239 | **/
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240 | UINTN
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241 | EFIAPI
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242 | NanoSecondDelay (
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243 | IN UINTN NanoSeconds
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244 | )
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245 | {
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246 | UINTN ApicBase;
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247 |
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248 | ApicBase = InternalX86GetApicBase ();
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249 | InternalX86Delay (
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250 | ApicBase,
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251 | (UINT32)DivU64x32 (
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252 | MultU64x64 (
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253 | InternalX86GetTimerFrequency (ApicBase),
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254 | NanoSeconds
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255 | ),
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256 | 1000000000u
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257 | )
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258 | );
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259 | return NanoSeconds;
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260 | }
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261 |
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262 | /**
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263 | Retrieves the current value of a 64-bit free running performance counter.
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264 |
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265 | The counter can either count up by 1 or count down by 1. If the physical
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266 | performance counter counts by a larger increment, then the counter values
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267 | must be translated. The properties of the counter can be retrieved from
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268 | GetPerformanceCounterProperties().
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269 |
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270 | @return The current value of the free running performance counter.
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271 |
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272 | **/
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273 | UINT64
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274 | EFIAPI
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275 | GetPerformanceCounter (
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276 | VOID
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277 | )
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278 | {
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279 | return (UINT64)(UINT32)InternalX86GetTimerTick (InternalX86GetApicBase ());
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280 | }
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281 |
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282 | /**
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283 | Retrieves the 64-bit frequency in Hz and the range of performance counter
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284 | values.
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285 |
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286 | If StartValue is not NULL, then the value that the performance counter starts
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287 | with immediately after is it rolls over is returned in StartValue. If
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288 | EndValue is not NULL, then the value that the performance counter end with
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289 | immediately before it rolls over is returned in EndValue. The 64-bit
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290 | frequency of the performance counter in Hz is always returned. If StartValue
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291 | is less than EndValue, then the performance counter counts up. If StartValue
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292 | is greater than EndValue, then the performance counter counts down. For
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293 | example, a 64-bit free running counter that counts up would have a StartValue
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294 | of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
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295 | that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
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296 |
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297 | @param StartValue The value the performance counter starts with when it
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298 | rolls over.
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299 | @param EndValue The value that the performance counter ends with before
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300 | it rolls over.
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301 |
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302 | @return The frequency in Hz.
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303 |
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304 | **/
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305 | UINT64
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306 | EFIAPI
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307 | GetPerformanceCounterProperties (
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308 | OUT UINT64 *StartValue, OPTIONAL
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309 | OUT UINT64 *EndValue OPTIONAL
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310 | )
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311 | {
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312 | UINTN ApicBase;
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313 |
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314 | ApicBase = InternalX86GetApicBase ();
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315 |
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316 | if (StartValue != NULL) {
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317 | *StartValue = (UINT64)InternalX86GetInitTimerCount (ApicBase);
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318 | }
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319 |
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320 | if (EndValue != NULL) {
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321 | *EndValue = 0;
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322 | }
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323 |
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324 | return (UINT64) InternalX86GetTimerFrequency (ApicBase);
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325 | }
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326 |
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327 | /**
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328 | Converts elapsed ticks of performance counter to time in nanoseconds.
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329 |
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330 | This function converts the elapsed ticks of running performance counter to
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331 | time value in unit of nanoseconds.
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332 |
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333 | @param Ticks The number of elapsed ticks of running performance counter.
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334 |
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335 | @return The elapsed time in nanoseconds.
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336 |
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337 | **/
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338 | UINT64
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339 | EFIAPI
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340 | GetTimeInNanoSecond (
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341 | IN UINT64 Ticks
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342 | )
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343 | {
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344 | UINT64 Frequency;
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345 | UINT64 NanoSeconds;
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346 | UINT64 Remainder;
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347 | INTN Shift;
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348 |
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349 | Frequency = GetPerformanceCounterProperties (NULL, NULL);
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350 |
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351 | //
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352 | // Ticks
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353 | // Time = --------- x 1,000,000,000
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354 | // Frequency
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355 | //
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356 | NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
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357 |
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358 | //
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359 | // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
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360 | // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
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361 | // i.e. highest bit set in Remainder should <= 33.
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362 | //
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363 | Shift = MAX (0, HighBitSet64 (Remainder) - 33);
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364 | Remainder = RShiftU64 (Remainder, (UINTN) Shift);
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365 | Frequency = RShiftU64 (Frequency, (UINTN) Shift);
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366 | NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
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367 |
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368 | return NanoSeconds;
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369 | }
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