VirtualBox

source: vbox/trunk/src/VBox/Devices/EFI/FirmwareNew/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h@ 77599

Last change on this file since 77599 was 58466, checked in by vboxsync, 10 years ago

EFI/Firmware: Merged in the svn:eol-style, svn:mime-type and trailing whitespace cleanup that was done after the initial UDK2014.SP1 import: svn merge /vendor/edk2/UDK2014.SP1 /vendor/edk2/current .

  • Property svn:eol-style set to native
File size: 1.8 KB
Line 
1/** @file
2 Include file of PciSegmentPciRootBridgeIo Library.
3
4 Copyright (c) 2007 - 2009, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of
7 the BSD License which accompanies this distribution. The full
8 text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14**/
15
16#ifndef __DXE_PCI_SEGMENT_LIB__
17#define __DXE_PCI_SEGMENT_LIB__
18
19#include <PiDxe.h>
20
21#include <Protocol/PciRootBridgeIo.h>
22
23#include <Library/PciSegmentLib.h>
24#include <Library/BaseLib.h>
25#include <Library/MemoryAllocationLib.h>
26#include <Library/UefiBootServicesTableLib.h>
27#include <Library/DebugLib.h>
28
29#include <IndustryStandard/Acpi.h>
30
31typedef struct {
32 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
33 UINT32 SegmentNumber;
34 UINT64 MinBusNumber;
35 UINT64 MaxBusNumber;
36} PCI_ROOT_BRIDGE_DATA;
37
38/**
39 Assert the validity of a PCI Segment address.
40 A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
41
42 @param A The address to validate.
43 @param M Additional bits to assert to be zero.
44
45**/
46#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
47 ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0)
48
49/**
50 Translate PCI Lib address into format of PCI Root Bridge I/O Protocol
51
52 @param A The address that encodes the PCI Bus, Device, Function and
53 Register.
54
55**/
56#define PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS(A) \
57 ((((UINT32)(A) << 4) & 0xff000000) | (((UINT32)(A) >> 4) & 0x00000700) | (((UINT32)(A) << 1) & 0x001f0000) | (LShiftU64((A) & 0xfff, 32)))
58
59#endif
Note: See TracBrowser for help on using the repository browser.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette