| 1 | /** @file
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| 2 | Platform specific defines for constructing ACPI tables
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| 3 |
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| 4 | Copyright (c) 2020, Rebecca Cran <[email protected]>
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| 5 | Copyright (c) 2014, Pluribus Networks, Inc.
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| 6 | Copyright (c) 2012, 2013, Red Hat, Inc.
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| 7 | Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
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| 8 |
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| 9 | SPDX-License-Identifier: BSD-2-Clause-Patent
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| 10 |
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| 11 | **/
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| 12 |
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| 13 | #ifndef _Platform_h_INCLUDED_
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| 14 | #define _Platform_h_INCLUDED_
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| 15 |
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| 16 | #include <IndustryStandard/Acpi.h>
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| 17 | #include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
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| 18 | #include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
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| 19 |
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| 20 | //
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| 21 | // ACPI table information used to initialize tables.
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| 22 | //
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| 23 | #define EFI_ACPI_OEM_ID 'B','H','Y','V','E',' ' // OEMID 6 bytes long
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| 24 | #define EFI_ACPI_OEM_REVISION 0x1
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| 25 | #define EFI_ACPI_CREATOR_ID SIGNATURE_32('B','H','Y','V')
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| 26 | #define EFI_ACPI_CREATOR_REVISION 0x00000001
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| 27 |
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| 28 | #define INT_MODEL 0x01
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| 29 | #define SCI_INT_VECTOR 0x0009
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| 30 | #define SMI_CMD_IO_PORT 0xB2
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| 31 | #define ACPI_ENABLE 0xA0
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| 32 | #define ACPI_DISABLE 0xA1
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| 33 | #define S4BIOS_REQ 0x00
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| 34 | #define PM1a_EVT_BLK 0x00000400 /* TNXXX */
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| 35 | #define PM1b_EVT_BLK 0x00000000
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| 36 | #define PM1a_CNT_BLK 0x00000404 /* TNXXX */
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| 37 | #define PM1b_CNT_BLK 0x00000000
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| 38 | #define PM2_CNT_BLK 0x00000000
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| 39 | #define PM_TMR_BLK 0x00000408
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| 40 | #define GPE0_BLK 0x00000000
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| 41 | #define GPE1_BLK 0x00000000
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| 42 | #define PM1_EVT_LEN 0x04
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| 43 | #define PM1_CNT_LEN 0x02
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| 44 | #define PM2_CNT_LEN 0x00
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| 45 | #define PM_TM_LEN 0x04
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| 46 | #define GPE0_BLK_LEN 0x00
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| 47 | #define GPE1_BLK_LEN 0x00
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| 48 | #define GPE1_BASE 0x00
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| 49 | #define RESERVED 0x00
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| 50 | #define P_LVL2_LAT 0x0000
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| 51 | #define P_LVL3_LAT 0x0000
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| 52 | #define FLUSH_SIZE 0x0000
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| 53 | #define FLUSH_STRIDE 0x0000
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| 54 | #define DUTY_OFFSET 0x00
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| 55 | #define DUTY_WIDTH 0x00
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| 56 | #define DAY_ALRM 0x00
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| 57 | #define MON_ALRM 0x00
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| 58 | #define CENTURY 0x32
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| 59 | #define IAPC_BOOT_ARCH 0x12 /* 8042 present, disable PCIe ASPM */
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| 60 | #define FACP_FLAGS (EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | \
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| 61 | EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_TMR_VAL_EXT | \
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| 62 | EFI_ACPI_2_0_RESET_REG_SUP | \
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| 63 | EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE)
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| 64 | #define FACP_RESET_REG { \
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| 65 | EFI_ACPI_3_0_SYSTEM_IO, /* Address Space ID */ \
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| 66 | 8, /* Bit Width */ \
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| 67 | 0, /* Bit Offset */ \
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| 68 | EFI_ACPI_3_0_BYTE, /* Byte Access */ \
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| 69 | 0xCF9 /* I/O Port */ \
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| 70 | }
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| 71 | #define FACP_RESET_VAL 0x6
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| 72 | #endif
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