1 | /** @file
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2 | Platform BDS customizations include file.
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3 |
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4 | Copyright (c) 2020, Rebecca Cran <[email protected]>
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5 | Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
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6 | SPDX-License-Identifier: BSD-2-Clause-Patent
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7 |
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8 | Module Name:
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9 |
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10 | BdsPlatform.h
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11 |
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12 | Abstract:
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13 |
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14 | Head file for BDS Platform specific code
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15 |
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16 | **/
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17 |
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18 | #ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
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19 | #define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
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20 |
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21 | #include <PiDxe.h>
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22 |
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23 | #include <IndustryStandard/Pci.h>
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24 | #include <IndustryStandard/Acpi.h>
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25 | #include <IndustryStandard/SmBios.h>
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26 | #include <IndustryStandard/PeImage.h>
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27 | #include <IndustryStandard/Virtio095.h>
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28 |
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29 | #include <Library/DebugLib.h>
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30 | #include <Library/BaseMemoryLib.h>
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31 | #include <Library/UefiBootServicesTableLib.h>
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32 | #include <Library/UefiRuntimeServicesTableLib.h>
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33 | #include <Library/MemoryAllocationLib.h>
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34 | #include <Library/BaseLib.h>
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35 | #include <Library/PcdLib.h>
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36 | #include <Library/PciLib.h>
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37 | #include <Library/UefiBootManagerLib.h>
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38 | #include <Library/BootLogoLib.h>
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39 | #include <Library/HobLib.h>
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40 | #include <Library/UefiLib.h>
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41 | #include <Library/DxeServicesTableLib.h>
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42 | #include <Library/DevicePathLib.h>
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43 | #include <Library/IoLib.h>
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44 | #include <Library/NvVarsFileLib.h>
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45 | #include <Library/QemuFwCfgLib.h>
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46 | #include <Library/QemuFwCfgS3Lib.h>
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47 | #include <Library/QemuBootOrderLib.h>
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48 |
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49 | #include <Protocol/Decompress.h>
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50 | #include <Protocol/PciIo.h>
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51 | #include <Protocol/FirmwareVolume2.h>
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52 | #include <Protocol/SimpleFileSystem.h>
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53 | #include <Protocol/PciRootBridgeIo.h>
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54 | #include <Protocol/S3SaveState.h>
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55 | #include <Protocol/DxeSmmReadyToLock.h>
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56 | #include <Protocol/LoadedImage.h>
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57 |
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58 | #include <Guid/Acpi.h>
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59 | #include <Guid/SmBios.h>
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60 | #include <Guid/HobList.h>
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61 | #include <Guid/GlobalVariable.h>
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62 | #include <Guid/EventGroup.h>
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63 | #include <Guid/DebugAgentGuid.h>
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64 |
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65 | #include <OvmfPlatforms.h>
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66 |
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67 | extern EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[];
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68 | extern ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode;
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69 | extern ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode;
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70 | extern UART_DEVICE_PATH gUartDeviceNode;
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71 | extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;
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72 |
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73 | #define PCI_DEVICE_PATH_NODE(Func, Dev) \
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74 | { \
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75 | { \
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76 | HARDWARE_DEVICE_PATH, \
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77 | HW_PCI_DP, \
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78 | { \
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79 | (UINT8) (sizeof (PCI_DEVICE_PATH)), \
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80 | (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \
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81 | } \
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82 | }, \
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83 | (Func), \
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84 | (Dev) \
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85 | }
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86 |
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87 | #define PNPID_DEVICE_PATH_NODE(PnpId) \
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88 | { \
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89 | { \
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90 | ACPI_DEVICE_PATH, \
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91 | ACPI_DP, \
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92 | { \
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93 | (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \
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94 | (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \
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95 | }, \
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96 | }, \
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97 | EISA_PNP_ID((PnpId)), \
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98 | 0 \
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99 | }
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100 |
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101 | #define gPciIsaBridge \
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102 | PCI_DEVICE_PATH_NODE(0, 0x1f)
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103 |
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104 | #define gP2PBridge \
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105 | PCI_DEVICE_PATH_NODE(0, 0x1e)
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106 |
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107 | #define gPnpPs2Keyboard \
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108 | PNPID_DEVICE_PATH_NODE(0x0303)
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109 |
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110 | #define gPnp16550ComPort \
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111 | PNPID_DEVICE_PATH_NODE(0x0501)
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112 |
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113 | #define gUart \
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114 | { \
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115 | { \
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116 | MESSAGING_DEVICE_PATH, \
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117 | MSG_UART_DP, \
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118 | { \
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119 | (UINT8) (sizeof (UART_DEVICE_PATH)), \
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120 | (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \
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121 | } \
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122 | }, \
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123 | 0, \
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124 | 115200, \
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125 | 8, \
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126 | 1, \
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127 | 1 \
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128 | }
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129 |
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130 | #define gPcAnsiTerminal \
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131 | { \
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132 | { \
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133 | MESSAGING_DEVICE_PATH, \
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134 | MSG_VENDOR_DP, \
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135 | { \
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136 | (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
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137 | (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
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138 | } \
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139 | }, \
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140 | DEVICE_PATH_MESSAGING_PC_ANSI \
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141 | }
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142 |
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143 | #define gEndEntire \
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144 | { \
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145 | END_DEVICE_PATH_TYPE, \
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146 | END_ENTIRE_DEVICE_PATH_SUBTYPE, \
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147 | { \
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148 | END_DEVICE_PATH_LENGTH, \
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149 | 0 \
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150 | } \
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151 | }
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152 |
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153 | #define PCI_CLASS_SCC 0x07
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154 | #define PCI_SUBCLASS_SERIAL 0x00
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155 | #define PCI_IF_16550 0x02
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156 | #define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
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157 | #define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
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158 |
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159 | typedef struct {
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160 | EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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161 | UINTN ConnectType;
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162 | } PLATFORM_CONSOLE_CONNECT_ENTRY;
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163 |
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164 | #define CONSOLE_OUT BIT0
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165 | #define CONSOLE_IN BIT1
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166 | #define STD_ERROR BIT2
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167 | extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[];
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168 |
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169 | //
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170 | // Platform BDS Functions
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171 | //
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172 |
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173 | VOID
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174 | PlatformInitializeConsole (
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175 | IN PLATFORM_CONSOLE_CONNECT_ENTRY *PlatformConsole
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176 | );
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177 |
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178 | /**
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179 | Loads and boots UEFI Linux via the FwCfg interface.
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180 |
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181 | @retval EFI_NOT_FOUND - The Linux kernel was not found
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182 |
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183 | **/
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184 | EFI_STATUS
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185 | TryRunningQemuKernel (
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186 | VOID
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187 | );
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188 |
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189 | #endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
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