1 | /** @file
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2 | AESNI feature.
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3 |
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4 | Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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6 |
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7 | **/
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8 |
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9 | #include "CpuCommonFeatures.h"
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10 |
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11 | /**
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12 | Prepares for the data used by CPU feature detection and initialization.
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13 |
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14 | @param[in] NumberOfProcessors The number of CPUs in the platform.
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15 |
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16 | @return Pointer to a buffer of CPU related configuration data.
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17 |
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18 | @note This service could be called by BSP only.
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19 | **/
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20 | VOID *
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21 | EFIAPI
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22 | AesniGetConfigData (
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23 | IN UINTN NumberOfProcessors
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24 | )
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25 | {
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26 | UINT64 *ConfigData;
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27 |
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28 | ConfigData = AllocateZeroPool (sizeof (UINT64) * NumberOfProcessors);
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29 | ASSERT (ConfigData != NULL);
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30 | return ConfigData;
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31 | }
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32 |
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33 | /**
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34 | Detects if AESNI feature supported on current processor.
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35 |
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36 | @param[in] ProcessorNumber The index of the CPU executing this function.
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37 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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38 | structure for the CPU executing this function.
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39 | @param[in] ConfigData A pointer to the configuration buffer returned
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40 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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41 | CPU_FEATURE_GET_CONFIG_DATA was not provided in
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42 | RegisterCpuFeature().
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43 |
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44 | @retval TRUE AESNI feature is supported.
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45 | @retval FALSE AESNI feature is not supported.
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46 |
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47 | @note This service could be called by BSP/APs.
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48 | **/
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49 | BOOLEAN
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50 | EFIAPI
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51 | AesniSupport (
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52 | IN UINTN ProcessorNumber,
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53 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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54 | IN VOID *ConfigData OPTIONAL
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55 | )
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56 | {
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57 | MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
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58 |
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59 | if (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1) {
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60 | MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
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61 | ASSERT (MsrFeatureConfig != NULL);
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62 | MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
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63 | return TRUE;
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64 | }
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65 | return FALSE;
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66 | }
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67 |
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68 | /**
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69 | Initializes AESNI feature to specific state.
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70 |
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71 | @param[in] ProcessorNumber The index of the CPU executing this function.
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72 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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73 | structure for the CPU executing this function.
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74 | @param[in] ConfigData A pointer to the configuration buffer returned
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75 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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76 | CPU_FEATURE_GET_CONFIG_DATA was not provided in
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77 | RegisterCpuFeature().
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78 | @param[in] State If TRUE, then the AESNI feature must be enabled.
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79 | If FALSE, then the AESNI feature must be disabled.
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80 |
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81 | @retval RETURN_SUCCESS AESNI feature is initialized.
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82 |
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83 | @note This service could be called by BSP only.
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84 | **/
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85 | RETURN_STATUS
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86 | EFIAPI
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87 | AesniInitialize (
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88 | IN UINTN ProcessorNumber,
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89 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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90 | IN VOID *ConfigData, OPTIONAL
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91 | IN BOOLEAN State
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92 | )
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93 | {
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94 | MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
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95 |
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96 | //
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97 | // SANDY_BRIDGE, SILVERMONT, XEON_5600, XEON_7, and XEON_PHI have the same MSR index,
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98 | // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here
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99 | //
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100 | // The scope of the MSR_SANDY_BRIDGE_FEATURE_CONFIG is Core, only program MSR_FEATURE_CONFIG for thread 0
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101 | // of each core. Otherwise, once a thread in the core disabled AES, the other thread will cause GP when
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102 | // programming it.
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103 | //
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104 | if (CpuInfo->ProcessorInfo.Location.Thread == 0) {
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105 | MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
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106 | ASSERT (MsrFeatureConfig != NULL);
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107 | if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {
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108 | CPU_REGISTER_TABLE_WRITE_FIELD (
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109 | ProcessorNumber,
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110 | Msr,
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111 | MSR_SANDY_BRIDGE_FEATURE_CONFIG,
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112 | MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER,
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113 | Bits.AESConfiguration,
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114 | BIT0 | ((State) ? 0 : BIT1)
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115 | );
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116 | }
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117 | }
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118 | return RETURN_SUCCESS;
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119 | }
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