1 | /** @file
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2 | CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
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3 |
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4 | Copyright (c) 2019 Intel Corporation. All rights reserved.<BR>
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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6 |
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7 | **/
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8 |
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9 | #include <Base.h>
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10 | #include <Library/TimerLib.h>
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11 | #include <Library/BaseLib.h>
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12 | #include <Library/PcdLib.h>
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13 | #include <Library/DebugLib.h>
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14 | #include <Register/Cpuid.h>
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15 |
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16 | GUID mCpuCrystalFrequencyHobGuid = { 0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a } };
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17 |
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18 | /**
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19 | Internal function to retrieves the 64-bit frequency in Hz.
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20 |
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21 | Internal function to retrieves the 64-bit frequency in Hz.
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22 |
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23 | @return The frequency in Hz.
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24 |
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25 | **/
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26 | UINT64
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27 | InternalGetPerformanceCounterFrequency (
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28 | VOID
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29 | );
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30 |
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31 | /**
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32 | CPUID Leaf 0x15 for Core Crystal Clock Frequency.
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33 |
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34 | The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency in MHz = Core XTAL frequency * EBX/EAX.
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35 | In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if not supported.
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36 | @return The number of TSC counts per second.
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37 |
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38 | **/
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39 | UINT64
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40 | CpuidCoreClockCalculateTscFrequency (
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41 | VOID
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42 | )
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43 | {
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44 | UINT64 TscFrequency;
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45 | UINT64 CoreXtalFrequency;
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46 | UINT32 RegEax;
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47 | UINT32 RegEbx;
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48 | UINT32 RegEcx;
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49 |
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50 | //
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51 | // Use CPUID leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Information
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52 | // EBX returns 0 if not supported. ECX, if non zero, provides Core Xtal Frequency in hertz.
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53 | // TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX.
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54 | //
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55 | AsmCpuid (CPUID_TIME_STAMP_COUNTER, &RegEax, &RegEbx, &RegEcx, NULL);
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56 |
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57 | //
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58 | // If EAX or EBX returns 0, the XTAL ratio is not enumerated.
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59 | //
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60 | if (RegEax == 0 || RegEbx ==0 ) {
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61 | ASSERT (RegEax != 0);
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62 | ASSERT (RegEbx != 0);
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63 | return 0;
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64 | }
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65 | //
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66 | // If ECX returns 0, the XTAL frequency is not enumerated.
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67 | // And PcdCpuCoreCrystalClockFrequency defined should base on processor series.
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68 | //
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69 | if (RegEcx == 0) {
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70 | CoreXtalFrequency = PcdGet64 (PcdCpuCoreCrystalClockFrequency);
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71 | } else {
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72 | CoreXtalFrequency = (UINT64) RegEcx;
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73 | }
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74 |
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75 | //
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76 | // Calculate TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX
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77 | //
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78 | TscFrequency = DivU64x32 (MultU64x32 (CoreXtalFrequency, RegEbx) + (UINT64)(RegEax >> 1), RegEax);
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79 |
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80 | return TscFrequency;
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81 | }
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82 |
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83 | /**
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84 | Stalls the CPU for at least the given number of ticks.
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85 |
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86 | Stalls the CPU for at least the given number of ticks. It's invoked by
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87 | MicroSecondDelay() and NanoSecondDelay().
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88 |
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89 | @param Delay A period of time to delay in ticks.
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90 |
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91 | **/
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92 | VOID
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93 | InternalCpuDelay (
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94 | IN UINT64 Delay
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95 | )
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96 | {
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97 | UINT64 Ticks;
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98 |
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99 | //
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100 | // The target timer count is calculated here
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101 | //
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102 | Ticks = AsmReadTsc() + Delay;
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103 |
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104 | //
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105 | // Wait until time out
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106 | // Timer wrap-arounds are NOT handled correctly by this function.
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107 | // Thus, this function must be called within 10 years of reset since
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108 | // Intel guarantees a minimum of 10 years before the TSC wraps.
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109 | //
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110 | while (AsmReadTsc() <= Ticks) {
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111 | CpuPause();
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112 | }
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113 | }
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114 |
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115 | /**
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116 | Stalls the CPU for at least the given number of microseconds.
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117 |
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118 | Stalls the CPU for the number of microseconds specified by MicroSeconds.
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119 |
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120 | @param[in] MicroSeconds The minimum number of microseconds to delay.
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121 |
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122 | @return MicroSeconds
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123 |
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124 | **/
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125 | UINTN
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126 | EFIAPI
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127 | MicroSecondDelay (
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128 | IN UINTN MicroSeconds
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129 | )
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130 | {
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131 |
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132 | InternalCpuDelay (
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133 | DivU64x32 (
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134 | MultU64x64 (
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135 | MicroSeconds,
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136 | InternalGetPerformanceCounterFrequency ()
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137 | ),
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138 | 1000000u
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139 | )
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140 | );
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141 |
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142 | return MicroSeconds;
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143 | }
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144 |
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145 | /**
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146 | Stalls the CPU for at least the given number of nanoseconds.
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147 |
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148 | Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
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149 |
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150 | @param NanoSeconds The minimum number of nanoseconds to delay.
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151 |
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152 | @return NanoSeconds
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153 |
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154 | **/
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155 | UINTN
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156 | EFIAPI
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157 | NanoSecondDelay (
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158 | IN UINTN NanoSeconds
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159 | )
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160 | {
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161 |
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162 | InternalCpuDelay (
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163 | DivU64x32 (
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164 | MultU64x64 (
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165 | NanoSeconds,
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166 | InternalGetPerformanceCounterFrequency ()
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167 | ),
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168 | 1000000000u
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169 | )
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170 | );
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171 |
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172 | return NanoSeconds;
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173 | }
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174 |
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175 | /**
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176 | Retrieves the current value of a 64-bit free running performance counter.
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177 |
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178 | Retrieves the current value of a 64-bit free running performance counter. The
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179 | counter can either count up by 1 or count down by 1. If the physical
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180 | performance counter counts by a larger increment, then the counter values
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181 | must be translated. The properties of the counter can be retrieved from
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182 | GetPerformanceCounterProperties().
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183 |
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184 | @return The current value of the free running performance counter.
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185 |
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186 | **/
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187 | UINT64
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188 | EFIAPI
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189 | GetPerformanceCounter (
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190 | VOID
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191 | )
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192 | {
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193 | return AsmReadTsc ();
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194 | }
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195 |
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196 | /**
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197 | Retrieves the 64-bit frequency in Hz and the range of performance counter
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198 | values.
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199 |
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200 | If StartValue is not NULL, then the value that the performance counter starts
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201 | with immediately after is it rolls over is returned in StartValue. If
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202 | EndValue is not NULL, then the value that the performance counter end with
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203 | immediately before it rolls over is returned in EndValue. The 64-bit
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204 | frequency of the performance counter in Hz is always returned. If StartValue
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205 | is less than EndValue, then the performance counter counts up. If StartValue
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206 | is greater than EndValue, then the performance counter counts down. For
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207 | example, a 64-bit free running counter that counts up would have a StartValue
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208 | of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
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209 | that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
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210 |
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211 | @param StartValue The value the performance counter starts with when it
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212 | rolls over.
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213 | @param EndValue The value that the performance counter ends with before
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214 | it rolls over.
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215 |
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216 | @return The frequency in Hz.
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217 |
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218 | **/
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219 | UINT64
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220 | EFIAPI
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221 | GetPerformanceCounterProperties (
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222 | OUT UINT64 *StartValue, OPTIONAL
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223 | OUT UINT64 *EndValue OPTIONAL
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224 | )
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225 | {
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226 | if (StartValue != NULL) {
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227 | *StartValue = 0;
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228 | }
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229 |
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230 | if (EndValue != NULL) {
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231 | *EndValue = 0xffffffffffffffffULL;
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232 | }
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233 | return InternalGetPerformanceCounterFrequency ();
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234 | }
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235 |
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236 | /**
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237 | Converts elapsed ticks of performance counter to time in nanoseconds.
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238 |
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239 | This function converts the elapsed ticks of running performance counter to
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240 | time value in unit of nanoseconds.
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241 |
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242 | @param Ticks The number of elapsed ticks of running performance counter.
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243 |
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244 | @return The elapsed time in nanoseconds.
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245 |
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246 | **/
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247 | UINT64
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248 | EFIAPI
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249 | GetTimeInNanoSecond (
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250 | IN UINT64 Ticks
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251 | )
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252 | {
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253 | UINT64 Frequency;
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254 | UINT64 NanoSeconds;
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255 | UINT64 Remainder;
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256 | INTN Shift;
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257 |
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258 | Frequency = GetPerformanceCounterProperties (NULL, NULL);
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259 |
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260 | //
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261 | // Ticks
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262 | // Time = --------- x 1,000,000,000
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263 | // Frequency
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264 | //
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265 | NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
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266 |
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267 | //
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268 | // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
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269 | // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
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270 | // i.e. highest bit set in Remainder should <= 33.
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271 | //
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272 | Shift = MAX (0, HighBitSet64 (Remainder) - 33);
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273 | Remainder = RShiftU64 (Remainder, (UINTN) Shift);
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274 | Frequency = RShiftU64 (Frequency, (UINTN) Shift);
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275 | NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
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276 |
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277 | return NanoSeconds;
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278 | }
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279 |
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