1 | /** @file
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2 | SMRAM Save State Map header file.
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3 |
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4 | Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
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5 | Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>
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6 | SPDX-License-Identifier: BSD-2-Clause-Patent
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7 |
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8 | **/
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9 |
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10 | #ifndef MM_SAVESTATE_H_
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11 | #define MM_SAVESTATE_H_
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12 |
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13 | #include <Uefi/UefiBaseType.h>
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14 | #include <Protocol/MmCpu.h>
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15 | #include <Library/DebugLib.h>
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16 | #include <Library/MmSaveStateLib.h>
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17 | #include <Library/MmServicesTableLib.h>
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18 | #include <Library/BaseMemoryLib.h>
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19 |
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20 | // Macro used to simplify the lookup table entries of type CPU_MM_SAVE_STATE_REGISTER_RANGE
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21 | #define MM_REGISTER_RANGE(Start, End) { Start, End, End - Start + 1 }
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22 |
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23 | // Structure used to describe a range of registers
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24 | typedef struct {
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25 | EFI_MM_SAVE_STATE_REGISTER Start;
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26 | EFI_MM_SAVE_STATE_REGISTER End;
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27 | UINTN Length;
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28 | } CPU_MM_SAVE_STATE_REGISTER_RANGE;
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29 |
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30 | // Structure used to build a lookup table to retrieve the widths and offsets
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31 | // associated with each supported EFI_MM_SAVE_STATE_REGISTER value
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32 |
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33 | typedef struct {
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34 | UINT8 Width32;
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35 | UINT8 Width64;
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36 | UINT16 Offset32;
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37 | UINT16 Offset64Lo;
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38 | UINT16 Offset64Hi;
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39 | BOOLEAN Writeable;
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40 | } CPU_MM_SAVE_STATE_LOOKUP_ENTRY;
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41 |
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42 | /**
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43 | Returns LMA value of the Processor.
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44 |
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45 | @retval UINT8 returns LMA bit value.
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46 | **/
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47 | UINT8
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48 | MmSaveStateGetRegisterLma (
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49 | VOID
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50 | );
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51 |
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52 | /**
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53 | Read information from the CPU save state.
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54 |
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55 | @param Register Specifies the CPU register to read form the save state.
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56 | @param RegOffset Offset for the next register index.
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57 |
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58 | @retval 0 Register is not valid
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59 | @retval >0 Index into mCpuWidthOffset[] associated with Register
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60 |
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61 | **/
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62 | UINTN
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63 | MmSaveStateGetRegisterIndex (
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64 | IN EFI_MM_SAVE_STATE_REGISTER Register,
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65 | IN UINTN RegOffset
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66 | );
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67 |
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68 | /**
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69 | Read a CPU Save State register on the target processor.
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70 |
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71 | This function abstracts the differences that whether the CPU Save State register is in the
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72 | IA32 CPU Save State Map or X64 CPU Save State Map.
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73 |
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74 | This function supports reading a CPU Save State register in SMBase relocation handler.
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75 |
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76 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
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77 | @param[in] RegisterIndex Index into mCpuWidthOffset[] look up table.
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78 | @param[in] Width The number of bytes to read from the CPU save state.
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79 | @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
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80 |
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81 | @retval EFI_SUCCESS The register was read from Save State.
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82 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
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83 | @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
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84 |
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85 | **/
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86 | EFI_STATUS
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87 | MmSaveStateReadRegisterByIndex (
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88 | IN UINTN CpuIndex,
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89 | IN UINTN RegisterIndex,
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90 | IN UINTN Width,
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91 | OUT VOID *Buffer
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92 | );
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93 |
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94 | #endif
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