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source: vbox/trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h@ 101291

Last change on this file since 101291 was 101291, checked in by vboxsync, 14 months ago

EFI/FirmwareNew: Make edk2-stable202308 build on all supported platforms (using gcc at least, msvc not tested yet), bugref:4643

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1/** @file
2Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.<BR>
5Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>
7
8SPDX-License-Identifier: BSD-2-Clause-Patent
9
10**/
11
12#ifndef _CPU_PISMMCPUDXESMM_H_
13#define _CPU_PISMMCPUDXESMM_H_
14
15#include <PiSmm.h>
16
17#include <Protocol/MpService.h>
18#include <Protocol/SmmConfiguration.h>
19#include <Protocol/SmmCpu.h>
20#include <Protocol/SmmAccess2.h>
21#include <Protocol/SmmReadyToLock.h>
22#include <Protocol/SmmCpuService.h>
23#include <Protocol/SmmMemoryAttribute.h>
24#include <Protocol/MmMp.h>
25
26#include <Guid/AcpiS3Context.h>
27#include <Guid/MemoryAttributesTable.h>
28#include <Guid/PiSmmMemoryAttributesTable.h>
29#include <Guid/SmmBaseHob.h>
30
31#include <Library/BaseLib.h>
32#include <Library/IoLib.h>
33#include <Library/TimerLib.h>
34#include <Library/SynchronizationLib.h>
35#include <Library/DebugLib.h>
36#include <Library/BaseMemoryLib.h>
37#include <Library/PcdLib.h>
38#include <Library/MtrrLib.h>
39#include <Library/SmmCpuPlatformHookLib.h>
40#include <Library/SmmServicesTableLib.h>
41#include <Library/MemoryAllocationLib.h>
42#include <Library/UefiBootServicesTableLib.h>
43#include <Library/UefiRuntimeServicesTableLib.h>
44#include <Library/DebugAgentLib.h>
45#include <Library/UefiLib.h>
46#include <Library/HobLib.h>
47#include <Library/LocalApicLib.h>
48#include <Library/CpuLib.h>
49#include <Library/CpuExceptionHandlerLib.h>
50#include <Library/ReportStatusCodeLib.h>
51#include <Library/SmmCpuFeaturesLib.h>
52#include <Library/PeCoffGetEntryPointLib.h>
53#include <Library/RegisterCpuFeaturesLib.h>
54#include <Library/PerformanceLib.h>
55#include <Library/CpuPageTableLib.h>
56#include <Library/MmSaveStateLib.h>
57
58#include <AcpiCpuData.h>
59#include <CpuHotPlugData.h>
60
61#include <Register/Intel/Cpuid.h>
62#include <Register/Intel/Msr.h>
63
64#include "CpuService.h"
65#include "SmmProfile.h"
66#include "SmmMpPerf.h"
67
68//
69// CET definition
70//
71#define CPUID_CET_SS BIT7
72#define CPUID_CET_IBT BIT20
73
74#define CR4_CET_ENABLE BIT23
75
76#define MSR_IA32_S_CET 0x6A2
77#define MSR_IA32_PL0_SSP 0x6A4
78#define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
79
80typedef union {
81 struct {
82 // enable shadow stacks
83 UINT32 SH_STK_ENP : 1;
84 // enable the WRSS{D,Q}W instructions.
85 UINT32 WR_SHSTK_EN : 1;
86 // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
87 UINT32 ENDBR_EN : 1;
88 // enable legacy compatibility treatment for indirect call/jmp tracking.
89 UINT32 LEG_IW_EN : 1;
90 // enable use of no-track prefix on indirect call/jmp.
91 UINT32 NO_TRACK_EN : 1;
92 // disable suppression of CET indirect branch tracking on legacy compatibility.
93 UINT32 SUPPRESS_DIS : 1;
94 UINT32 RSVD : 4;
95 // indirect branch tracking is suppressed.
96 // This bit can be written to 1 only if TRACKER is written as IDLE.
97 UINT32 SUPPRESS : 1;
98 // Value of the endbranch state machine
99 // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
100 UINT32 TRACKER : 1;
101 // linear address of a bitmap in memory indicating valid
102 // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
103 // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
104 // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
105 // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
106 // (this automatically aligns the address on a 4-Kbyte boundary).
107 UINT32 EB_LEG_BITMAP_BASE_low : 12;
108 UINT32 EB_LEG_BITMAP_BASE_high : 32;
109 } Bits;
110 UINT64 Uint64;
111} MSR_IA32_CET;
112
113//
114// MSRs required for configuration of SMM Code Access Check
115//
116#define EFI_MSR_SMM_MCA_CAP 0x17D
117#define SMM_CODE_ACCESS_CHK_BIT BIT58
118
119#define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
120#define SMM_CODE_CHK_EN_BIT BIT2
121
122///
123/// Page Table Entry
124///
125#define IA32_PG_P BIT0
126#define IA32_PG_RW BIT1
127#define IA32_PG_U BIT2
128#define IA32_PG_WT BIT3
129#define IA32_PG_CD BIT4
130#define IA32_PG_A BIT5
131#define IA32_PG_D BIT6
132#define IA32_PG_PS BIT7
133#define IA32_PG_PAT_2M BIT12
134#define IA32_PG_PAT_4K IA32_PG_PS
135#define IA32_PG_PMNT BIT62
136#define IA32_PG_NX BIT63
137
138#define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
139//
140// Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
141// X64 PAE PDPTE does not have such restriction
142//
143#define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
144
145#define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
146
147#define PAGING_4K_MASK 0xFFF
148#define PAGING_2M_MASK 0x1FFFFF
149#define PAGING_1G_MASK 0x3FFFFFFF
150
151#define PAGING_PAE_INDEX_MASK 0x1FF
152
153#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
154#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
155#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
156
157#define SMRR_MAX_ADDRESS BASE_4GB
158
159typedef enum {
160 PageNone,
161 Page4K,
162 Page2M,
163 Page1G,
164} PAGE_ATTRIBUTE;
165
166typedef struct {
167 PAGE_ATTRIBUTE Attribute;
168 UINT64 Length;
169 UINT64 AddressMask;
170} PAGE_ATTRIBUTE_TABLE;
171
172//
173// Size of Task-State Segment defined in IA32 Manual
174//
175#define TSS_SIZE 104
176#define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP
177#define TSS_X64_IST1_OFFSET 36
178#define TSS_IA32_CR3_OFFSET 28
179#define TSS_IA32_ESP_OFFSET 56
180#define TSS_IA32_SSP_OFFSET 104
181
182#define CR0_WP BIT16
183
184//
185// Code select value
186//
187#define PROTECT_MODE_CODE_SEGMENT 0x08
188#define LONG_MODE_CODE_SEGMENT 0x38
189
190//
191// The size 0x20 must be bigger than
192// the size of template code of SmmInit. Currently,
193// the size of SmmInit requires the 0x16 Bytes buffer
194// at least.
195//
196#define BACK_BUF_SIZE 0x20
197
198#define EXCEPTION_VECTOR_NUMBER 0x20
199
200#define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
201
202//
203// Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.
204//
205typedef struct {
206 EFI_AP_PROCEDURE Procedure;
207 VOID *ProcedureArgument;
208} PROCEDURE_WRAPPER;
209
210#define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')
211
212typedef struct {
213 UINTN Signature;
214 LIST_ENTRY Link;
215
216 SPIN_LOCK *SpinLock;
217 volatile UINT32 RunningApCount;
218} PROCEDURE_TOKEN;
219
220#define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)
221
222#define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')
223
224typedef struct {
225 UINTN Signature;
226 LIST_ENTRY Link;
227
228 UINT8 *Buffer;
229} TOKEN_BUFFER;
230
231#define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)
232
233//
234// Private structure for the SMM CPU module that is stored in DXE Runtime memory
235// Contains the SMM Configuration Protocols that is produced.
236// Contains a mix of DXE and SMM contents. All the fields must be used properly.
237//
238#define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
239
240typedef struct {
241 UINTN Signature;
242
243 EFI_HANDLE SmmCpuHandle;
244
245 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
246 SMM_CPU_OPERATION *Operation;
247 UINTN *CpuSaveStateSize;
248 VOID **CpuSaveState;
249
250 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
251 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
252 EFI_SMM_ENTRY_POINT SmmCoreEntry;
253
254 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
255
256 PROCEDURE_WRAPPER *ApWrapperFunc;
257 LIST_ENTRY TokenList;
258 LIST_ENTRY *FirstFreeToken;
259} SMM_CPU_PRIVATE_DATA;
260
261extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
262extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
263extern UINTN mMaxNumberOfCpus;
264extern UINTN mNumberOfCpus;
265extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
266extern EFI_MM_MP_PROTOCOL mSmmMp;
267extern BOOLEAN m5LevelPagingNeeded;
268extern PAGING_MODE mPagingMode;
269extern UINTN mSmmShadowStackSize;
270
271///
272/// The mode of the CPU at the time an SMI occurs
273///
274extern UINT8 mSmmSaveStateRegisterLma;
275
276#define PAGE_TABLE_POOL_ALIGNMENT BASE_128KB
277#define PAGE_TABLE_POOL_UNIT_SIZE BASE_128KB
278#define PAGE_TABLE_POOL_UNIT_PAGES EFI_SIZE_TO_PAGES (PAGE_TABLE_POOL_UNIT_SIZE)
279#define PAGE_TABLE_POOL_ALIGN_MASK \
280 (~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
281
282typedef struct {
283 VOID *NextPool;
284 UINTN Offset;
285 UINTN FreePages;
286} PAGE_TABLE_POOL;
287
288/**
289 Disable CET.
290**/
291VOID
292EFIAPI
293DisableCet (
294 VOID
295 );
296
297/**
298 Enable CET.
299**/
300VOID
301EFIAPI
302EnableCet (
303 VOID
304 );
305
306//
307// SMM CPU Protocol function prototypes.
308//
309
310/**
311 Read information from the CPU save state.
312
313 @param This EFI_SMM_CPU_PROTOCOL instance
314 @param Width The number of bytes to read from the CPU save state.
315 @param Register Specifies the CPU register to read form the save state.
316 @param CpuIndex Specifies the zero-based index of the CPU save state
317 @param Buffer Upon return, this holds the CPU register value read from the save state.
318
319 @retval EFI_SUCCESS The register was read from Save State
320 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
321 @retval EFI_INVALID_PARAMETER This or Buffer is NULL.
322
323**/
324EFI_STATUS
325EFIAPI
326SmmReadSaveState (
327 IN CONST EFI_SMM_CPU_PROTOCOL *This,
328 IN UINTN Width,
329 IN EFI_SMM_SAVE_STATE_REGISTER Register,
330 IN UINTN CpuIndex,
331 OUT VOID *Buffer
332 );
333
334/**
335 Write data to the CPU save state.
336
337 @param This EFI_SMM_CPU_PROTOCOL instance
338 @param Width The number of bytes to read from the CPU save state.
339 @param Register Specifies the CPU register to write to the save state.
340 @param CpuIndex Specifies the zero-based index of the CPU save state
341 @param Buffer Upon entry, this holds the new CPU register value.
342
343 @retval EFI_SUCCESS The register was written from Save State
344 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
345 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct
346
347**/
348EFI_STATUS
349EFIAPI
350SmmWriteSaveState (
351 IN CONST EFI_SMM_CPU_PROTOCOL *This,
352 IN UINTN Width,
353 IN EFI_SMM_SAVE_STATE_REGISTER Register,
354 IN UINTN CpuIndex,
355 IN CONST VOID *Buffer
356 );
357
358/**
359 C function for SMI handler. To change all processor's SMMBase Register.
360
361**/
362VOID
363EFIAPI
364SmmInitHandler (
365 VOID
366 );
367
368/**
369 Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execute first SMI init.
370
371**/
372VOID
373ExecuteFirstSmiInit (
374 VOID
375 );
376
377extern BOOLEAN mSmmRelocated;
378extern volatile BOOLEAN *mSmmInitialized;
379extern UINT32 mBspApicId;
380
381extern CONST UINT8 gcSmmInitTemplate[];
382extern CONST UINT16 gcSmmInitSize;
383X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;
384extern UINT32 mSmmCr0;
385X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
386extern UINT32 mSmmCr4;
387X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
388X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
389X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;
390extern BOOLEAN mCetSupported;
391
392/**
393 Semaphore operation for all processor relocate SMMBase.
394**/
395VOID
396EFIAPI
397SmmRelocationSemaphoreComplete (
398 VOID
399 );
400
401///
402/// The type of SMM CPU Information
403///
404typedef struct {
405 SPIN_LOCK *Busy;
406 volatile EFI_AP_PROCEDURE2 Procedure;
407 volatile VOID *Parameter;
408 volatile UINT32 *Run;
409 volatile BOOLEAN *Present;
410 PROCEDURE_TOKEN *Token;
411 EFI_STATUS *Status;
412} SMM_CPU_DATA_BLOCK;
413
414typedef enum {
415 SmmCpuSyncModeTradition,
416 SmmCpuSyncModeRelaxedAp,
417 SmmCpuSyncModeMax
418} SMM_CPU_SYNC_MODE;
419
420typedef struct {
421 //
422 // Pointer to an array. The array should be located immediately after this structure
423 // so that UC cache-ability can be set together.
424 //
425 SMM_CPU_DATA_BLOCK *CpuData;
426 volatile UINT32 *Counter;
427 volatile UINT32 BspIndex;
428 volatile BOOLEAN *InsideSmm;
429 volatile BOOLEAN *AllCpusInSync;
430 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
431 volatile BOOLEAN SwitchBsp;
432 volatile BOOLEAN *CandidateBsp;
433 volatile BOOLEAN AllApArrivedWithException;
434 EFI_AP_PROCEDURE StartupProcedure;
435 VOID *StartupProcArgs;
436} SMM_DISPATCHER_MP_SYNC_DATA;
437
438#define SMM_PSD_OFFSET 0xfb00
439
440///
441/// All global semaphores' pointer
442///
443typedef struct {
444 volatile UINT32 *Counter;
445 volatile BOOLEAN *InsideSmm;
446 volatile BOOLEAN *AllCpusInSync;
447 SPIN_LOCK *PFLock;
448 SPIN_LOCK *CodeAccessCheckLock;
449} SMM_CPU_SEMAPHORE_GLOBAL;
450
451///
452/// All semaphores for each processor
453///
454typedef struct {
455 SPIN_LOCK *Busy;
456 volatile UINT32 *Run;
457 volatile BOOLEAN *Present;
458 SPIN_LOCK *Token;
459} SMM_CPU_SEMAPHORE_CPU;
460
461///
462/// All semaphores' information
463///
464typedef struct {
465 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
466 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
467} SMM_CPU_SEMAPHORES;
468
469extern IA32_DESCRIPTOR gcSmiGdtr;
470extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
471extern UINTN mGdtBufferSize;
472extern IA32_DESCRIPTOR gcSmiIdtr;
473extern VOID *gcSmiIdtrPtr;
474extern UINT64 gPhyMask;
475extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
476extern UINTN mSmmStackArrayBase;
477extern UINTN mSmmStackArrayEnd;
478extern UINTN mSmmStackSize;
479extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
480extern IA32_DESCRIPTOR gcSmiInitGdtr;
481extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
482extern UINTN mSemaphoreSize;
483extern SPIN_LOCK *mPFLock;
484extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
485extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
486extern UINTN mSmmCpuSmramRangeCount;
487extern UINT8 mPhysicalAddressBits;
488
489//
490// Copy of the PcdPteMemoryEncryptionAddressOrMask
491//
492extern UINT64 mAddressEncMask;
493
494/**
495 Create 4G PageTable in SMRAM.
496
497 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
498 @return PageTable Address
499
500**/
501UINT32
502Gen4GPageTable (
503 IN BOOLEAN Is32BitPageTable
504 );
505
506/**
507 Create page table based on input PagingMode and PhysicalAddressBits in smm.
508
509 @param[in] PagingMode The paging mode.
510 @param[in] PhysicalAddressBits The bits of physical address to map.
511
512 @retval PageTable Address
513
514**/
515UINTN
516GenSmmPageTable (
517 IN PAGING_MODE PagingMode,
518 IN UINT8 PhysicalAddressBits
519 );
520
521/**
522 Initialize global data for MP synchronization.
523
524 @param Stacks Base address of SMI stack buffer for all processors.
525 @param StackSize Stack size for each processor in SMM.
526 @param ShadowStackSize Shadow Stack size for each processor in SMM.
527
528**/
529UINT32
530InitializeMpServiceData (
531 IN VOID *Stacks,
532 IN UINTN StackSize,
533 IN UINTN ShadowStackSize
534 );
535
536/**
537 Initialize Timer for SMM AP Sync.
538
539**/
540VOID
541InitializeSmmTimer (
542 VOID
543 );
544
545/**
546 Start Timer for SMM AP Sync.
547
548**/
549UINT64
550EFIAPI
551StartSyncTimer (
552 VOID
553 );
554
555/**
556 Check if the SMM AP Sync timer is timeout.
557
558 @param Timer The start timer from the begin.
559
560**/
561BOOLEAN
562EFIAPI
563IsSyncTimerTimeout (
564 IN UINT64 Timer
565 );
566
567/**
568 Initialize IDT for SMM Stack Guard.
569
570**/
571VOID
572EFIAPI
573InitializeIDTSmmStackGuard (
574 VOID
575 );
576
577/**
578 Initialize IDT IST Field.
579
580 @param[in] ExceptionType Exception type.
581 @param[in] Ist IST value.
582
583**/
584VOID
585EFIAPI
586InitializeIdtIst (
587 IN EFI_EXCEPTION_TYPE ExceptionType,
588 IN UINT8 Ist
589 );
590
591/**
592 Initialize Gdt for all processors.
593
594 @param[in] Cr3 CR3 value.
595 @param[out] GdtStepSize The step size for GDT table.
596
597 @return GdtBase for processor 0.
598 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
599**/
600VOID *
601InitGdt (
602 IN UINTN Cr3,
603 OUT UINTN *GdtStepSize
604 );
605
606/**
607
608 Register the SMM Foundation entry point.
609
610 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
611 @param SmmEntryPoint SMM Foundation EntryPoint
612
613 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
614
615**/
616EFI_STATUS
617EFIAPI
618RegisterSmmEntry (
619 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
620 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
621 );
622
623/**
624 Create PageTable for SMM use.
625
626 @return PageTable Address
627
628**/
629UINT32
630SmmInitPageTable (
631 VOID
632 );
633
634/**
635 Schedule a procedure to run on the specified CPU.
636
637 @param Procedure The address of the procedure to run
638 @param CpuIndex Target CPU number
639 @param ProcArguments The parameter to pass to the procedure
640
641 @retval EFI_INVALID_PARAMETER CpuNumber not valid
642 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
643 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
644 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
645 @retval EFI_SUCCESS - The procedure has been successfully scheduled
646
647**/
648EFI_STATUS
649EFIAPI
650SmmStartupThisAp (
651 IN EFI_AP_PROCEDURE Procedure,
652 IN UINTN CpuIndex,
653 IN OUT VOID *ProcArguments OPTIONAL
654 );
655
656/**
657 Schedule a procedure to run on the specified CPU in a blocking fashion.
658
659 @param Procedure The address of the procedure to run
660 @param CpuIndex Target CPU Index
661 @param ProcArguments The parameter to pass to the procedure
662
663 @retval EFI_INVALID_PARAMETER CpuNumber not valid
664 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
665 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
666 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
667 @retval EFI_SUCCESS The procedure has been successfully scheduled
668
669**/
670EFI_STATUS
671EFIAPI
672SmmBlockingStartupThisAp (
673 IN EFI_AP_PROCEDURE Procedure,
674 IN UINTN CpuIndex,
675 IN OUT VOID *ProcArguments OPTIONAL
676 );
677
678/**
679 This function modifies the page attributes for the memory region specified by BaseAddress and
680 Length from their current attributes to the attributes specified by Attributes.
681
682 Caller should make sure BaseAddress and Length is at page boundary.
683
684 @param[in] PageTableBase The page table base.
685 @param[in] BaseAddress The physical address that is the start address of a memory region.
686 @param[in] Length The size in bytes of the memory region.
687 @param[in] Attributes The bit mask of attributes to modify for the memory region.
688 @param[in] IsSet TRUE means to set attributes. FALSE means to clear attributes.
689 @param[out] IsModified TRUE means page table modified. FALSE means page table not modified.
690
691 @retval RETURN_SUCCESS The attributes were modified for the memory region.
692 @retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
693 BaseAddress and Length cannot be modified.
694 @retval RETURN_INVALID_PARAMETER Length is zero.
695 Attributes specified an illegal combination of attributes that
696 cannot be set together.
697 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
698 the memory resource range.
699 @retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the memory
700 resource range specified by BaseAddress and Length.
701 The bit mask of attributes is not support for the memory resource
702 range specified by BaseAddress and Length.
703**/
704RETURN_STATUS
705ConvertMemoryPageAttributes (
706 IN UINTN PageTableBase,
707 IN PAGING_MODE PagingMode,
708 IN PHYSICAL_ADDRESS BaseAddress,
709 IN UINT64 Length,
710 IN UINT64 Attributes,
711 IN BOOLEAN IsSet,
712 OUT BOOLEAN *IsModified OPTIONAL
713 );
714
715/**
716 This function sets the attributes for the memory region specified by BaseAddress and
717 Length from their current attributes to the attributes specified by Attributes.
718
719 @param[in] BaseAddress The physical address that is the start address of a memory region.
720 @param[in] Length The size in bytes of the memory region.
721 @param[in] Attributes The bit mask of attributes to set for the memory region.
722
723 @retval EFI_SUCCESS The attributes were set for the memory region.
724 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
725 BaseAddress and Length cannot be modified.
726 @retval EFI_INVALID_PARAMETER Length is zero.
727 Attributes specified an illegal combination of attributes that
728 cannot be set together.
729 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
730 the memory resource range.
731 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
732 resource range specified by BaseAddress and Length.
733 The bit mask of attributes is not support for the memory resource
734 range specified by BaseAddress and Length.
735
736**/
737EFI_STATUS
738SmmSetMemoryAttributes (
739 IN EFI_PHYSICAL_ADDRESS BaseAddress,
740 IN UINT64 Length,
741 IN UINT64 Attributes
742 );
743
744/**
745 This function clears the attributes for the memory region specified by BaseAddress and
746 Length from their current attributes to the attributes specified by Attributes.
747
748 @param[in] BaseAddress The physical address that is the start address of a memory region.
749 @param[in] Length The size in bytes of the memory region.
750 @param[in] Attributes The bit mask of attributes to clear for the memory region.
751
752 @retval EFI_SUCCESS The attributes were cleared for the memory region.
753 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
754 BaseAddress and Length cannot be modified.
755 @retval EFI_INVALID_PARAMETER Length is zero.
756 Attributes specified an illegal combination of attributes that
757 cannot be set together.
758 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
759 the memory resource range.
760 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
761 resource range specified by BaseAddress and Length.
762 The bit mask of attributes is not support for the memory resource
763 range specified by BaseAddress and Length.
764
765**/
766EFI_STATUS
767SmmClearMemoryAttributes (
768 IN EFI_PHYSICAL_ADDRESS BaseAddress,
769 IN UINT64 Length,
770 IN UINT64 Attributes
771 );
772
773/**
774 Initialize MP synchronization data.
775
776**/
777VOID
778EFIAPI
779InitializeMpSyncData (
780 VOID
781 );
782
783/**
784
785 Find out SMRAM information including SMRR base and SMRR size.
786
787 @param SmrrBase SMRR base
788 @param SmrrSize SMRR size
789
790**/
791VOID
792FindSmramInfo (
793 OUT UINT32 *SmrrBase,
794 OUT UINT32 *SmrrSize
795 );
796
797/**
798 Relocate SmmBases for each processor.
799
800 Execute on first boot and all S3 resumes
801
802**/
803VOID
804EFIAPI
805SmmRelocateBases (
806 VOID
807 );
808
809/**
810 Page Fault handler for SMM use.
811
812 @param InterruptType Defines the type of interrupt or exception that
813 occurred on the processor.This parameter is processor architecture specific.
814 @param SystemContext A pointer to the processor context when
815 the interrupt occurred on the processor.
816**/
817VOID
818EFIAPI
819SmiPFHandler (
820 IN EFI_EXCEPTION_TYPE InterruptType,
821 IN EFI_SYSTEM_CONTEXT SystemContext
822 );
823
824/**
825 Perform the remaining tasks.
826
827**/
828VOID
829PerformRemainingTasks (
830 VOID
831 );
832
833/**
834 Perform the pre tasks.
835
836**/
837VOID
838PerformPreTasks (
839 VOID
840 );
841
842/**
843 Initialize MSR spin lock by MSR index.
844
845 @param MsrIndex MSR index value.
846
847**/
848VOID
849InitMsrSpinLockByIndex (
850 IN UINT32 MsrIndex
851 );
852
853/**
854 Hook return address of SMM Save State so that semaphore code
855 can be executed immediately after AP exits SMM to indicate to
856 the BSP that an AP has exited SMM after SMBASE relocation.
857
858 @param[in] CpuIndex The processor index.
859 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
860 immediately after AP exits SMM.
861
862**/
863VOID
864SemaphoreHook (
865 IN UINTN CpuIndex,
866 IN volatile BOOLEAN *RebasedFlag
867 );
868
869/**
870Configure SMM Code Access Check feature for all processors.
871SMM Feature Control MSR will be locked after configuration.
872**/
873VOID
874ConfigSmmCodeAccessCheck (
875 VOID
876 );
877
878/**
879 Hook the code executed immediately after an RSM instruction on the currently
880 executing CPU. The mode of code executed immediately after RSM must be
881 detected, and the appropriate hook must be selected. Always clear the auto
882 HALT restart flag if it is set.
883
884 @param[in] CpuIndex The processor index for the currently
885 executing CPU.
886 @param[in] CpuState Pointer to SMRAM Save State Map for the
887 currently executing CPU.
888 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
889 32-bit mode from 64-bit SMM.
890 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
891 same mode as SMM.
892
893 @retval The value of the original instruction pointer before it was hooked.
894
895**/
896UINT64
897EFIAPI
898HookReturnFromSmm (
899 IN UINTN CpuIndex,
900 SMRAM_SAVE_STATE_MAP *CpuState,
901 UINT64 NewInstructionPointer32,
902 UINT64 NewInstructionPointer
903 );
904
905/**
906 Get the size of the SMI Handler in bytes.
907
908 @retval The size, in bytes, of the SMI Handler.
909
910**/
911UINTN
912EFIAPI
913GetSmiHandlerSize (
914 VOID
915 );
916
917/**
918 Install the SMI handler for the CPU specified by CpuIndex. This function
919 is called by the CPU that was elected as monarch during System Management
920 Mode initialization.
921
922 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
923 The value must be between 0 and the NumberOfCpus field
924 in the System Management System Table (SMST).
925 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
926 @param[in] SmiStack The stack to use when an SMI is processed by the
927 the CPU specified by CpuIndex.
928 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
929 processed by the CPU specified by CpuIndex.
930 @param[in] GdtBase The base address of the GDT to use when an SMI is
931 processed by the CPU specified by CpuIndex.
932 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
933 processed by the CPU specified by CpuIndex.
934 @param[in] IdtBase The base address of the IDT to use when an SMI is
935 processed by the CPU specified by CpuIndex.
936 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
937 processed by the CPU specified by CpuIndex.
938 @param[in] Cr3 The base address of the page tables to use when an SMI
939 is processed by the CPU specified by CpuIndex.
940**/
941VOID
942EFIAPI
943InstallSmiHandler (
944 IN UINTN CpuIndex,
945 IN UINT32 SmBase,
946 IN VOID *SmiStack,
947 IN UINTN StackSize,
948 IN UINTN GdtBase,
949 IN UINTN GdtSize,
950 IN UINTN IdtBase,
951 IN UINTN IdtSize,
952 IN UINT32 Cr3
953 );
954
955/**
956 Search module name by input IP address and output it.
957
958 @param CallerIpAddress Caller instruction pointer.
959
960**/
961VOID
962DumpModuleInfoByIp (
963 IN UINTN CallerIpAddress
964 );
965
966/**
967 This function sets memory attribute according to MemoryAttributesTable.
968**/
969VOID
970SetMemMapAttributes (
971 VOID
972 );
973
974/**
975 This function sets UEFI memory attribute according to UEFI memory map.
976**/
977VOID
978SetUefiMemMapAttributes (
979 VOID
980 );
981
982/**
983 Return if the Address is forbidden as SMM communication buffer.
984
985 @param[in] Address the address to be checked
986
987 @return TRUE The address is forbidden as SMM communication buffer.
988 @return FALSE The address is allowed as SMM communication buffer.
989**/
990BOOLEAN
991IsSmmCommBufferForbiddenAddress (
992 IN UINT64 Address
993 );
994
995/**
996 This function caches the UEFI memory map information.
997**/
998VOID
999GetUefiMemoryMap (
1000 VOID
1001 );
1002
1003/**
1004 This function sets memory attribute for page table.
1005**/
1006VOID
1007SetPageTableAttributes (
1008 VOID
1009 );
1010
1011/**
1012 This function sets the attributes for the memory region specified by BaseAddress and
1013 Length from their current attributes to the attributes specified by Attributes.
1014
1015 @param[in] PageTableBase The page table base.
1016 @param[in] PagingMode The paging mode.
1017 @param[in] BaseAddress The physical address that is the start address of a memory region.
1018 @param[in] Length The size in bytes of the memory region.
1019 @param[in] Attributes The bit mask of attributes to set for the memory region.
1020
1021 @retval EFI_SUCCESS The attributes were set for the memory region.
1022 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
1023 BaseAddress and Length cannot be modified.
1024 @retval EFI_INVALID_PARAMETER Length is zero.
1025 Attributes specified an illegal combination of attributes that
1026 cannot be set together.
1027 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
1028 the memory resource range.
1029 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
1030 resource range specified by BaseAddress and Length.
1031 The bit mask of attributes is not support for the memory resource
1032 range specified by BaseAddress and Length.
1033
1034**/
1035EFI_STATUS
1036SmmSetMemoryAttributesEx (
1037 IN UINTN PageTableBase,
1038 IN PAGING_MODE PagingMode,
1039 IN PHYSICAL_ADDRESS BaseAddress,
1040 IN UINT64 Length,
1041 IN UINT64 Attributes
1042 );
1043
1044/**
1045 This function clears the attributes for the memory region specified by BaseAddress and
1046 Length from their current attributes to the attributes specified by Attributes.
1047
1048 @param[in] PageTableBase The page table base.
1049 @param[in] PagingMode The paging mode.
1050 @param[in] BaseAddress The physical address that is the start address of a memory region.
1051 @param[in] Length The size in bytes of the memory region.
1052 @param[in] Attributes The bit mask of attributes to clear for the memory region.
1053
1054 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1055 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
1056 BaseAddress and Length cannot be modified.
1057 @retval EFI_INVALID_PARAMETER Length is zero.
1058 Attributes specified an illegal combination of attributes that
1059 cannot be cleared together.
1060 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
1061 the memory resource range.
1062 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
1063 resource range specified by BaseAddress and Length.
1064 The bit mask of attributes is not supported for the memory resource
1065 range specified by BaseAddress and Length.
1066
1067**/
1068EFI_STATUS
1069SmmClearMemoryAttributesEx (
1070 IN UINTN PageTableBase,
1071 IN PAGING_MODE PagingMode,
1072 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1073 IN UINT64 Length,
1074 IN UINT64 Attributes
1075 );
1076
1077/**
1078 This API provides a way to allocate memory for page table.
1079
1080 This API can be called more once to allocate memory for page tables.
1081
1082 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
1083 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
1084 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
1085 returned.
1086
1087 @param Pages The number of 4 KB pages to allocate.
1088
1089 @return A pointer to the allocated buffer or NULL if allocation fails.
1090
1091**/
1092VOID *
1093AllocatePageTableMemory (
1094 IN UINTN Pages
1095 );
1096
1097/**
1098 Allocate pages for code.
1099
1100 @param[in] Pages Number of pages to be allocated.
1101
1102 @return Allocated memory.
1103**/
1104VOID *
1105AllocateCodePages (
1106 IN UINTN Pages
1107 );
1108
1109/**
1110 Allocate aligned pages for code.
1111
1112 @param[in] Pages Number of pages to be allocated.
1113 @param[in] Alignment The requested alignment of the allocation.
1114 Must be a power of two.
1115 If Alignment is zero, then byte alignment is used.
1116
1117 @return Allocated memory.
1118**/
1119VOID *
1120AllocateAlignedCodePages (
1121 IN UINTN Pages,
1122 IN UINTN Alignment
1123 );
1124
1125//
1126// S3 related global variable and function prototype.
1127//
1128
1129extern BOOLEAN mSmmS3Flag;
1130
1131/**
1132 Initialize SMM S3 resume state structure used during S3 Resume.
1133
1134 @param[in] Cr3 The base address of the page tables to use in SMM.
1135
1136**/
1137VOID
1138InitSmmS3ResumeState (
1139 IN UINT32 Cr3
1140 );
1141
1142/**
1143 Get ACPI CPU data.
1144
1145**/
1146VOID
1147GetAcpiCpuData (
1148 VOID
1149 );
1150
1151/**
1152 Restore SMM Configuration in S3 boot path.
1153
1154**/
1155VOID
1156RestoreSmmConfigurationInS3 (
1157 VOID
1158 );
1159
1160/**
1161 Get ACPI S3 enable flag.
1162
1163**/
1164VOID
1165GetAcpiS3EnableFlag (
1166 VOID
1167 );
1168
1169/**
1170 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1171
1172 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1173 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1174 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1175
1176**/
1177VOID
1178TransferApToSafeState (
1179 IN UINTN ApHltLoopCode,
1180 IN UINTN TopOfStack,
1181 IN UINTN NumberToFinishAddress
1182 );
1183
1184/**
1185 Set ShadowStack memory.
1186
1187 @param[in] Cr3 The page table base address.
1188 @param[in] BaseAddress The physical address that is the start address of a memory region.
1189 @param[in] Length The size in bytes of the memory region.
1190
1191 @retval EFI_SUCCESS The shadow stack memory is set.
1192**/
1193EFI_STATUS
1194SetShadowStack (
1195 IN UINTN Cr3,
1196 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1197 IN UINT64 Length
1198 );
1199
1200/**
1201 Initialize the shadow stack related data structure.
1202
1203 @param CpuIndex The index of CPU.
1204 @param ShadowStack The bottom of the shadow stack for this CPU.
1205**/
1206VOID
1207InitShadowStack (
1208 IN UINTN CpuIndex,
1209 IN VOID *ShadowStack
1210 );
1211
1212/**
1213 This function set given attributes of the memory region specified by
1214 BaseAddress and Length.
1215
1216 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1217 @param BaseAddress The physical address that is the start address of
1218 a memory region.
1219 @param Length The size in bytes of the memory region.
1220 @param Attributes The bit mask of attributes to set for the memory
1221 region.
1222
1223 @retval EFI_SUCCESS The attributes were set for the memory region.
1224 @retval EFI_INVALID_PARAMETER Length is zero.
1225 Attributes specified an illegal combination of
1226 attributes that cannot be set together.
1227 @retval EFI_UNSUPPORTED The processor does not support one or more
1228 bytes of the memory resource range specified
1229 by BaseAddress and Length.
1230 The bit mask of attributes is not supported for
1231 the memory resource range specified by
1232 BaseAddress and Length.
1233
1234**/
1235EFI_STATUS
1236EFIAPI
1237EdkiiSmmSetMemoryAttributes (
1238 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1239 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1240 IN UINT64 Length,
1241 IN UINT64 Attributes
1242 );
1243
1244/**
1245 This function clears given attributes of the memory region specified by
1246 BaseAddress and Length.
1247
1248 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1249 @param BaseAddress The physical address that is the start address of
1250 a memory region.
1251 @param Length The size in bytes of the memory region.
1252 @param Attributes The bit mask of attributes to clear for the memory
1253 region.
1254
1255 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1256 @retval EFI_INVALID_PARAMETER Length is zero.
1257 Attributes specified an illegal combination of
1258 attributes that cannot be cleared together.
1259 @retval EFI_UNSUPPORTED The processor does not support one or more
1260 bytes of the memory resource range specified
1261 by BaseAddress and Length.
1262 The bit mask of attributes is not supported for
1263 the memory resource range specified by
1264 BaseAddress and Length.
1265
1266**/
1267EFI_STATUS
1268EFIAPI
1269EdkiiSmmClearMemoryAttributes (
1270 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1271 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1272 IN UINT64 Length,
1273 IN UINT64 Attributes
1274 );
1275
1276/**
1277 This function retrieves the attributes of the memory region specified by
1278 BaseAddress and Length. If different attributes are got from different part
1279 of the memory region, EFI_NO_MAPPING will be returned.
1280
1281 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1282 @param BaseAddress The physical address that is the start address of
1283 a memory region.
1284 @param Length The size in bytes of the memory region.
1285 @param Attributes Pointer to attributes returned.
1286
1287 @retval EFI_SUCCESS The attributes got for the memory region.
1288 @retval EFI_INVALID_PARAMETER Length is zero.
1289 Attributes is NULL.
1290 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1291 region.
1292 @retval EFI_UNSUPPORTED The processor does not support one or more
1293 bytes of the memory resource range specified
1294 by BaseAddress and Length.
1295
1296**/
1297EFI_STATUS
1298EFIAPI
1299EdkiiSmmGetMemoryAttributes (
1300 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1301 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1302 IN UINT64 Length,
1303 IN UINT64 *Attributes
1304 );
1305
1306/**
1307 This function fixes up the address of the global variable or function
1308 referred in SmmInit assembly files to be the absolute address.
1309**/
1310VOID
1311EFIAPI
1312PiSmmCpuSmmInitFixupAddress (
1313 );
1314
1315/**
1316 This function fixes up the address of the global variable or function
1317 referred in SmiEntry assembly files to be the absolute address.
1318**/
1319VOID
1320EFIAPI
1321PiSmmCpuSmiEntryFixupAddress (
1322 );
1323
1324/**
1325 This function reads CR2 register when on-demand paging is enabled
1326 for 64 bit and no action for 32 bit.
1327
1328 @param[out] *Cr2 Pointer to variable to hold CR2 register value.
1329**/
1330VOID
1331SaveCr2 (
1332 OUT UINTN *Cr2
1333 );
1334
1335/**
1336 This function writes into CR2 register when on-demand paging is enabled
1337 for 64 bit and no action for 32 bit.
1338
1339 @param[in] Cr2 Value to write into CR2 register.
1340**/
1341VOID
1342RestoreCr2 (
1343 IN UINTN Cr2
1344 );
1345
1346/**
1347 Schedule a procedure to run on the specified CPU.
1348
1349 @param[in] Procedure The address of the procedure to run
1350 @param[in] CpuIndex Target CPU Index
1351 @param[in,out] ProcArguments The parameter to pass to the procedure
1352 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1353 procedure in a blocking or non-blocking fashion. If it is NULL the
1354 call is blocking, and the call will not return until the AP has
1355 completed the procedure. If the token is not NULL, the call will
1356 return immediately. The caller can check whether the procedure has
1357 completed with CheckOnProcedure or WaitForProcedure.
1358 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish
1359 execution of Procedure, either for blocking or non-blocking mode.
1360 Zero means infinity. If the timeout expires before all APs return
1361 from Procedure, then Procedure on the failed APs is terminated. If
1362 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.
1363 If the timeout expires in non-blocking mode, the timeout determined
1364 can be through CheckOnProcedure or WaitForProcedure.
1365 Note that timeout support is optional. Whether an implementation
1366 supports this feature can be determined via the Attributes data
1367 member.
1368 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned
1369 by Procedure when it completes execution on the target AP, or with
1370 EFI_TIMEOUT if the Procedure fails to complete within the optional
1371 timeout. The implementation will update this variable with
1372 EFI_NOT_READY prior to starting Procedure on the target AP.
1373
1374 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1375 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1376 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1377 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1378 @retval EFI_SUCCESS The procedure has been successfully scheduled
1379
1380**/
1381EFI_STATUS
1382InternalSmmStartupThisAp (
1383 IN EFI_AP_PROCEDURE2 Procedure,
1384 IN UINTN CpuIndex,
1385 IN OUT VOID *ProcArguments OPTIONAL,
1386 IN OUT MM_COMPLETION *Token,
1387 IN UINTN TimeoutInMicroseconds,
1388 IN OUT EFI_STATUS *CpuStatus
1389 );
1390
1391/**
1392 Checks whether the input token is the current used token.
1393
1394 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1395 BroadcastProcedure.
1396
1397 @retval TRUE The input token is the current used token.
1398 @retval FALSE The input token is not the current used token.
1399**/
1400BOOLEAN
1401IsTokenInUse (
1402 IN SPIN_LOCK *Token
1403 );
1404
1405/**
1406 Checks status of specified AP.
1407
1408 This function checks whether the specified AP has finished the task assigned
1409 by StartupThisAP(), and whether timeout expires.
1410
1411 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1412 BroadcastProcedure.
1413
1414 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().
1415 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.
1416**/
1417EFI_STATUS
1418IsApReady (
1419 IN SPIN_LOCK *Token
1420 );
1421
1422/**
1423 Check whether it is an present AP.
1424
1425 @param CpuIndex The AP index which calls this function.
1426
1427 @retval TRUE It's a present AP.
1428 @retval TRUE This is not an AP or it is not present.
1429
1430**/
1431BOOLEAN
1432IsPresentAp (
1433 IN UINTN CpuIndex
1434 );
1435
1436/**
1437 Worker function to execute a caller provided function on all enabled APs.
1438
1439 @param[in] Procedure A pointer to the function to be run on
1440 enabled APs of the system.
1441 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
1442 APs to return from Procedure, either for
1443 blocking or non-blocking mode.
1444 @param[in,out] ProcedureArguments The parameter passed into Procedure for
1445 all APs.
1446 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1447 procedure in a blocking or non-blocking fashion. If it is NULL the
1448 call is blocking, and the call will not return until the AP has
1449 completed the procedure. If the token is not NULL, the call will
1450 return immediately. The caller can check whether the procedure has
1451 completed with CheckOnProcedure or WaitForProcedure.
1452 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned
1453 by Procedure when it completes execution on the target AP, or with
1454 EFI_TIMEOUT if the Procedure fails to complete within the optional
1455 timeout. The implementation will update this variable with
1456 EFI_NOT_READY prior to starting Procedure on the target AP.
1457
1458 @retval EFI_SUCCESS In blocking mode, all APs have finished before
1459 the timeout expired.
1460 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
1461 to all enabled APs.
1462 @retval others Failed to Startup all APs.
1463
1464**/
1465EFI_STATUS
1466InternalSmmStartupAllAPs (
1467 IN EFI_AP_PROCEDURE2 Procedure,
1468 IN UINTN TimeoutInMicroseconds,
1469 IN OUT VOID *ProcedureArguments OPTIONAL,
1470 IN OUT MM_COMPLETION *Token,
1471 IN OUT EFI_STATUS *CPUStatus
1472 );
1473
1474/**
1475
1476 Register the SMM Foundation entry point.
1477
1478 @param[in] Procedure A pointer to the code stream to be run on the designated target AP
1479 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2
1480 with the related definitions of
1481 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.
1482 If caller may pass a value of NULL to deregister any existing
1483 startup procedure.
1484 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is
1485 run by the AP. It is an optional common mailbox between APs and
1486 the caller to share information
1487
1488 @retval EFI_SUCCESS The Procedure has been set successfully.
1489 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.
1490
1491**/
1492EFI_STATUS
1493RegisterStartupProcedure (
1494 IN EFI_AP_PROCEDURE Procedure,
1495 IN OUT VOID *ProcedureArguments OPTIONAL
1496 );
1497
1498/**
1499 Initialize PackageBsp Info. Processor specified by mPackageFirstThreadIndex[PackageIndex]
1500 will do the package-scope register programming. Set default CpuIndex to (UINT32)-1, which
1501 means not specified yet.
1502
1503**/
1504VOID
1505InitPackageFirstThreadIndexInfo (
1506 VOID
1507 );
1508
1509/**
1510 Allocate buffer for SpinLock and Wrapper function buffer.
1511
1512**/
1513VOID
1514InitializeDataForMmMp (
1515 VOID
1516 );
1517
1518/**
1519 Return whether access to non-SMRAM is restricted.
1520
1521 @retval TRUE Access to non-SMRAM is restricted.
1522 @retval FALSE Access to non-SMRAM is not restricted.
1523**/
1524BOOLEAN
1525IsRestrictedMemoryAccess (
1526 VOID
1527 );
1528
1529/**
1530 Choose blocking or non-blocking mode to Wait for all APs.
1531
1532 @param[in] This A pointer to the EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL instance.
1533 @param[in] BlockingMode Blocking or non-blocking mode.
1534
1535 @retval EFI_SUCCESS All APs have arrived SMM mode except SMI disabled APs.
1536 @retval EFI_TIMEOUT There are APs not in SMM mode in given timeout constraint.
1537
1538**/
1539EFI_STATUS
1540EFIAPI
1541SmmCpuRendezvous (
1542 IN EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL *This,
1543 IN BOOLEAN BlockingMode
1544 );
1545
1546/**
1547 Insure when this function returns, no AP will execute normal mode code before entering SMM, except SMI disabled APs.
1548
1549**/
1550VOID
1551SmmWaitForApArrival (
1552 VOID
1553 );
1554
1555/**
1556 Disable Write Protect on pages marked as read-only if Cr0.Bits.WP is 1.
1557
1558 @param[out] WpEnabled If Cr0.WP is enabled.
1559 @param[out] CetEnabled If CET is enabled.
1560**/
1561VOID
1562DisableReadOnlyPageWriteProtect (
1563 OUT BOOLEAN *WpEnabled,
1564 OUT BOOLEAN *CetEnabled
1565 );
1566
1567/**
1568 Enable Write Protect on pages marked as read-only.
1569
1570 @param[out] WpEnabled If Cr0.WP should be enabled.
1571 @param[out] CetEnabled If CET should be enabled.
1572**/
1573VOID
1574EnableReadOnlyPageWriteProtect (
1575 BOOLEAN WpEnabled,
1576 BOOLEAN CetEnabled
1577 );
1578
1579#endif
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