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source: vbox/trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h@ 99404

Last change on this file since 99404 was 99404, checked in by vboxsync, 22 months ago

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1/** @file
2Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>
5Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7SPDX-License-Identifier: BSD-2-Clause-Patent
8
9**/
10
11#ifndef _CPU_PISMMCPUDXESMM_H_
12#define _CPU_PISMMCPUDXESMM_H_
13
14#include <PiSmm.h>
15
16#include <Protocol/MpService.h>
17#include <Protocol/SmmConfiguration.h>
18#include <Protocol/SmmCpu.h>
19#include <Protocol/SmmAccess2.h>
20#include <Protocol/SmmReadyToLock.h>
21#include <Protocol/SmmCpuService.h>
22#include <Protocol/SmmMemoryAttribute.h>
23#include <Protocol/MmMp.h>
24
25#include <Guid/AcpiS3Context.h>
26#include <Guid/MemoryAttributesTable.h>
27#include <Guid/PiSmmMemoryAttributesTable.h>
28
29#include <Library/BaseLib.h>
30#include <Library/IoLib.h>
31#include <Library/TimerLib.h>
32#include <Library/SynchronizationLib.h>
33#include <Library/DebugLib.h>
34#include <Library/BaseMemoryLib.h>
35#include <Library/PcdLib.h>
36#include <Library/MtrrLib.h>
37#include <Library/SmmCpuPlatformHookLib.h>
38#include <Library/SmmServicesTableLib.h>
39#include <Library/MemoryAllocationLib.h>
40#include <Library/UefiBootServicesTableLib.h>
41#include <Library/UefiRuntimeServicesTableLib.h>
42#include <Library/DebugAgentLib.h>
43#include <Library/UefiLib.h>
44#include <Library/HobLib.h>
45#include <Library/LocalApicLib.h>
46#include <Library/CpuLib.h>
47#include <Library/UefiCpuLib.h>
48#include <Library/CpuExceptionHandlerLib.h>
49#include <Library/ReportStatusCodeLib.h>
50#include <Library/SmmCpuFeaturesLib.h>
51#include <Library/PeCoffGetEntryPointLib.h>
52#include <Library/RegisterCpuFeaturesLib.h>
53
54#include <AcpiCpuData.h>
55#include <CpuHotPlugData.h>
56
57#include <Register/Intel/Cpuid.h>
58#include <Register/Intel/Msr.h>
59
60#include "CpuService.h"
61#include "SmmProfile.h"
62
63//
64// CET definition
65//
66#define CPUID_CET_SS BIT7
67#define CPUID_CET_IBT BIT20
68
69#define CR4_CET_ENABLE BIT23
70
71#define MSR_IA32_S_CET 0x6A2
72#define MSR_IA32_PL0_SSP 0x6A4
73#define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
74
75typedef union {
76 struct {
77 // enable shadow stacks
78 UINT32 SH_STK_ENP : 1;
79 // enable the WRSS{D,Q}W instructions.
80 UINT32 WR_SHSTK_EN : 1;
81 // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
82 UINT32 ENDBR_EN : 1;
83 // enable legacy compatibility treatment for indirect call/jmp tracking.
84 UINT32 LEG_IW_EN : 1;
85 // enable use of no-track prefix on indirect call/jmp.
86 UINT32 NO_TRACK_EN : 1;
87 // disable suppression of CET indirect branch tracking on legacy compatibility.
88 UINT32 SUPPRESS_DIS : 1;
89 UINT32 RSVD : 4;
90 // indirect branch tracking is suppressed.
91 // This bit can be written to 1 only if TRACKER is written as IDLE.
92 UINT32 SUPPRESS : 1;
93 // Value of the endbranch state machine
94 // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
95 UINT32 TRACKER : 1;
96 // linear address of a bitmap in memory indicating valid
97 // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
98 // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
99 // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
100 // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
101 // (this automatically aligns the address on a 4-Kbyte boundary).
102 UINT32 EB_LEG_BITMAP_BASE_low : 12;
103 UINT32 EB_LEG_BITMAP_BASE_high : 32;
104 } Bits;
105 UINT64 Uint64;
106} MSR_IA32_CET;
107
108//
109// MSRs required for configuration of SMM Code Access Check
110//
111#define EFI_MSR_SMM_MCA_CAP 0x17D
112#define SMM_CODE_ACCESS_CHK_BIT BIT58
113
114#define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
115#define SMM_CODE_CHK_EN_BIT BIT2
116
117///
118/// Page Table Entry
119///
120#define IA32_PG_P BIT0
121#define IA32_PG_RW BIT1
122#define IA32_PG_U BIT2
123#define IA32_PG_WT BIT3
124#define IA32_PG_CD BIT4
125#define IA32_PG_A BIT5
126#define IA32_PG_D BIT6
127#define IA32_PG_PS BIT7
128#define IA32_PG_PAT_2M BIT12
129#define IA32_PG_PAT_4K IA32_PG_PS
130#define IA32_PG_PMNT BIT62
131#define IA32_PG_NX BIT63
132
133#define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
134//
135// Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
136// X64 PAE PDPTE does not have such restriction
137//
138#define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
139
140#define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
141
142#define PAGING_4K_MASK 0xFFF
143#define PAGING_2M_MASK 0x1FFFFF
144#define PAGING_1G_MASK 0x3FFFFFFF
145
146#define PAGING_PAE_INDEX_MASK 0x1FF
147
148#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
149#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
150#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
151
152#define SMRR_MAX_ADDRESS BASE_4GB
153
154typedef enum {
155 PageNone,
156 Page4K,
157 Page2M,
158 Page1G,
159} PAGE_ATTRIBUTE;
160
161typedef struct {
162 PAGE_ATTRIBUTE Attribute;
163 UINT64 Length;
164 UINT64 AddressMask;
165} PAGE_ATTRIBUTE_TABLE;
166
167//
168// Size of Task-State Segment defined in IA32 Manual
169//
170#define TSS_SIZE 104
171#define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP
172#define TSS_X64_IST1_OFFSET 36
173#define TSS_IA32_CR3_OFFSET 28
174#define TSS_IA32_ESP_OFFSET 56
175#define TSS_IA32_SSP_OFFSET 104
176
177#define CR0_WP BIT16
178
179//
180// Code select value
181//
182#define PROTECT_MODE_CODE_SEGMENT 0x08
183#define LONG_MODE_CODE_SEGMENT 0x38
184
185//
186// The size 0x20 must be bigger than
187// the size of template code of SmmInit. Currently,
188// the size of SmmInit requires the 0x16 Bytes buffer
189// at least.
190//
191#define BACK_BUF_SIZE 0x20
192
193#define EXCEPTION_VECTOR_NUMBER 0x20
194
195#define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
196
197//
198// Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.
199//
200typedef struct {
201 EFI_AP_PROCEDURE Procedure;
202 VOID *ProcedureArgument;
203} PROCEDURE_WRAPPER;
204
205#define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')
206
207typedef struct {
208 UINTN Signature;
209 LIST_ENTRY Link;
210
211 SPIN_LOCK *SpinLock;
212 volatile UINT32 RunningApCount;
213} PROCEDURE_TOKEN;
214
215#define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)
216
217#define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')
218
219typedef struct {
220 UINTN Signature;
221 LIST_ENTRY Link;
222
223 UINT8 *Buffer;
224} TOKEN_BUFFER;
225
226#define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)
227
228//
229// Private structure for the SMM CPU module that is stored in DXE Runtime memory
230// Contains the SMM Configuration Protocols that is produced.
231// Contains a mix of DXE and SMM contents. All the fields must be used properly.
232//
233#define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
234
235typedef struct {
236 UINTN Signature;
237
238 EFI_HANDLE SmmCpuHandle;
239
240 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
241 SMM_CPU_OPERATION *Operation;
242 UINTN *CpuSaveStateSize;
243 VOID **CpuSaveState;
244
245 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
246 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
247 EFI_SMM_ENTRY_POINT SmmCoreEntry;
248
249 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
250
251 PROCEDURE_WRAPPER *ApWrapperFunc;
252 LIST_ENTRY TokenList;
253 LIST_ENTRY *FirstFreeToken;
254} SMM_CPU_PRIVATE_DATA;
255
256extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
257extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
258extern UINTN mMaxNumberOfCpus;
259extern UINTN mNumberOfCpus;
260extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
261extern EFI_MM_MP_PROTOCOL mSmmMp;
262extern BOOLEAN m5LevelPagingNeeded;
263
264///
265/// The mode of the CPU at the time an SMI occurs
266///
267extern UINT8 mSmmSaveStateRegisterLma;
268
269#define PAGE_TABLE_POOL_ALIGNMENT BASE_128KB
270#define PAGE_TABLE_POOL_UNIT_SIZE BASE_128KB
271#define PAGE_TABLE_POOL_UNIT_PAGES EFI_SIZE_TO_PAGES (PAGE_TABLE_POOL_UNIT_SIZE)
272#define PAGE_TABLE_POOL_ALIGN_MASK \
273 (~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
274
275typedef struct {
276 VOID *NextPool;
277 UINTN Offset;
278 UINTN FreePages;
279} PAGE_TABLE_POOL;
280
281/**
282 Disable CET.
283**/
284VOID
285EFIAPI
286DisableCet (
287 VOID
288 );
289
290/**
291 Enable CET.
292**/
293VOID
294EFIAPI
295EnableCet (
296 VOID
297 );
298
299//
300// SMM CPU Protocol function prototypes.
301//
302
303/**
304 Read information from the CPU save state.
305
306 @param This EFI_SMM_CPU_PROTOCOL instance
307 @param Width The number of bytes to read from the CPU save state.
308 @param Register Specifies the CPU register to read form the save state.
309 @param CpuIndex Specifies the zero-based index of the CPU save state
310 @param Buffer Upon return, this holds the CPU register value read from the save state.
311
312 @retval EFI_SUCCESS The register was read from Save State
313 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
314 @retval EFI_INVALID_PARAMETER This or Buffer is NULL.
315
316**/
317EFI_STATUS
318EFIAPI
319SmmReadSaveState (
320 IN CONST EFI_SMM_CPU_PROTOCOL *This,
321 IN UINTN Width,
322 IN EFI_SMM_SAVE_STATE_REGISTER Register,
323 IN UINTN CpuIndex,
324 OUT VOID *Buffer
325 );
326
327/**
328 Write data to the CPU save state.
329
330 @param This EFI_SMM_CPU_PROTOCOL instance
331 @param Width The number of bytes to read from the CPU save state.
332 @param Register Specifies the CPU register to write to the save state.
333 @param CpuIndex Specifies the zero-based index of the CPU save state
334 @param Buffer Upon entry, this holds the new CPU register value.
335
336 @retval EFI_SUCCESS The register was written from Save State
337 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
338 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct
339
340**/
341EFI_STATUS
342EFIAPI
343SmmWriteSaveState (
344 IN CONST EFI_SMM_CPU_PROTOCOL *This,
345 IN UINTN Width,
346 IN EFI_SMM_SAVE_STATE_REGISTER Register,
347 IN UINTN CpuIndex,
348 IN CONST VOID *Buffer
349 );
350
351/**
352Read a CPU Save State register on the target processor.
353
354This function abstracts the differences that whether the CPU Save State register is in the
355IA32 CPU Save State Map or X64 CPU Save State Map.
356
357This function supports reading a CPU Save State register in SMBase relocation handler.
358
359@param[in] CpuIndex Specifies the zero-based index of the CPU save state.
360@param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
361@param[in] Width The number of bytes to read from the CPU save state.
362@param[out] Buffer Upon return, this holds the CPU register value read from the save state.
363
364@retval EFI_SUCCESS The register was read from Save State.
365@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
366@retval EFI_INVALID_PARAMETER Buffer is NULL, or Width does not meet requirement per Register type.
367
368**/
369EFI_STATUS
370EFIAPI
371ReadSaveStateRegister (
372 IN UINTN CpuIndex,
373 IN EFI_SMM_SAVE_STATE_REGISTER Register,
374 IN UINTN Width,
375 OUT VOID *Buffer
376 );
377
378/**
379Write value to a CPU Save State register on the target processor.
380
381This function abstracts the differences that whether the CPU Save State register is in the
382IA32 CPU Save State Map or X64 CPU Save State Map.
383
384This function supports writing a CPU Save State register in SMBase relocation handler.
385
386@param[in] CpuIndex Specifies the zero-based index of the CPU save state.
387@param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
388@param[in] Width The number of bytes to read from the CPU save state.
389@param[in] Buffer Upon entry, this holds the new CPU register value.
390
391@retval EFI_SUCCESS The register was written to Save State.
392@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
393@retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.
394
395**/
396EFI_STATUS
397EFIAPI
398WriteSaveStateRegister (
399 IN UINTN CpuIndex,
400 IN EFI_SMM_SAVE_STATE_REGISTER Register,
401 IN UINTN Width,
402 IN CONST VOID *Buffer
403 );
404
405extern CONST UINT8 gcSmmInitTemplate[];
406extern CONST UINT16 gcSmmInitSize;
407X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;
408extern UINT32 mSmmCr0;
409X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
410extern UINT32 mSmmCr4;
411X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
412X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
413X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;
414extern BOOLEAN mCetSupported;
415
416/**
417 Semaphore operation for all processor relocate SMMBase.
418**/
419VOID
420EFIAPI
421SmmRelocationSemaphoreComplete (
422 VOID
423 );
424
425///
426/// The type of SMM CPU Information
427///
428typedef struct {
429 SPIN_LOCK *Busy;
430 volatile EFI_AP_PROCEDURE2 Procedure;
431 volatile VOID *Parameter;
432 volatile UINT32 *Run;
433 volatile BOOLEAN *Present;
434 PROCEDURE_TOKEN *Token;
435 EFI_STATUS *Status;
436} SMM_CPU_DATA_BLOCK;
437
438typedef enum {
439 SmmCpuSyncModeTradition,
440 SmmCpuSyncModeRelaxedAp,
441 SmmCpuSyncModeMax
442} SMM_CPU_SYNC_MODE;
443
444typedef struct {
445 //
446 // Pointer to an array. The array should be located immediately after this structure
447 // so that UC cache-ability can be set together.
448 //
449 SMM_CPU_DATA_BLOCK *CpuData;
450 volatile UINT32 *Counter;
451 volatile UINT32 BspIndex;
452 volatile BOOLEAN *InsideSmm;
453 volatile BOOLEAN *AllCpusInSync;
454 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
455 volatile BOOLEAN SwitchBsp;
456 volatile BOOLEAN *CandidateBsp;
457 volatile BOOLEAN AllApArrivedWithException;
458 EFI_AP_PROCEDURE StartupProcedure;
459 VOID *StartupProcArgs;
460} SMM_DISPATCHER_MP_SYNC_DATA;
461
462#define SMM_PSD_OFFSET 0xfb00
463
464///
465/// All global semaphores' pointer
466///
467typedef struct {
468 volatile UINT32 *Counter;
469 volatile BOOLEAN *InsideSmm;
470 volatile BOOLEAN *AllCpusInSync;
471 SPIN_LOCK *PFLock;
472 SPIN_LOCK *CodeAccessCheckLock;
473} SMM_CPU_SEMAPHORE_GLOBAL;
474
475///
476/// All semaphores for each processor
477///
478typedef struct {
479 SPIN_LOCK *Busy;
480 volatile UINT32 *Run;
481 volatile BOOLEAN *Present;
482 SPIN_LOCK *Token;
483} SMM_CPU_SEMAPHORE_CPU;
484
485///
486/// All semaphores' information
487///
488typedef struct {
489 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
490 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
491} SMM_CPU_SEMAPHORES;
492
493extern IA32_DESCRIPTOR gcSmiGdtr;
494extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
495extern UINTN mGdtBufferSize;
496extern IA32_DESCRIPTOR gcSmiIdtr;
497extern VOID *gcSmiIdtrPtr;
498extern UINT64 gPhyMask;
499extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
500extern UINTN mSmmStackArrayBase;
501extern UINTN mSmmStackArrayEnd;
502extern UINTN mSmmStackSize;
503extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
504extern IA32_DESCRIPTOR gcSmiInitGdtr;
505extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
506extern UINTN mSemaphoreSize;
507extern SPIN_LOCK *mPFLock;
508extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
509extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
510extern UINTN mSmmCpuSmramRangeCount;
511extern UINT8 mPhysicalAddressBits;
512
513//
514// Copy of the PcdPteMemoryEncryptionAddressOrMask
515//
516extern UINT64 mAddressEncMask;
517
518/**
519 Create 4G PageTable in SMRAM.
520
521 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
522 @return PageTable Address
523
524**/
525UINT32
526Gen4GPageTable (
527 IN BOOLEAN Is32BitPageTable
528 );
529
530/**
531 Initialize global data for MP synchronization.
532
533 @param Stacks Base address of SMI stack buffer for all processors.
534 @param StackSize Stack size for each processor in SMM.
535 @param ShadowStackSize Shadow Stack size for each processor in SMM.
536
537**/
538UINT32
539InitializeMpServiceData (
540 IN VOID *Stacks,
541 IN UINTN StackSize,
542 IN UINTN ShadowStackSize
543 );
544
545/**
546 Initialize Timer for SMM AP Sync.
547
548**/
549VOID
550InitializeSmmTimer (
551 VOID
552 );
553
554/**
555 Start Timer for SMM AP Sync.
556
557**/
558UINT64
559EFIAPI
560StartSyncTimer (
561 VOID
562 );
563
564/**
565 Check if the SMM AP Sync timer is timeout.
566
567 @param Timer The start timer from the begin.
568
569**/
570BOOLEAN
571EFIAPI
572IsSyncTimerTimeout (
573 IN UINT64 Timer
574 );
575
576/**
577 Initialize IDT for SMM Stack Guard.
578
579**/
580VOID
581EFIAPI
582InitializeIDTSmmStackGuard (
583 VOID
584 );
585
586/**
587 Initialize IDT IST Field.
588
589 @param[in] ExceptionType Exception type.
590 @param[in] Ist IST value.
591
592**/
593VOID
594EFIAPI
595InitializeIdtIst (
596 IN EFI_EXCEPTION_TYPE ExceptionType,
597 IN UINT8 Ist
598 );
599
600/**
601 Initialize Gdt for all processors.
602
603 @param[in] Cr3 CR3 value.
604 @param[out] GdtStepSize The step size for GDT table.
605
606 @return GdtBase for processor 0.
607 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
608**/
609VOID *
610InitGdt (
611 IN UINTN Cr3,
612 OUT UINTN *GdtStepSize
613 );
614
615/**
616
617 Register the SMM Foundation entry point.
618
619 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
620 @param SmmEntryPoint SMM Foundation EntryPoint
621
622 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
623
624**/
625EFI_STATUS
626EFIAPI
627RegisterSmmEntry (
628 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
629 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
630 );
631
632/**
633 Create PageTable for SMM use.
634
635 @return PageTable Address
636
637**/
638UINT32
639SmmInitPageTable (
640 VOID
641 );
642
643/**
644 Schedule a procedure to run on the specified CPU.
645
646 @param Procedure The address of the procedure to run
647 @param CpuIndex Target CPU number
648 @param ProcArguments The parameter to pass to the procedure
649
650 @retval EFI_INVALID_PARAMETER CpuNumber not valid
651 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
652 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
653 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
654 @retval EFI_SUCCESS - The procedure has been successfully scheduled
655
656**/
657EFI_STATUS
658EFIAPI
659SmmStartupThisAp (
660 IN EFI_AP_PROCEDURE Procedure,
661 IN UINTN CpuIndex,
662 IN OUT VOID *ProcArguments OPTIONAL
663 );
664
665/**
666 Schedule a procedure to run on the specified CPU in a blocking fashion.
667
668 @param Procedure The address of the procedure to run
669 @param CpuIndex Target CPU Index
670 @param ProcArguments The parameter to pass to the procedure
671
672 @retval EFI_INVALID_PARAMETER CpuNumber not valid
673 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
674 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
675 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
676 @retval EFI_SUCCESS The procedure has been successfully scheduled
677
678**/
679EFI_STATUS
680EFIAPI
681SmmBlockingStartupThisAp (
682 IN EFI_AP_PROCEDURE Procedure,
683 IN UINTN CpuIndex,
684 IN OUT VOID *ProcArguments OPTIONAL
685 );
686
687/**
688 This function sets the attributes for the memory region specified by BaseAddress and
689 Length from their current attributes to the attributes specified by Attributes.
690
691 @param[in] BaseAddress The physical address that is the start address of a memory region.
692 @param[in] Length The size in bytes of the memory region.
693 @param[in] Attributes The bit mask of attributes to set for the memory region.
694
695 @retval EFI_SUCCESS The attributes were set for the memory region.
696 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
697 BaseAddress and Length cannot be modified.
698 @retval EFI_INVALID_PARAMETER Length is zero.
699 Attributes specified an illegal combination of attributes that
700 cannot be set together.
701 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
702 the memory resource range.
703 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
704 resource range specified by BaseAddress and Length.
705 The bit mask of attributes is not support for the memory resource
706 range specified by BaseAddress and Length.
707
708**/
709EFI_STATUS
710SmmSetMemoryAttributes (
711 IN EFI_PHYSICAL_ADDRESS BaseAddress,
712 IN UINT64 Length,
713 IN UINT64 Attributes
714 );
715
716/**
717 This function clears the attributes for the memory region specified by BaseAddress and
718 Length from their current attributes to the attributes specified by Attributes.
719
720 @param[in] BaseAddress The physical address that is the start address of a memory region.
721 @param[in] Length The size in bytes of the memory region.
722 @param[in] Attributes The bit mask of attributes to clear for the memory region.
723
724 @retval EFI_SUCCESS The attributes were cleared for the memory region.
725 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
726 BaseAddress and Length cannot be modified.
727 @retval EFI_INVALID_PARAMETER Length is zero.
728 Attributes specified an illegal combination of attributes that
729 cannot be set together.
730 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
731 the memory resource range.
732 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
733 resource range specified by BaseAddress and Length.
734 The bit mask of attributes is not support for the memory resource
735 range specified by BaseAddress and Length.
736
737**/
738EFI_STATUS
739SmmClearMemoryAttributes (
740 IN EFI_PHYSICAL_ADDRESS BaseAddress,
741 IN UINT64 Length,
742 IN UINT64 Attributes
743 );
744
745/**
746 Initialize MP synchronization data.
747
748**/
749VOID
750EFIAPI
751InitializeMpSyncData (
752 VOID
753 );
754
755/**
756
757 Find out SMRAM information including SMRR base and SMRR size.
758
759 @param SmrrBase SMRR base
760 @param SmrrSize SMRR size
761
762**/
763VOID
764FindSmramInfo (
765 OUT UINT32 *SmrrBase,
766 OUT UINT32 *SmrrSize
767 );
768
769/**
770 Relocate SmmBases for each processor.
771
772 Execute on first boot and all S3 resumes
773
774**/
775VOID
776EFIAPI
777SmmRelocateBases (
778 VOID
779 );
780
781/**
782 Page Fault handler for SMM use.
783
784 @param InterruptType Defines the type of interrupt or exception that
785 occurred on the processor.This parameter is processor architecture specific.
786 @param SystemContext A pointer to the processor context when
787 the interrupt occurred on the processor.
788**/
789VOID
790EFIAPI
791SmiPFHandler (
792 IN EFI_EXCEPTION_TYPE InterruptType,
793 IN EFI_SYSTEM_CONTEXT SystemContext
794 );
795
796/**
797 Perform the remaining tasks.
798
799**/
800VOID
801PerformRemainingTasks (
802 VOID
803 );
804
805/**
806 Perform the pre tasks.
807
808**/
809VOID
810PerformPreTasks (
811 VOID
812 );
813
814/**
815 Initialize MSR spin lock by MSR index.
816
817 @param MsrIndex MSR index value.
818
819**/
820VOID
821InitMsrSpinLockByIndex (
822 IN UINT32 MsrIndex
823 );
824
825/**
826 Hook return address of SMM Save State so that semaphore code
827 can be executed immediately after AP exits SMM to indicate to
828 the BSP that an AP has exited SMM after SMBASE relocation.
829
830 @param[in] CpuIndex The processor index.
831 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
832 immediately after AP exits SMM.
833
834**/
835VOID
836SemaphoreHook (
837 IN UINTN CpuIndex,
838 IN volatile BOOLEAN *RebasedFlag
839 );
840
841/**
842Configure SMM Code Access Check feature for all processors.
843SMM Feature Control MSR will be locked after configuration.
844**/
845VOID
846ConfigSmmCodeAccessCheck (
847 VOID
848 );
849
850/**
851 Hook the code executed immediately after an RSM instruction on the currently
852 executing CPU. The mode of code executed immediately after RSM must be
853 detected, and the appropriate hook must be selected. Always clear the auto
854 HALT restart flag if it is set.
855
856 @param[in] CpuIndex The processor index for the currently
857 executing CPU.
858 @param[in] CpuState Pointer to SMRAM Save State Map for the
859 currently executing CPU.
860 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
861 32-bit mode from 64-bit SMM.
862 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
863 same mode as SMM.
864
865 @retval The value of the original instruction pointer before it was hooked.
866
867**/
868UINT64
869EFIAPI
870HookReturnFromSmm (
871 IN UINTN CpuIndex,
872 SMRAM_SAVE_STATE_MAP *CpuState,
873 UINT64 NewInstructionPointer32,
874 UINT64 NewInstructionPointer
875 );
876
877/**
878 Get the size of the SMI Handler in bytes.
879
880 @retval The size, in bytes, of the SMI Handler.
881
882**/
883UINTN
884EFIAPI
885GetSmiHandlerSize (
886 VOID
887 );
888
889/**
890 Install the SMI handler for the CPU specified by CpuIndex. This function
891 is called by the CPU that was elected as monarch during System Management
892 Mode initialization.
893
894 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
895 The value must be between 0 and the NumberOfCpus field
896 in the System Management System Table (SMST).
897 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
898 @param[in] SmiStack The stack to use when an SMI is processed by the
899 the CPU specified by CpuIndex.
900 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
901 processed by the CPU specified by CpuIndex.
902 @param[in] GdtBase The base address of the GDT to use when an SMI is
903 processed by the CPU specified by CpuIndex.
904 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
905 processed by the CPU specified by CpuIndex.
906 @param[in] IdtBase The base address of the IDT to use when an SMI is
907 processed by the CPU specified by CpuIndex.
908 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
909 processed by the CPU specified by CpuIndex.
910 @param[in] Cr3 The base address of the page tables to use when an SMI
911 is processed by the CPU specified by CpuIndex.
912**/
913VOID
914EFIAPI
915InstallSmiHandler (
916 IN UINTN CpuIndex,
917 IN UINT32 SmBase,
918 IN VOID *SmiStack,
919 IN UINTN StackSize,
920 IN UINTN GdtBase,
921 IN UINTN GdtSize,
922 IN UINTN IdtBase,
923 IN UINTN IdtSize,
924 IN UINT32 Cr3
925 );
926
927/**
928 Search module name by input IP address and output it.
929
930 @param CallerIpAddress Caller instruction pointer.
931
932**/
933VOID
934DumpModuleInfoByIp (
935 IN UINTN CallerIpAddress
936 );
937
938/**
939 This function sets memory attribute according to MemoryAttributesTable.
940**/
941VOID
942SetMemMapAttributes (
943 VOID
944 );
945
946/**
947 This function sets UEFI memory attribute according to UEFI memory map.
948**/
949VOID
950SetUefiMemMapAttributes (
951 VOID
952 );
953
954/**
955 Return if the Address is forbidden as SMM communication buffer.
956
957 @param[in] Address the address to be checked
958
959 @return TRUE The address is forbidden as SMM communication buffer.
960 @return FALSE The address is allowed as SMM communication buffer.
961**/
962BOOLEAN
963IsSmmCommBufferForbiddenAddress (
964 IN UINT64 Address
965 );
966
967/**
968 This function caches the UEFI memory map information.
969**/
970VOID
971GetUefiMemoryMap (
972 VOID
973 );
974
975/**
976 This function sets memory attribute for page table.
977**/
978VOID
979SetPageTableAttributes (
980 VOID
981 );
982
983/**
984 This function sets the attributes for the memory region specified by BaseAddress and
985 Length from their current attributes to the attributes specified by Attributes.
986
987 @param[in] PageTableBase The page table base.
988 @param[in] EnablePML5Paging If PML5 paging is enabled.
989 @param[in] BaseAddress The physical address that is the start address of a memory region.
990 @param[in] Length The size in bytes of the memory region.
991 @param[in] Attributes The bit mask of attributes to set for the memory region.
992 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
993
994 @retval EFI_SUCCESS The attributes were set for the memory region.
995 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
996 BaseAddress and Length cannot be modified.
997 @retval EFI_INVALID_PARAMETER Length is zero.
998 Attributes specified an illegal combination of attributes that
999 cannot be set together.
1000 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
1001 the memory resource range.
1002 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
1003 resource range specified by BaseAddress and Length.
1004 The bit mask of attributes is not support for the memory resource
1005 range specified by BaseAddress and Length.
1006
1007**/
1008EFI_STATUS
1009SmmSetMemoryAttributesEx (
1010 IN UINTN PageTableBase,
1011 IN BOOLEAN EnablePML5Paging,
1012 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1013 IN UINT64 Length,
1014 IN UINT64 Attributes,
1015 OUT BOOLEAN *IsSplitted OPTIONAL
1016 );
1017
1018/**
1019 This function clears the attributes for the memory region specified by BaseAddress and
1020 Length from their current attributes to the attributes specified by Attributes.
1021
1022 @param[in] PageTableBase The page table base.
1023 @param[in] EnablePML5Paging If PML5 paging is enabled.
1024 @param[in] BaseAddress The physical address that is the start address of a memory region.
1025 @param[in] Length The size in bytes of the memory region.
1026 @param[in] Attributes The bit mask of attributes to clear for the memory region.
1027 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
1028
1029 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1030 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
1031 BaseAddress and Length cannot be modified.
1032 @retval EFI_INVALID_PARAMETER Length is zero.
1033 Attributes specified an illegal combination of attributes that
1034 cannot be set together.
1035 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
1036 the memory resource range.
1037 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
1038 resource range specified by BaseAddress and Length.
1039 The bit mask of attributes is not support for the memory resource
1040 range specified by BaseAddress and Length.
1041
1042**/
1043EFI_STATUS
1044SmmClearMemoryAttributesEx (
1045 IN UINTN PageTableBase,
1046 IN BOOLEAN EnablePML5Paging,
1047 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1048 IN UINT64 Length,
1049 IN UINT64 Attributes,
1050 OUT BOOLEAN *IsSplitted OPTIONAL
1051 );
1052
1053/**
1054 This API provides a way to allocate memory for page table.
1055
1056 This API can be called more once to allocate memory for page tables.
1057
1058 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
1059 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
1060 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
1061 returned.
1062
1063 @param Pages The number of 4 KB pages to allocate.
1064
1065 @return A pointer to the allocated buffer or NULL if allocation fails.
1066
1067**/
1068VOID *
1069AllocatePageTableMemory (
1070 IN UINTN Pages
1071 );
1072
1073/**
1074 Allocate pages for code.
1075
1076 @param[in] Pages Number of pages to be allocated.
1077
1078 @return Allocated memory.
1079**/
1080VOID *
1081AllocateCodePages (
1082 IN UINTN Pages
1083 );
1084
1085/**
1086 Allocate aligned pages for code.
1087
1088 @param[in] Pages Number of pages to be allocated.
1089 @param[in] Alignment The requested alignment of the allocation.
1090 Must be a power of two.
1091 If Alignment is zero, then byte alignment is used.
1092
1093 @return Allocated memory.
1094**/
1095VOID *
1096AllocateAlignedCodePages (
1097 IN UINTN Pages,
1098 IN UINTN Alignment
1099 );
1100
1101//
1102// S3 related global variable and function prototype.
1103//
1104
1105extern BOOLEAN mSmmS3Flag;
1106
1107/**
1108 Initialize SMM S3 resume state structure used during S3 Resume.
1109
1110 @param[in] Cr3 The base address of the page tables to use in SMM.
1111
1112**/
1113VOID
1114InitSmmS3ResumeState (
1115 IN UINT32 Cr3
1116 );
1117
1118/**
1119 Get ACPI CPU data.
1120
1121**/
1122VOID
1123GetAcpiCpuData (
1124 VOID
1125 );
1126
1127/**
1128 Restore SMM Configuration in S3 boot path.
1129
1130**/
1131VOID
1132RestoreSmmConfigurationInS3 (
1133 VOID
1134 );
1135
1136/**
1137 Get ACPI S3 enable flag.
1138
1139**/
1140VOID
1141GetAcpiS3EnableFlag (
1142 VOID
1143 );
1144
1145/**
1146 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1147
1148 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1149 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1150 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1151
1152**/
1153VOID
1154TransferApToSafeState (
1155 IN UINTN ApHltLoopCode,
1156 IN UINTN TopOfStack,
1157 IN UINTN NumberToFinishAddress
1158 );
1159
1160/**
1161 Set ShadowStack memory.
1162
1163 @param[in] Cr3 The page table base address.
1164 @param[in] BaseAddress The physical address that is the start address of a memory region.
1165 @param[in] Length The size in bytes of the memory region.
1166
1167 @retval EFI_SUCCESS The shadow stack memory is set.
1168**/
1169EFI_STATUS
1170SetShadowStack (
1171 IN UINTN Cr3,
1172 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1173 IN UINT64 Length
1174 );
1175
1176/**
1177 Set not present memory.
1178
1179 @param[in] Cr3 The page table base address.
1180 @param[in] BaseAddress The physical address that is the start address of a memory region.
1181 @param[in] Length The size in bytes of the memory region.
1182
1183 @retval EFI_SUCCESS The not present memory is set.
1184**/
1185EFI_STATUS
1186SetNotPresentPage (
1187 IN UINTN Cr3,
1188 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1189 IN UINT64 Length
1190 );
1191
1192/**
1193 Initialize the shadow stack related data structure.
1194
1195 @param CpuIndex The index of CPU.
1196 @param ShadowStack The bottom of the shadow stack for this CPU.
1197**/
1198VOID
1199InitShadowStack (
1200 IN UINTN CpuIndex,
1201 IN VOID *ShadowStack
1202 );
1203
1204/**
1205 This function set given attributes of the memory region specified by
1206 BaseAddress and Length.
1207
1208 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1209 @param BaseAddress The physical address that is the start address of
1210 a memory region.
1211 @param Length The size in bytes of the memory region.
1212 @param Attributes The bit mask of attributes to set for the memory
1213 region.
1214
1215 @retval EFI_SUCCESS The attributes were set for the memory region.
1216 @retval EFI_INVALID_PARAMETER Length is zero.
1217 Attributes specified an illegal combination of
1218 attributes that cannot be set together.
1219 @retval EFI_UNSUPPORTED The processor does not support one or more
1220 bytes of the memory resource range specified
1221 by BaseAddress and Length.
1222 The bit mask of attributes is not supported for
1223 the memory resource range specified by
1224 BaseAddress and Length.
1225
1226**/
1227EFI_STATUS
1228EFIAPI
1229EdkiiSmmSetMemoryAttributes (
1230 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1231 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1232 IN UINT64 Length,
1233 IN UINT64 Attributes
1234 );
1235
1236/**
1237 This function clears given attributes of the memory region specified by
1238 BaseAddress and Length.
1239
1240 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1241 @param BaseAddress The physical address that is the start address of
1242 a memory region.
1243 @param Length The size in bytes of the memory region.
1244 @param Attributes The bit mask of attributes to clear for the memory
1245 region.
1246
1247 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1248 @retval EFI_INVALID_PARAMETER Length is zero.
1249 Attributes specified an illegal combination of
1250 attributes that cannot be cleared together.
1251 @retval EFI_UNSUPPORTED The processor does not support one or more
1252 bytes of the memory resource range specified
1253 by BaseAddress and Length.
1254 The bit mask of attributes is not supported for
1255 the memory resource range specified by
1256 BaseAddress and Length.
1257
1258**/
1259EFI_STATUS
1260EFIAPI
1261EdkiiSmmClearMemoryAttributes (
1262 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1263 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1264 IN UINT64 Length,
1265 IN UINT64 Attributes
1266 );
1267
1268/**
1269 This function retrieves the attributes of the memory region specified by
1270 BaseAddress and Length. If different attributes are got from different part
1271 of the memory region, EFI_NO_MAPPING will be returned.
1272
1273 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1274 @param BaseAddress The physical address that is the start address of
1275 a memory region.
1276 @param Length The size in bytes of the memory region.
1277 @param Attributes Pointer to attributes returned.
1278
1279 @retval EFI_SUCCESS The attributes got for the memory region.
1280 @retval EFI_INVALID_PARAMETER Length is zero.
1281 Attributes is NULL.
1282 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1283 region.
1284 @retval EFI_UNSUPPORTED The processor does not support one or more
1285 bytes of the memory resource range specified
1286 by BaseAddress and Length.
1287
1288**/
1289EFI_STATUS
1290EFIAPI
1291EdkiiSmmGetMemoryAttributes (
1292 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1293 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1294 IN UINT64 Length,
1295 IN UINT64 *Attributes
1296 );
1297
1298/**
1299 This function fixes up the address of the global variable or function
1300 referred in SmmInit assembly files to be the absolute address.
1301**/
1302VOID
1303EFIAPI
1304PiSmmCpuSmmInitFixupAddress (
1305 );
1306
1307/**
1308 This function fixes up the address of the global variable or function
1309 referred in SmiEntry assembly files to be the absolute address.
1310**/
1311VOID
1312EFIAPI
1313PiSmmCpuSmiEntryFixupAddress (
1314 );
1315
1316/**
1317 This function reads CR2 register when on-demand paging is enabled
1318 for 64 bit and no action for 32 bit.
1319
1320 @param[out] *Cr2 Pointer to variable to hold CR2 register value.
1321**/
1322VOID
1323SaveCr2 (
1324 OUT UINTN *Cr2
1325 );
1326
1327/**
1328 This function writes into CR2 register when on-demand paging is enabled
1329 for 64 bit and no action for 32 bit.
1330
1331 @param[in] Cr2 Value to write into CR2 register.
1332**/
1333VOID
1334RestoreCr2 (
1335 IN UINTN Cr2
1336 );
1337
1338/**
1339 Schedule a procedure to run on the specified CPU.
1340
1341 @param[in] Procedure The address of the procedure to run
1342 @param[in] CpuIndex Target CPU Index
1343 @param[in,out] ProcArguments The parameter to pass to the procedure
1344 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1345 procedure in a blocking or non-blocking fashion. If it is NULL the
1346 call is blocking, and the call will not return until the AP has
1347 completed the procedure. If the token is not NULL, the call will
1348 return immediately. The caller can check whether the procedure has
1349 completed with CheckOnProcedure or WaitForProcedure.
1350 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish
1351 execution of Procedure, either for blocking or non-blocking mode.
1352 Zero means infinity. If the timeout expires before all APs return
1353 from Procedure, then Procedure on the failed APs is terminated. If
1354 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.
1355 If the timeout expires in non-blocking mode, the timeout determined
1356 can be through CheckOnProcedure or WaitForProcedure.
1357 Note that timeout support is optional. Whether an implementation
1358 supports this feature can be determined via the Attributes data
1359 member.
1360 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned
1361 by Procedure when it completes execution on the target AP, or with
1362 EFI_TIMEOUT if the Procedure fails to complete within the optional
1363 timeout. The implementation will update this variable with
1364 EFI_NOT_READY prior to starting Procedure on the target AP.
1365
1366 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1367 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1368 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1369 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1370 @retval EFI_SUCCESS The procedure has been successfully scheduled
1371
1372**/
1373EFI_STATUS
1374InternalSmmStartupThisAp (
1375 IN EFI_AP_PROCEDURE2 Procedure,
1376 IN UINTN CpuIndex,
1377 IN OUT VOID *ProcArguments OPTIONAL,
1378 IN OUT MM_COMPLETION *Token,
1379 IN UINTN TimeoutInMicroseconds,
1380 IN OUT EFI_STATUS *CpuStatus
1381 );
1382
1383/**
1384 Checks whether the input token is the current used token.
1385
1386 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1387 BroadcastProcedure.
1388
1389 @retval TRUE The input token is the current used token.
1390 @retval FALSE The input token is not the current used token.
1391**/
1392BOOLEAN
1393IsTokenInUse (
1394 IN SPIN_LOCK *Token
1395 );
1396
1397/**
1398 Checks status of specified AP.
1399
1400 This function checks whether the specified AP has finished the task assigned
1401 by StartupThisAP(), and whether timeout expires.
1402
1403 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1404 BroadcastProcedure.
1405
1406 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().
1407 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.
1408**/
1409EFI_STATUS
1410IsApReady (
1411 IN SPIN_LOCK *Token
1412 );
1413
1414/**
1415 Check whether it is an present AP.
1416
1417 @param CpuIndex The AP index which calls this function.
1418
1419 @retval TRUE It's a present AP.
1420 @retval TRUE This is not an AP or it is not present.
1421
1422**/
1423BOOLEAN
1424IsPresentAp (
1425 IN UINTN CpuIndex
1426 );
1427
1428/**
1429 Worker function to execute a caller provided function on all enabled APs.
1430
1431 @param[in] Procedure A pointer to the function to be run on
1432 enabled APs of the system.
1433 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
1434 APs to return from Procedure, either for
1435 blocking or non-blocking mode.
1436 @param[in,out] ProcedureArguments The parameter passed into Procedure for
1437 all APs.
1438 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1439 procedure in a blocking or non-blocking fashion. If it is NULL the
1440 call is blocking, and the call will not return until the AP has
1441 completed the procedure. If the token is not NULL, the call will
1442 return immediately. The caller can check whether the procedure has
1443 completed with CheckOnProcedure or WaitForProcedure.
1444 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned
1445 by Procedure when it completes execution on the target AP, or with
1446 EFI_TIMEOUT if the Procedure fails to complete within the optional
1447 timeout. The implementation will update this variable with
1448 EFI_NOT_READY prior to starting Procedure on the target AP.
1449
1450 @retval EFI_SUCCESS In blocking mode, all APs have finished before
1451 the timeout expired.
1452 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
1453 to all enabled APs.
1454 @retval others Failed to Startup all APs.
1455
1456**/
1457EFI_STATUS
1458InternalSmmStartupAllAPs (
1459 IN EFI_AP_PROCEDURE2 Procedure,
1460 IN UINTN TimeoutInMicroseconds,
1461 IN OUT VOID *ProcedureArguments OPTIONAL,
1462 IN OUT MM_COMPLETION *Token,
1463 IN OUT EFI_STATUS *CPUStatus
1464 );
1465
1466/**
1467
1468 Register the SMM Foundation entry point.
1469
1470 @param[in] Procedure A pointer to the code stream to be run on the designated target AP
1471 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2
1472 with the related definitions of
1473 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.
1474 If caller may pass a value of NULL to deregister any existing
1475 startup procedure.
1476 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is
1477 run by the AP. It is an optional common mailbox between APs and
1478 the caller to share information
1479
1480 @retval EFI_SUCCESS The Procedure has been set successfully.
1481 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.
1482
1483**/
1484EFI_STATUS
1485RegisterStartupProcedure (
1486 IN EFI_AP_PROCEDURE Procedure,
1487 IN OUT VOID *ProcedureArguments OPTIONAL
1488 );
1489
1490/**
1491 Initialize PackageBsp Info. Processor specified by mPackageFirstThreadIndex[PackageIndex]
1492 will do the package-scope register programming. Set default CpuIndex to (UINT32)-1, which
1493 means not specified yet.
1494
1495**/
1496VOID
1497InitPackageFirstThreadIndexInfo (
1498 VOID
1499 );
1500
1501/**
1502 Allocate buffer for SpinLock and Wrapper function buffer.
1503
1504**/
1505VOID
1506InitializeDataForMmMp (
1507 VOID
1508 );
1509
1510/**
1511 Return whether access to non-SMRAM is restricted.
1512
1513 @retval TRUE Access to non-SMRAM is restricted.
1514 @retval FALSE Access to non-SMRAM is not restricted.
1515**/
1516BOOLEAN
1517IsRestrictedMemoryAccess (
1518 VOID
1519 );
1520
1521/**
1522 Choose blocking or non-blocking mode to Wait for all APs.
1523
1524 @param[in] This A pointer to the EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL instance.
1525 @param[in] BlockingMode Blocking or non-blocking mode.
1526
1527 @retval EFI_SUCCESS All APs have arrived SMM mode except SMI disabled APs.
1528 @retval EFI_TIMEOUT There are APs not in SMM mode in given timeout constraint.
1529
1530**/
1531EFI_STATUS
1532EFIAPI
1533SmmCpuRendezvous (
1534 IN EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL *This,
1535 IN BOOLEAN BlockingMode
1536 );
1537
1538/**
1539 Insure when this function returns, no AP will execute normal mode code before entering SMM, except SMI disabled APs.
1540
1541**/
1542VOID
1543SmmWaitForApArrival (
1544 VOID
1545 );
1546
1547#endif
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