| 1 | ## @file UefiCpuPkg.dec
|
|---|
| 2 | # This Package provides UEFI compatible CPU modules and libraries.
|
|---|
| 3 | #
|
|---|
| 4 | # Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>
|
|---|
| 5 | #
|
|---|
| 6 | # SPDX-License-Identifier: BSD-2-Clause-Patent
|
|---|
| 7 | #
|
|---|
| 8 | ##
|
|---|
| 9 |
|
|---|
| 10 | [Defines]
|
|---|
| 11 | DEC_SPECIFICATION = 0x00010005
|
|---|
| 12 | PACKAGE_NAME = UefiCpuPkg
|
|---|
| 13 | PACKAGE_UNI_FILE = UefiCpuPkg.uni
|
|---|
| 14 | PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
|
|---|
| 15 | PACKAGE_VERSION = 0.90
|
|---|
| 16 |
|
|---|
| 17 | [Includes]
|
|---|
| 18 | Include
|
|---|
| 19 |
|
|---|
| 20 | [LibraryClasses]
|
|---|
| 21 | ## @libraryclass Defines some routines that are generic for IA32 family CPU
|
|---|
| 22 | ## to be UEFI specification compliant.
|
|---|
| 23 | ##
|
|---|
| 24 | UefiCpuLib|Include/Library/UefiCpuLib.h
|
|---|
| 25 |
|
|---|
| 26 | ## @libraryclass Defines some routines that are used to register/manage/program
|
|---|
| 27 | ## CPU features.
|
|---|
| 28 | ##
|
|---|
| 29 | RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h
|
|---|
| 30 |
|
|---|
| 31 | [LibraryClasses.IA32, LibraryClasses.X64]
|
|---|
| 32 | ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.
|
|---|
| 33 | ##
|
|---|
| 34 | MtrrLib|Include/Library/MtrrLib.h
|
|---|
| 35 |
|
|---|
| 36 | ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.
|
|---|
| 37 | ##
|
|---|
| 38 | LocalApicLib|Include/Library/LocalApicLib.h
|
|---|
| 39 |
|
|---|
| 40 | ## @libraryclass Provides platform specific initialization functions in the SEC phase.
|
|---|
| 41 | ##
|
|---|
| 42 | PlatformSecLib|Include/Library/PlatformSecLib.h
|
|---|
| 43 |
|
|---|
| 44 | ## @libraryclass Public include file for the SMM CPU Platform Hook Library.
|
|---|
| 45 | ##
|
|---|
| 46 | SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
|
|---|
| 47 |
|
|---|
| 48 | ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.
|
|---|
| 49 | ##
|
|---|
| 50 | SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
|
|---|
| 51 |
|
|---|
| 52 | ## @libraryclass Provides functions to support MP services on CpuMpPei and CpuDxe module.
|
|---|
| 53 | ##
|
|---|
| 54 | MpInitLib|Include/Library/MpInitLib.h
|
|---|
| 55 |
|
|---|
| 56 | [Guids]
|
|---|
| 57 | gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
|
|---|
| 58 | gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
|
|---|
| 59 |
|
|---|
| 60 | ## Include/Guid/CpuFeaturesSetDone.h
|
|---|
| 61 | gEdkiiCpuFeaturesSetDoneGuid = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}
|
|---|
| 62 |
|
|---|
| 63 | ## Include/Guid/CpuFeaturesInitDone.h
|
|---|
| 64 | gEdkiiCpuFeaturesInitDoneGuid = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }}
|
|---|
| 65 |
|
|---|
| 66 | [Protocols]
|
|---|
| 67 | ## Include/Protocol/SmmCpuService.h
|
|---|
| 68 | gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
|
|---|
| 69 |
|
|---|
| 70 | ## Include/Protocol/SmMonitorInit.h
|
|---|
| 71 | gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}
|
|---|
| 72 |
|
|---|
| 73 | #
|
|---|
| 74 | # [Error.gUefiCpuPkgTokenSpaceGuid]
|
|---|
| 75 | # 0x80000001 | Invalid value provided.
|
|---|
| 76 | #
|
|---|
| 77 |
|
|---|
| 78 | [Ppis]
|
|---|
| 79 | gEdkiiPeiMpServices2PpiGuid = { 0x5cb9cb3d, 0x31a4, 0x480c, { 0x94, 0x98, 0x29, 0xd2, 0x69, 0xba, 0xcf, 0xba}}
|
|---|
| 80 |
|
|---|
| 81 | [PcdsFeatureFlag]
|
|---|
| 82 | ## Indicates if SMM Profile will be enabled.
|
|---|
| 83 | # If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
|
|---|
| 84 | # It could not be enabled at the same time with SMM static page table feature (PcdCpuSmmStaticPageTable).
|
|---|
| 85 | # This PCD is only for validation purpose. It should be set to false in production.<BR><BR>
|
|---|
| 86 | # TRUE - SMM Profile will be enabled.<BR>
|
|---|
| 87 | # FALSE - SMM Profile will be disabled.<BR>
|
|---|
| 88 | # @Prompt Enable SMM Profile.
|
|---|
| 89 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109
|
|---|
| 90 |
|
|---|
| 91 | ## Indicates if the SMM profile log buffer is a ring buffer.
|
|---|
| 92 | # If disabled, no additional log can be done when the buffer is full.<BR><BR>
|
|---|
| 93 | # TRUE - the SMM profile log buffer is a ring buffer.<BR>
|
|---|
| 94 | # FALSE - the SMM profile log buffer is a normal buffer.<BR>
|
|---|
| 95 | # @Prompt The SMM profile log buffer is a ring buffer.
|
|---|
| 96 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a
|
|---|
| 97 |
|
|---|
| 98 | ## Indicates if SMM Startup AP in a blocking fashion.
|
|---|
| 99 | # TRUE - SMM Startup AP in a blocking fashion.<BR>
|
|---|
| 100 | # FALSE - SMM Startup AP in a non-blocking fashion.<BR>
|
|---|
| 101 | # @Prompt SMM Startup AP in a blocking fashion.
|
|---|
| 102 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108
|
|---|
| 103 |
|
|---|
| 104 | ## Indicates if SMM Stack Guard will be enabled.
|
|---|
| 105 | # If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR>
|
|---|
| 106 | # TRUE - SMM Stack Guard will be enabled.<BR>
|
|---|
| 107 | # FALSE - SMM Stack Guard will be disabled.<BR>
|
|---|
| 108 | # @Prompt Enable SMM Stack Guard.
|
|---|
| 109 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C
|
|---|
| 110 |
|
|---|
| 111 | ## Indicates if BSP election in SMM will be enabled.
|
|---|
| 112 | # If enabled, a BSP will be dynamically elected among all processors in each SMI.
|
|---|
| 113 | # Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>
|
|---|
| 114 | # TRUE - BSP election in SMM will be enabled.<BR>
|
|---|
| 115 | # FALSE - BSP election in SMM will be disabled.<BR>
|
|---|
| 116 | # @Prompt Enable BSP election in SMM.
|
|---|
| 117 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106
|
|---|
| 118 |
|
|---|
| 119 | ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>
|
|---|
| 120 | # TRUE - SMM CPU hot-plug will be enabled.<BR>
|
|---|
| 121 | # FALSE - SMM CPU hot-plug will be disabled.<BR>
|
|---|
| 122 | # @Prompt SMM CPU hot-plug.
|
|---|
| 123 | gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C
|
|---|
| 124 |
|
|---|
| 125 | ## Indicates if SMM Debug will be enabled.
|
|---|
| 126 | # If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>
|
|---|
| 127 | # TRUE - SMM Debug will be enabled.<BR>
|
|---|
| 128 | # FALSE - SMM Debug will be disabled.<BR>
|
|---|
| 129 | # @Prompt Enable SMM Debug.
|
|---|
| 130 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B
|
|---|
| 131 |
|
|---|
| 132 | ## Indicates if lock SMM Feature Control MSR.<BR><BR>
|
|---|
| 133 | # TRUE - SMM Feature Control MSR will be locked.<BR>
|
|---|
| 134 | # FALSE - SMM Feature Control MSR will not be locked.<BR>
|
|---|
| 135 | # @Prompt Lock SMM Feature Control MSR.
|
|---|
| 136 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
|
|---|
| 137 |
|
|---|
| 138 | [PcdsFixedAtBuild]
|
|---|
| 139 | ## List of exception vectors which need switching stack.
|
|---|
| 140 | # This PCD will only take into effect if PcdCpuStackGuard is enabled.
|
|---|
| 141 | # By default exception #DD(8), #PF(14) are supported.
|
|---|
| 142 | # @Prompt Specify exception vectors which need switching stack.
|
|---|
| 143 | gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 0x0E}|VOID*|0x30002000
|
|---|
| 144 |
|
|---|
| 145 | ## Size of good stack for an exception.
|
|---|
| 146 | # This PCD will only take into effect if PcdCpuStackGuard is enabled.
|
|---|
| 147 | # @Prompt Specify size of good stack of exception which need switching stack.
|
|---|
| 148 | gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001
|
|---|
| 149 |
|
|---|
| 150 | [PcdsFixedAtBuild, PcdsPatchableInModule]
|
|---|
| 151 | ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
|
|---|
| 152 | # @Prompt Configure base address of CPU Local APIC
|
|---|
| 153 | # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
|
|---|
| 154 | gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
|
|---|
| 155 |
|
|---|
| 156 | ## Specifies delay value in microseconds after sending out an INIT IPI.
|
|---|
| 157 | # @Prompt Configure delay value after send an INIT IPI
|
|---|
| 158 | gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
|
|---|
| 159 |
|
|---|
| 160 | ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
|
|---|
| 161 | ## aligns the address on a 4-KByte boundary.
|
|---|
| 162 | # @Prompt Configure stack size for Application Processor (AP)
|
|---|
| 163 | gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
|
|---|
| 164 |
|
|---|
| 165 | ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.
|
|---|
| 166 | # @Prompt Stack size in the temporary RAM.
|
|---|
| 167 | gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003
|
|---|
| 168 |
|
|---|
| 169 | ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.
|
|---|
| 170 | # @Prompt SMM profile data buffer size.
|
|---|
| 171 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107
|
|---|
| 172 |
|
|---|
| 173 | ## Specifies stack size in bytes for each processor in SMM.
|
|---|
| 174 | # @Prompt Processor stack size in SMM.
|
|---|
| 175 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105
|
|---|
| 176 |
|
|---|
| 177 | ## Specifies shadow stack size in bytes for each processor in SMM.
|
|---|
| 178 | # @Prompt Processor shadow stack size in SMM.
|
|---|
| 179 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmShadowStackSize|0x2000|UINT32|0x3213210E
|
|---|
| 180 |
|
|---|
| 181 | ## Indicates if SMM Code Access Check is enabled.
|
|---|
| 182 | # If enabled, the SMM handler cannot execute the code outside SMM regions.
|
|---|
| 183 | # This PCD is suggested to TRUE in production image.<BR><BR>
|
|---|
| 184 | # TRUE - SMM Code Access Check will be enabled.<BR>
|
|---|
| 185 | # FALSE - SMM Code Access Check will be disabled.<BR>
|
|---|
| 186 | # @Prompt SMM Code Access Check.
|
|---|
| 187 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013
|
|---|
| 188 |
|
|---|
| 189 | ## Specifies the number of variable MTRRs reserved for OS use. The default number of
|
|---|
| 190 | # MTRRs reserved for OS use is 2.
|
|---|
| 191 | # @Prompt Number of reserved variable MTRRs.
|
|---|
| 192 | gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015
|
|---|
| 193 |
|
|---|
| 194 | ## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB.
|
|---|
| 195 | # @Prompt STM exception stack size.
|
|---|
| 196 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111
|
|---|
| 197 |
|
|---|
| 198 | ## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB.
|
|---|
| 199 | # @Prompt MSEG size.
|
|---|
| 200 | gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112
|
|---|
| 201 |
|
|---|
| 202 | ## Specifies the supported CPU features bit in array.
|
|---|
| 203 | # @Prompt Supported CPU features.
|
|---|
| 204 | gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x00000016
|
|---|
| 205 |
|
|---|
| 206 | ## Specifies if CPU features will be initialized after SMM relocation.
|
|---|
| 207 | # @Prompt If CPU features will be initialized after SMM relocation.
|
|---|
| 208 | gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitAfterSmmRelocation|FALSE|BOOLEAN|0x0000001C
|
|---|
| 209 |
|
|---|
| 210 | ## Specifies if CPU features will be initialized during S3 resume.
|
|---|
| 211 | # @Prompt If CPU features will be initialized during S3 resume.
|
|---|
| 212 | gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D
|
|---|
| 213 |
|
|---|
| 214 | ## Specifies CPUID Leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Frequency.
|
|---|
| 215 | # TSC Frequency = ECX (core crystal clock frequency) * EBX/EAX.
|
|---|
| 216 | # Intel Xeon Processor Scalable Family with CPUID signature 06_55H = 25000000 (25MHz)
|
|---|
| 217 | # 6th and 7th generation Intel Core processors and Intel Xeon W Processor Family = 24000000 (24MHz)
|
|---|
| 218 | # Intel Atom processors based on Goldmont Microarchitecture with CPUID signature 06_5CH = 19200000 (19.2MHz)
|
|---|
| 219 | # @Prompt This PCD is the nominal frequency of the core crystal clock in Hz as is CPUID Leaf 0x15:ECX
|
|---|
| 220 | gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|24000000|UINT64|0x32132113
|
|---|
| 221 |
|
|---|
| 222 | [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
|
|---|
| 223 | ## Specifies max supported number of Logical Processors.
|
|---|
| 224 | # @Prompt Configure max supported number of Logical Processors
|
|---|
| 225 | gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
|
|---|
| 226 | ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
|
|---|
| 227 | # @Prompt Timeout for the BSP to detect all APs for the first time.
|
|---|
| 228 | gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
|
|---|
| 229 | ## Specifies the base address of the first microcode Patch in the microcode Region.
|
|---|
| 230 | # @Prompt Microcode Region base address.
|
|---|
| 231 | gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
|
|---|
| 232 | ## Specifies the size of the microcode Region.
|
|---|
| 233 | # @Prompt Microcode Region size.
|
|---|
| 234 | gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
|
|---|
| 235 | ## Specifies the AP wait loop state during POST phase.
|
|---|
| 236 | # The value is defined as below.<BR><BR>
|
|---|
| 237 | # 1: Place AP in the Hlt-Loop state.<BR>
|
|---|
| 238 | # 2: Place AP in the Mwait-Loop state.<BR>
|
|---|
| 239 | # 3: Place AP in the Run-Loop state.<BR>
|
|---|
| 240 | # @Prompt The AP wait loop state.
|
|---|
| 241 | # @ValidRange 0x80000001 | 1 - 3
|
|---|
| 242 | gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006
|
|---|
| 243 | ## Specifies the AP target C-state for Mwait during POST phase.
|
|---|
| 244 | # The default value 0 means C1 state.
|
|---|
| 245 | # The value is defined as below.<BR><BR>
|
|---|
| 246 | # @Prompt The specified AP target C-state for Mwait.
|
|---|
| 247 | gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
|
|---|
| 248 |
|
|---|
| 249 | ## Indicates if SMM uses static page table.
|
|---|
| 250 | # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.
|
|---|
| 251 | # This flag only impacts X64 build, because SMM always builds static page table for IA32.
|
|---|
| 252 | # It could not be enabled at the same time with SMM profile feature (PcdCpuSmmProfileEnable).
|
|---|
| 253 | # It could not be enabled also at the same time with heap guard feature for SMM
|
|---|
| 254 | # (PcdHeapGuardPropertyMask in MdeModulePkg).<BR><BR>
|
|---|
| 255 | # TRUE - SMM uses static page table for all memory.<BR>
|
|---|
| 256 | # FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.<BR>
|
|---|
| 257 | # @Prompt Use static page table for all memory in SMM.
|
|---|
| 258 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D
|
|---|
| 259 |
|
|---|
| 260 | ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
|
|---|
| 261 | # @Prompt AP synchronization timeout value in SMM.
|
|---|
| 262 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
|
|---|
| 263 |
|
|---|
| 264 | ## Indicates the CPU synchronization method used when processing an SMI.
|
|---|
| 265 | # 0x00 - Traditional CPU synchronization method.<BR>
|
|---|
| 266 | # 0x01 - Relaxed CPU synchronization method.<BR>
|
|---|
| 267 | # @Prompt SMM CPU Synchronization Method.
|
|---|
| 268 | gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
|
|---|
| 269 |
|
|---|
| 270 | ## Specifies the On-demand clock modulation duty cycle when ACPI feature is enabled.
|
|---|
| 271 | # @Prompt The encoded values for target duty cycle modulation.
|
|---|
| 272 | # @ValidRange 0x80000001 | 0 - 15
|
|---|
| 273 | gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x0000001A
|
|---|
| 274 |
|
|---|
| 275 | ## Indicates if the current boot is a power-on reset.<BR><BR>
|
|---|
| 276 | # TRUE - Current boot is a power-on reset.<BR>
|
|---|
| 277 | # FALSE - Current boot is not a power-on reset.<BR>
|
|---|
| 278 | # @Prompt Current boot is a power-on reset.
|
|---|
| 279 | gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B
|
|---|
| 280 |
|
|---|
| 281 | [PcdsDynamic, PcdsDynamicEx]
|
|---|
| 282 | ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
|
|---|
| 283 | # @Prompt The pointer to a CPU S3 data buffer.
|
|---|
| 284 | # @ValidList 0x80000001 | 0
|
|---|
| 285 | gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010
|
|---|
| 286 |
|
|---|
| 287 | ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.
|
|---|
| 288 | # @Prompt The pointer to CPU Hot Plug Data.
|
|---|
| 289 | # @ValidList 0x80000001 | 0
|
|---|
| 290 | gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011
|
|---|
| 291 |
|
|---|
| 292 | ## Indicates processor feature capabilities, each bit corresponding to a specific feature.
|
|---|
| 293 | # @Prompt Processor feature capabilities.
|
|---|
| 294 | # @ValidList 0x80000001 | 0
|
|---|
| 295 | gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018
|
|---|
| 296 |
|
|---|
| 297 | ## As input, specifies user's desired settings for enabling/disabling processor features.
|
|---|
| 298 | ## As output, specifies actual settings for processor features, each bit corresponding to a specific feature.
|
|---|
| 299 | # @Prompt As input, specifies user's desired processor feature settings. As output, specifies actual processor feature settings.
|
|---|
| 300 | # @ValidList 0x80000001 | 0
|
|---|
| 301 | gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019
|
|---|
| 302 |
|
|---|
| 303 | ## Contains the size of memory required when CPU processor trace is enabled.<BR><BR>
|
|---|
| 304 | # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
|
|---|
| 305 | # This PCD is ignored if CPU processor trace is disabled.<BR><BR>
|
|---|
| 306 | # Default value is 0x00 which means 4KB of memory is allocated if CPU processor trace is enabled.<BR>
|
|---|
| 307 | # 0x0 - 4K.<BR>
|
|---|
| 308 | # 0x1 - 8K.<BR>
|
|---|
| 309 | # 0x2 - 16K.<BR>
|
|---|
| 310 | # 0x3 - 32K.<BR>
|
|---|
| 311 | # 0x4 - 64K.<BR>
|
|---|
| 312 | # 0x5 - 128K.<BR>
|
|---|
| 313 | # 0x6 - 256K.<BR>
|
|---|
| 314 | # 0x7 - 512K.<BR>
|
|---|
| 315 | # 0x8 - 1M.<BR>
|
|---|
| 316 | # 0x9 - 2M.<BR>
|
|---|
| 317 | # 0xA - 4M.<BR>
|
|---|
| 318 | # 0xB - 8M.<BR>
|
|---|
| 319 | # 0xC - 16M.<BR>
|
|---|
| 320 | # 0xD - 32M.<BR>
|
|---|
| 321 | # 0xE - 64M.<BR>
|
|---|
| 322 | # 0xF - 128M.<BR>
|
|---|
| 323 | # @Prompt The memory size used for processor trace if processor trace is enabled.
|
|---|
| 324 | # @ValidRange 0x80000001 | 0 - 0xF
|
|---|
| 325 | gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0|UINT32|0x60000012
|
|---|
| 326 |
|
|---|
| 327 | ## Contains the processor trace output scheme when CPU processor trace is enabled.<BR><BR>
|
|---|
| 328 | # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
|
|---|
| 329 | # This PCD is ignored if CPU processor trace is disabled.<BR><BR>
|
|---|
| 330 | # Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>
|
|---|
| 331 | # 0 - Single Range output scheme.<BR>
|
|---|
| 332 | # 1 - ToPA(Table of physical address) scheme.<BR>
|
|---|
| 333 | # @Prompt The processor trace output scheme used when processor trace is enabled.
|
|---|
| 334 | # @ValidRange 0x80000001 | 0 - 1
|
|---|
| 335 | gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x60000015
|
|---|
| 336 |
|
|---|
| 337 | [UserExtensions.TianoCore."ExtraFiles"]
|
|---|
| 338 | UefiCpuPkgExtra.uni
|
|---|
