| 1 | ; $Id: EfiThunk.asm 28800 2010-04-27 08:22:32Z vboxsync $
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| 2 | ;; @file
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| 3 | ; 16-bit EFI Thunk - 16-bit code executed immediately after CPU startup/reset,
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| 4 | ; performs minimal setup, switches CPU to 32-bit mode
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| 5 | ; and passes control to the 32-bit firmware entry point
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| 6 | ;
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| 7 | ;; @todo yasm 0.8.0 got binary sections which could simplify things in this file,
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| 8 | ; see: http://www.tortall.net/projects/yasm/manual/html/manual.html#objfmt-bin-section
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| 9 |
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| 10 | ;
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| 11 | ; Copyright (C) 2009 Oracle Corporation
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| 12 | ;
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| 13 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 14 | ; available from http://www.virtualbox.org. This file is free software;
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| 15 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 16 | ; General Public License (GPL) as published by the Free Software
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| 17 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 18 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 19 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 20 | ;
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| 21 |
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| 22 | ;*******************************************************************************
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| 23 | ;* Defined Constants And Macros *
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| 24 | ;*******************************************************************************
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| 25 | ;; we'll use no more than 128 vectors atm
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| 26 | %define IDT_VECTORS 128
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| 27 | ;; keep in sync with actual GDT size
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| 28 | %define GDT_SELECTORS 10
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| 29 |
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| 30 |
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| 31 | ;*******************************************************************************
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| 32 | ;* Header Files *
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| 33 | ;*******************************************************************************
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| 34 | %include "VBox/asmdefs.mac"
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| 35 | %include "VBox/x86.mac"
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| 36 | %include "DevEFI.mac"
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| 37 |
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| 38 | ;
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| 39 | ; 0xfffff000/0xf000 - Where we start.
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| 40 | ;
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| 41 | ORG 0xf000
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| 42 |
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| 43 | ;
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| 44 | ; 0xfffff000/0xf000 - Parameters passed by DevEFI, DEVEFIINFO.
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| 45 | ;
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| 46 | DevEfiParameters:
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| 47 | times DEVEFIINFO_size db 0
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| 48 |
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| 49 | ;
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| 50 | ; The IDT.
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| 51 | ; The first 16 vectors have dedicated handlers to ease debugging.
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| 52 | ; The remaining uses a common handler.
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| 53 | ;
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| 54 | align 16
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| 55 | efi_thunk_IDT:
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| 56 | %assign i 0
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| 57 | %rep 16
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| 58 | dw Trap_ %+ i, 0x10, 0x8e00, 0xffff
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| 59 | %assign i i+1
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| 60 | %endrep
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| 61 | times IDT_VECTORS-16 dw DefaultTrap, 0x10, 0x8e00, 0xffff
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| 62 |
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| 63 |
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| 64 | ;
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| 65 | ; The GDT.
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| 66 | ; Note! Keep this in sync with GDT_SELECTORS.
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| 67 | ;
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| 68 | align 16
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| 69 | efi_thunk_GDT:
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| 70 | dw 0, 0, 0, 0 ; null selector
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| 71 | dw 0, 0, 0, 0 ; ditto
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| 72 | dw 0xffff, 0, 0x9b00, 0x00cf ; 32 bit flat code segment (0x10)
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| 73 | dw 0xffff, 0, 0x9300, 0x00cf ; 32 bit flat data segment (0x18)
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| 74 | dw 0xffff, 0, 0x9b00, 0x0000 ; 16 bit code segment base=0xf0000 limit=0xffff - FIXME: the base is 0, not f0000 here.
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| 75 | dw 0xffff, 0, 0x9300, 0x0000 ; 16 bit data segment base=0x0 limit=0xffff - FIXME: ditto.
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| 76 | dw 0xffff, 0, 0x9300, 0x00cf ; 32 bit flat stack segment (0x30)
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| 77 | dw 0xffff, 0, 0x9a00, 0x00af ; 64 bit flat code segment (0x38)
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| 78 | dw 0, 0, 0, 0 ; ditto
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| 79 | dw 0, 0, 0, 0 ; ditto
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| 80 |
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| 81 | ;; For lidt
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| 82 | efi_thunk_idtr:
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| 83 | dw 8*IDT_VECTORS-1 ; limit 15:00
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| 84 | dw efi_thunk_IDT ; base 15:00
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| 85 | db 0x0f ; base 23:16
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| 86 | db 0x00 ; unused
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| 87 |
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| 88 | ;; For lgdt
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| 89 | efi_thunk_gdtr:
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| 90 | dw 8*GDT_SELECTORS-1 ; limit 15:00
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| 91 | dw efi_thunk_GDT ; base 15:00
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| 92 | db 0x0f ; base 23:16
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| 93 | db 0x00 ; unused
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| 94 |
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| 95 | BITS 32
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| 96 |
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| 97 | ;;
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| 98 | ; The default trap/interrupt handler.
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| 99 | ;
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| 100 | DefaultTrap:
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| 101 | push ebp
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| 102 | mov ebp, esp
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| 103 | mov eax, EFI_PANIC_CMD_THUNK_TRAP
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| 104 | mov edx, EFI_PANIC_PORT
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| 105 | out dx, al
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| 106 | jmp HaltForEver
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| 107 |
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| 108 | ;;
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| 109 | ; Generate 16 Trap_N handlers that pushes trap number on the stack.
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| 110 | %assign i 0
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| 111 | %rep 16
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| 112 | Trap_ %+ i:
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| 113 | push ebp ; Create a valid stackframe for the debugger. (not
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| 114 | push byte i ; quite true if there is an error value pushed)
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| 115 | jmp CommonTrap
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| 116 | %assign i i+1
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| 117 | %endrep
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| 118 |
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| 119 | ;;
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| 120 | ; Common trap handler for the 16 dedicated ones.
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| 121 | ;
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| 122 | CommonTrap:
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| 123 | lea ebp, [esp + 4] ; stack frame part 2.
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| 124 | push edx
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| 125 | push eax
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| 126 | mov edx, EFI_PANIC_PORT
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| 127 | mov eax, EFI_PANIC_CMD_THUNK_TRAP
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| 128 | out dx, al
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| 129 |
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| 130 | HaltForEver:
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| 131 | cli
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| 132 | hlt
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| 133 | jmp short HaltForEver ; In case of NMI.
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| 134 |
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| 135 | BITS 16
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| 136 | ;;
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| 137 | ; This i the place where we jump immediately after boot and
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| 138 | ; switch the CPU into protected mode.
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| 139 | ;
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| 140 | genesis:
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| 141 | %ifdef DISABLED_CODE
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| 142 | ; Say 'Hi' to the granny!
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| 143 | mov al, 0x41
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| 144 | mov dx, EFI_DEBUG_PORT
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| 145 | out dx, al
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| 146 | %endif
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| 147 | cli ; paranoia
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| 148 |
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| 149 |
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| 150 | ; enable a20
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| 151 | in al, 0x92
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| 152 | or al, 0x02
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| 153 | out 0x92, al
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| 154 |
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| 155 | ; check that we loaded in the right place
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| 156 | cmp word [cs:efi_thunk_gdtr], 8*GDT_SELECTORS-1
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| 157 | je load_ok
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| 158 | ; panic if our offset is wrong, which most likely means invalid ORG
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| 159 | mov ax, EFI_PANIC_CMD_BAD_ORG
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| 160 | mov dx, EFI_PANIC_PORT
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| 161 | out dx, al
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| 162 | load_ok:
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| 163 |
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| 164 | ; load IDTR and GDTR.
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| 165 | cs lidt [efi_thunk_idtr]
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| 166 | cs lgdt [efi_thunk_gdtr]
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| 167 |
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| 168 | ; set PE bit in CR0, not paged
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| 169 | mov eax, cr0
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| 170 | or al, X86_CR0_PE
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| 171 | mov cr0, eax
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| 172 |
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| 173 | ; start protected mode code: ljmpl 0x10:code_32
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| 174 | db 0x66, 0xea
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| 175 | dw code_32 ; low offset word
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| 176 | dw 0xffff ; high offset word
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| 177 | dw 0x0010 ; protected mode CS selector
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| 178 |
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| 179 | ;
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| 180 | ; At this point we're in 32-bit protected mode
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| 181 | ;
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| 182 | BITS 32
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| 183 | code_32:
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| 184 | ; load some segments
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| 185 | mov ax, 0x18 ; Flat 32-bit data segment
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| 186 | mov ds, ax
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| 187 | mov es, ax
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| 188 | mov ax, 0x30 ; Flat 32-bit stack segment
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| 189 | mov ss, ax
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| 190 | ; load the null selector into FS/GS (catches unwanted accesses)
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| 191 | xor ax, ax
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| 192 | mov gs, ax
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| 193 | mov fs, ax
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| 194 |
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| 195 | ;
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| 196 | ; Switch stack, have it start at the last page before 2M
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| 197 | ;
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| 198 | mov esp, 0xfffff000;
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| 199 |
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| 200 | ;
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| 201 | ; Jump to 32-bit entry point of the firmware, interrupts still disabled.
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| 202 | ;
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| 203 | ; It's up to the firmware init code to setup a working IDT (and optionally
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| 204 | ; GDT and TSS) before enabling interrupts. It may also switch the stack
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| 205 | ; around all it wants for all we care.
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| 206 | ;
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| 207 | mov eax,[0xfffff000 + DEVEFIINFO.fFlags]
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| 208 | and eax, DEVEFI_INFO_FLAGS_AMD64
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| 209 | jnz trampoline_64
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| 210 | mov ebp, [0xfffff000 + DEVEFIINFO.PhysFwVol]
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| 211 | mov esi, [0xfffff000 + DEVEFIINFO.pfnFirmwareEP]
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| 212 | mov edi, [0xfffff000 + DEVEFIINFO.pfnPeiEP]
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| 213 | jmp [0xfffff000 + DEVEFIINFO.pfnFirmwareEP]
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| 214 | jmp HaltForEver
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| 215 | trampoline_64:
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| 216 | %macro fill_pkt 1
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| 217 | %%loop:
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| 218 | mov [ebx],eax
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| 219 | xor edx,edx
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| 220 | mov [ebx + 4], edx
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| 221 | add ebx, 8
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| 222 | add eax, %1
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| 223 | loop %%loop
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| 224 | %endmacro
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| 225 |
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| 226 | %define base 0x800000;0xfffff000
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| 227 | mov ecx, 0x800 ; pde size
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| 228 | mov ebx, base - (6 << X86_PAGE_4K_SHIFT)
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| 229 | xor eax, eax
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| 230 | ;; or flags to eax
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| 231 | or eax, (X86_PDE_P|X86_PDE_A|X86_PDE_PS|X86_PDE_PCD|X86_PDE_RW|RT_BIT(6))
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| 232 | fill_pkt (1 << X86_PAGE_2M_SHIFT)
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| 233 |
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| 234 | ;; pdpt (1st 4 entries describe 4Gb)
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| 235 | mov ebx, base - (2 << X86_PAGE_4K_SHIFT)
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| 236 | mov eax, base - (6 << X86_PAGE_4K_SHIFT) ;;
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| 237 | or eax, (X86_PDPE_P|X86_PDPE_RW|X86_PDPE_A|X86_PDPE_PCD)
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| 238 | mov [ebx],eax
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| 239 | xor edx,edx
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| 240 | mov [ebx + 4], edx
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| 241 | add ebx, 8
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| 242 |
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| 243 | mov eax, base - 5 * (1 << X86_PAGE_4K_SHIFT) ;;
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| 244 | or eax, (X86_PDPE_P|X86_PDPE_RW|X86_PDPE_A|X86_PDPE_PCD)
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| 245 | mov [ebx],eax
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| 246 | xor edx,edx
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| 247 | mov [ebx + 4], edx
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| 248 | add ebx, 8
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| 249 |
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| 250 | mov eax, base - 4 * (1 << X86_PAGE_4K_SHIFT) ;;
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| 251 | or eax, (X86_PDPE_P|X86_PDPE_RW|X86_PDPE_A|X86_PDPE_PCD)
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| 252 | mov [ebx],eax
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| 253 | xor edx,edx
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| 254 | mov [ebx + 4], edx
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| 255 | add ebx, 8
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| 256 |
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| 257 | mov eax, base - 3 * (1 << X86_PAGE_4K_SHIFT) ;;
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| 258 | or eax, (X86_PDPE_P|X86_PDPE_RW|X86_PDPE_A|X86_PDPE_PCD)
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| 259 | mov [ebx],eax
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| 260 | xor edx,edx
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| 261 | mov [ebx + 4], edx
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| 262 | add ebx, 8
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| 263 |
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| 264 | mov ecx, 0x1f7 ; pdte size
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| 265 | mov ebx, base - 2 * (1 << X86_PAGE_4K_SHIFT) + 4 * 8
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| 266 | mov eax, base - 6 * (1 << X86_PAGE_4K_SHIFT);;
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| 267 | or eax, (X86_PDPE_P|X86_PDPE_RW|X86_PDPE_A|X86_PDPE_PCD)
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| 268 | ;; or flags to eax
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| 269 | fill_pkt 3 * (1 << X86_PAGE_4K_SHIFT)
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| 270 |
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| 271 | mov ecx, 0x200 ; pml4 size
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| 272 | mov ebx, base - (1 << X86_PAGE_4K_SHIFT)
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| 273 | mov eax, base - 2 * (1 << X86_PAGE_4K_SHIFT) ;;
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| 274 | or eax, (X86_PML4E_P|X86_PML4E_PCD|X86_PML4E_A|X86_PML4E_RW)
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| 275 | ;; or flags to eax
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| 276 | fill_pkt 0
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| 277 |
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| 278 | mov eax, base - (1 << X86_PAGE_4K_SHIFT)
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| 279 | mov cr3, eax
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| 280 |
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| 281 |
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| 282 | mov eax,cr4
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| 283 | or eax, X86_CR4_PAE|X86_CR4_OSFSXR|X86_CR4_OSXMMEEXCPT
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| 284 | mov cr4,eax
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| 285 |
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| 286 | mov ecx, MSR_K6_EFER
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| 287 | rdmsr
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| 288 | or eax, MSR_K6_EFER_LME
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| 289 | wrmsr
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| 290 |
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| 291 | mov eax, cr0
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| 292 | or eax, X86_CR0_PG
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| 293 | mov cr0, eax
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| 294 | jmp compat
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| 295 | compat:
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| 296 | jmp 0x38:0xffff0000 + efi_64
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| 297 | BITS 64
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| 298 | efi_64:
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| 299 | mov ebp, [0xff009] ; DEVEFIINFO.PhysFwVol
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| 300 | mov esi, [0xff000]; + DEVEFIINFO.pfnFirmwareEP]
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| 301 | mov edi, [0xff000 + 0x28]; + DEVEFIINFO.pfnPeiEP]
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| 302 | jmp [0xff000]; + DEVEFIINFO.pfnFirmwareEP]
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| 303 | jmp HaltForEver
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| 304 |
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| 305 | ;
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| 306 | ; 0xfffffff0/0xfff0 - This is where the CPU starts executing.
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| 307 | ;
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| 308 | ;; @todo yasm 0.8.0: SECTION .text start=0fff0h vstart=0fff0h ?
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| 309 | times 0xff0-$+DevEfiParameters db 0cch ; Note! $ isn't moved by ORG (yasm v0.6.2).
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| 310 | cpu_start:
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| 311 | BITS 16
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| 312 | jmp genesis
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| 313 | dw 0xdead
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| 314 | dw 0xbeaf
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| 315 | times (16 - 7) db 0cch
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| 316 | end:
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