VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 100942

Last change on this file since 100942 was 100690, checked in by vboxsync, 19 months ago

Devices/Graphics: Add support for the SVGA3 interface required for ARM, bugref:10458
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1/* $Id: DevVGA-SVGA.h 100690 2023-07-25 08:20:54Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2023 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * SPDX-License-Identifier: GPL-3.0-only
25 */
26
27#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
28#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
29#ifndef RT_WITHOUT_PRAGMA_ONCE
30# pragma once
31#endif
32
33#ifndef VBOX_WITH_VMSVGA
34# error "VBOX_WITH_VMSVGA is not defined"
35#endif
36
37#define VMSVGA_USE_EMT_HALT_CODE
38
39#include <VBox/pci.h>
40#include <VBox/vmm/pdmifs.h>
41#include <VBox/vmm/pdmthread.h>
42#include <VBox/vmm/stam.h>
43#ifdef VMSVGA_USE_EMT_HALT_CODE
44# include <VBox/vmm/vmapi.h>
45# include <VBox/vmm/vmcpuset.h>
46#endif
47
48#include <iprt/avl.h>
49#include <iprt/list.h>
50
51
52/*
53 * PCI device IDs.
54 */
55#ifndef PCI_VENDOR_ID_VMWARE
56# define PCI_VENDOR_ID_VMWARE 0x15AD
57#endif
58#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
59# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
60#endif
61#ifndef PCI_DEVICE_ID_VMWARE_SVGA3
62# define PCI_DEVICE_ID_VMWARE_SVGA3 0x0406
63#endif
64
65/* For "svga_overlay.h" */
66#ifndef TRUE
67# define TRUE 1
68#endif
69#ifndef FALSE
70# define FALSE 0
71#endif
72
73/* VMSVGA headers. */
74#include "vmsvga_headers_begin.h"
75#pragma pack(1) /* VMSVGA structures are '__packed'. */
76#include <svga3d_caps.h>
77#include <svga3d_reg.h>
78#include <svga3d_shaderdefs.h>
79#include <svga_escape.h>
80#include <svga_overlay.h>
81#pragma pack()
82#include "vmsvga_headers_end.h"
83
84/**@def FLOAT_FMT_STR
85 * Format string bits to go with FLOAT_FMT_ARGS. */
86#define FLOAT_FMT_STR "%s%u.%06u"
87/** @def FLOAT_FMT_ARGS
88 * Format arguments for a float value, corresponding to FLOAT_FMT_STR.
89 * @param r The floating point value to format. */
90#define FLOAT_FMT_ARGS(r) (r) >= 0.0f ? "" : "-", (unsigned)RT_ABS(r) \
91 , (unsigned)(RT_ABS((r) - (float)(unsigned)(r)) * 1000000.0f)
92
93/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
94#define SVGA_CMD_RECT_FILL 2
95#define SVGA_CMD_DISPLAY_CURSOR 20
96#define SVGA_CMD_MOVE_CURSOR 21
97
98/*
99 * SVGA_CMD_RECT_FILL --
100 *
101 * Fill a rectangular area in the the GFB, and copy the result
102 * to any screens which intersect it.
103 *
104 * Deprecated?
105 *
106 * Availability:
107 * SVGA_CAP_RECT_FILL
108 */
109
110typedef
111struct {
112 uint32_t pixel;
113 uint32_t destX;
114 uint32_t destY;
115 uint32_t width;
116 uint32_t height;
117} SVGAFifoCmdRectFill;
118
119/*
120 * SVGA_CMD_DISPLAY_CURSOR --
121 *
122 * Turn the cursor on or off.
123 *
124 * Deprecated.
125 *
126 * Availability:
127 * SVGA_CAP_CURSOR?
128 */
129
130typedef
131struct {
132 uint32_t id; // Reserved, must be zero.
133 uint32_t state; // 0=off
134} SVGAFifoCmdDisplayCursor;
135
136/*
137 * SVGA_CMD_MOVE_CURSOR --
138 *
139 * Set the cursor position.
140 *
141 * Deprecated.
142 *
143 * Availability:
144 * SVGA_CAP_CURSOR?
145 */
146
147typedef
148struct {
149 SVGASignedPoint pos;
150} SVGAFifoCmdMoveCursor;
151
152
153/** Default FIFO size. */
154#define VMSVGA_FIFO_SIZE _2M
155/** The old FIFO size. */
156#define VMSVGA_FIFO_SIZE_OLD _128K
157
158/** Default scratch region size. */
159#define VMSVGA_SCRATCH_SIZE 0x100
160/** Surface memory available to the guest. */
161#define VMSVGA_SURFACE_SIZE (512*1024*1024)
162/** Maximum GMR pages. */
163#define VMSVGA_MAX_GMR_PAGES 0x100000
164/** Maximum nr of GMR ids. */
165#define VMSVGA_MAX_GMR_IDS _8K
166/** Maximum number of GMR descriptors. */
167#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
168
169#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
170
171/** For validating X and width values.
172 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
173#define VMSVGA_MAX_X _1M
174/** For validating Y and height values.
175 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
176#define VMSVGA_MAX_Y _1M
177
178/* u32ActionFlags */
179#define VMSVGA_ACTION_CHANGEMODE_BIT 0
180#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
181
182
183#ifdef DEBUG
184/* Enable to log FIFO register accesses. */
185//# define DEBUG_FIFO_ACCESS
186/* Enable to log GMR page accesses. */
187//# define DEBUG_GMR_ACCESS
188#endif
189
190#define VMSVGA_FIFO_EXTCMD_NONE 0
191#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
192#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
193#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
194#define VMSVGA_FIFO_EXTCMD_RESET 4
195#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
196#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
197
198/** Size of the region to backup when switching into svga mode. */
199#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
200
201/** @def VMSVGA_WITH_VGA_FB_BACKUP
202 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
203 * is SLOW and probably not entirely right, but it helps with getting 3dmark
204 * output and other stuff. */
205#define VMSVGA_WITH_VGA_FB_BACKUP 1
206
207/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
208 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
209#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
210# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
211#else
212# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
213#endif
214
215/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
216 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
217#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
218# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
219#else
220# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
221#endif
222
223
224typedef struct
225{
226 PSSMHANDLE pSSM;
227 uint32_t uVersion;
228 uint32_t uPass;
229} VMSVGA_STATE_LOAD;
230typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
231
232/** Host screen viewport.
233 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
234typedef struct VMSVGAVIEWPORT
235{
236 uint32_t x; /**< x coordinate (left). */
237 uint32_t y; /**< y coordinate (top). */
238 uint32_t cx; /**< width. */
239 uint32_t cy; /**< height. */
240 /** Right side coordinate (exclusive). Same as x + cx. */
241 uint32_t xRight;
242 /** First quadrant low y coordinate.
243 * Same as y + cy - 1 in window coordinates. */
244 uint32_t yLowWC;
245 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
246 * Same as y - 1 in window coordinates. */
247 uint32_t yHighWC;
248 /** Alignment padding. */
249 uint32_t uAlignment;
250} VMSVGAVIEWPORT;
251
252#ifdef VBOX_WITH_VMSVGA3D
253typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
254#endif
255
256/**
257 * Screen object state.
258 */
259typedef struct VMSVGASCREENOBJECT
260{
261 /** SVGA_SCREEN_* flags. */
262 uint32_t fuScreen;
263 /** The screen object id. */
264 uint32_t idScreen;
265 /** The screen dimensions. */
266 int32_t xOrigin;
267 int32_t yOrigin;
268 uint32_t cWidth;
269 uint32_t cHeight;
270 /** Offset of the screen buffer in the guest VRAM. */
271 uint32_t offVRAM;
272 /** Scanline pitch. */
273 uint32_t cbPitch;
274 /** Bits per pixel. */
275 uint32_t cBpp;
276 /** The physical DPI that the guest expects for this screen. Zero, if the guest is not DPI aware. */
277 uint32_t cDpi;
278 bool fDefined;
279 bool fModified;
280 void *pvScreenBitmap;
281#ifdef VBOX_WITH_VMSVGA3D
282 /** Pointer to the HW accelerated (3D) screen data. */
283 R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
284#endif
285} VMSVGASCREENOBJECT;
286
287/** Pointer to the private VMSVGA ring-3 state structure.
288 * @todo Still not entirely satisfired with the type name, but better than
289 * the previous lower/upper case only distinction. */
290typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
291/** Pointer to the private (implementation specific) VMSVGA3d state. */
292typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
293
294
295/**
296 * The VMSVGA device state.
297 *
298 * This instantatiated as VGASTATE::svga.
299 */
300typedef struct VMSVGAState
301{
302 /** Guest physical address of the FIFO memory range. */
303 RTGCPHYS GCPhysFIFO;
304 /** Size in bytes of the FIFO memory range.
305 * This may be smaller than cbFIFOConfig after restoring an old VM state. */
306 uint32_t cbFIFO;
307 /** The configured FIFO size. */
308 uint32_t cbFIFOConfig;
309 /** SVGA id. */
310 uint32_t u32SVGAId;
311 /** SVGA extensions enabled or not. */
312 uint32_t fEnabled;
313 /** SVGA memory area configured status. */
314 uint32_t fConfigured;
315 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
316 * VMSVGA_BUSY_F_EMT_FORCE). */
317 uint32_t volatile fBusy;
318#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
319#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
320 /** Traces (dirty page detection) enabled or not. */
321 uint32_t fTraces;
322 /** Guest OS identifier. */
323 uint32_t u32GuestId;
324 /** Scratch region size (VMSVGAState::au32ScratchRegion). */
325 uint32_t cScratchRegion;
326 /** Irq status. */
327 uint32_t u32IrqStatus;
328 /** Irq mask. */
329 uint32_t u32IrqMask;
330 /** Pitch lock. */
331 uint32_t u32PitchLock;
332 /** Current GMR id. (SVGA_REG_GMR_ID) */
333 uint32_t u32CurrentGMRId;
334 /** SVGA device capabilities. */
335 uint32_t u32DeviceCaps;
336 uint32_t u32DeviceCaps2; /* Used to be I/O port base address and Padding0. */
337 /** Guest driver information (SVGA_REG_GUEST_DRIVER_*). */
338 uint32_t u32GuestDriverId;
339 uint32_t u32GuestDriverVer1;
340 uint32_t u32GuestDriverVer2;
341 uint32_t u32GuestDriverVer3;
342 /** The last fence received. */
343 uint32_t u32FenceLast;
344 /** Port io index register. */
345 uint32_t u32IndexReg;
346 /** FIFO request semaphore. */
347 SUPSEMEVENT hFIFORequestSem;
348 /** The last seen SVGA_FIFO_CURSOR_COUNT value.
349 * Used by the FIFO thread and its watchdog. */
350 uint32_t uLastCursorUpdateCount;
351 /** Indicates that the FIFO thread is sleeping and might need waking up. */
352 bool volatile fFIFOThreadSleeping;
353 /** The legacy GFB mode registers. If used, they correspond to screen 0. */
354 /** True when the guest modifies the GFB mode registers. */
355 bool fGFBRegisters;
356 /** SVGA 3D overlay enabled or not. */
357 bool f3DOverlayEnabled;
358 /** Indicates that the guest behaves incorrectly. */
359 bool volatile fBadGuest;
360 bool afPadding[4];
361 uint32_t uWidth;
362 uint32_t uHeight;
363 uint32_t uBpp;
364 uint32_t cbScanline;
365 uint32_t uHostBpp;
366 /** Maximum width supported. */
367 uint32_t u32MaxWidth;
368 /** Maximum height supported. */
369 uint32_t u32MaxHeight;
370 /** Viewport rectangle, i.e. what's currently visible of the target host
371 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
372 * shrunk and scrolling applied, both the origin and size may differ. */
373 VMSVGAVIEWPORT viewport;
374 /** Action flags */
375 uint32_t u32ActionFlags;
376 /** SVGA 3d extensions enabled or not. */
377 bool f3DEnabled;
378 /** VRAM page monitoring enabled or not. */
379 bool fVRAMTracking;
380 /** External command to be executed in the FIFO thread. */
381 uint8_t volatile u8FIFOExtCommand;
382 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
383 * thread and does not want it do anything but the command. */
384 bool volatile fFifoExtCommandWakeup;
385#ifdef DEBUG_GMR_ACCESS
386 /** GMR debug access handler type handle. */
387 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
388#endif
389#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
390 /** FIFO debug access handler type handle. */
391 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
392#endif
393 /** Number of GMRs (VMSVGA_MAX_GMR_IDS, count of elements in VMSVGAR3STATE::paGMR array). */
394 uint32_t cGMR;
395 uint32_t uScreenOffset; /* Used only for loading older saved states. */
396
397 /** Legacy cursor state. */
398 uint32_t uCursorX;
399 uint32_t uCursorY;
400 uint32_t uCursorID;
401 uint32_t uCursorOn;
402
403 /** Scratch array.
404 * Putting this at the end since it's big it probably not . */
405 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
406
407 /** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
408 uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
409 /** Index written to the SVGA_REG_DEV_CAP register. */
410 uint32_t u32DevCapIndex;
411 /** Low 32 bit of a command buffer address written to the SVGA_REG_COMMAND_LOW register. */
412 uint32_t u32RegCommandLow;
413 /** High 32 bit of a command buffer address written to the SVGA_REG_COMMAND_HIGH register. */
414 uint32_t u32RegCommandHigh;
415
416 STAMCOUNTER StatRegBitsPerPixelWr;
417 STAMCOUNTER StatRegBusyWr;
418 STAMCOUNTER StatRegCursorXWr;
419 STAMCOUNTER StatRegCursorYWr;
420 STAMCOUNTER StatRegCursorIdWr;
421 STAMCOUNTER StatRegCursorOnWr;
422 STAMCOUNTER StatRegDepthWr;
423 STAMCOUNTER StatRegDisplayHeightWr;
424 STAMCOUNTER StatRegDisplayIdWr;
425 STAMCOUNTER StatRegDisplayIsPrimaryWr;
426 STAMCOUNTER StatRegDisplayPositionXWr;
427 STAMCOUNTER StatRegDisplayPositionYWr;
428 STAMCOUNTER StatRegDisplayWidthWr;
429 STAMCOUNTER StatRegEnableWr;
430 STAMCOUNTER StatRegGmrIdWr;
431 STAMCOUNTER StatRegGuestIdWr;
432 STAMCOUNTER StatRegHeightWr;
433 STAMCOUNTER StatRegIdWr;
434 STAMCOUNTER StatRegIrqMaskWr;
435 STAMCOUNTER StatRegNumDisplaysWr;
436 STAMCOUNTER StatRegNumGuestDisplaysWr;
437 STAMCOUNTER StatRegPaletteWr;
438 STAMCOUNTER StatRegPitchLockWr;
439 STAMCOUNTER StatRegPseudoColorWr;
440 STAMCOUNTER StatRegReadOnlyWr;
441 STAMCOUNTER StatRegScratchWr;
442 STAMCOUNTER StatRegSyncWr;
443 STAMCOUNTER StatRegTopWr;
444 STAMCOUNTER StatRegTracesWr;
445 STAMCOUNTER StatRegUnknownWr;
446 STAMCOUNTER StatRegWidthWr;
447 STAMCOUNTER StatRegCommandLowWr;
448 STAMCOUNTER StatRegCommandHighWr;
449 STAMCOUNTER StatRegDevCapWr;
450 STAMCOUNTER StatRegCmdPrependLowWr;
451 STAMCOUNTER StatRegCmdPrependHighWr;
452
453 STAMCOUNTER StatRegBitsPerPixelRd;
454 STAMCOUNTER StatRegBlueMaskRd;
455 STAMCOUNTER StatRegBusyRd;
456 STAMCOUNTER StatRegBytesPerLineRd;
457 STAMCOUNTER StatRegCapabilitesRd;
458 STAMCOUNTER StatRegConfigDoneRd;
459 STAMCOUNTER StatRegCursorXRd;
460 STAMCOUNTER StatRegCursorYRd;
461 STAMCOUNTER StatRegCursorIdRd;
462 STAMCOUNTER StatRegCursorOnRd;
463 STAMCOUNTER StatRegDepthRd;
464 STAMCOUNTER StatRegDisplayHeightRd;
465 STAMCOUNTER StatRegDisplayIdRd;
466 STAMCOUNTER StatRegDisplayIsPrimaryRd;
467 STAMCOUNTER StatRegDisplayPositionXRd;
468 STAMCOUNTER StatRegDisplayPositionYRd;
469 STAMCOUNTER StatRegDisplayWidthRd;
470 STAMCOUNTER StatRegEnableRd;
471 STAMCOUNTER StatRegFbOffsetRd;
472 STAMCOUNTER StatRegFbSizeRd;
473 STAMCOUNTER StatRegFbStartRd;
474 STAMCOUNTER StatRegGmrIdRd;
475 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
476 STAMCOUNTER StatRegGmrMaxIdsRd;
477 STAMCOUNTER StatRegGmrsMaxPagesRd;
478 STAMCOUNTER StatRegGreenMaskRd;
479 STAMCOUNTER StatRegGuestIdRd;
480 STAMCOUNTER StatRegHeightRd;
481 STAMCOUNTER StatRegHostBitsPerPixelRd;
482 STAMCOUNTER StatRegIdRd;
483 STAMCOUNTER StatRegIrqMaskRd;
484 STAMCOUNTER StatRegMaxHeightRd;
485 STAMCOUNTER StatRegMaxWidthRd;
486 STAMCOUNTER StatRegMemorySizeRd;
487 STAMCOUNTER StatRegMemRegsRd;
488 STAMCOUNTER StatRegMemSizeRd;
489 STAMCOUNTER StatRegMemStartRd;
490 STAMCOUNTER StatRegNumDisplaysRd;
491 STAMCOUNTER StatRegNumGuestDisplaysRd;
492 STAMCOUNTER StatRegPaletteRd;
493 STAMCOUNTER StatRegPitchLockRd;
494 STAMCOUNTER StatRegPsuedoColorRd;
495 STAMCOUNTER StatRegRedMaskRd;
496 STAMCOUNTER StatRegScratchRd;
497 STAMCOUNTER StatRegScratchSizeRd;
498 STAMCOUNTER StatRegSyncRd;
499 STAMCOUNTER StatRegTopRd;
500 STAMCOUNTER StatRegTracesRd;
501 STAMCOUNTER StatRegUnknownRd;
502 STAMCOUNTER StatRegVramSizeRd;
503 STAMCOUNTER StatRegWidthRd;
504 STAMCOUNTER StatRegWriteOnlyRd;
505 STAMCOUNTER StatRegCommandLowRd;
506 STAMCOUNTER StatRegCommandHighRd;
507 STAMCOUNTER StatRegMaxPrimBBMemRd;
508 STAMCOUNTER StatRegGBMemSizeRd;
509 STAMCOUNTER StatRegDevCapRd;
510 STAMCOUNTER StatRegCmdPrependLowRd;
511 STAMCOUNTER StatRegCmdPrependHighRd;
512 STAMCOUNTER StatRegScrnTgtMaxWidthRd;
513 STAMCOUNTER StatRegScrnTgtMaxHeightRd;
514 STAMCOUNTER StatRegMobMaxSizeRd;
515} VMSVGAState, VMSVGASTATE;
516
517
518/**
519 * The VMSVGA device state for ring-3
520 *
521 * This instantatiated as VGASTATER3::svga.
522 */
523typedef struct VMSVGASTATER3
524{
525 /** The R3 FIFO pointer. */
526 R3PTRTYPE(uint32_t *) pau32FIFO;
527 /** R3 Opaque pointer to svga state. */
528 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
529 /** R3 Opaque pointer to 3d state. */
530 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
531 /** The separate VGA frame buffer in svga mode.
532 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
533 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
534 * SDK is making use of this to do VGA text output while testing other things in
535 * SVGA mode, displaying the result by switching back to VGA text mode. So,
536 * when entering SVGA mode we copy the first part of the frame buffer here and
537 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
538 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
539 /** R3 Opaque pointer to an external fifo cmd parameter. */
540 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
541
542 /** FIFO external command semaphore. */
543 R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
544 /** FIFO IO Thread. */
545 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
546} VMSVGASTATER3;
547
548
549/**
550 * The VMSVGA device state for ring-0
551 *
552 * This instantatiated as VGASTATER0::svga.
553 */
554typedef struct VMSVGASTATER0
555{
556 /** The R0 FIFO pointer.
557 * @note This only points to the _first_ _page_ of the FIFO! */
558 R0PTRTYPE(uint32_t *) pau32FIFO;
559} VMSVGASTATER0;
560
561
562typedef struct VGAState *PVGASTATE;
563typedef struct VGASTATER3 *PVGASTATER3;
564typedef struct VGASTATER0 *PVGASTATER0;
565typedef struct VGASTATERC *PVGASTATERC;
566typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
567
568DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
569 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
570DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb);
571DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
572DECLCALLBACK(VBOXSTRICTRC) vmsvga3MmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb);
573DECLCALLBACK(VBOXSTRICTRC) vmsvga3MmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb);
574
575DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
576 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
577DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
578
579int vmsvgaR3Init(PPDMDEVINS pDevIns);
580int vmsvgaR3Reset(PPDMDEVINS pDevIns);
581int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
582int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
583int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
584int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
585DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
586DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
587void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
588
589#ifdef IN_RING3
590VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
591int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
592#endif
593
594int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
595 uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
596 SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
597 uint32_t cbWidth, uint32_t cHeight);
598
599void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
600void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
601void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
602void vmsvgaR3Clip3dRect(SVGA3dRect const *pBound, SVGA3dRect RT_UNTRUSTED_GUEST *pRect);
603
604/*
605 * GBO (Guest Backed Object).
606 * A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)
607 * and Object Tables which the guest shares with the host.
608 *
609 * A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order
610 * to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to
611 * map the guest pages into the host R3 memory and access them directly.
612 */
613
614/* GBO descriptor. */
615typedef struct VMSVGAGBODESCRIPTOR
616{
617 RTGCPHYS GCPhys;
618 uint64_t cPages;
619} VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;
620typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;
621
622/* GBO.
623 */
624typedef struct VMSVGAGBO
625{
626 uint32_t fGboFlags;
627 uint32_t cTotalPages;
628 uint32_t cbTotal;
629 uint32_t cDescriptors;
630 PVMSVGAGBODESCRIPTOR paDescriptors;
631 void *pvHost; /* Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */
632} VMSVGAGBO, *PVMSVGAGBO;
633typedef VMSVGAGBO const *PCVMSVGAGBO;
634
635#define VMSVGAGBO_F_OBSOLETE_0x1 0x1
636#define VMSVGAGBO_F_HOST_BACKED 0x2
637
638#define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)
639
640int vmsvgaR3OTableReadSurface(PVMSVGAR3STATE pSvgaR3State, uint32_t sid, SVGAOTableSurfaceEntry *pEntrySurface);
641
642/* MOB is also a GBO.
643 */
644typedef struct VMSVGAMOB
645{
646 AVLU32NODECORE Core; /* Key is the mobid. */
647 RTLISTNODE nodeLRU;
648 VMSVGAGBO Gbo;
649} VMSVGAMOB, *PVMSVGAMOB;
650typedef VMSVGAMOB const *PCVMSVGAMOB;
651
652PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid);
653int vmsvgaR3MobWrite(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t off, void const *pvData, uint32_t cbData);
654int vmsvgaR3MobRead(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t off, void *pvData, uint32_t cbData);
655int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid);
656void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
657int vmsvgaR3MobBackingStoreWriteToGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
658int vmsvgaR3MobBackingStoreReadFromGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
659void *vmsvgaR3MobBackingStorePtr(PVMSVGAMOB pMob, uint32_t off);
660
661DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob)
662{
663 if (pMob)
664 return pMob->Gbo.cbTotal;
665 return 0;
666}
667
668DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob)
669{
670 if (pMob)
671 return pMob->Core.Key;
672 return SVGA_ID_INVALID;
673}
674
675#ifdef DEBUG_sunlover
676#define DEBUG_BREAKPOINT_TEST() do { ASMBreakpoint(); } while (0)
677#else
678#define DEBUG_BREAKPOINT_TEST() do { } while (0)
679#endif
680
681#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
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