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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 85546

Last change on this file since 85546 was 85368, checked in by vboxsync, 4 years ago

Devices/Graphics,Main,include: Experimental graphics output. bugref:9695
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1/* $Id: DevVGA-SVGA.h 85368 2020-07-17 09:55:56Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2020 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 */
16
17#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
18#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
19#ifndef RT_WITHOUT_PRAGMA_ONCE
20# pragma once
21#endif
22
23#ifndef VBOX_WITH_VMSVGA
24# error "VBOX_WITH_VMSVGA is not defined"
25#endif
26
27#include <VBox/vmm/pdmthread.h>
28
29#include "vmsvga/svga3d_reg.h"
30
31/** Default FIFO size. */
32#define VMSVGA_FIFO_SIZE _2M
33/** The old FIFO size. */
34#define VMSVGA_FIFO_SIZE_OLD _128K
35
36/** Default scratch region size. */
37#define VMSVGA_SCRATCH_SIZE 0x100
38/** Surface memory available to the guest. */
39#define VMSVGA_SURFACE_SIZE (512*1024*1024)
40/** Maximum GMR pages. */
41#define VMSVGA_MAX_GMR_PAGES 0x100000
42/** Maximum nr of GMR ids. */
43#define VMSVGA_MAX_GMR_IDS _8K
44/** Maximum number of GMR descriptors. */
45#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
46
47#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
48
49/** For validating X and width values.
50 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
51#define VMSVGA_MAX_X _1M
52/** For validating Y and height values.
53 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
54#define VMSVGA_MAX_Y _1M
55
56/* u32ActionFlags */
57#define VMSVGA_ACTION_CHANGEMODE_BIT 0
58#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
59
60
61#ifdef DEBUG
62/* Enable to log FIFO register accesses. */
63//# define DEBUG_FIFO_ACCESS
64/* Enable to log GMR page accesses. */
65//# define DEBUG_GMR_ACCESS
66#endif
67
68#define VMSVGA_FIFO_EXTCMD_NONE 0
69#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
70#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
71#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
72#define VMSVGA_FIFO_EXTCMD_RESET 4
73#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
74#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
75
76/** Size of the region to backup when switching into svga mode. */
77#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
78
79/** @def VMSVGA_WITH_VGA_FB_BACKUP
80 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
81 * is SLOW and probably not entirely right, but it helps with getting 3dmark
82 * output and other stuff. */
83#define VMSVGA_WITH_VGA_FB_BACKUP 1
84
85/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
86 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
87#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
88# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
89#else
90# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
91#endif
92
93/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
94 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
95#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
96# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
97#else
98# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
99#endif
100
101
102typedef struct
103{
104 PSSMHANDLE pSSM;
105 uint32_t uVersion;
106 uint32_t uPass;
107} VMSVGA_STATE_LOAD;
108typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
109
110/** Host screen viewport.
111 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
112typedef struct VMSVGAVIEWPORT
113{
114 uint32_t x; /**< x coordinate (left). */
115 uint32_t y; /**< y coordinate (top). */
116 uint32_t cx; /**< width. */
117 uint32_t cy; /**< height. */
118 /** Right side coordinate (exclusive). Same as x + cx. */
119 uint32_t xRight;
120 /** First quadrant low y coordinate.
121 * Same as y + cy - 1 in window coordinates. */
122 uint32_t yLowWC;
123 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
124 * Same as y - 1 in window coordinates. */
125 uint32_t yHighWC;
126 /** Alignment padding. */
127 uint32_t uAlignment;
128} VMSVGAVIEWPORT;
129
130#ifdef VBOX_WITH_VMSVGA3D
131typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
132#endif
133
134/**
135 * Screen object state.
136 */
137typedef struct VMSVGASCREENOBJECT
138{
139 /** SVGA_SCREEN_* flags. */
140 uint32_t fuScreen;
141 /** The screen object id. */
142 uint32_t idScreen;
143 /** The screen dimensions. */
144 int32_t xOrigin;
145 int32_t yOrigin;
146 uint32_t cWidth;
147 uint32_t cHeight;
148 /** Offset of the screen buffer in the guest VRAM. */
149 uint32_t offVRAM;
150 /** Scanline pitch. */
151 uint32_t cbPitch;
152 /** Bits per pixel. */
153 uint32_t cBpp;
154 bool fDefined;
155 bool fModified;
156#ifdef VBOX_WITH_VMSVGA3D
157 /** Pointer to the HW accelerated (3D) screen data. */
158 R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
159#endif
160} VMSVGASCREENOBJECT;
161
162/** Pointer to the private VMSVGA ring-3 state structure.
163 * @todo Still not entirely satisfired with the type name, but better than
164 * the previous lower/upper case only distinction. */
165typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
166/** Pointer to the private (implementation specific) VMSVGA3d state. */
167typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
168
169
170/**
171 * The VMSVGA device state.
172 *
173 * This instantatiated as VGASTATE::svga.
174 */
175typedef struct VMSVGAState
176{
177 /** Guest physical address of the FIFO memory range. */
178 RTGCPHYS GCPhysFIFO;
179 /** Size in bytes of the FIFO memory range.
180 * This may be smaller than cbFIFOConfig after restoring an old VM state. */
181 uint32_t cbFIFO;
182 /** The configured FIFO size. */
183 uint32_t cbFIFOConfig;
184 /** SVGA id. */
185 uint32_t u32SVGAId;
186 /** SVGA extensions enabled or not. */
187 uint32_t fEnabled;
188 /** SVGA memory area configured status. */
189 uint32_t fConfigured;
190 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
191 * VMSVGA_BUSY_F_EMT_FORCE). */
192 uint32_t volatile fBusy;
193#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
194#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
195 /** Traces (dirty page detection) enabled or not. */
196 uint32_t fTraces;
197 /** Guest OS identifier. */
198 uint32_t u32GuestId;
199 /** Scratch region size (VMSVGAState::au32ScratchRegion). */
200 uint32_t cScratchRegion;
201 /** Irq status. */
202 uint32_t u32IrqStatus;
203 /** Irq mask. */
204 uint32_t u32IrqMask;
205 /** Pitch lock. */
206 uint32_t u32PitchLock;
207 /** Current GMR id. (SVGA_REG_GMR_ID) */
208 uint32_t u32CurrentGMRId;
209 /** Register caps. */
210 uint32_t u32RegCaps;
211 uint32_t Padding0; /* Used to be I/O port base address. */
212 /** Port io index register. */
213 uint32_t u32IndexReg;
214 /** FIFO request semaphore. */
215 SUPSEMEVENT hFIFORequestSem;
216 /** The last seen SVGA_FIFO_CURSOR_COUNT value.
217 * Used by the FIFO thread and its watchdog. */
218 uint32_t uLastCursorUpdateCount;
219 /** Indicates that the FIFO thread is sleeping and might need waking up. */
220 bool volatile fFIFOThreadSleeping;
221 /** The legacy GFB mode registers. If used, they correspond to screen 0. */
222 /** True when the guest modifies the GFB mode registers. */
223 bool fGFBRegisters;
224 /** SVGA 3D overlay enabled or not. */
225 bool f3DOverlayEnabled;
226 bool afPadding[5];
227 uint32_t uWidth;
228 uint32_t uHeight;
229 uint32_t uBpp;
230 uint32_t cbScanline;
231 uint32_t uHostBpp;
232 /** Maximum width supported. */
233 uint32_t u32MaxWidth;
234 /** Maximum height supported. */
235 uint32_t u32MaxHeight;
236 /** Viewport rectangle, i.e. what's currently visible of the target host
237 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
238 * shrunk and scrolling applied, both the origin and size may differ. */
239 VMSVGAVIEWPORT viewport;
240 /** Action flags */
241 uint32_t u32ActionFlags;
242 /** SVGA 3d extensions enabled or not. */
243 bool f3DEnabled;
244 /** VRAM page monitoring enabled or not. */
245 bool fVRAMTracking;
246 /** External command to be executed in the FIFO thread. */
247 uint8_t volatile u8FIFOExtCommand;
248 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
249 * thread and does not want it do anything but the command. */
250 bool volatile fFifoExtCommandWakeup;
251#ifdef DEBUG_GMR_ACCESS
252 /** GMR debug access handler type handle. */
253 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
254#endif
255#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
256 /** FIFO debug access handler type handle. */
257 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
258#elif defined(DEBUG_GMR_ACCESS)
259 uint32_t uPadding1;
260#endif
261 /** Number of GMRs. */
262 uint32_t cGMR;
263 uint32_t uScreenOffset; /* Used only for loading older saved states. */
264
265 /** Legacy cursor state. */
266 uint32_t uCursorX;
267 uint32_t uCursorY;
268 uint32_t uCursorID;
269 uint32_t uCursorOn;
270
271 /** Scratch array.
272 * Putting this at the end since it's big it probably not . */
273 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
274
275 STAMCOUNTER StatRegBitsPerPixelWr;
276 STAMCOUNTER StatRegBusyWr;
277 STAMCOUNTER StatRegCursorXWr;
278 STAMCOUNTER StatRegCursorYWr;
279 STAMCOUNTER StatRegCursorIdWr;
280 STAMCOUNTER StatRegCursorOnWr;
281 STAMCOUNTER StatRegDepthWr;
282 STAMCOUNTER StatRegDisplayHeightWr;
283 STAMCOUNTER StatRegDisplayIdWr;
284 STAMCOUNTER StatRegDisplayIsPrimaryWr;
285 STAMCOUNTER StatRegDisplayPositionXWr;
286 STAMCOUNTER StatRegDisplayPositionYWr;
287 STAMCOUNTER StatRegDisplayWidthWr;
288 STAMCOUNTER StatRegEnableWr;
289 STAMCOUNTER StatRegGmrIdWr;
290 STAMCOUNTER StatRegGuestIdWr;
291 STAMCOUNTER StatRegHeightWr;
292 STAMCOUNTER StatRegIdWr;
293 STAMCOUNTER StatRegIrqMaskWr;
294 STAMCOUNTER StatRegNumDisplaysWr;
295 STAMCOUNTER StatRegNumGuestDisplaysWr;
296 STAMCOUNTER StatRegPaletteWr;
297 STAMCOUNTER StatRegPitchLockWr;
298 STAMCOUNTER StatRegPseudoColorWr;
299 STAMCOUNTER StatRegReadOnlyWr;
300 STAMCOUNTER StatRegScratchWr;
301 STAMCOUNTER StatRegSyncWr;
302 STAMCOUNTER StatRegTopWr;
303 STAMCOUNTER StatRegTracesWr;
304 STAMCOUNTER StatRegUnknownWr;
305 STAMCOUNTER StatRegWidthWr;
306
307 STAMCOUNTER StatRegBitsPerPixelRd;
308 STAMCOUNTER StatRegBlueMaskRd;
309 STAMCOUNTER StatRegBusyRd;
310 STAMCOUNTER StatRegBytesPerLineRd;
311 STAMCOUNTER StatRegCapabilitesRd;
312 STAMCOUNTER StatRegConfigDoneRd;
313 STAMCOUNTER StatRegCursorXRd;
314 STAMCOUNTER StatRegCursorYRd;
315 STAMCOUNTER StatRegCursorIdRd;
316 STAMCOUNTER StatRegCursorOnRd;
317 STAMCOUNTER StatRegDepthRd;
318 STAMCOUNTER StatRegDisplayHeightRd;
319 STAMCOUNTER StatRegDisplayIdRd;
320 STAMCOUNTER StatRegDisplayIsPrimaryRd;
321 STAMCOUNTER StatRegDisplayPositionXRd;
322 STAMCOUNTER StatRegDisplayPositionYRd;
323 STAMCOUNTER StatRegDisplayWidthRd;
324 STAMCOUNTER StatRegEnableRd;
325 STAMCOUNTER StatRegFbOffsetRd;
326 STAMCOUNTER StatRegFbSizeRd;
327 STAMCOUNTER StatRegFbStartRd;
328 STAMCOUNTER StatRegGmrIdRd;
329 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
330 STAMCOUNTER StatRegGmrMaxIdsRd;
331 STAMCOUNTER StatRegGmrsMaxPagesRd;
332 STAMCOUNTER StatRegGreenMaskRd;
333 STAMCOUNTER StatRegGuestIdRd;
334 STAMCOUNTER StatRegHeightRd;
335 STAMCOUNTER StatRegHostBitsPerPixelRd;
336 STAMCOUNTER StatRegIdRd;
337 STAMCOUNTER StatRegIrqMaskRd;
338 STAMCOUNTER StatRegMaxHeightRd;
339 STAMCOUNTER StatRegMaxWidthRd;
340 STAMCOUNTER StatRegMemorySizeRd;
341 STAMCOUNTER StatRegMemRegsRd;
342 STAMCOUNTER StatRegMemSizeRd;
343 STAMCOUNTER StatRegMemStartRd;
344 STAMCOUNTER StatRegNumDisplaysRd;
345 STAMCOUNTER StatRegNumGuestDisplaysRd;
346 STAMCOUNTER StatRegPaletteRd;
347 STAMCOUNTER StatRegPitchLockRd;
348 STAMCOUNTER StatRegPsuedoColorRd;
349 STAMCOUNTER StatRegRedMaskRd;
350 STAMCOUNTER StatRegScratchRd;
351 STAMCOUNTER StatRegScratchSizeRd;
352 STAMCOUNTER StatRegSyncRd;
353 STAMCOUNTER StatRegTopRd;
354 STAMCOUNTER StatRegTracesRd;
355 STAMCOUNTER StatRegUnknownRd;
356 STAMCOUNTER StatRegVramSizeRd;
357 STAMCOUNTER StatRegWidthRd;
358 STAMCOUNTER StatRegWriteOnlyRd;
359} VMSVGAState, VMSVGASTATE;
360
361
362/**
363 * The VMSVGA device state for ring-3
364 *
365 * This instantatiated as VGASTATER3::svga.
366 */
367typedef struct VMSVGASTATER3
368{
369 /** The R3 FIFO pointer. */
370 R3PTRTYPE(uint32_t *) pau32FIFO;
371 /** R3 Opaque pointer to svga state. */
372 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
373 /** R3 Opaque pointer to 3d state. */
374 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
375 /** The separate VGA frame buffer in svga mode.
376 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
377 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
378 * SDK is making use of this to do VGA text output while testing other things in
379 * SVGA mode, displaying the result by switching back to VGA text mode. So,
380 * when entering SVGA mode we copy the first part of the frame buffer here and
381 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
382 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
383 /** R3 Opaque pointer to an external fifo cmd parameter. */
384 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
385
386 /** FIFO external command semaphore. */
387 R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
388 /** FIFO IO Thread. */
389 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
390} VMSVGASTATER3;
391
392
393/**
394 * The VMSVGA device state for ring-0
395 *
396 * This instantatiated as VGASTATER0::svga.
397 */
398typedef struct VMSVGASTATER0
399{
400 /** The R0 FIFO pointer.
401 * @note This only points to the _first_ _page_ of the FIFO! */
402 R0PTRTYPE(uint32_t *) pau32FIFO;
403} VMSVGASTATER0;
404
405
406typedef struct VGAState *PVGASTATE;
407typedef struct VGASTATER3 *PVGASTATER3;
408typedef struct VGASTATER0 *PVGASTATER0;
409typedef struct VGASTATERC *PVGASTATERC;
410typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
411
412DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
413 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
414DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb);
415DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
416
417DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
418 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
419DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
420
421int vmsvgaR3Init(PPDMDEVINS pDevIns);
422int vmsvgaR3Reset(PPDMDEVINS pDevIns);
423int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
424int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
425int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
426int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
427DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
428DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
429void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
430
431#ifdef IN_RING3
432VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
433int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
434#endif
435
436int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
437 uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
438 SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
439 uint32_t cbWidth, uint32_t cHeight);
440
441void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
442void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
443void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
444
445#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
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