VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 86651

Last change on this file since 86651 was 86266, checked in by vboxsync, 4 years ago

Devices/Graphics: Split DevVGA-SVGA.cpp to two source files (device and command implementation) and an internal header file (missed a define). bugref:9830
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1/* $Id: DevVGA-SVGA.h 86266 2020-09-24 14:35:34Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2020 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 */
16
17#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
18#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
19#ifndef RT_WITHOUT_PRAGMA_ONCE
20# pragma once
21#endif
22
23#ifndef VBOX_WITH_VMSVGA
24# error "VBOX_WITH_VMSVGA is not defined"
25#endif
26
27#define VMSVGA_USE_EMT_HALT_CODE
28
29#include <VBox/pci.h>
30#include <VBox/vmm/pdmifs.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/stam.h>
33#ifdef VMSVGA_USE_EMT_HALT_CODE
34# include <VBox/vmm/vmapi.h>
35# include <VBox/vmm/vmcpuset.h>
36#endif
37
38/*
39 * PCI device IDs.
40 */
41#ifndef PCI_VENDOR_ID_VMWARE
42# define PCI_VENDOR_ID_VMWARE 0x15AD
43#endif
44#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
45# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
46#endif
47
48/* For "svga_overlay.h" */
49#ifndef TRUE
50# define TRUE 1
51#endif
52#ifndef FALSE
53# define FALSE 0
54#endif
55
56/* GCC complains that 'ISO C++ prohibits anonymous structs' when "-Wpedantic" is enabled. */
57#if RT_GNUC_PREREQ(4, 6)
58# pragma GCC diagnostic push
59# pragma GCC diagnostic ignored "-Wpedantic"
60#endif
61/* VMSVGA headers from SVGA Gallium driver. */
62#pragma pack(1) /* VMSVGA structures are '__packed'. */
63#include <svga3d_caps.h>
64#include <svga3d_reg.h>
65#include <svga3d_shaderdefs.h>
66#include <svga_escape.h>
67#include <svga_overlay.h>
68#pragma pack()
69#if RT_GNUC_PREREQ(4, 6)
70# pragma GCC diagnostic pop
71#endif
72
73/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
74#define SVGA_CMD_RECT_FILL 2
75#define SVGA_CMD_DISPLAY_CURSOR 20
76#define SVGA_CMD_MOVE_CURSOR 21
77
78/*
79 * SVGA_CMD_RECT_FILL --
80 *
81 * Fill a rectangular area in the the GFB, and copy the result
82 * to any screens which intersect it.
83 *
84 * Deprecated?
85 *
86 * Availability:
87 * SVGA_CAP_RECT_FILL
88 */
89
90typedef
91struct {
92 uint32_t pixel;
93 uint32_t destX;
94 uint32_t destY;
95 uint32_t width;
96 uint32_t height;
97} SVGAFifoCmdRectFill;
98
99/*
100 * SVGA_CMD_DISPLAY_CURSOR --
101 *
102 * Turn the cursor on or off.
103 *
104 * Deprecated.
105 *
106 * Availability:
107 * SVGA_CAP_CURSOR?
108 */
109
110typedef
111struct {
112 uint32_t id; // Reserved, must be zero.
113 uint32_t state; // 0=off
114} SVGAFifoCmdDisplayCursor;
115
116/*
117 * SVGA_CMD_MOVE_CURSOR --
118 *
119 * Set the cursor position.
120 *
121 * Deprecated.
122 *
123 * Availability:
124 * SVGA_CAP_CURSOR?
125 */
126
127typedef
128struct {
129 SVGASignedPoint pos;
130} SVGAFifoCmdMoveCursor;
131
132
133/** Default FIFO size. */
134#define VMSVGA_FIFO_SIZE _2M
135/** The old FIFO size. */
136#define VMSVGA_FIFO_SIZE_OLD _128K
137
138/** Default scratch region size. */
139#define VMSVGA_SCRATCH_SIZE 0x100
140/** Surface memory available to the guest. */
141#define VMSVGA_SURFACE_SIZE (512*1024*1024)
142/** Maximum GMR pages. */
143#define VMSVGA_MAX_GMR_PAGES 0x100000
144/** Maximum nr of GMR ids. */
145#define VMSVGA_MAX_GMR_IDS _8K
146/** Maximum number of GMR descriptors. */
147#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
148
149#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
150
151/** For validating X and width values.
152 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
153#define VMSVGA_MAX_X _1M
154/** For validating Y and height values.
155 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
156#define VMSVGA_MAX_Y _1M
157
158/* u32ActionFlags */
159#define VMSVGA_ACTION_CHANGEMODE_BIT 0
160#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
161
162
163#ifdef DEBUG
164/* Enable to log FIFO register accesses. */
165//# define DEBUG_FIFO_ACCESS
166/* Enable to log GMR page accesses. */
167//# define DEBUG_GMR_ACCESS
168#endif
169
170#define VMSVGA_FIFO_EXTCMD_NONE 0
171#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
172#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
173#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
174#define VMSVGA_FIFO_EXTCMD_RESET 4
175#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
176#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
177
178/** Size of the region to backup when switching into svga mode. */
179#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
180
181/** @def VMSVGA_WITH_VGA_FB_BACKUP
182 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
183 * is SLOW and probably not entirely right, but it helps with getting 3dmark
184 * output and other stuff. */
185#define VMSVGA_WITH_VGA_FB_BACKUP 1
186
187/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
188 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
189#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
190# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
191#else
192# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
193#endif
194
195/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
196 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
197#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
198# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
199#else
200# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
201#endif
202
203
204typedef struct
205{
206 PSSMHANDLE pSSM;
207 uint32_t uVersion;
208 uint32_t uPass;
209} VMSVGA_STATE_LOAD;
210typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
211
212/** Host screen viewport.
213 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
214typedef struct VMSVGAVIEWPORT
215{
216 uint32_t x; /**< x coordinate (left). */
217 uint32_t y; /**< y coordinate (top). */
218 uint32_t cx; /**< width. */
219 uint32_t cy; /**< height. */
220 /** Right side coordinate (exclusive). Same as x + cx. */
221 uint32_t xRight;
222 /** First quadrant low y coordinate.
223 * Same as y + cy - 1 in window coordinates. */
224 uint32_t yLowWC;
225 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
226 * Same as y - 1 in window coordinates. */
227 uint32_t yHighWC;
228 /** Alignment padding. */
229 uint32_t uAlignment;
230} VMSVGAVIEWPORT;
231
232#ifdef VBOX_WITH_VMSVGA3D
233typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
234#endif
235
236/**
237 * Screen object state.
238 */
239typedef struct VMSVGASCREENOBJECT
240{
241 /** SVGA_SCREEN_* flags. */
242 uint32_t fuScreen;
243 /** The screen object id. */
244 uint32_t idScreen;
245 /** The screen dimensions. */
246 int32_t xOrigin;
247 int32_t yOrigin;
248 uint32_t cWidth;
249 uint32_t cHeight;
250 /** Offset of the screen buffer in the guest VRAM. */
251 uint32_t offVRAM;
252 /** Scanline pitch. */
253 uint32_t cbPitch;
254 /** Bits per pixel. */
255 uint32_t cBpp;
256 bool fDefined;
257 bool fModified;
258#ifdef VBOX_WITH_VMSVGA3D
259 /** Pointer to the HW accelerated (3D) screen data. */
260 R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
261#endif
262} VMSVGASCREENOBJECT;
263
264/** Pointer to the private VMSVGA ring-3 state structure.
265 * @todo Still not entirely satisfired with the type name, but better than
266 * the previous lower/upper case only distinction. */
267typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
268/** Pointer to the private (implementation specific) VMSVGA3d state. */
269typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
270
271
272/**
273 * The VMSVGA device state.
274 *
275 * This instantatiated as VGASTATE::svga.
276 */
277typedef struct VMSVGAState
278{
279 /** Guest physical address of the FIFO memory range. */
280 RTGCPHYS GCPhysFIFO;
281 /** Size in bytes of the FIFO memory range.
282 * This may be smaller than cbFIFOConfig after restoring an old VM state. */
283 uint32_t cbFIFO;
284 /** The configured FIFO size. */
285 uint32_t cbFIFOConfig;
286 /** SVGA id. */
287 uint32_t u32SVGAId;
288 /** SVGA extensions enabled or not. */
289 uint32_t fEnabled;
290 /** SVGA memory area configured status. */
291 uint32_t fConfigured;
292 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
293 * VMSVGA_BUSY_F_EMT_FORCE). */
294 uint32_t volatile fBusy;
295#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
296#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
297 /** Traces (dirty page detection) enabled or not. */
298 uint32_t fTraces;
299 /** Guest OS identifier. */
300 uint32_t u32GuestId;
301 /** Scratch region size (VMSVGAState::au32ScratchRegion). */
302 uint32_t cScratchRegion;
303 /** Irq status. */
304 uint32_t u32IrqStatus;
305 /** Irq mask. */
306 uint32_t u32IrqMask;
307 /** Pitch lock. */
308 uint32_t u32PitchLock;
309 /** Current GMR id. (SVGA_REG_GMR_ID) */
310 uint32_t u32CurrentGMRId;
311 /** SVGA device capabilities. */
312 uint32_t u32DeviceCaps;
313 uint32_t Padding0; /* Used to be I/O port base address. */
314 /** Port io index register. */
315 uint32_t u32IndexReg;
316 /** FIFO request semaphore. */
317 SUPSEMEVENT hFIFORequestSem;
318 /** The last seen SVGA_FIFO_CURSOR_COUNT value.
319 * Used by the FIFO thread and its watchdog. */
320 uint32_t uLastCursorUpdateCount;
321 /** Indicates that the FIFO thread is sleeping and might need waking up. */
322 bool volatile fFIFOThreadSleeping;
323 /** The legacy GFB mode registers. If used, they correspond to screen 0. */
324 /** True when the guest modifies the GFB mode registers. */
325 bool fGFBRegisters;
326 /** SVGA 3D overlay enabled or not. */
327 bool f3DOverlayEnabled;
328 bool afPadding[5];
329 uint32_t uWidth;
330 uint32_t uHeight;
331 uint32_t uBpp;
332 uint32_t cbScanline;
333 uint32_t uHostBpp;
334 /** Maximum width supported. */
335 uint32_t u32MaxWidth;
336 /** Maximum height supported. */
337 uint32_t u32MaxHeight;
338 /** Viewport rectangle, i.e. what's currently visible of the target host
339 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
340 * shrunk and scrolling applied, both the origin and size may differ. */
341 VMSVGAVIEWPORT viewport;
342 /** Action flags */
343 uint32_t u32ActionFlags;
344 /** SVGA 3d extensions enabled or not. */
345 bool f3DEnabled;
346 /** VRAM page monitoring enabled or not. */
347 bool fVRAMTracking;
348 /** External command to be executed in the FIFO thread. */
349 uint8_t volatile u8FIFOExtCommand;
350 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
351 * thread and does not want it do anything but the command. */
352 bool volatile fFifoExtCommandWakeup;
353#ifdef DEBUG_GMR_ACCESS
354 /** GMR debug access handler type handle. */
355 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
356#endif
357#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
358 /** FIFO debug access handler type handle. */
359 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
360#elif defined(DEBUG_GMR_ACCESS)
361 uint32_t uPadding1;
362#endif
363 /** Number of GMRs. */
364 uint32_t cGMR;
365 uint32_t uScreenOffset; /* Used only for loading older saved states. */
366
367 /** Legacy cursor state. */
368 uint32_t uCursorX;
369 uint32_t uCursorY;
370 uint32_t uCursorID;
371 uint32_t uCursorOn;
372
373 /** Scratch array.
374 * Putting this at the end since it's big it probably not . */
375 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
376
377 /** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
378 uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
379 /** Index written to the SVGA_REG_DEV_CAP register. */
380 uint32_t u32DevCapIndex;
381 uint32_t u32RegCommandLow;
382 uint32_t u32RegCommandHigh;
383
384 STAMCOUNTER StatRegBitsPerPixelWr;
385 STAMCOUNTER StatRegBusyWr;
386 STAMCOUNTER StatRegCursorXWr;
387 STAMCOUNTER StatRegCursorYWr;
388 STAMCOUNTER StatRegCursorIdWr;
389 STAMCOUNTER StatRegCursorOnWr;
390 STAMCOUNTER StatRegDepthWr;
391 STAMCOUNTER StatRegDisplayHeightWr;
392 STAMCOUNTER StatRegDisplayIdWr;
393 STAMCOUNTER StatRegDisplayIsPrimaryWr;
394 STAMCOUNTER StatRegDisplayPositionXWr;
395 STAMCOUNTER StatRegDisplayPositionYWr;
396 STAMCOUNTER StatRegDisplayWidthWr;
397 STAMCOUNTER StatRegEnableWr;
398 STAMCOUNTER StatRegGmrIdWr;
399 STAMCOUNTER StatRegGuestIdWr;
400 STAMCOUNTER StatRegHeightWr;
401 STAMCOUNTER StatRegIdWr;
402 STAMCOUNTER StatRegIrqMaskWr;
403 STAMCOUNTER StatRegNumDisplaysWr;
404 STAMCOUNTER StatRegNumGuestDisplaysWr;
405 STAMCOUNTER StatRegPaletteWr;
406 STAMCOUNTER StatRegPitchLockWr;
407 STAMCOUNTER StatRegPseudoColorWr;
408 STAMCOUNTER StatRegReadOnlyWr;
409 STAMCOUNTER StatRegScratchWr;
410 STAMCOUNTER StatRegSyncWr;
411 STAMCOUNTER StatRegTopWr;
412 STAMCOUNTER StatRegTracesWr;
413 STAMCOUNTER StatRegUnknownWr;
414 STAMCOUNTER StatRegWidthWr;
415 STAMCOUNTER StatRegCommandLowWr;
416 STAMCOUNTER StatRegCommandHighWr;
417 STAMCOUNTER StatRegDevCapWr;
418 STAMCOUNTER StatRegCmdPrependLowWr;
419 STAMCOUNTER StatRegCmdPrependHighWr;
420
421 STAMCOUNTER StatRegBitsPerPixelRd;
422 STAMCOUNTER StatRegBlueMaskRd;
423 STAMCOUNTER StatRegBusyRd;
424 STAMCOUNTER StatRegBytesPerLineRd;
425 STAMCOUNTER StatRegCapabilitesRd;
426 STAMCOUNTER StatRegConfigDoneRd;
427 STAMCOUNTER StatRegCursorXRd;
428 STAMCOUNTER StatRegCursorYRd;
429 STAMCOUNTER StatRegCursorIdRd;
430 STAMCOUNTER StatRegCursorOnRd;
431 STAMCOUNTER StatRegDepthRd;
432 STAMCOUNTER StatRegDisplayHeightRd;
433 STAMCOUNTER StatRegDisplayIdRd;
434 STAMCOUNTER StatRegDisplayIsPrimaryRd;
435 STAMCOUNTER StatRegDisplayPositionXRd;
436 STAMCOUNTER StatRegDisplayPositionYRd;
437 STAMCOUNTER StatRegDisplayWidthRd;
438 STAMCOUNTER StatRegEnableRd;
439 STAMCOUNTER StatRegFbOffsetRd;
440 STAMCOUNTER StatRegFbSizeRd;
441 STAMCOUNTER StatRegFbStartRd;
442 STAMCOUNTER StatRegGmrIdRd;
443 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
444 STAMCOUNTER StatRegGmrMaxIdsRd;
445 STAMCOUNTER StatRegGmrsMaxPagesRd;
446 STAMCOUNTER StatRegGreenMaskRd;
447 STAMCOUNTER StatRegGuestIdRd;
448 STAMCOUNTER StatRegHeightRd;
449 STAMCOUNTER StatRegHostBitsPerPixelRd;
450 STAMCOUNTER StatRegIdRd;
451 STAMCOUNTER StatRegIrqMaskRd;
452 STAMCOUNTER StatRegMaxHeightRd;
453 STAMCOUNTER StatRegMaxWidthRd;
454 STAMCOUNTER StatRegMemorySizeRd;
455 STAMCOUNTER StatRegMemRegsRd;
456 STAMCOUNTER StatRegMemSizeRd;
457 STAMCOUNTER StatRegMemStartRd;
458 STAMCOUNTER StatRegNumDisplaysRd;
459 STAMCOUNTER StatRegNumGuestDisplaysRd;
460 STAMCOUNTER StatRegPaletteRd;
461 STAMCOUNTER StatRegPitchLockRd;
462 STAMCOUNTER StatRegPsuedoColorRd;
463 STAMCOUNTER StatRegRedMaskRd;
464 STAMCOUNTER StatRegScratchRd;
465 STAMCOUNTER StatRegScratchSizeRd;
466 STAMCOUNTER StatRegSyncRd;
467 STAMCOUNTER StatRegTopRd;
468 STAMCOUNTER StatRegTracesRd;
469 STAMCOUNTER StatRegUnknownRd;
470 STAMCOUNTER StatRegVramSizeRd;
471 STAMCOUNTER StatRegWidthRd;
472 STAMCOUNTER StatRegWriteOnlyRd;
473 STAMCOUNTER StatRegCommandLowRd;
474 STAMCOUNTER StatRegCommandHighRd;
475 STAMCOUNTER StatRegMaxPrimBBMemRd;
476 STAMCOUNTER StatRegGBMemSizeRd;
477 STAMCOUNTER StatRegDevCapRd;
478 STAMCOUNTER StatRegCmdPrependLowRd;
479 STAMCOUNTER StatRegCmdPrependHighRd;
480 STAMCOUNTER StatRegScrnTgtMaxWidthRd;
481 STAMCOUNTER StatRegScrnTgtMaxHeightRd;
482 STAMCOUNTER StatRegMobMaxSizeRd;
483} VMSVGAState, VMSVGASTATE;
484
485
486/**
487 * The VMSVGA device state for ring-3
488 *
489 * This instantatiated as VGASTATER3::svga.
490 */
491typedef struct VMSVGASTATER3
492{
493 /** The R3 FIFO pointer. */
494 R3PTRTYPE(uint32_t *) pau32FIFO;
495 /** R3 Opaque pointer to svga state. */
496 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
497 /** R3 Opaque pointer to 3d state. */
498 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
499 /** The separate VGA frame buffer in svga mode.
500 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
501 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
502 * SDK is making use of this to do VGA text output while testing other things in
503 * SVGA mode, displaying the result by switching back to VGA text mode. So,
504 * when entering SVGA mode we copy the first part of the frame buffer here and
505 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
506 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
507 /** R3 Opaque pointer to an external fifo cmd parameter. */
508 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
509
510 /** FIFO external command semaphore. */
511 R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
512 /** FIFO IO Thread. */
513 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
514} VMSVGASTATER3;
515
516
517/**
518 * The VMSVGA device state for ring-0
519 *
520 * This instantatiated as VGASTATER0::svga.
521 */
522typedef struct VMSVGASTATER0
523{
524 /** The R0 FIFO pointer.
525 * @note This only points to the _first_ _page_ of the FIFO! */
526 R0PTRTYPE(uint32_t *) pau32FIFO;
527} VMSVGASTATER0;
528
529
530typedef struct VGAState *PVGASTATE;
531typedef struct VGASTATER3 *PVGASTATER3;
532typedef struct VGASTATER0 *PVGASTATER0;
533typedef struct VGASTATERC *PVGASTATERC;
534typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
535
536DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
537 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
538DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb);
539DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
540
541DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
542 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
543DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
544
545int vmsvgaR3Init(PPDMDEVINS pDevIns);
546int vmsvgaR3Reset(PPDMDEVINS pDevIns);
547int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
548int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
549int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
550int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
551DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
552DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
553void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
554
555#ifdef IN_RING3
556VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
557int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
558#endif
559
560int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
561 uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
562 SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
563 uint32_t cbWidth, uint32_t cHeight);
564
565void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
566void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
567void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
568
569#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
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