VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 100157

Last change on this file since 100157 was 99535, checked in by vboxsync, 20 months ago

Devices/Graphics: SVGA_REG_CAP2; SET_*_CONSTANT_BUFFER_OFFSET; fixes for shader parser. bugref:9830
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1/* $Id: DevVGA-SVGA.h 99535 2023-04-26 16:52:49Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2023 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.virtualbox.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * SPDX-License-Identifier: GPL-3.0-only
25 */
26
27#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
28#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
29#ifndef RT_WITHOUT_PRAGMA_ONCE
30# pragma once
31#endif
32
33#ifndef VBOX_WITH_VMSVGA
34# error "VBOX_WITH_VMSVGA is not defined"
35#endif
36
37#define VMSVGA_USE_EMT_HALT_CODE
38
39#include <VBox/pci.h>
40#include <VBox/vmm/pdmifs.h>
41#include <VBox/vmm/pdmthread.h>
42#include <VBox/vmm/stam.h>
43#ifdef VMSVGA_USE_EMT_HALT_CODE
44# include <VBox/vmm/vmapi.h>
45# include <VBox/vmm/vmcpuset.h>
46#endif
47
48#include <iprt/avl.h>
49#include <iprt/list.h>
50
51
52/*
53 * PCI device IDs.
54 */
55#ifndef PCI_VENDOR_ID_VMWARE
56# define PCI_VENDOR_ID_VMWARE 0x15AD
57#endif
58#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
59# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
60#endif
61
62/* For "svga_overlay.h" */
63#ifndef TRUE
64# define TRUE 1
65#endif
66#ifndef FALSE
67# define FALSE 0
68#endif
69
70/* VMSVGA headers. */
71#include "vmsvga_headers_begin.h"
72#pragma pack(1) /* VMSVGA structures are '__packed'. */
73#include <svga3d_caps.h>
74#include <svga3d_reg.h>
75#include <svga3d_shaderdefs.h>
76#include <svga_escape.h>
77#include <svga_overlay.h>
78#pragma pack()
79#include "vmsvga_headers_end.h"
80
81/**@def FLOAT_FMT_STR
82 * Format string bits to go with FLOAT_FMT_ARGS. */
83#define FLOAT_FMT_STR "%s%u.%06u"
84/** @def FLOAT_FMT_ARGS
85 * Format arguments for a float value, corresponding to FLOAT_FMT_STR.
86 * @param r The floating point value to format. */
87#define FLOAT_FMT_ARGS(r) (r) >= 0.0f ? "" : "-", (unsigned)RT_ABS(r) \
88 , (unsigned)(RT_ABS((r) - (float)(unsigned)(r)) * 1000000.0f)
89
90/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
91#define SVGA_CMD_RECT_FILL 2
92#define SVGA_CMD_DISPLAY_CURSOR 20
93#define SVGA_CMD_MOVE_CURSOR 21
94
95/*
96 * SVGA_CMD_RECT_FILL --
97 *
98 * Fill a rectangular area in the the GFB, and copy the result
99 * to any screens which intersect it.
100 *
101 * Deprecated?
102 *
103 * Availability:
104 * SVGA_CAP_RECT_FILL
105 */
106
107typedef
108struct {
109 uint32_t pixel;
110 uint32_t destX;
111 uint32_t destY;
112 uint32_t width;
113 uint32_t height;
114} SVGAFifoCmdRectFill;
115
116/*
117 * SVGA_CMD_DISPLAY_CURSOR --
118 *
119 * Turn the cursor on or off.
120 *
121 * Deprecated.
122 *
123 * Availability:
124 * SVGA_CAP_CURSOR?
125 */
126
127typedef
128struct {
129 uint32_t id; // Reserved, must be zero.
130 uint32_t state; // 0=off
131} SVGAFifoCmdDisplayCursor;
132
133/*
134 * SVGA_CMD_MOVE_CURSOR --
135 *
136 * Set the cursor position.
137 *
138 * Deprecated.
139 *
140 * Availability:
141 * SVGA_CAP_CURSOR?
142 */
143
144typedef
145struct {
146 SVGASignedPoint pos;
147} SVGAFifoCmdMoveCursor;
148
149
150/** Default FIFO size. */
151#define VMSVGA_FIFO_SIZE _2M
152/** The old FIFO size. */
153#define VMSVGA_FIFO_SIZE_OLD _128K
154
155/** Default scratch region size. */
156#define VMSVGA_SCRATCH_SIZE 0x100
157/** Surface memory available to the guest. */
158#define VMSVGA_SURFACE_SIZE (512*1024*1024)
159/** Maximum GMR pages. */
160#define VMSVGA_MAX_GMR_PAGES 0x100000
161/** Maximum nr of GMR ids. */
162#define VMSVGA_MAX_GMR_IDS _8K
163/** Maximum number of GMR descriptors. */
164#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
165
166#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
167
168/** For validating X and width values.
169 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
170#define VMSVGA_MAX_X _1M
171/** For validating Y and height values.
172 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
173#define VMSVGA_MAX_Y _1M
174
175/* u32ActionFlags */
176#define VMSVGA_ACTION_CHANGEMODE_BIT 0
177#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
178
179
180#ifdef DEBUG
181/* Enable to log FIFO register accesses. */
182//# define DEBUG_FIFO_ACCESS
183/* Enable to log GMR page accesses. */
184//# define DEBUG_GMR_ACCESS
185#endif
186
187#define VMSVGA_FIFO_EXTCMD_NONE 0
188#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
189#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
190#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
191#define VMSVGA_FIFO_EXTCMD_RESET 4
192#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
193#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
194
195/** Size of the region to backup when switching into svga mode. */
196#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
197
198/** @def VMSVGA_WITH_VGA_FB_BACKUP
199 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
200 * is SLOW and probably not entirely right, but it helps with getting 3dmark
201 * output and other stuff. */
202#define VMSVGA_WITH_VGA_FB_BACKUP 1
203
204/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
205 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
206#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
207# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
208#else
209# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
210#endif
211
212/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
213 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
214#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
215# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
216#else
217# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
218#endif
219
220
221typedef struct
222{
223 PSSMHANDLE pSSM;
224 uint32_t uVersion;
225 uint32_t uPass;
226} VMSVGA_STATE_LOAD;
227typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
228
229/** Host screen viewport.
230 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
231typedef struct VMSVGAVIEWPORT
232{
233 uint32_t x; /**< x coordinate (left). */
234 uint32_t y; /**< y coordinate (top). */
235 uint32_t cx; /**< width. */
236 uint32_t cy; /**< height. */
237 /** Right side coordinate (exclusive). Same as x + cx. */
238 uint32_t xRight;
239 /** First quadrant low y coordinate.
240 * Same as y + cy - 1 in window coordinates. */
241 uint32_t yLowWC;
242 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
243 * Same as y - 1 in window coordinates. */
244 uint32_t yHighWC;
245 /** Alignment padding. */
246 uint32_t uAlignment;
247} VMSVGAVIEWPORT;
248
249#ifdef VBOX_WITH_VMSVGA3D
250typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
251#endif
252
253/**
254 * Screen object state.
255 */
256typedef struct VMSVGASCREENOBJECT
257{
258 /** SVGA_SCREEN_* flags. */
259 uint32_t fuScreen;
260 /** The screen object id. */
261 uint32_t idScreen;
262 /** The screen dimensions. */
263 int32_t xOrigin;
264 int32_t yOrigin;
265 uint32_t cWidth;
266 uint32_t cHeight;
267 /** Offset of the screen buffer in the guest VRAM. */
268 uint32_t offVRAM;
269 /** Scanline pitch. */
270 uint32_t cbPitch;
271 /** Bits per pixel. */
272 uint32_t cBpp;
273 /** The physical DPI that the guest expects for this screen. Zero, if the guest is not DPI aware. */
274 uint32_t cDpi;
275 bool fDefined;
276 bool fModified;
277 void *pvScreenBitmap;
278#ifdef VBOX_WITH_VMSVGA3D
279 /** Pointer to the HW accelerated (3D) screen data. */
280 R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
281#endif
282} VMSVGASCREENOBJECT;
283
284/** Pointer to the private VMSVGA ring-3 state structure.
285 * @todo Still not entirely satisfired with the type name, but better than
286 * the previous lower/upper case only distinction. */
287typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
288/** Pointer to the private (implementation specific) VMSVGA3d state. */
289typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
290
291
292/**
293 * The VMSVGA device state.
294 *
295 * This instantatiated as VGASTATE::svga.
296 */
297typedef struct VMSVGAState
298{
299 /** Guest physical address of the FIFO memory range. */
300 RTGCPHYS GCPhysFIFO;
301 /** Size in bytes of the FIFO memory range.
302 * This may be smaller than cbFIFOConfig after restoring an old VM state. */
303 uint32_t cbFIFO;
304 /** The configured FIFO size. */
305 uint32_t cbFIFOConfig;
306 /** SVGA id. */
307 uint32_t u32SVGAId;
308 /** SVGA extensions enabled or not. */
309 uint32_t fEnabled;
310 /** SVGA memory area configured status. */
311 uint32_t fConfigured;
312 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
313 * VMSVGA_BUSY_F_EMT_FORCE). */
314 uint32_t volatile fBusy;
315#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
316#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
317 /** Traces (dirty page detection) enabled or not. */
318 uint32_t fTraces;
319 /** Guest OS identifier. */
320 uint32_t u32GuestId;
321 /** Scratch region size (VMSVGAState::au32ScratchRegion). */
322 uint32_t cScratchRegion;
323 /** Irq status. */
324 uint32_t u32IrqStatus;
325 /** Irq mask. */
326 uint32_t u32IrqMask;
327 /** Pitch lock. */
328 uint32_t u32PitchLock;
329 /** Current GMR id. (SVGA_REG_GMR_ID) */
330 uint32_t u32CurrentGMRId;
331 /** SVGA device capabilities. */
332 uint32_t u32DeviceCaps;
333 uint32_t u32DeviceCaps2; /* Used to be I/O port base address and Padding0. */
334 /** Guest driver information (SVGA_REG_GUEST_DRIVER_*). */
335 uint32_t u32GuestDriverId;
336 uint32_t u32GuestDriverVer1;
337 uint32_t u32GuestDriverVer2;
338 uint32_t u32GuestDriverVer3;
339 /** Port io index register. */
340 uint32_t u32IndexReg;
341 /** FIFO request semaphore. */
342 SUPSEMEVENT hFIFORequestSem;
343 /** The last seen SVGA_FIFO_CURSOR_COUNT value.
344 * Used by the FIFO thread and its watchdog. */
345 uint32_t uLastCursorUpdateCount;
346 /** Indicates that the FIFO thread is sleeping and might need waking up. */
347 bool volatile fFIFOThreadSleeping;
348 /** The legacy GFB mode registers. If used, they correspond to screen 0. */
349 /** True when the guest modifies the GFB mode registers. */
350 bool fGFBRegisters;
351 /** SVGA 3D overlay enabled or not. */
352 bool f3DOverlayEnabled;
353 /** Indicates that the guest behaves incorrectly. */
354 bool volatile fBadGuest;
355 bool afPadding[4];
356 uint32_t uWidth;
357 uint32_t uHeight;
358 uint32_t uBpp;
359 uint32_t cbScanline;
360 uint32_t uHostBpp;
361 /** Maximum width supported. */
362 uint32_t u32MaxWidth;
363 /** Maximum height supported. */
364 uint32_t u32MaxHeight;
365 /** Viewport rectangle, i.e. what's currently visible of the target host
366 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
367 * shrunk and scrolling applied, both the origin and size may differ. */
368 VMSVGAVIEWPORT viewport;
369 /** Action flags */
370 uint32_t u32ActionFlags;
371 /** SVGA 3d extensions enabled or not. */
372 bool f3DEnabled;
373 /** VRAM page monitoring enabled or not. */
374 bool fVRAMTracking;
375 /** External command to be executed in the FIFO thread. */
376 uint8_t volatile u8FIFOExtCommand;
377 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
378 * thread and does not want it do anything but the command. */
379 bool volatile fFifoExtCommandWakeup;
380#ifdef DEBUG_GMR_ACCESS
381 /** GMR debug access handler type handle. */
382 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
383#endif
384#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
385 /** FIFO debug access handler type handle. */
386 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
387#endif
388 /** Number of GMRs (VMSVGA_MAX_GMR_IDS, count of elements in VMSVGAR3STATE::paGMR array). */
389 uint32_t cGMR;
390 uint32_t uScreenOffset; /* Used only for loading older saved states. */
391
392 /** Legacy cursor state. */
393 uint32_t uCursorX;
394 uint32_t uCursorY;
395 uint32_t uCursorID;
396 uint32_t uCursorOn;
397
398 /** Scratch array.
399 * Putting this at the end since it's big it probably not . */
400 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
401
402 /** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
403 uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
404 /** Index written to the SVGA_REG_DEV_CAP register. */
405 uint32_t u32DevCapIndex;
406 /** Low 32 bit of a command buffer address written to the SVGA_REG_COMMAND_LOW register. */
407 uint32_t u32RegCommandLow;
408 /** High 32 bit of a command buffer address written to the SVGA_REG_COMMAND_HIGH register. */
409 uint32_t u32RegCommandHigh;
410
411 STAMCOUNTER StatRegBitsPerPixelWr;
412 STAMCOUNTER StatRegBusyWr;
413 STAMCOUNTER StatRegCursorXWr;
414 STAMCOUNTER StatRegCursorYWr;
415 STAMCOUNTER StatRegCursorIdWr;
416 STAMCOUNTER StatRegCursorOnWr;
417 STAMCOUNTER StatRegDepthWr;
418 STAMCOUNTER StatRegDisplayHeightWr;
419 STAMCOUNTER StatRegDisplayIdWr;
420 STAMCOUNTER StatRegDisplayIsPrimaryWr;
421 STAMCOUNTER StatRegDisplayPositionXWr;
422 STAMCOUNTER StatRegDisplayPositionYWr;
423 STAMCOUNTER StatRegDisplayWidthWr;
424 STAMCOUNTER StatRegEnableWr;
425 STAMCOUNTER StatRegGmrIdWr;
426 STAMCOUNTER StatRegGuestIdWr;
427 STAMCOUNTER StatRegHeightWr;
428 STAMCOUNTER StatRegIdWr;
429 STAMCOUNTER StatRegIrqMaskWr;
430 STAMCOUNTER StatRegNumDisplaysWr;
431 STAMCOUNTER StatRegNumGuestDisplaysWr;
432 STAMCOUNTER StatRegPaletteWr;
433 STAMCOUNTER StatRegPitchLockWr;
434 STAMCOUNTER StatRegPseudoColorWr;
435 STAMCOUNTER StatRegReadOnlyWr;
436 STAMCOUNTER StatRegScratchWr;
437 STAMCOUNTER StatRegSyncWr;
438 STAMCOUNTER StatRegTopWr;
439 STAMCOUNTER StatRegTracesWr;
440 STAMCOUNTER StatRegUnknownWr;
441 STAMCOUNTER StatRegWidthWr;
442 STAMCOUNTER StatRegCommandLowWr;
443 STAMCOUNTER StatRegCommandHighWr;
444 STAMCOUNTER StatRegDevCapWr;
445 STAMCOUNTER StatRegCmdPrependLowWr;
446 STAMCOUNTER StatRegCmdPrependHighWr;
447
448 STAMCOUNTER StatRegBitsPerPixelRd;
449 STAMCOUNTER StatRegBlueMaskRd;
450 STAMCOUNTER StatRegBusyRd;
451 STAMCOUNTER StatRegBytesPerLineRd;
452 STAMCOUNTER StatRegCapabilitesRd;
453 STAMCOUNTER StatRegConfigDoneRd;
454 STAMCOUNTER StatRegCursorXRd;
455 STAMCOUNTER StatRegCursorYRd;
456 STAMCOUNTER StatRegCursorIdRd;
457 STAMCOUNTER StatRegCursorOnRd;
458 STAMCOUNTER StatRegDepthRd;
459 STAMCOUNTER StatRegDisplayHeightRd;
460 STAMCOUNTER StatRegDisplayIdRd;
461 STAMCOUNTER StatRegDisplayIsPrimaryRd;
462 STAMCOUNTER StatRegDisplayPositionXRd;
463 STAMCOUNTER StatRegDisplayPositionYRd;
464 STAMCOUNTER StatRegDisplayWidthRd;
465 STAMCOUNTER StatRegEnableRd;
466 STAMCOUNTER StatRegFbOffsetRd;
467 STAMCOUNTER StatRegFbSizeRd;
468 STAMCOUNTER StatRegFbStartRd;
469 STAMCOUNTER StatRegGmrIdRd;
470 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
471 STAMCOUNTER StatRegGmrMaxIdsRd;
472 STAMCOUNTER StatRegGmrsMaxPagesRd;
473 STAMCOUNTER StatRegGreenMaskRd;
474 STAMCOUNTER StatRegGuestIdRd;
475 STAMCOUNTER StatRegHeightRd;
476 STAMCOUNTER StatRegHostBitsPerPixelRd;
477 STAMCOUNTER StatRegIdRd;
478 STAMCOUNTER StatRegIrqMaskRd;
479 STAMCOUNTER StatRegMaxHeightRd;
480 STAMCOUNTER StatRegMaxWidthRd;
481 STAMCOUNTER StatRegMemorySizeRd;
482 STAMCOUNTER StatRegMemRegsRd;
483 STAMCOUNTER StatRegMemSizeRd;
484 STAMCOUNTER StatRegMemStartRd;
485 STAMCOUNTER StatRegNumDisplaysRd;
486 STAMCOUNTER StatRegNumGuestDisplaysRd;
487 STAMCOUNTER StatRegPaletteRd;
488 STAMCOUNTER StatRegPitchLockRd;
489 STAMCOUNTER StatRegPsuedoColorRd;
490 STAMCOUNTER StatRegRedMaskRd;
491 STAMCOUNTER StatRegScratchRd;
492 STAMCOUNTER StatRegScratchSizeRd;
493 STAMCOUNTER StatRegSyncRd;
494 STAMCOUNTER StatRegTopRd;
495 STAMCOUNTER StatRegTracesRd;
496 STAMCOUNTER StatRegUnknownRd;
497 STAMCOUNTER StatRegVramSizeRd;
498 STAMCOUNTER StatRegWidthRd;
499 STAMCOUNTER StatRegWriteOnlyRd;
500 STAMCOUNTER StatRegCommandLowRd;
501 STAMCOUNTER StatRegCommandHighRd;
502 STAMCOUNTER StatRegMaxPrimBBMemRd;
503 STAMCOUNTER StatRegGBMemSizeRd;
504 STAMCOUNTER StatRegDevCapRd;
505 STAMCOUNTER StatRegCmdPrependLowRd;
506 STAMCOUNTER StatRegCmdPrependHighRd;
507 STAMCOUNTER StatRegScrnTgtMaxWidthRd;
508 STAMCOUNTER StatRegScrnTgtMaxHeightRd;
509 STAMCOUNTER StatRegMobMaxSizeRd;
510} VMSVGAState, VMSVGASTATE;
511
512
513/**
514 * The VMSVGA device state for ring-3
515 *
516 * This instantatiated as VGASTATER3::svga.
517 */
518typedef struct VMSVGASTATER3
519{
520 /** The R3 FIFO pointer. */
521 R3PTRTYPE(uint32_t *) pau32FIFO;
522 /** R3 Opaque pointer to svga state. */
523 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
524 /** R3 Opaque pointer to 3d state. */
525 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
526 /** The separate VGA frame buffer in svga mode.
527 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
528 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
529 * SDK is making use of this to do VGA text output while testing other things in
530 * SVGA mode, displaying the result by switching back to VGA text mode. So,
531 * when entering SVGA mode we copy the first part of the frame buffer here and
532 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
533 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
534 /** R3 Opaque pointer to an external fifo cmd parameter. */
535 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
536
537 /** FIFO external command semaphore. */
538 R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
539 /** FIFO IO Thread. */
540 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
541} VMSVGASTATER3;
542
543
544/**
545 * The VMSVGA device state for ring-0
546 *
547 * This instantatiated as VGASTATER0::svga.
548 */
549typedef struct VMSVGASTATER0
550{
551 /** The R0 FIFO pointer.
552 * @note This only points to the _first_ _page_ of the FIFO! */
553 R0PTRTYPE(uint32_t *) pau32FIFO;
554} VMSVGASTATER0;
555
556
557typedef struct VGAState *PVGASTATE;
558typedef struct VGASTATER3 *PVGASTATER3;
559typedef struct VGASTATER0 *PVGASTATER0;
560typedef struct VGASTATERC *PVGASTATERC;
561typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
562
563DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
564 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
565DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb);
566DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
567
568DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
569 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
570DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
571
572int vmsvgaR3Init(PPDMDEVINS pDevIns);
573int vmsvgaR3Reset(PPDMDEVINS pDevIns);
574int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
575int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
576int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
577int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
578DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
579DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
580void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
581
582#ifdef IN_RING3
583VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
584int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
585#endif
586
587int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
588 uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
589 SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
590 uint32_t cbWidth, uint32_t cHeight);
591
592void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
593void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
594void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
595void vmsvgaR3Clip3dRect(SVGA3dRect const *pBound, SVGA3dRect RT_UNTRUSTED_GUEST *pRect);
596
597/*
598 * GBO (Guest Backed Object).
599 * A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)
600 * and Object Tables which the guest shares with the host.
601 *
602 * A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order
603 * to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to
604 * map the guest pages into the host R3 memory and access them directly.
605 */
606
607/* GBO descriptor. */
608typedef struct VMSVGAGBODESCRIPTOR
609{
610 RTGCPHYS GCPhys;
611 uint64_t cPages;
612} VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;
613typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;
614
615/* GBO.
616 */
617typedef struct VMSVGAGBO
618{
619 uint32_t fGboFlags;
620 uint32_t cTotalPages;
621 uint32_t cbTotal;
622 uint32_t cDescriptors;
623 PVMSVGAGBODESCRIPTOR paDescriptors;
624 void *pvHost; /* Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */
625} VMSVGAGBO, *PVMSVGAGBO;
626typedef VMSVGAGBO const *PCVMSVGAGBO;
627
628#define VMSVGAGBO_F_OBSOLETE_0x1 0x1
629#define VMSVGAGBO_F_HOST_BACKED 0x2
630
631#define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)
632
633int vmsvgaR3OTableReadSurface(PVMSVGAR3STATE pSvgaR3State, uint32_t sid, SVGAOTableSurfaceEntry *pEntrySurface);
634
635/* MOB is also a GBO.
636 */
637typedef struct VMSVGAMOB
638{
639 AVLU32NODECORE Core; /* Key is the mobid. */
640 RTLISTNODE nodeLRU;
641 VMSVGAGBO Gbo;
642} VMSVGAMOB, *PVMSVGAMOB;
643typedef VMSVGAMOB const *PCVMSVGAMOB;
644
645PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid);
646int vmsvgaR3MobWrite(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t off, void const *pvData, uint32_t cbData);
647int vmsvgaR3MobRead(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t off, void *pvData, uint32_t cbData);
648int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid);
649void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
650int vmsvgaR3MobBackingStoreWriteToGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
651int vmsvgaR3MobBackingStoreReadFromGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
652void *vmsvgaR3MobBackingStorePtr(PVMSVGAMOB pMob, uint32_t off);
653
654DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob)
655{
656 if (pMob)
657 return pMob->Gbo.cbTotal;
658 return 0;
659}
660
661DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob)
662{
663 if (pMob)
664 return pMob->Core.Key;
665 return SVGA_ID_INVALID;
666}
667
668#ifdef DEBUG_sunlover
669#define DEBUG_BREAKPOINT_TEST() do { ASMBreakpoint(); } while (0)
670#else
671#define DEBUG_BREAKPOINT_TEST() do { } while (0)
672#endif
673
674#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
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