VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 65294

Last change on this file since 65294 was 65294, checked in by vboxsync, 8 years ago

VMSVGA: Updates.

  • Moved VMSVGA specific structures and defines from DevVGA.h to DevVGA-SVGA.h.
  • Corrected SVGA_REG_PSUDOCOLOR value for 8-bit mode.
  • Increased the VGA framebuffer backup from 32KB to 512KB (same as VGA_MAPPING_SIZE).
  • Increased the VGA saved state version to deal with this.
  • Don't allow the VGA MMIO access to anything but the backup FB in SVGA mode.
  • Don't assert in the 3d code on mode switch when the 3d support is disabled.
  • Let the SVGA_PALETTE_BASE registers accesses go to last_palette.
  • Implemented SVGA_CMD_DEFINE_CURSOR. (Just wanted to fix FIFO messup caused by the incomplete stub code, but did a more complete implementation just for fun.)
  • A coupld of cleanups.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 13.9 KB
Line 
1/* $Id: DevVGA-SVGA.h 65294 2017-01-14 17:15:41Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 */
16
17#ifndef ___DevVGA_SVGA_h___
18#define ___DevVGA_SVGA_h___
19
20#ifndef VBOX_WITH_VMSVGA
21# error "VBOX_WITH_VMSVGA is not defined"
22#endif
23
24#include <VBox/vmm/pdmthread.h>
25
26
27/** Default FIFO size. */
28#define VMSVGA_FIFO_SIZE 0x20000
29/** Default scratch region size. */
30#define VMSVGA_SCRATCH_SIZE 0x100
31/** Surface memory available to the guest. */
32#define VMSVGA_SURFACE_SIZE (512*1024*1024)
33/** Maximum GMR pages. */
34#define VMSVGA_MAX_GMR_PAGES 0x100000
35/** Maximum nr of GMR ids. */
36#define VMSVGA_MAX_GMR_IDS 0x100
37/** Maximum number of GMR descriptors. */
38#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
39
40#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
41
42/** For validating X and width values.
43 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
44#define VMSVGA_MAX_X _1M
45/** For validating Y and height values.
46 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
47#define VMSVGA_MAX_Y _1M
48
49/* u32ActionFlags */
50#define VMSVGA_ACTION_CHANGEMODE_BIT 0
51#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
52
53
54#ifdef DEBUG
55/* Enable to log FIFO register accesses. */
56//# define DEBUG_FIFO_ACCESS
57/* Enable to log GMR page accesses. */
58//# define DEBUG_GMR_ACCESS
59#endif
60
61#define VMSVGA_FIFO_EXTCMD_NONE 0
62#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
63#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
64#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
65#define VMSVGA_FIFO_EXTCMD_RESET 4
66#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
67
68/** Size of the region to backup when switching into svga mode. */
69#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
70
71/** @def VMSVGA_WITH_BACKUP_VGA_FB
72 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
73 * is SLOW and probably not entirely right, but it helps with getting 3dmark
74 * output and other stuff. */
75#define VMSVGA_WITH_VGA_FB_BACKUP 1
76
77/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
78 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
79#if defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)
80# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
81#else
82# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
83#endif
84
85/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
86 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
87#if defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)
88# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
89#else
90# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
91#endif
92
93
94typedef struct
95{
96 PSSMHANDLE pSSM;
97 uint32_t uVersion;
98 uint32_t uPass;
99} VMSVGA_STATE_LOAD;
100typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
101
102/** Host screen viewport.
103 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
104typedef struct VMSVGAVIEWPORT
105{
106 uint32_t x; /**< x coordinate (left). */
107 uint32_t y; /**< y coordinate (top). */
108 uint32_t cx; /**< width. */
109 uint32_t cy; /**< height. */
110 /** Right side coordinate (exclusive). Same as x + cx. */
111 uint32_t xRight;
112 /** First quadrant low y coordinate.
113 * Same as y + cy - 1 in window coordinates. */
114 uint32_t yLowWC;
115 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
116 * Same as y - 1 in window coordinates. */
117 uint32_t yHighWC;
118 /** Alignment padding. */
119 uint32_t uAlignment;
120} VMSVGAVIEWPORT;
121
122/** Pointer to the private VMSVGA ring-3 state structure.
123 * @todo Still not entirely satisfired with the type name, but better than
124 * the previous lower/upper case only distinction. */
125typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
126/** Pointer to the private (implementation specific) VMSVGA3d state. */
127typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
128
129
130/**
131 * The VMSVGA device state.
132 *
133 * This instantatiated as VGASTATE::svga.
134 */
135typedef struct VMSVGAState
136{
137 /** The host window handle */
138 uint64_t u64HostWindowId;
139 /** The R3 FIFO pointer. */
140 R3PTRTYPE(uint32_t *) pFIFOR3;
141 /** The R0 FIFO pointer. */
142 R0PTRTYPE(uint32_t *) pFIFOR0;
143 /** R3 Opaque pointer to svga state. */
144 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
145 /** R3 Opaque pointer to 3d state. */
146 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
147 /** The separate VGA frame buffer in svga mode.
148 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
149 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
150 * SDK is making use of this to do VGA text output while testing other things in
151 * SVGA mode, displaying the result by switching back to VGA text mode. So,
152 * when entering SVGA mode we copy the first part of the frame buffer here and
153 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
154 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
155 /** R3 Opaque pointer to an external fifo cmd parameter. */
156 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
157
158 /** Guest physical address of the FIFO memory range. */
159 RTGCPHYS GCPhysFIFO;
160 /** Size in bytes of the FIFO memory range. */
161 uint32_t cbFIFO;
162 /** SVGA id. */
163 uint32_t u32SVGAId;
164 /** SVGA extensions enabled or not. */
165 uint32_t fEnabled;
166 /** SVGA memory area configured status. */
167 uint32_t fConfigured;
168 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
169 * VMSVGA_BUSY_F_EMT_FORCE). */
170 uint32_t volatile fBusy;
171#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
172#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
173 /** Traces (dirty page detection) enabled or not. */
174 uint32_t fTraces;
175 /** Guest OS identifier. */
176 uint32_t u32GuestId;
177 /** Scratch region size. */
178 uint32_t cScratchRegion;
179 /** Scratch array. */
180 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
181 /** Irq status. */
182 uint32_t u32IrqStatus;
183 /** Irq mask. */
184 uint32_t u32IrqMask;
185 /** Pitch lock. */
186 uint32_t u32PitchLock;
187 /** Current GMR id. (SVGA_REG_GMR_ID) */
188 uint32_t u32CurrentGMRId;
189 /** Register caps. */
190 uint32_t u32RegCaps;
191 uint32_t Padding2;
192 /** Physical address of command mmio range. */
193 RTIOPORT BasePort;
194 /** Port io index register. */
195 uint32_t u32IndexReg;
196 /** The support driver session handle for use with FIFORequestSem. */
197 R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
198 /** FIFO request semaphore. */
199 SUPSEMEVENT FIFORequestSem;
200 /** FIFO external command semaphore. */
201 R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
202 /** FIFO IO Thread. */
203 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
204 uint32_t uWidth;
205 uint32_t uHeight;
206 uint32_t uBpp;
207 uint32_t cbScanline;
208 /** Maximum width supported. */
209 uint32_t u32MaxWidth;
210 /** Maximum height supported. */
211 uint32_t u32MaxHeight;
212 /** Viewport rectangle, i.e. what's currently visible of the target host
213 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
214 * shrunk and scrolling applied, both the origin and size may differ. */
215 VMSVGAVIEWPORT viewport;
216 /** Action flags */
217 uint32_t u32ActionFlags;
218 /** SVGA 3d extensions enabled or not. */
219 bool f3DEnabled;
220 /** VRAM page monitoring enabled or not. */
221 bool fVRAMTracking;
222 /** External command to be executed in the FIFO thread. */
223 uint8_t volatile u8FIFOExtCommand;
224 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
225 * thread and does not want it do anything but the command. */
226 bool volatile fFifoExtCommandWakeup;
227#if defined(DEBUG_GMR_ACCESS) || defined(DEBUG_FIFO_ACCESS)
228 /** GMR debug access handler type handle. */
229 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
230 /** FIFO debug access handler type handle. */
231 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
232#endif
233
234 STAMCOUNTER StatRegBitsPerPixelWr;
235 STAMCOUNTER StatRegBusyWr;
236 STAMCOUNTER StatRegCursorXxxxWr;
237 STAMCOUNTER StatRegDepthWr;
238 STAMCOUNTER StatRegDisplayHeightWr;
239 STAMCOUNTER StatRegDisplayIdWr;
240 STAMCOUNTER StatRegDisplayIsPrimaryWr;
241 STAMCOUNTER StatRegDisplayPositionXWr;
242 STAMCOUNTER StatRegDisplayPositionYWr;
243 STAMCOUNTER StatRegDisplayWidthWr;
244 STAMCOUNTER StatRegEnableWr;
245 STAMCOUNTER StatRegGmrIdWr;
246 STAMCOUNTER StatRegGuestIdWr;
247 STAMCOUNTER StatRegHeightWr;
248 STAMCOUNTER StatRegIdWr;
249 STAMCOUNTER StatRegIrqMaskWr;
250 STAMCOUNTER StatRegNumDisplaysWr;
251 STAMCOUNTER StatRegNumGuestDisplaysWr;
252 STAMCOUNTER StatRegPaletteWr;
253 STAMCOUNTER StatRegPitchLockWr;
254 STAMCOUNTER StatRegPseudoColorWr;
255 STAMCOUNTER StatRegReadOnlyWr;
256 STAMCOUNTER StatRegScratchWr;
257 STAMCOUNTER StatRegSyncWr;
258 STAMCOUNTER StatRegTopWr;
259 STAMCOUNTER StatRegTracesWr;
260 STAMCOUNTER StatRegUnknownWr;
261 STAMCOUNTER StatRegWidthWr;
262
263 STAMCOUNTER StatRegBitsPerPixelRd;
264 STAMCOUNTER StatRegBlueMaskRd;
265 STAMCOUNTER StatRegBusyRd;
266 STAMCOUNTER StatRegBytesPerLineRd;
267 STAMCOUNTER StatRegCapabilitesRd;
268 STAMCOUNTER StatRegConfigDoneRd;
269 STAMCOUNTER StatRegCursorXxxxRd;
270 STAMCOUNTER StatRegDepthRd;
271 STAMCOUNTER StatRegDisplayHeightRd;
272 STAMCOUNTER StatRegDisplayIdRd;
273 STAMCOUNTER StatRegDisplayIsPrimaryRd;
274 STAMCOUNTER StatRegDisplayPositionXRd;
275 STAMCOUNTER StatRegDisplayPositionYRd;
276 STAMCOUNTER StatRegDisplayWidthRd;
277 STAMCOUNTER StatRegEnableRd;
278 STAMCOUNTER StatRegFbOffsetRd;
279 STAMCOUNTER StatRegFbSizeRd;
280 STAMCOUNTER StatRegFbStartRd;
281 STAMCOUNTER StatRegGmrIdRd;
282 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
283 STAMCOUNTER StatRegGmrMaxIdsRd;
284 STAMCOUNTER StatRegGmrsMaxPagesRd;
285 STAMCOUNTER StatRegGreenMaskRd;
286 STAMCOUNTER StatRegGuestIdRd;
287 STAMCOUNTER StatRegHeightRd;
288 STAMCOUNTER StatRegHostBitsPerPixelRd;
289 STAMCOUNTER StatRegIdRd;
290 STAMCOUNTER StatRegIrqMaskRd;
291 STAMCOUNTER StatRegMaxHeightRd;
292 STAMCOUNTER StatRegMaxWidthRd;
293 STAMCOUNTER StatRegMemorySizeRd;
294 STAMCOUNTER StatRegMemRegsRd;
295 STAMCOUNTER StatRegMemSizeRd;
296 STAMCOUNTER StatRegMemStartRd;
297 STAMCOUNTER StatRegNumDisplaysRd;
298 STAMCOUNTER StatRegNumGuestDisplaysRd;
299 STAMCOUNTER StatRegPaletteRd;
300 STAMCOUNTER StatRegPitchLockRd;
301 STAMCOUNTER StatRegPsuedoColorRd;
302 STAMCOUNTER StatRegRedMaskRd;
303 STAMCOUNTER StatRegScratchRd;
304 STAMCOUNTER StatRegScratchSizeRd;
305 STAMCOUNTER StatRegSyncRd;
306 STAMCOUNTER StatRegTopRd;
307 STAMCOUNTER StatRegTracesRd;
308 STAMCOUNTER StatRegUnknownRd;
309 STAMCOUNTER StatRegVramSizeRd;
310 STAMCOUNTER StatRegWidthRd;
311 STAMCOUNTER StatRegWriteOnlyRd;
312} VMSVGAState;
313
314
315DECLCALLBACK(int) vmsvgaR3IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
316 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
317
318DECLCALLBACK(void) vmsvgaPortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
319 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
320
321int vmsvgaInit(PPDMDEVINS pDevIns);
322int vmsvgaReset(PPDMDEVINS pDevIns);
323int vmsvgaDestruct(PPDMDEVINS pDevIns);
324int vmsvgaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
325int vmsvgaLoadDone(PPDMDEVINS pDevIns);
326int vmsvgaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
327DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
328DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
329
330#endif
331
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