1 | /* $Id: DevVGA-SVGA.h 76249 2018-12-16 09:36:17Z vboxsync $ */
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2 | /** @file
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3 | * VMware SVGA device
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4 | */
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5 | /*
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6 | * Copyright (C) 2013-2017 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | */
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16 |
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17 | #ifndef ___DevVGA_SVGA_h___
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18 | #define ___DevVGA_SVGA_h___
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19 |
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20 | #ifndef VBOX_WITH_VMSVGA
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21 | # error "VBOX_WITH_VMSVGA is not defined"
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22 | #endif
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23 |
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24 | #include <VBox/vmm/pdmthread.h>
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25 |
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26 | #include "vmsvga/svga3d_reg.h"
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27 |
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28 | /** Default FIFO size. */
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29 | #define VMSVGA_FIFO_SIZE _2M
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30 | /** The old FIFO size. */
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31 | #define VMSVGA_FIFO_SIZE_OLD _128K
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32 |
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33 | /** Default scratch region size. */
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34 | #define VMSVGA_SCRATCH_SIZE 0x100
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35 | /** Surface memory available to the guest. */
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36 | #define VMSVGA_SURFACE_SIZE (512*1024*1024)
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37 | /** Maximum GMR pages. */
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38 | #define VMSVGA_MAX_GMR_PAGES 0x100000
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39 | /** Maximum nr of GMR ids. */
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40 | #define VMSVGA_MAX_GMR_IDS _8K
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41 | /** Maximum number of GMR descriptors. */
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42 | #define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
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43 |
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44 | #define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
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45 |
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46 | /** For validating X and width values.
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47 | * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
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48 | #define VMSVGA_MAX_X _1M
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49 | /** For validating Y and height values.
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50 | * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
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51 | #define VMSVGA_MAX_Y _1M
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52 |
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53 | /* u32ActionFlags */
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54 | #define VMSVGA_ACTION_CHANGEMODE_BIT 0
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55 | #define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
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56 |
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57 |
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58 | #ifdef DEBUG
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59 | /* Enable to log FIFO register accesses. */
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60 | //# define DEBUG_FIFO_ACCESS
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61 | /* Enable to log GMR page accesses. */
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62 | //# define DEBUG_GMR_ACCESS
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63 | #endif
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64 |
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65 | #define VMSVGA_FIFO_EXTCMD_NONE 0
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66 | #define VMSVGA_FIFO_EXTCMD_TERMINATE 1
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67 | #define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
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68 | #define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
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69 | #define VMSVGA_FIFO_EXTCMD_RESET 4
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70 | #define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
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71 |
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72 | /** Size of the region to backup when switching into svga mode. */
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73 | #define VMSVGA_VGA_FB_BACKUP_SIZE _512K
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74 |
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75 | /** @def VMSVGA_WITH_VGA_FB_BACKUP
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76 | * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
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77 | * is SLOW and probably not entirely right, but it helps with getting 3dmark
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78 | * output and other stuff. */
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79 | #define VMSVGA_WITH_VGA_FB_BACKUP 1
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80 |
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81 | /** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
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82 | * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
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83 | #if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
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84 | # define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
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85 | #else
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86 | # undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
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87 | #endif
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88 |
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89 | /** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
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90 | * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
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91 | #if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
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92 | # define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
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93 | #else
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94 | # undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
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95 | #endif
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96 |
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97 |
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98 | typedef struct
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99 | {
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100 | PSSMHANDLE pSSM;
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101 | uint32_t uVersion;
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102 | uint32_t uPass;
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103 | } VMSVGA_STATE_LOAD;
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104 | typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
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105 |
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106 | /** Host screen viewport.
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107 | * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
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108 | typedef struct VMSVGAVIEWPORT
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109 | {
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110 | uint32_t x; /**< x coordinate (left). */
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111 | uint32_t y; /**< y coordinate (top). */
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112 | uint32_t cx; /**< width. */
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113 | uint32_t cy; /**< height. */
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114 | /** Right side coordinate (exclusive). Same as x + cx. */
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115 | uint32_t xRight;
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116 | /** First quadrant low y coordinate.
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117 | * Same as y + cy - 1 in window coordinates. */
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118 | uint32_t yLowWC;
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119 | /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
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120 | * Same as y - 1 in window coordinates. */
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121 | uint32_t yHighWC;
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122 | /** Alignment padding. */
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123 | uint32_t uAlignment;
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124 | } VMSVGAVIEWPORT;
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125 |
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126 | /**
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127 | * Screen object state.
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128 | */
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129 | typedef struct VMSVGASCREENOBJECT
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130 | {
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131 | /** SVGA_SCREEN_* flags. */
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132 | uint32_t fuScreen;
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133 | /** The screen object id. */
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134 | uint32_t idScreen;
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135 | /** The screen dimensions. */
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136 | int32_t xOrigin;
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137 | int32_t yOrigin;
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138 | uint32_t cWidth;
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139 | uint32_t cHeight;
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140 | /** Offset of the screen buffer in the guest VRAM. */
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141 | uint32_t offVRAM;
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142 | /** Scanline pitch. */
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143 | uint32_t cbPitch;
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144 | /** Bits per pixel. */
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145 | uint32_t cBpp;
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146 | bool fDefined;
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147 | bool fModified;
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148 | } VMSVGASCREENOBJECT;
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149 |
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150 | /** Pointer to the private VMSVGA ring-3 state structure.
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151 | * @todo Still not entirely satisfired with the type name, but better than
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152 | * the previous lower/upper case only distinction. */
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153 | typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
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154 | /** Pointer to the private (implementation specific) VMSVGA3d state. */
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155 | typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
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156 |
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157 |
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158 | /**
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159 | * The VMSVGA device state.
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160 | *
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161 | * This instantatiated as VGASTATE::svga.
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162 | */
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163 | typedef struct VMSVGAState
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164 | {
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165 | /** The R3 FIFO pointer. */
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166 | R3PTRTYPE(uint32_t *) pFIFOR3;
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167 | /** The R0 FIFO pointer. */
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168 | R0PTRTYPE(uint32_t *) pFIFOR0;
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169 | /** R3 Opaque pointer to svga state. */
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170 | R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
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171 | /** R3 Opaque pointer to 3d state. */
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172 | R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
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173 | /** The separate VGA frame buffer in svga mode.
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174 | * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
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175 | * separate frame buffer for VGA and allows concurrent use of both. The SVGA
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176 | * SDK is making use of this to do VGA text output while testing other things in
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177 | * SVGA mode, displaying the result by switching back to VGA text mode. So,
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178 | * when entering SVGA mode we copy the first part of the frame buffer here and
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179 | * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
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180 | R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
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181 | /** R3 Opaque pointer to an external fifo cmd parameter. */
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182 | R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
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183 |
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184 | /** Guest physical address of the FIFO memory range. */
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185 | RTGCPHYS GCPhysFIFO;
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186 | /** Size in bytes of the FIFO memory range.
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187 | * This may be smaller than cbFIFOConfig after restoring an old VM state. */
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188 | uint32_t cbFIFO;
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189 | /** The configured FIFO size. */
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190 | uint32_t cbFIFOConfig;
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191 | /** SVGA id. */
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192 | uint32_t u32SVGAId;
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193 | /** SVGA extensions enabled or not. */
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194 | uint32_t fEnabled;
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195 | /** SVGA memory area configured status. */
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196 | uint32_t fConfigured;
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197 | /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
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198 | * VMSVGA_BUSY_F_EMT_FORCE). */
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199 | uint32_t volatile fBusy;
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200 | #define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
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201 | #define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
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202 | /** Traces (dirty page detection) enabled or not. */
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203 | uint32_t fTraces;
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204 | /** Guest OS identifier. */
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205 | uint32_t u32GuestId;
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206 | /** Scratch region size (VMSVGAState::au32ScratchRegion). */
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207 | uint32_t cScratchRegion;
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208 | /** Irq status. */
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209 | uint32_t u32IrqStatus;
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210 | /** Irq mask. */
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211 | uint32_t u32IrqMask;
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212 | /** Pitch lock. */
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213 | uint32_t u32PitchLock;
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214 | /** Current GMR id. (SVGA_REG_GMR_ID) */
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215 | uint32_t u32CurrentGMRId;
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216 | /** Register caps. */
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217 | uint32_t u32RegCaps;
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218 | /** Physical address of command mmio range. */
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219 | RTIOPORT BasePort;
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220 | RTIOPORT Padding0;
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221 | /** Port io index register. */
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222 | uint32_t u32IndexReg;
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223 | /** The support driver session handle for use with FIFORequestSem. */
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224 | R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
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225 | /** FIFO request semaphore. */
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226 | SUPSEMEVENT FIFORequestSem;
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227 | /** FIFO external command semaphore. */
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228 | R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
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229 | /** FIFO IO Thread. */
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230 | R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
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231 | /** The legacy GFB mode registers. If used, they correspond to screen 0. */
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232 | /** True when the guest modifies the GFB mode registers. */
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233 | bool fGFBRegisters;
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234 | bool afPadding[7];
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235 | uint32_t uWidth;
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236 | uint32_t uHeight;
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237 | uint32_t uBpp;
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238 | uint32_t cbScanline;
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239 | /** Maximum width supported. */
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240 | uint32_t u32MaxWidth;
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241 | /** Maximum height supported. */
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242 | uint32_t u32MaxHeight;
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243 | /** Viewport rectangle, i.e. what's currently visible of the target host
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244 | * window. This is usually (0,0)(uWidth,uHeight), but if the window is
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245 | * shrunk and scrolling applied, both the origin and size may differ. */
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246 | VMSVGAVIEWPORT viewport;
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247 | /** Action flags */
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248 | uint32_t u32ActionFlags;
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249 | /** SVGA 3d extensions enabled or not. */
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250 | bool f3DEnabled;
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251 | /** VRAM page monitoring enabled or not. */
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252 | bool fVRAMTracking;
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253 | /** External command to be executed in the FIFO thread. */
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254 | uint8_t volatile u8FIFOExtCommand;
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255 | /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
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256 | * thread and does not want it do anything but the command. */
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257 | bool volatile fFifoExtCommandWakeup;
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258 | #if defined(DEBUG_GMR_ACCESS) || defined(DEBUG_FIFO_ACCESS)
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259 | /** GMR debug access handler type handle. */
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260 | PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
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261 | /** FIFO debug access handler type handle. */
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262 | PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
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263 | #endif
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264 | /** Number of GMRs. */
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265 | uint32_t cGMR;
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266 | uint32_t uScreenOffset; /* Used only for loading older saved states. */
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267 |
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268 | /** Scratch array.
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269 | * Putting this at the end since it's big it probably not . */
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270 | uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
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271 |
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272 | STAMCOUNTER StatRegBitsPerPixelWr;
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273 | STAMCOUNTER StatRegBusyWr;
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274 | STAMCOUNTER StatRegCursorXxxxWr;
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275 | STAMCOUNTER StatRegDepthWr;
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276 | STAMCOUNTER StatRegDisplayHeightWr;
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277 | STAMCOUNTER StatRegDisplayIdWr;
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278 | STAMCOUNTER StatRegDisplayIsPrimaryWr;
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279 | STAMCOUNTER StatRegDisplayPositionXWr;
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280 | STAMCOUNTER StatRegDisplayPositionYWr;
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281 | STAMCOUNTER StatRegDisplayWidthWr;
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282 | STAMCOUNTER StatRegEnableWr;
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283 | STAMCOUNTER StatRegGmrIdWr;
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284 | STAMCOUNTER StatRegGuestIdWr;
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285 | STAMCOUNTER StatRegHeightWr;
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286 | STAMCOUNTER StatRegIdWr;
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287 | STAMCOUNTER StatRegIrqMaskWr;
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288 | STAMCOUNTER StatRegNumDisplaysWr;
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289 | STAMCOUNTER StatRegNumGuestDisplaysWr;
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290 | STAMCOUNTER StatRegPaletteWr;
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291 | STAMCOUNTER StatRegPitchLockWr;
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292 | STAMCOUNTER StatRegPseudoColorWr;
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293 | STAMCOUNTER StatRegReadOnlyWr;
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294 | STAMCOUNTER StatRegScratchWr;
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295 | STAMCOUNTER StatRegSyncWr;
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296 | STAMCOUNTER StatRegTopWr;
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297 | STAMCOUNTER StatRegTracesWr;
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298 | STAMCOUNTER StatRegUnknownWr;
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299 | STAMCOUNTER StatRegWidthWr;
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300 |
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301 | STAMCOUNTER StatRegBitsPerPixelRd;
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302 | STAMCOUNTER StatRegBlueMaskRd;
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303 | STAMCOUNTER StatRegBusyRd;
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304 | STAMCOUNTER StatRegBytesPerLineRd;
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305 | STAMCOUNTER StatRegCapabilitesRd;
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306 | STAMCOUNTER StatRegConfigDoneRd;
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307 | STAMCOUNTER StatRegCursorXxxxRd;
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308 | STAMCOUNTER StatRegDepthRd;
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309 | STAMCOUNTER StatRegDisplayHeightRd;
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310 | STAMCOUNTER StatRegDisplayIdRd;
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311 | STAMCOUNTER StatRegDisplayIsPrimaryRd;
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312 | STAMCOUNTER StatRegDisplayPositionXRd;
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313 | STAMCOUNTER StatRegDisplayPositionYRd;
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314 | STAMCOUNTER StatRegDisplayWidthRd;
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315 | STAMCOUNTER StatRegEnableRd;
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316 | STAMCOUNTER StatRegFbOffsetRd;
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317 | STAMCOUNTER StatRegFbSizeRd;
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318 | STAMCOUNTER StatRegFbStartRd;
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319 | STAMCOUNTER StatRegGmrIdRd;
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320 | STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
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321 | STAMCOUNTER StatRegGmrMaxIdsRd;
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322 | STAMCOUNTER StatRegGmrsMaxPagesRd;
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323 | STAMCOUNTER StatRegGreenMaskRd;
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324 | STAMCOUNTER StatRegGuestIdRd;
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325 | STAMCOUNTER StatRegHeightRd;
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326 | STAMCOUNTER StatRegHostBitsPerPixelRd;
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327 | STAMCOUNTER StatRegIdRd;
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328 | STAMCOUNTER StatRegIrqMaskRd;
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329 | STAMCOUNTER StatRegMaxHeightRd;
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330 | STAMCOUNTER StatRegMaxWidthRd;
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331 | STAMCOUNTER StatRegMemorySizeRd;
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332 | STAMCOUNTER StatRegMemRegsRd;
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333 | STAMCOUNTER StatRegMemSizeRd;
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334 | STAMCOUNTER StatRegMemStartRd;
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335 | STAMCOUNTER StatRegNumDisplaysRd;
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336 | STAMCOUNTER StatRegNumGuestDisplaysRd;
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337 | STAMCOUNTER StatRegPaletteRd;
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338 | STAMCOUNTER StatRegPitchLockRd;
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339 | STAMCOUNTER StatRegPsuedoColorRd;
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340 | STAMCOUNTER StatRegRedMaskRd;
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341 | STAMCOUNTER StatRegScratchRd;
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342 | STAMCOUNTER StatRegScratchSizeRd;
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343 | STAMCOUNTER StatRegSyncRd;
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344 | STAMCOUNTER StatRegTopRd;
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345 | STAMCOUNTER StatRegTracesRd;
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346 | STAMCOUNTER StatRegUnknownRd;
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347 | STAMCOUNTER StatRegVramSizeRd;
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348 | STAMCOUNTER StatRegWidthRd;
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349 | STAMCOUNTER StatRegWriteOnlyRd;
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350 | } VMSVGAState;
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351 |
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352 |
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353 | DECLCALLBACK(int) vmsvgaR3IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
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354 | RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
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355 |
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356 | DECLCALLBACK(void) vmsvgaPortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
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357 | uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
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358 |
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359 | int vmsvgaInit(PPDMDEVINS pDevIns);
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360 | int vmsvgaReset(PPDMDEVINS pDevIns);
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361 | int vmsvgaDestruct(PPDMDEVINS pDevIns);
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362 | int vmsvgaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
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363 | int vmsvgaLoadDone(PPDMDEVINS pDevIns);
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364 | int vmsvgaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
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365 | DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
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366 | DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
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367 |
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368 | typedef struct VGAState *PVGASTATE;
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369 |
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370 | #ifdef IN_RING3
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371 | VMSVGASCREENOBJECT *vmsvgaGetScreenObject(PVGASTATE pThis, uint32_t idScreen);
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372 | int vmsvgaUpdateScreen(PVGASTATE pThis, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
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373 | #endif
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374 |
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375 | void vmsvgaGMRFree(PVGASTATE pThis, uint32_t idGMR);
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376 | int vmsvgaGMRTransfer(PVGASTATE pThis, const SVGA3dTransferType enmTransferType,
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377 | uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
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378 | SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
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379 | uint32_t cbWidth, uint32_t cHeight);
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380 |
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381 | void vmsvgaClipCopyBox(const SVGA3dSize *pSizeSrc,
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382 | const SVGA3dSize *pSizeDest,
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383 | SVGA3dCopyBox *pBox);
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384 | void vmsvgaClipBox(const SVGA3dSize *pSize,
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385 | SVGA3dBox *pBox);
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386 | void vmsvgaClipRect(SVGASignedRect const *pBound,
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387 | SVGASignedRect *pRect);
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388 |
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389 | #endif
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390 |
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