DevVGA-SVGA.h@ 93956

Last change on this file since 93956 was 93650, checked in by vboxsync, 3 years ago
VMM/PGM,*: Split the physical access handler type registration into separate ring-0 and ring-3 steps, expanding the type to 64-bit. bugref:10094
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 24.8 KB

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1	/* $Id: DevVGA-SVGA.h 93650 2022-02-08 10:43:53Z vboxsync $ */
2	/** @file
3	* VMware SVGA device
4	*/
5	/*
6	* Copyright (C) 2013-2022 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*/
16
17	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
18	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
19	#ifndef RT_WITHOUT_PRAGMA_ONCE
20	# pragma once
21	#endif
22
23	#ifndef VBOX_WITH_VMSVGA
24	# error "VBOX_WITH_VMSVGA is not defined"
25	#endif
26
27	#define VMSVGA_USE_EMT_HALT_CODE
28
29	#include <VBox/pci.h>
30	#include <VBox/vmm/pdmifs.h>
31	#include <VBox/vmm/pdmthread.h>
32	#include <VBox/vmm/stam.h>
33	#ifdef VMSVGA_USE_EMT_HALT_CODE
34	# include <VBox/vmm/vmapi.h>
35	# include <VBox/vmm/vmcpuset.h>
36	#endif
37
38	#include <iprt/avl.h>
39	#include <iprt/list.h>
40
41
42	/*
43	* PCI device IDs.
44	*/
45	#ifndef PCI_VENDOR_ID_VMWARE
46	# define PCI_VENDOR_ID_VMWARE 0x15AD
47	#endif
48	#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
49	# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
50	#endif
51
52	/* For "svga_overlay.h" */
53	#ifndef TRUE
54	# define TRUE 1
55	#endif
56	#ifndef FALSE
57	# define FALSE 0
58	#endif
59
60	/* VMSVGA headers. */
61	#include "vmsvga_headers_begin.h"
62	#pragma pack(1) /* VMSVGA structures are '__packed'. */
63	#include <svga3d_caps.h>
64	#include <svga3d_reg.h>
65	#include <svga3d_shaderdefs.h>
66	#include <svga_escape.h>
67	#include <svga_overlay.h>
68	#pragma pack()
69	#include "vmsvga_headers_end.h"
70
71	/**@def FLOAT_FMT_STR
72	* Format string bits to go with FLOAT_FMT_ARGS. */
73	#define FLOAT_FMT_STR "%s%u.%06u"
74	/** @def FLOAT_FMT_ARGS
75	* Format arguments for a float value, corresponding to FLOAT_FMT_STR.
76	* @param r The floating point value to format. */
77	#define FLOAT_FMT_ARGS(r) (r) >= 0.0f ? "" : "-", (unsigned)RT_ABS(r) \
78	, (unsigned)(RT_ABS((r) - (float)(unsigned)(r)) * 1000000.0f)
79
80	/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
81	#define SVGA_CMD_RECT_FILL 2
82	#define SVGA_CMD_DISPLAY_CURSOR 20
83	#define SVGA_CMD_MOVE_CURSOR 21
84
85	/*
86	* SVGA_CMD_RECT_FILL --
87	*
88	* Fill a rectangular area in the the GFB, and copy the result
89	* to any screens which intersect it.
90	*
91	* Deprecated?
92	*
93	* Availability:
94	* SVGA_CAP_RECT_FILL
95	*/
96
97	typedef
98	struct {
99	uint32_t pixel;
100	uint32_t destX;
101	uint32_t destY;
102	uint32_t width;
103	uint32_t height;
104	} SVGAFifoCmdRectFill;
105
106	/*
107	* SVGA_CMD_DISPLAY_CURSOR --
108	*
109	* Turn the cursor on or off.
110	*
111	* Deprecated.
112	*
113	* Availability:
114	* SVGA_CAP_CURSOR?
115	*/
116
117	typedef
118	struct {
119	uint32_t id; // Reserved, must be zero.
120	uint32_t state; // 0=off
121	} SVGAFifoCmdDisplayCursor;
122
123	/*
124	* SVGA_CMD_MOVE_CURSOR --
125	*
126	* Set the cursor position.
127	*
128	* Deprecated.
129	*
130	* Availability:
131	* SVGA_CAP_CURSOR?
132	*/
133
134	typedef
135	struct {
136	SVGASignedPoint pos;
137	} SVGAFifoCmdMoveCursor;
138
139
140	/** Default FIFO size. */
141	#define VMSVGA_FIFO_SIZE _2M
142	/** The old FIFO size. */
143	#define VMSVGA_FIFO_SIZE_OLD _128K
144
145	/** Default scratch region size. */
146	#define VMSVGA_SCRATCH_SIZE 0x100
147	/** Surface memory available to the guest. */
148	#define VMSVGA_SURFACE_SIZE (51210241024)
149	/** Maximum GMR pages. */
150	#define VMSVGA_MAX_GMR_PAGES 0x100000
151	/** Maximum nr of GMR ids. */
152	#define VMSVGA_MAX_GMR_IDS _8K
153	/** Maximum number of GMR descriptors. */
154	#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
155
156	#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
157
158	/** For validating X and width values.
159	* The code assumes it's at least an order of magnitude less than UINT32_MAX. */
160	#define VMSVGA_MAX_X _1M
161	/** For validating Y and height values.
162	* The code assumes it's at least an order of magnitude less than UINT32_MAX. */
163	#define VMSVGA_MAX_Y _1M
164
165	/* u32ActionFlags */
166	#define VMSVGA_ACTION_CHANGEMODE_BIT 0
167	#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
168
169
170	#ifdef DEBUG
171	/* Enable to log FIFO register accesses. */
172	//# define DEBUG_FIFO_ACCESS
173	/* Enable to log GMR page accesses. */
174	//# define DEBUG_GMR_ACCESS
175	#endif
176
177	#define VMSVGA_FIFO_EXTCMD_NONE 0
178	#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
179	#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
180	#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
181	#define VMSVGA_FIFO_EXTCMD_RESET 4
182	#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
183	#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
184
185	/** Size of the region to backup when switching into svga mode. */
186	#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
187
188	/** @def VMSVGA_WITH_VGA_FB_BACKUP
189	* Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
190	* is SLOW and probably not entirely right, but it helps with getting 3dmark
191	* output and other stuff. */
192	#define VMSVGA_WITH_VGA_FB_BACKUP 1
193
194	/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
195	* defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
196	#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) \|\| defined(DOXYGEN_RUNNING)
197	# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
198	#else
199	# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
200	#endif
201
202	/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
203	* defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
204	#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) \|\| defined(DOXYGEN_RUNNING)
205	# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
206	#else
207	# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
208	#endif
209
210
211	typedef struct
212	{
213	PSSMHANDLE pSSM;
214	uint32_t uVersion;
215	uint32_t uPass;
216	} VMSVGA_STATE_LOAD;
217	typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
218
219	/** Host screen viewport.
220	* (4th quadrant with negated Y values - usual Windows and X11 world view.) */
221	typedef struct VMSVGAVIEWPORT
222	{
223	uint32_t x; /*< x coordinate (left). /
224	uint32_t y; /*< y coordinate (top). /
225	uint32_t cx; /*< width. /
226	uint32_t cy; /*< height. /
227	/** Right side coordinate (exclusive). Same as x + cx. */
228	uint32_t xRight;
229	/** First quadrant low y coordinate.
230	* Same as y + cy - 1 in window coordinates. */
231	uint32_t yLowWC;
232	/** First quadrant high y coordinate (exclusive) - yLowWC + cy.
233	* Same as y - 1 in window coordinates. */
234	uint32_t yHighWC;
235	/** Alignment padding. */
236	uint32_t uAlignment;
237	} VMSVGAVIEWPORT;
238
239	#ifdef VBOX_WITH_VMSVGA3D
240	typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
241	#endif
242
243	/**
244	* Screen object state.
245	*/
246	typedef struct VMSVGASCREENOBJECT
247	{
248	/** SVGA_SCREEN_* flags. */
249	uint32_t fuScreen;
250	/** The screen object id. */
251	uint32_t idScreen;
252	/** The screen dimensions. */
253	int32_t xOrigin;
254	int32_t yOrigin;
255	uint32_t cWidth;
256	uint32_t cHeight;
257	/** Offset of the screen buffer in the guest VRAM. */
258	uint32_t offVRAM;
259	/** Scanline pitch. */
260	uint32_t cbPitch;
261	/** Bits per pixel. */
262	uint32_t cBpp;
263	/** The physical DPI that the guest expects for this screen. Zero, if the guest is not DPI aware. */
264	uint32_t cDpi;
265	bool fDefined;
266	bool fModified;
267	void *pvScreenBitmap;
268	#ifdef VBOX_WITH_VMSVGA3D
269	/** Pointer to the HW accelerated (3D) screen data. */
270	R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
271	#endif
272	} VMSVGASCREENOBJECT;
273
274	/** Pointer to the private VMSVGA ring-3 state structure.
275	* @todo Still not entirely satisfired with the type name, but better than
276	* the previous lower/upper case only distinction. */
277	typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
278	/** Pointer to the private (implementation specific) VMSVGA3d state. */
279	typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
280
281
282	/**
283	* The VMSVGA device state.
284	*
285	* This instantatiated as VGASTATE::svga.
286	*/
287	typedef struct VMSVGAState
288	{
289	/** Guest physical address of the FIFO memory range. */
290	RTGCPHYS GCPhysFIFO;
291	/** Size in bytes of the FIFO memory range.
292	* This may be smaller than cbFIFOConfig after restoring an old VM state. */
293	uint32_t cbFIFO;
294	/** The configured FIFO size. */
295	uint32_t cbFIFOConfig;
296	/** SVGA id. */
297	uint32_t u32SVGAId;
298	/** SVGA extensions enabled or not. */
299	uint32_t fEnabled;
300	/** SVGA memory area configured status. */
301	uint32_t fConfigured;
302	/** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
303	* VMSVGA_BUSY_F_EMT_FORCE). */
304	uint32_t volatile fBusy;
305	#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /*< The normal true/false busy FIFO bit. /
306	#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /*< Bit preventing race status flickering when EMT kicks the FIFO thread. /
307	/** Traces (dirty page detection) enabled or not. */
308	uint32_t fTraces;
309	/** Guest OS identifier. */
310	uint32_t u32GuestId;
311	/** Scratch region size (VMSVGAState::au32ScratchRegion). */
312	uint32_t cScratchRegion;
313	/** Irq status. */
314	uint32_t u32IrqStatus;
315	/** Irq mask. */
316	uint32_t u32IrqMask;
317	/** Pitch lock. */
318	uint32_t u32PitchLock;
319	/** Current GMR id. (SVGA_REG_GMR_ID) */
320	uint32_t u32CurrentGMRId;
321	/** SVGA device capabilities. */
322	uint32_t u32DeviceCaps;
323	uint32_t Padding0; /* Used to be I/O port base address. */
324	/** Port io index register. */
325	uint32_t u32IndexReg;
326	/** FIFO request semaphore. */
327	SUPSEMEVENT hFIFORequestSem;
328	/** The last seen SVGA_FIFO_CURSOR_COUNT value.
329	* Used by the FIFO thread and its watchdog. */
330	uint32_t uLastCursorUpdateCount;
331	/** Indicates that the FIFO thread is sleeping and might need waking up. */
332	bool volatile fFIFOThreadSleeping;
333	/** The legacy GFB mode registers. If used, they correspond to screen 0. */
334	/** True when the guest modifies the GFB mode registers. */
335	bool fGFBRegisters;
336	/** SVGA 3D overlay enabled or not. */
337	bool f3DOverlayEnabled;
338	/** Indicates that the guest behaves incorrectly. */
339	bool volatile fBadGuest;
340	bool afPadding[4];
341	uint32_t uWidth;
342	uint32_t uHeight;
343	uint32_t uBpp;
344	uint32_t cbScanline;
345	uint32_t uHostBpp;
346	/** Maximum width supported. */
347	uint32_t u32MaxWidth;
348	/** Maximum height supported. */
349	uint32_t u32MaxHeight;
350	/** Viewport rectangle, i.e. what's currently visible of the target host
351	* window. This is usually (0,0)(uWidth,uHeight), but if the window is
352	* shrunk and scrolling applied, both the origin and size may differ. */
353	VMSVGAVIEWPORT viewport;
354	/** Action flags */
355	uint32_t u32ActionFlags;
356	/** SVGA 3d extensions enabled or not. */
357	bool f3DEnabled;
358	/** VRAM page monitoring enabled or not. */
359	bool fVRAMTracking;
360	/** External command to be executed in the FIFO thread. */
361	uint8_t volatile u8FIFOExtCommand;
362	/** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
363	* thread and does not want it do anything but the command. */
364	bool volatile fFifoExtCommandWakeup;
365	#ifdef DEBUG_GMR_ACCESS
366	/** GMR debug access handler type handle. */
367	PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
368	#endif
369	#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) \|\| defined(DEBUG_FIFO_ACCESS)
370	/** FIFO debug access handler type handle. */
371	PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
372	#endif
373	/** Number of GMRs (VMSVGA_MAX_GMR_IDS, count of elements in VMSVGAR3STATE::paGMR array). */
374	uint32_t cGMR;
375	uint32_t uScreenOffset; /* Used only for loading older saved states. */
376
377	/** Legacy cursor state. */
378	uint32_t uCursorX;
379	uint32_t uCursorY;
380	uint32_t uCursorID;
381	uint32_t uCursorOn;
382
383	/** Scratch array.
384	* Putting this at the end since it's big it probably not . */
385	uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
386
387	/** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
388	uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
389	/** Index written to the SVGA_REG_DEV_CAP register. */
390	uint32_t u32DevCapIndex;
391	/** Low 32 bit of a command buffer address written to the SVGA_REG_COMMAND_LOW register. */
392	uint32_t u32RegCommandLow;
393	/** High 32 bit of a command buffer address written to the SVGA_REG_COMMAND_HIGH register. */
394	uint32_t u32RegCommandHigh;
395
396	STAMCOUNTER StatRegBitsPerPixelWr;
397	STAMCOUNTER StatRegBusyWr;
398	STAMCOUNTER StatRegCursorXWr;
399	STAMCOUNTER StatRegCursorYWr;
400	STAMCOUNTER StatRegCursorIdWr;
401	STAMCOUNTER StatRegCursorOnWr;
402	STAMCOUNTER StatRegDepthWr;
403	STAMCOUNTER StatRegDisplayHeightWr;
404	STAMCOUNTER StatRegDisplayIdWr;
405	STAMCOUNTER StatRegDisplayIsPrimaryWr;
406	STAMCOUNTER StatRegDisplayPositionXWr;
407	STAMCOUNTER StatRegDisplayPositionYWr;
408	STAMCOUNTER StatRegDisplayWidthWr;
409	STAMCOUNTER StatRegEnableWr;
410	STAMCOUNTER StatRegGmrIdWr;
411	STAMCOUNTER StatRegGuestIdWr;
412	STAMCOUNTER StatRegHeightWr;
413	STAMCOUNTER StatRegIdWr;
414	STAMCOUNTER StatRegIrqMaskWr;
415	STAMCOUNTER StatRegNumDisplaysWr;
416	STAMCOUNTER StatRegNumGuestDisplaysWr;
417	STAMCOUNTER StatRegPaletteWr;
418	STAMCOUNTER StatRegPitchLockWr;
419	STAMCOUNTER StatRegPseudoColorWr;
420	STAMCOUNTER StatRegReadOnlyWr;
421	STAMCOUNTER StatRegScratchWr;
422	STAMCOUNTER StatRegSyncWr;
423	STAMCOUNTER StatRegTopWr;
424	STAMCOUNTER StatRegTracesWr;
425	STAMCOUNTER StatRegUnknownWr;
426	STAMCOUNTER StatRegWidthWr;
427	STAMCOUNTER StatRegCommandLowWr;
428	STAMCOUNTER StatRegCommandHighWr;
429	STAMCOUNTER StatRegDevCapWr;
430	STAMCOUNTER StatRegCmdPrependLowWr;
431	STAMCOUNTER StatRegCmdPrependHighWr;
432
433	STAMCOUNTER StatRegBitsPerPixelRd;
434	STAMCOUNTER StatRegBlueMaskRd;
435	STAMCOUNTER StatRegBusyRd;
436	STAMCOUNTER StatRegBytesPerLineRd;
437	STAMCOUNTER StatRegCapabilitesRd;
438	STAMCOUNTER StatRegConfigDoneRd;
439	STAMCOUNTER StatRegCursorXRd;
440	STAMCOUNTER StatRegCursorYRd;
441	STAMCOUNTER StatRegCursorIdRd;
442	STAMCOUNTER StatRegCursorOnRd;
443	STAMCOUNTER StatRegDepthRd;
444	STAMCOUNTER StatRegDisplayHeightRd;
445	STAMCOUNTER StatRegDisplayIdRd;
446	STAMCOUNTER StatRegDisplayIsPrimaryRd;
447	STAMCOUNTER StatRegDisplayPositionXRd;
448	STAMCOUNTER StatRegDisplayPositionYRd;
449	STAMCOUNTER StatRegDisplayWidthRd;
450	STAMCOUNTER StatRegEnableRd;
451	STAMCOUNTER StatRegFbOffsetRd;
452	STAMCOUNTER StatRegFbSizeRd;
453	STAMCOUNTER StatRegFbStartRd;
454	STAMCOUNTER StatRegGmrIdRd;
455	STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
456	STAMCOUNTER StatRegGmrMaxIdsRd;
457	STAMCOUNTER StatRegGmrsMaxPagesRd;
458	STAMCOUNTER StatRegGreenMaskRd;
459	STAMCOUNTER StatRegGuestIdRd;
460	STAMCOUNTER StatRegHeightRd;
461	STAMCOUNTER StatRegHostBitsPerPixelRd;
462	STAMCOUNTER StatRegIdRd;
463	STAMCOUNTER StatRegIrqMaskRd;
464	STAMCOUNTER StatRegMaxHeightRd;
465	STAMCOUNTER StatRegMaxWidthRd;
466	STAMCOUNTER StatRegMemorySizeRd;
467	STAMCOUNTER StatRegMemRegsRd;
468	STAMCOUNTER StatRegMemSizeRd;
469	STAMCOUNTER StatRegMemStartRd;
470	STAMCOUNTER StatRegNumDisplaysRd;
471	STAMCOUNTER StatRegNumGuestDisplaysRd;
472	STAMCOUNTER StatRegPaletteRd;
473	STAMCOUNTER StatRegPitchLockRd;
474	STAMCOUNTER StatRegPsuedoColorRd;
475	STAMCOUNTER StatRegRedMaskRd;
476	STAMCOUNTER StatRegScratchRd;
477	STAMCOUNTER StatRegScratchSizeRd;
478	STAMCOUNTER StatRegSyncRd;
479	STAMCOUNTER StatRegTopRd;
480	STAMCOUNTER StatRegTracesRd;
481	STAMCOUNTER StatRegUnknownRd;
482	STAMCOUNTER StatRegVramSizeRd;
483	STAMCOUNTER StatRegWidthRd;
484	STAMCOUNTER StatRegWriteOnlyRd;
485	STAMCOUNTER StatRegCommandLowRd;
486	STAMCOUNTER StatRegCommandHighRd;
487	STAMCOUNTER StatRegMaxPrimBBMemRd;
488	STAMCOUNTER StatRegGBMemSizeRd;
489	STAMCOUNTER StatRegDevCapRd;
490	STAMCOUNTER StatRegCmdPrependLowRd;
491	STAMCOUNTER StatRegCmdPrependHighRd;
492	STAMCOUNTER StatRegScrnTgtMaxWidthRd;
493	STAMCOUNTER StatRegScrnTgtMaxHeightRd;
494	STAMCOUNTER StatRegMobMaxSizeRd;
495	} VMSVGAState, VMSVGASTATE;
496
497
498	/**
499	* The VMSVGA device state for ring-3
500	*
501	* This instantatiated as VGASTATER3::svga.
502	*/
503	typedef struct VMSVGASTATER3
504	{
505	/** The R3 FIFO pointer. */
506	R3PTRTYPE(uint32_t *) pau32FIFO;
507	/** R3 Opaque pointer to svga state. */
508	R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
509	/** R3 Opaque pointer to 3d state. */
510	R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
511	/** The separate VGA frame buffer in svga mode.
512	* Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
513	* separate frame buffer for VGA and allows concurrent use of both. The SVGA
514	* SDK is making use of this to do VGA text output while testing other things in
515	* SVGA mode, displaying the result by switching back to VGA text mode. So,
516	* when entering SVGA mode we copy the first part of the frame buffer here and
517	* direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
518	R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
519	/** R3 Opaque pointer to an external fifo cmd parameter. */
520	R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
521
522	/** FIFO external command semaphore. */
523	R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
524	/** FIFO IO Thread. */
525	R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
526	} VMSVGASTATER3;
527
528
529	/**
530	* The VMSVGA device state for ring-0
531	*
532	* This instantatiated as VGASTATER0::svga.
533	*/
534	typedef struct VMSVGASTATER0
535	{
536	/** The R0 FIFO pointer.
537	* @note This only points to the _first_ _page_ of the FIFO! */
538	R0PTRTYPE(uint32_t *) pau32FIFO;
539	} VMSVGASTATER0;
540
541
542	typedef struct VGAState *PVGASTATE;
543	typedef struct VGASTATER3 *PVGASTATER3;
544	typedef struct VGASTATER0 *PVGASTATER0;
545	typedef struct VGASTATERC *PVGASTATERC;
546	typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
547
548	DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
549	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
550	DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb);
551	DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
552
553	DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
554	uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
555	DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
556
557	int vmsvgaR3Init(PPDMDEVINS pDevIns);
558	int vmsvgaR3Reset(PPDMDEVINS pDevIns);
559	int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
560	int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
561	int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
562	int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
563	DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
564	DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
565	void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
566
567	#ifdef IN_RING3
568	VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
569	int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
570	#endif
571
572	int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
573	uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
574	SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
575	uint32_t cbWidth, uint32_t cHeight);
576
577	void vmsvgaR3ClipCopyBox(const SVGA3dSize pSizeSrc, const SVGA3dSize pSizeDest, SVGA3dCopyBox *pBox);
578	void vmsvgaR3ClipBox(const SVGA3dSize pSize, SVGA3dBox pBox);
579	void vmsvgaR3ClipRect(SVGASignedRect const pBound, SVGASignedRect pRect);
580	void vmsvgaR3Clip3dRect(SVGA3dRect const pBound, SVGA3dRect RT_UNTRUSTED_GUEST pRect);
581
582	/*
583	* GBO (Guest Backed Object).
584	* A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)
585	* and Object Tables which the guest shares with the host.
586	*
587	* A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order
588	* to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to
589	* map the guest pages into the host R3 memory and access them directly.
590	*/
591
592	/* GBO descriptor. */
593	typedef struct VMSVGAGBODESCRIPTOR
594	{
595	RTGCPHYS GCPhys;
596	uint64_t cPages;
597	} VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;
598	typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;
599
600	/* GBO.
601	*/
602	typedef struct VMSVGAGBO
603	{
604	uint32_t fGboFlags;
605	uint32_t cTotalPages;
606	uint32_t cbTotal;
607	uint32_t cDescriptors;
608	PVMSVGAGBODESCRIPTOR paDescriptors;
609	void pvHost; / Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */
610	} VMSVGAGBO, *PVMSVGAGBO;
611	typedef VMSVGAGBO const *PCVMSVGAGBO;
612
613	#define VMSVGAGBO_F_WRITE_PROTECTED 0x1
614	#define VMSVGAGBO_F_HOST_BACKED 0x2
615
616	#define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)
617
618	/* MOB is also a GBO.
619	*/
620	typedef struct VMSVGAMOB
621	{
622	AVLU32NODECORE Core; /* Key is the mobid. */
623	RTLISTNODE nodeLRU;
624	VMSVGAGBO Gbo;
625	} VMSVGAMOB, *PVMSVGAMOB;
626	typedef VMSVGAMOB const *PCVMSVGAMOB;
627
628	int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid);
629	void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
630	int vmsvgaR3MobBackingStoreWriteToGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
631	int vmsvgaR3MobBackingStoreReadFromGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
632	void *vmsvgaR3MobBackingStorePtr(PVMSVGAMOB pMob, uint32_t off);
633
634	DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob)
635	{
636	if (pMob)
637	return pMob->Gbo.cbTotal;
638	return 0;
639	}
640
641	DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob)
642	{
643	if (pMob)
644	return pMob->Core.Key;
645	return SVGA_ID_INVALID;
646	}
647
648	#ifdef DEBUG
649	#define DEBUG_BREAKPOINT_TEST() do { ASMBreakpoint(); } while (0)
650	#else
651	#define DEBUG_BREAKPOINT_TEST() do { } while (0)
652	#endif
653
654	#ifdef VBOX_WITH_VMSVGA3D
655	int vmsvgaR3UpdateGBSurface(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImageId, SVGA3dBox const pBox);
656	int vmsvgaR3UpdateGBSurfaceEx(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImageId, SVGA3dBox const pBoxDst, SVGA3dPoint const *pPtSrc);
657	#endif
658
659	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 93956

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